CN115561936A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN115561936A
CN115561936A CN202211327156.1A CN202211327156A CN115561936A CN 115561936 A CN115561936 A CN 115561936A CN 202211327156 A CN202211327156 A CN 202211327156A CN 115561936 A CN115561936 A CN 115561936A
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CN
China
Prior art keywords
substrate
spacer
array substrate
display panel
opposite
Prior art date
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Pending
Application number
CN202211327156.1A
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Chinese (zh)
Inventor
彭元鸿
黎敏
黄中浩
闵泰烨
李哲
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Chongqing BOE Optoelectronics Technology Co Ltd
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Application filed by BOE Technology Group Co Ltd, Chongqing BOE Optoelectronics Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202211327156.1A priority Critical patent/CN115561936A/en
Publication of CN115561936A publication Critical patent/CN115561936A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • G02F1/13394Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • G02F1/13396Spacers having different sizes
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line

Abstract

The embodiment of the application provides a display panel and a display device, wherein, the display panel includes: an array substrate; an opposing substrate disposed opposite to the array substrate; the spacer column group comprises a first spacer column and a second spacer column, the first spacer column is arranged on one side of the array substrate facing the opposite substrate, the second spacer column is arranged on one side of the opposite substrate facing the array substrate, and one end of the second spacer column departing from the opposite substrate is abutted with one end of the first spacer column departing from the array substrate; wherein, along the direction perpendicular to the array substrate, the ratio of the size of the first spacer columns to the size of the second spacer columns is in the range of [0.9,1.1]. The technical scheme of this application embodiment can promote the high homogeneity of spacer post group, reduces the risk that drops of spacer post group.

Description

Display panel and display device
Technical Field
The application relates to the technical field of display, in particular to a display panel and a display device.
Background
Liquid Crystal of a Liquid Crystal Display (LCD) is disposed between an array substrate and a counter substrate. Spacers (PS) are used between the array substrate and the counter substrate to support the cell thickness. In the related art, the liquid crystal display with low cell thickness responds more quickly, so that the liquid crystal display with low cell thickness is more and more popular with users. However, the spacers of the lcd with low cell thickness have poor uniformity in height and a high risk of falling off.
Disclosure of Invention
Embodiments of the present application provide a display panel and a display device to solve or alleviate one or more technical problems in the prior art.
As an aspect of an embodiment of the present application, an embodiment of the present application provides a display panel including: an array substrate; an opposing substrate disposed opposite to the array substrate; the spacer column group comprises a first spacer column and a second spacer column, the first spacer column is arranged on one side of the array substrate facing the opposite substrate, the second spacer column is arranged on one side of the opposite substrate facing the array substrate, and one end of the second spacer column departing from the opposite substrate is abutted with one end of the first spacer column departing from the array substrate; wherein, along the direction perpendicular to the array substrate, the ratio of the size of the first spacer columns to the size of the second spacer columns is in the range of [0.9,1.1].
In one embodiment, the set of dunnage columns further comprises: and the third spacer columns are arranged on the surface of one side of the opposite substrate, which faces the array substrate, are arranged at intervals with the second spacer columns, and are larger than or equal to the second spacer columns in size along the direction perpendicular to the array substrate.
In one embodiment, the set of dunnage columns further comprises: and the third spacer columns are arranged on the surface of one side of the opposite substrate, which faces the array substrate, and are arranged at intervals with the second spacer columns, and gaps are reserved between one ends of the third spacer columns, which deviate from the opposite substrate, and the array substrate.
In one embodiment, no spacer pillar is disposed between the third spacer pillar and the array substrate.
In one embodiment, the minimum distance between the third spacer pillar and the array substrate is s, where s satisfies: s is more than 0 and less than or equal to 0.4 mu m.
In one embodiment, an array substrate includes: a first substrate; the grid metal layer is arranged on one side of the first substrate; the source drain metal layer is arranged on one side of the grid metal layer, which is far away from the first substrate; the touch metal layer is arranged on one side, away from the first substrate, of the source drain metal layer, and the orthographic projection of the touch metal layer on the first substrate is overlapped with the orthographic projection of the spacer column group on the first substrate.
In one embodiment, the gate metal layer includes a plurality of gate lines arranged along a first direction, each gate line extending along a second direction, the second direction being perpendicular to the first direction; the source-drain metal layer comprises a plurality of data lines arranged along the second direction, the data lines and the grid lines are arranged in a crossed mode, the data lines extend along the first direction respectively, and orthographic projections of the spacer column group on the first substrate are overlapped with orthographic projections of crossing regions of the grid lines and the data lines on the first substrate.
In one embodiment, the array substrate comprises a first substrate, and a plurality of gate lines and a plurality of data lines arranged on one side of the first substrate, wherein the plurality of data lines are arranged in a crossing manner with the plurality of gate lines, and orthographic projection areas of the plurality of gate lines and the plurality of data lines on the first substrate are first light-shielding areas; the opposite substrate comprises a second substrate and a black matrix arranged on one side of the second substrate, and an orthographic projection area of the black matrix on the second substrate is a second shading area; the orthographic projection of the spacer column group on the array substrate is overlapped with the first shading area, and the orthographic projection of the spacer column group on the opposite substrate is overlapped with the second shading area.
In one embodiment, a maximum distance between a surface of the opposite substrate facing the array substrate and a surface of the array substrate facing the opposite substrate is 1.6 μm to 2.8 μm.
As another aspect of the present application, embodiments of the present application provide a display device including a backlight and a display panel according to any one of the embodiments of the above aspects of the present application.
By adopting the technical scheme, the embodiment of the application can improve the height uniformity of the spacer column group and reduce the falling risk of the spacer column group.
The foregoing summary is provided for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present application will be readily apparent by reference to the drawings and following detailed description.
Drawings
In the drawings, like reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily to scale. It is appreciated that these drawings depict only some embodiments in accordance with the disclosure and are therefore not to be considered limiting of its scope.
Fig. 1 is a schematic cross-sectional view illustrating a display panel according to the related art;
fig. 2 is a schematic partial structure view illustrating an array substrate of a display panel according to the related art;
fig. 3 is a partial schematic structural view illustrating an opposite substrate of a display panel in the related art;
fig. 4 illustrates a microscopic view of a spacer of a display panel in the related art;
FIG. 5 is a schematic cross-sectional view illustrating a display panel according to an embodiment of the present application;
fig. 6 is a schematic cross-sectional view illustrating a display panel according to another embodiment of the present application;
fig. 7 is a schematic partial structure diagram of an array substrate according to an embodiment of the present application.
Detailed Description
In the following, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.
Currently, a display panel includes an array substrate and an opposite substrate that are oppositely disposed. The array substrate comprises an array substrate and a counter substrate, wherein a main spacer and an auxiliary spacer are arranged between the array substrate and the counter substrate, and the main spacer and the auxiliary spacer are arranged on the counter substrate. The main spacer is likely to slide during transportation or pressing, and scratch the alignment film in the light-transmitting region of the opposite array substrate, thereby causing disorder of alignment of liquid crystal and resulting in Mura defect (various traces due to uneven brightness of the display panel). In order to reduce the defective rate, the main spacers and the auxiliary spacers need to be farther away from the black matrix edge of the opposite substrate, which may reduce the transmittance of the display panel.
In order to solve the above problems, as shown in fig. 1 to 4, in the related art, the display panel 1 adopts a cross spacer structure. The counter substrate 2 is provided with a first main spacer 21 and a first auxiliary spacer 22, and the height of the first main spacer 21 is greater than that of the first auxiliary spacer 22. The array substrate 3 is provided with a second main spacer 31 and a second auxiliary spacer 32, the second auxiliary spacer 32 is spaced from the first auxiliary spacer 22, and the second main spacer 31 abuts against the first main spacer 21. Since the second main spacer 31 directly contacts with the first main spacer 21, the first main spacer 21 does not scratch the alignment film in the light-transmitting area of the array substrate 3 due to sliding, so that Mura defects can be avoided, the first main spacer 21 and the first auxiliary spacer 22 can be closer to the edge of the black matrix of the opposite substrate 2, and the transmittance of the display panel 1 is improved.
However, in the case where the cell thickness of the display panel 1 is low, the actual height of the first auxiliary spacer 22 is extremely low, the height uniformity of the spacers (i.e., the first main spacer 21, the first auxiliary spacer 22, the second main spacer 31, and the second auxiliary spacer 32) is poor, and the risk of falling off is large.
Exemplarily, in conjunction with fig. 1, a side surface of the array substrate 3 facing the opposite substrate 2 may include a first portion and a second portion protruding from the first portion. The second main spacer 31 and the second auxiliary spacer 32 are both arranged on the secondAnd (4) partial. The second part protrudes from the first part by a dimension L 1 0.3 μm, the cell thickness L of the display panel 2 2.1 μm, the distance h between the first auxiliary spacer 22 and the second auxiliary spacer 32 1 A compression ratio r of the first main spacer 21 and the second main spacer 22 after the cell alignment of 0.3 μm 1 Is 90%, and the heights of the first main spacer 21, the second main spacer 31 and the second auxiliary spacer 32 are equal.
Maximum height h of spacer after box pairing max1 =L 2 -L 1 =1.8μm;
Height h of first main spacer 21, second main spacer 31 and second auxiliary spacer 32 2 =h max1 ÷2÷r 1 =1.0μm;
Height h of the first auxiliary spacer 22 3 =h 2 -h 1 =0.7μm。
It can be seen that in the case of a cell thickness of 2.1 μm, the height of the first auxiliary spacer 22 is only 0.7 μm, the uniformity of the spacer is poor, and the risk of falling off is high.
A display panel 10 according to an embodiment of the first aspect of the present application is described below with reference to fig. 5-7.
Fig. 5 is a schematic cross-sectional view illustrating a display panel 10 according to an embodiment of the present application; fig. 6 is a schematic cross-sectional view of a display panel 10 according to another embodiment of the present disclosure. As shown in fig. 5 and 6, the display panel 10 includes an array substrate 100, an opposite substrate 200, and a set of stud spacers.
Exemplarily, the array substrate 100 may include a first substrate 110, at least one thin film transistor, and a pixel electrode layer 150. The thin film transistor is disposed on one side of the first substrate 110, and the pixel electrode layer 150 is disposed on one side of the thin film transistor away from the first substrate 110 and electrically connected to the thin film transistor. The counter substrate 200 is disposed opposite to the array substrate 100.
Each of the thin film transistors may exemplarily include a gate electrode, an active layer insulated from the gate electrode, and first and second poles overlapping the active layer, one of the first and second poles being a source electrode and the other of the first and second poles being a drain electrode. Wherein the gate and the active layer may be insulated by a gate insulating layer 120. The pixel electrode layer 150 may be electrically connected to the first electrode.
The color film layer may be disposed on the opposite substrate 200 or the array substrate 100. For example, in the example of fig. 5 and 6, the opposite substrate 200 may include a black matrix 230, a color film layer 240, and a flat layer 250, wherein the black matrix 230 and the color film layer 240 are disposed on a side of the second substrate 210 facing the array substrate 100, and the flat layer 250 is disposed on a side of the color film layer 240 facing away from the second substrate 210. The counter substrate 200 may further comprise a transparent electrode layer for shielding an electric field, the transparent electrode layer being arranged on a side of the second substrate 210 facing away from the second alignment layer 220. The transparent electrode layer may be prepared before the black matrix 230 is prepared, or may be prepared after the display panel 10 is thinned. In which liquid crystal is disposed between the array substrate 100 and the opposite substrate 200.
The spacer pillar set includes a first spacer pillar 300 and a second spacer pillar 400. The first spacer pillar 300 is disposed on a surface of the pixel electrode layer 150 facing the opposite substrate 200. The second spacer pillar 400 is disposed on a side surface of the opposite substrate 200 facing the array substrate 100, and one end of the second spacer pillar 400 facing away from the opposite substrate 200 abuts against one end of the first spacer pillar 300 facing away from the array substrate 100.
For example, an end of the second spacer pillar 400 facing away from the opposite substrate 200 and an end of the first spacer pillar 300 facing away from the array substrate 100 may constitute a crossed cross-shaped structure. In the case where the first and/or second spacer pillars 300 and 400 slide, the second spacer pillar 400 and the first spacer pillar 300 may always maintain contact.
Thus, after the array substrate 100 and the opposite substrate 200 are aligned to the cassette, the second spacer posts 400 and the first spacer posts 300 can be kept in contact, thereby providing a supporting force to maintain the cassette thickness between the array substrate 100 and the opposite substrate 200. Moreover, because the interaction force has all the time between first dottle pin 300 and the second dottle pin 400, the dottle pin group can not be because the orientation membrane in the 100 light-transmitting areas of slip fish tail array substrate, consequently, can avoid producing the Mura is bad, the dottle pin group can be closer with opposition base plate 200's black matrix edge distance, thereby promote display panel 10's transmissivity, display panel 10's size can be great relatively simultaneously, thereby can promote the cutting productivity, reduce the use quantity of package material, reduce the operation cost.
In a direction perpendicular to the array substrate 100, a ratio of a dimension of the first spacer pillar 300 to a dimension of the second spacer pillar 400 is [0.9,1.1], that is, a ratio of a height of the first spacer pillar 300 to a height of the second spacer pillar 400 is [0.9,1.1]. Alternatively, the ratio of the height of the first spacer pillar 300 to the height of the second spacer pillar 400 may be 1, and the height of the first spacer pillar 300 is equal to the height of the second spacer pillar 400, but is not limited thereto. Thus, the height difference between the first spacer column 300 and the second spacer column 400 is small, and the height uniformity of the first spacer column 300 and the second spacer column 400 can be improved, so that the falling risk of the first spacer column 300 and the second spacer column 400 is reduced, and the yield and the display uniformity of the display panel 10 are improved.
In an embodiment, with reference to fig. 5 and 6, the spacer pillar set further includes a third spacer pillar 500, the third spacer pillar 500 is disposed on a side surface of the opposite substrate 200 facing the array substrate 100 and is spaced apart from the second spacer pillar 400, and a dimension of the third spacer pillar 500 is greater than or equal to a dimension of the second spacer pillar 400 in a direction perpendicular to the array substrate 100, that is, a height of the third spacer pillar 500 is greater than or equal to a height of the second spacer pillar 400. Illustratively, the cross-sectional shape of the third spacer pillar 500 may be circular, polygonal (e.g., rectangular, regular hexagonal, or regular octagonal, etc.). But is not limited thereto.
In the case that the display panel 10 is pressed, the distance between one end of the third spacer pillar 500 facing away from the opposite substrate 200 and the array substrate 100 is gradually decreased and finally contacts the array substrate 100, so that the pressure resistance can be improved. Also, after the pressing force applied to the display panel 10 is removed, the first and second spacer pillars 300 and 400 may provide a restoring force to restore the third spacer pillar 500 to a home position, that is, an end of the third spacer pillar 500 facing away from the opposite substrate 200 is spaced apart from the array substrate 100.
Illustratively, referring to fig. 5 and 6, the facing opposite substrate of the array substrate 100One side surface of 200 includes a third portion and a fourth portion protruding from the third portion. The second and third spacer columns 400 and 500 are disposed at the fourth portion. A dimension L of the fourth portion protruding from the third portion 3 0.3 μm, the cell thickness L of the display panel 10 4 2.1 μm, the distance h between the third spacer pillar 500 and the array substrate 3 A compression ratio r of 0.2 μm for the first and second spacer pillars 300 and 400 after cartridge alignment 2 Is 90%, and the heights of the first and second spacer pillars 300 and 400 are equal for illustration.
Maximum height h of rear spacer column of pair box max2 =L 4 -L 3 =1.8μm;
Height h of the first 300 and second 400 spacer columns 4 =h max2 ÷2÷r 2 =1.0μm;
Height h of the third spacer pillar 500 5 =h max2 -h 3 =1.6μm。
Thus, the minimum height of the spacer pillars is 1 μm, which is raised by 0.3 μm compared to the display panel 1 in the related art, thereby improving the height uniformity of the spacer pillars (i.e., the first, second, and third spacer pillars 300, 400, and 500 described above), and higher display uniformity can be obtained.
It is to be understood that the numerical values in the above examples are for illustrative purposes only. It will be appreciated that L 3 、L 4 、h 3 And r 2 The specific value of (b) can be specifically determined according to actual requirements. For example, the compression ratio r of the first and second spacer posts 300 and 400 after the cartridge is aligned 2 And can be any value from 85% to 95% (inclusive). This is not a limitation of the present application.
In this embodiment, through making along the direction of perpendicular to array substrate 100, the size of third spacer column 500 is more than or equal to the size of second spacer column 400, and the height of third spacer column 500 is great, can promote the minimum height of spacer column in display panel 10 to the engineering data that makes spacer column is more excellent, can promote the high homogeneity of spacer column, reduces the risk that drops of spacer column, and then promotes display panel 10's yield, obtains higher display uniformity.
In one embodiment, an end of the third spacer pillar 500 facing away from the opposite substrate 200 has a gap with the array substrate 100. With this arrangement, in the process of transporting the display panel 10, the third spacer pillar 500 may be prevented from scratching the alignment film in the light-transmitting region of the array substrate 100 due to sliding, so that Mura defect may be further prevented from occurring, the distance between the third spacer pillar 500 and the black matrix edge of the opposite substrate 200 may be further reduced, and the transmittance of the display panel 10 may be further improved.
Further, no spacer pillar is disposed between the third spacer pillar 500 and the array substrate 100. From this, compare in correlation technique, cancelled the spacer column of third spacer column 500 offside to avoid reducing the height of offside spacer column because the height of third spacer column 500 is great, thereby promote the minimum height of spacer column in display panel 10, further promote the high homogeneity of spacer column, reduce the risk of droing of spacer column, and then promote the yield of display panel 10, obtain higher demonstration homogeneity.
In one embodiment, the minimum distance between the third spacer pillar 500 and the array substrate 100 is s, where s satisfies: s is more than 0 and less than or equal to 0.4 mu m. Specifically, for example, in the case where s > 0.4 μm, the strength of the display panel 10 may be reduced. Thus, by making the minimum distance s between the third spacer pillar 500 and the array substrate 100 satisfy: s is more than 0 and less than or equal to 0.4 μm, so that the display effect of the display panel 10 can be improved while the strength of the display panel 10 is ensured.
In one embodiment, in conjunction with fig. 5 and 6, the end surface area of the third spacer pillar 500 may be smaller than the end surface area of the second spacer pillar 400. For example, in the example of fig. 5, the end surface area of the end of the second spacer pillar 400 facing away from the opposite substrate 200 is larger than the end surface area of the end of the third spacer pillar 500 facing away from the opposite substrate 200. With this arrangement, the contact area between the second spacer column 400 and the first spacer column 300 can be increased, so that the second spacer column 400 and the first spacer column 300 can bear a large load, thereby improving the pressure resistance of the display panel 10.
In one embodiment, the array substrate 100 includes a first substrate 110, a gate metal layer, a source-drain metal layer, and a touch control metal layer 160. Wherein the gate metal layer is disposed at one side of the first substrate 110. The source-drain metal layer is disposed on a side of the gate metal layer away from the first substrate 110. The touch control metal layer 160 is disposed on a side of the source-drain metal layer away from the first substrate 110, and an orthographic projection of the touch control metal layer 160 on the first substrate 110 overlaps with an orthographic projection of the spacer group on the first substrate 110.
Illustratively, the array substrate 100 further includes a common electrode layer 130 and an insulating protection layer 140. The common electrode layer 130 is disposed on a side of the thin film transistor facing away from the first substrate 110. The insulating protection layer 140 is disposed between the common electrode layer 130 and the pixel electrode layer 150. Thus, by providing the common electrode layer 130 as described above, an input signal voltage can be applied between the pixel electrode layer 150 and the common electrode layer 130.
In this embodiment, since the resistivity of the touch metal layer 160 is low, the touch metal layer 160 is disposed on the surface of the common electrode layer 130 away from the first substrate 110, so as to improve the stability of the Vcom voltage (i.e. the reference voltage for the liquid crystal molecule deflection), and under the condition that the refresh frequency of the display panel 10 is low, the display screen flicker can be avoided, so as to improve the display effect of the display panel 10. Moreover, in the case that the height of the third spacer pillar 500 is greater than or equal to the height of the second spacer pillar 400, the spacer pillar may not be too small due to the touch metal layer 160, so as to ensure the display uniformity of the display panel 10.
In one embodiment, referring to fig. 5 and 6, the gate metal layer includes a plurality of gate lines 170 arranged along a first direction, and each gate line 170 extends along a second direction perpendicular to the first direction. The source-drain metal layer comprises a plurality of data lines 180 arranged along a second direction, the data lines 180 and the gate lines 170 are arranged in a crossed mode, the data lines 180 extend along a first direction respectively, and orthographic projections of the spacer column groups on the first substrate 110 are overlapped with orthographic projections of crossing regions of the gate lines 170 and the data lines 180 on the first substrate 110. In the description of the present application, "a plurality" means two or more.
Illustratively, the gate line 170 may be electrically connected to a gate electrode in the thin film transistor, and the data line 180 may be electrically connected to a second electrode in the thin film transistor. The orthographic projection of the touch metal layer 160 on the first substrate 110 may cover the orthographic projection of the data line 180 on the first substrate 110. The orthographic projections of the first, second, and third spacer pillars 300, 400, and 500 on the first substrate 110 may all overlap the crossing regions of the gate and data lines 170 and 180.
In one embodiment, as shown in fig. 6, the array substrate 100 includes a first substrate 110, and a plurality of gate lines 170 and a plurality of data lines 180 disposed on one side of the first substrate 110, the plurality of data lines 180 are arranged to cross the plurality of gate lines 170, and an orthographic projection area of the plurality of gate lines 170 and the plurality of data lines 180 on the first substrate 110 is a first light-shielding area. The opposite substrate 200 includes a second substrate 210 and a black matrix 230 disposed on one side of the second substrate 210, and a forward projection area of the black matrix 230 on the second substrate 210 is a second light shielding area. The orthographic projection of the spacer group on the array substrate 100 overlaps the first shading area, and the orthographic projection of the spacer group on the opposite substrate 200 overlaps the second shading area.
In this embodiment, the orthographic projection of the spacer group on the array substrate 100 is overlapped in the first shading area, and the orthographic projection of the spacer group on the opposite substrate 200 is overlapped in the second shading area, so that the light blocking of the spacer group can be avoided, the light transmittance of the display panel 10 is improved, and the display panel 10 is ensured to have higher display quality.
In one embodiment, referring to fig. 5 and 6, the array substrate 100 further includes a first alignment layer 190 disposed on a side of the pixel electrode layer 150 facing away from the first substrate 110, and the first alignment layer 190 is located on a side of the first spacer pillar 300 facing away from the first substrate 110. The opposite substrate 200 includes a second substrate 210 and a second alignment layer 220, the second alignment layer 220 being located on a side of the second spacer pillar 400 and the third spacer pillar 500 facing away from the second substrate 210. Exemplarily, a side surface of the first alignment layer 190 facing the opposite substrate 200 may include the third portion and a fourth portion protruding from the third portion.
In this embodiment, by disposing the first alignment layer 190 and the second alignment layer 220, the liquid crystal can be in contact with the first alignment layer 190 and the second alignment layer 220, respectively, so that the liquid crystal molecules in the liquid crystal can be regularly aligned.
In one embodiment, the maximum distance between a surface of the opposite substrate 200 facing the array substrate 100 and a surface of the array substrate 100 facing the opposite substrate 200 is 1.6 to 2.8 μm (inclusive). The maximum distance between the surface of the opposite substrate 200 facing the array substrate 100 and the surface of the array substrate 100 facing the opposite substrate 200 is the box thickness of the display panel 10. For example, the maximum distance between the surface of the opposite substrate 200 facing the array substrate 100 and the surface of the array substrate 100 facing the opposite substrate 200 may be 2.1 μm, i.e., the cell thickness may be 2.1 μm.
In this embodiment, the cell thickness of the display panel 10 is set to 1.6 μm to 2.8 μm, and the cell thickness of the display panel 10 is set to be low, so that the refresh rate of the display panel 10 can be increased, and the response of the display panel 10 is faster.
A display device (not shown) according to an embodiment of the second aspect of the present application comprises a backlight and the display panel 10 according to any of the embodiments of the first aspect of the present application. The backlight may be used to provide light to the display panel 10, so that the display panel 10 can display a picture.
Illustratively, the display device may be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, and a navigator.
Illustratively, the display device may be a broadband display device that has both a high refresh rate and a low refresh rate, such that the display device may reduce power consumption when in a low frequency state and may provide more excellent performance when in a high frequency state, thereby better balancing power consumption and performance of the display device.
According to the display device of the embodiment of the application, by adopting the display panel 10, the yield and the transmittance of the display panel 10 can be improved, so that the overall performance of the display device is improved.
Other configurations of the display panel 10 and the display device of the above embodiments can be adopted by various technical solutions known by those skilled in the art now and in the future, and will not be described in detail here.
In the description of the present specification, it is to be understood that the terms "central," "longitudinal," "transverse," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and to simplify the description, but are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and are not to be construed as limiting the present application.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.
In this application, unless expressly stated or limited otherwise, the terms "mounted," "connected," "secured," and the like are to be construed broadly and encompass, for example, both fixed and removable connections or integral parts thereof; the connection can be mechanical connection, electrical connection or communication; they may be directly connected or indirectly connected through intervening media, or may be connected through the use of two elements or the interaction of two elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
In this application, unless expressly stated or limited otherwise, the recitation of a first feature "on" or "under" a second feature may include the recitation of the first and second features being in direct contact, and may also include the recitation of the first and second features not being in direct contact, but being in contact with another feature between them. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. The first feature being "under," "beneath," and "under" the second feature includes the first feature being directly above and obliquely above the second feature, or simply meaning that the first feature is at a lesser level than the second feature.
The above disclosure provides many different embodiments, or examples, for implementing different features of the application. The components and arrangements of specific examples are described above to simplify the present disclosure. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
While the present invention has been described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (10)

1. A display panel, comprising:
an array substrate;
an opposing substrate disposed opposite to the array substrate;
the spacer column group comprises a first spacer column and a second spacer column, the first spacer column is arranged on one side of the array substrate facing the opposite substrate, the second spacer column is arranged on one side of the opposite substrate facing the array substrate, and one end of the second spacer column departing from the opposite substrate is abutted with one end of the first spacer column departing from the array substrate;
wherein, along the direction perpendicular to the array substrate, the ratio of the size of the first spacer columns to the size of the second spacer columns ranges from [0.9,1.1].
2. The display panel of claim 1, wherein the set of stud spacers further comprises:
and the third spacer columns are arranged on the surface of one side, facing the array substrate, of the opposite substrate, are arranged at intervals with the second spacer columns, and are arranged along the direction perpendicular to the array substrate, and the size of each third spacer column is larger than or equal to that of each second spacer column.
3. The display panel of claim 1, wherein the set of stud spacers further comprises:
and the third spacer columns are arranged on the surface of one side, facing the array substrate, of the opposite substrate and are arranged at intervals with the second spacer columns, and gaps are reserved between one ends, deviating from the opposite substrate, of the third spacer columns and the array substrate.
4. The display panel of claim 3, wherein no spacer pillar is disposed between the third spacer pillar and the array substrate.
5. The display panel according to any one of claims 2 to 4, wherein the minimum distance between the third spacer pillar and the array substrate is s, wherein s satisfies: s is more than 0 and less than or equal to 0.4 mu m.
6. The display panel according to claim 1, wherein the array substrate comprises:
a first substrate;
the grid metal layer is arranged on one side of the first substrate;
the source drain metal layer is arranged on one side of the grid metal layer, which is far away from the first substrate;
the touch metal layer is arranged on one side, away from the first substrate, of the source drain metal layer, and the orthographic projection of the touch metal layer on the first substrate is overlapped with the orthographic projection of the spacer column group on the first substrate.
7. The display panel according to claim 6, wherein the gate metal layer comprises a plurality of gate lines arranged along a first direction, each of the gate lines extending along a second direction, the second direction being perpendicular to the first direction;
the source-drain metal layer comprises a plurality of data lines arranged along the second direction, the data lines and the grid lines are arranged in a crossed mode, the data lines extend along the first direction, and orthographic projections of the spacer column group on the first substrate are overlapped with orthographic projections of crossed areas of the grid lines and the data lines on the first substrate.
8. The display panel according to claim 1, wherein the array substrate comprises a first substrate, and a plurality of gate lines and a plurality of data lines disposed on one side of the first substrate, the plurality of data lines are arranged to cross the plurality of gate lines, and orthographic projection areas of the plurality of gate lines and the plurality of data lines on the first substrate are first light-shielding areas;
the opposite substrate comprises a second substrate and a black matrix arranged on one side of the second substrate, and the orthographic projection area of the black matrix on the second substrate is a second shading area;
wherein, the orthographic projection of the spacer column group on the array substrate is overlapped with the first shading area, and the orthographic projection of the spacer column group on the opposite substrate is overlapped with the second shading area.
9. The display panel according to claim 1, wherein a maximum distance between a surface of the opposite substrate on a side facing the array substrate and a surface of the array substrate on a side facing the opposite substrate is 1.6 μm to 2.8 μm.
10. A display device, comprising: a backlight and a display panel according to any one of claims 1 to 9.
CN202211327156.1A 2022-10-25 2022-10-25 Display panel and display device Pending CN115561936A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116047822A (en) * 2023-02-15 2023-05-02 重庆京东方光电科技有限公司 Display panel, manufacturing method of display panel and display device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105759482A (en) * 2016-05-06 2016-07-13 上海天马微电子有限公司 Touch display panel and touch display device
US20170010496A1 (en) * 2015-07-10 2017-01-12 Samsung Display Co. Ltd. Display device and method of manufacturing the same
WO2022082720A1 (en) * 2020-10-23 2022-04-28 京东方科技集团股份有限公司 Display panel and display apparatus

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20170010496A1 (en) * 2015-07-10 2017-01-12 Samsung Display Co. Ltd. Display device and method of manufacturing the same
CN105759482A (en) * 2016-05-06 2016-07-13 上海天马微电子有限公司 Touch display panel and touch display device
WO2022082720A1 (en) * 2020-10-23 2022-04-28 京东方科技集团股份有限公司 Display panel and display apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116047822A (en) * 2023-02-15 2023-05-02 重庆京东方光电科技有限公司 Display panel, manufacturing method of display panel and display device

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