CN115547217A - Impedance test circuit, apparatus and method - Google Patents

Abstract

The invention provides an impedance test circuit, an impedance test device and an impedance test method. The impedance testing circuit includes: the first end of the impedance sampling resistor is connected with a first node, and the first node is connected with a first reference potential; the input end of the current amplification module is connected with the second end of the impedance sampling resistor; the input end of the voltage amplification module is connected with the output end of the current amplification module, and the output end of the voltage amplification module is connected with a second node; the impedance to be measured is connected between the first node and the second node and is connected in parallel with a branch where the impedance sampling resistor, the current amplification module and the voltage amplification module are located. According to the invention, through the combined action of the current amplification module and the voltage amplification module, whether the impedance of the impedance to be detected is in a preset range can be sensitively tested, and whether the DGS defect exists in Panel can be effectively and rapidly detected.

Description

Impedance test circuit, apparatus and method

Technical Field

The invention relates to the technical field of display panel testing, in particular to an impedance testing circuit, an impedance testing device and an impedance testing method.

Background

IGZO (Indium Gallium Zinc Oxide) is used as a channel layer material in thin film transistor technology. The IGZO technology is an improved technology based on TFT driving, in which a metal oxide layer is plated on an active layer of a TFT-LCD (Thin Film Transistor Liquid Crystal Display). It features high mobility (about 10 cm) ² The charge and discharge rate of the TFT to the pixel electrode can be improved, the response speed of the pixel is improved, and the faster refresh rate (higher than 240 Hz) is realized; meanwhile, the higher response speed greatly improves the line scanning speed of the pixels, and the ultrahigh resolution can be realized; meanwhile, the transistor size can be reduced, the pixel aperture ratio is improved, the brightness is improved, and the power consumption is reduced. The IGZO is used for preparing an amorphous structure under the condition of low temperature, so that the large size uniformity is good, and meanwhile, the amorphous state and high light transmittance provide a foundation for the flexible display and the transparent display.

However, a TFT Oxide (Oxide thin film transistor) manufactured by the IGZO technique is prone to suffer from a DGS (Data Gate Short) defect. DGS is poor cross line generated in a lighting test of a TFT display product, mostly occurs in an overlapped area of a grid layer and a source and drain layer, and the generation mechanism is that slow overflow of the product is increased or Cu foreign matter grows under the action of an electric field, high temperature, water vapor and other conditions. Moreover, since DGS is progressive due to Cu growth, it is critical to intercept a display panel having DGS before shipment.

Therefore, a method capable of detecting the DGS defect of the display panel is required.

Disclosure of Invention

The invention mainly aims to provide an impedance test circuit, an impedance test device and an impedance test method, which are used for judging whether a DGS defect exists in a display panel or not by detecting voltages at two ends of the display panel.

The invention provides an impedance test circuit, which comprises: the first end of the impedance sampling resistor is connected with a first node, and the first node is connected with a first reference potential; the input end of the current amplification module is connected with the second end of the impedance sampling resistor; the input end of the voltage amplification module is connected with the output end of the current amplification module, and the output end of the voltage amplification module is connected with the second node; the impedance to be measured is connected between the first node and the second node and is connected in parallel with a branch where the impedance sampling resistor, the current amplification module and the voltage amplification module are located.

In one embodiment, the current amplification module includes: the current sampling resistor is connected with the operational amplifier; the positive input end of the operational amplifier is connected with the second end of the impedance sampling resistor and the first end of the current sampling resistor, the second end of the current sampling resistor is connected with the second reference potential, the negative input end of the operational amplifier is connected with the first end of the feedback resistor, and the second end of the feedback resistor is connected with the output end of the operational amplifier.

In one embodiment, the voltage amplification module includes: a high voltage generator comprising: the high-voltage transformer, the diode, the protective resistor, the capacitor, the ammeter and the lightning arrester; the first end of a secondary coil of the high-voltage transformer and the cathode of the diode are connected with the output end of the current amplification module, the second end of the secondary coil of the high-voltage transformer is connected with the first end of the capacitor and the bottom end of the lightning arrester, the anode of the diode is connected with the first end of the protective resistor, and the second end of the protective resistor is connected with the second end of the capacitor and the top end of the lightning arrester; wherein, the ammeter is connected between the top of protection resistance and arrester.

In one embodiment, the method further comprises: voltage detection means for detecting a voltage difference between the first node and the second node; and the controller is used for judging whether the impedance to be detected meets the preset requirement or not according to the voltage difference value between the first node and the second node.

The invention provides an impedance testing device, comprising: the impedance test circuit described above; the first end of the first impedance test needle die is connected with the first node of the impedance test circuit; the first end of the second impedance test needle die is connected with a second node of the impedance test circuit; the impedance to be tested is connected between the second end of the first impedance test needle model and the second end of the second impedance test needle model.

In one embodiment, the method further comprises: and a first end of the impedance test switch is connected with a first node of the impedance test circuit, and a second end of the impedance test switch is connected with a first reference potential.

In one embodiment, the impedance test switch comprises a point contact switch.

In an embodiment, in a case where the impedance testing circuit includes a controller, the impedance testing apparatus further includes: and the alarm is connected with the controller and used for giving an alarm when the controller determines that the impedance to be detected does not meet the preset requirement.

In one embodiment, the impedance to be tested comprises a display panel to be tested; the impedance to be tested is connected between the second end of the first impedance test needle model and the second end of the second impedance test needle model, and the impedance to be tested comprises: and the ITO layer of the display panel to be tested is connected between the second end of the first impedance test needle die and the second end of the second impedance test needle die.

The invention provides an impedance test method, which is applied to the impedance test circuit or the impedance test device and comprises the following steps: connecting the impedance to be measured between a first node and a second node, and respectively obtaining the voltages of the first node and the second node; and calculating a voltage difference value between the first node and the second node, comparing the voltage difference value with a preset voltage threshold value, and determining that the impedance to be measured does not meet the preset requirement when the voltage difference value is greater than the preset voltage threshold value.

The invention can sensitively test whether the impedance of the impedance to be tested is in a preset range through the combined action of the current amplification module and the voltage amplification module, and realizes effective and rapid detection on whether the DGS defect exists in Panel (display Panel).

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the invention and not to limit the invention, in which:

FIG. 1 is a schematic diagram of an impedance testing circuit according to an embodiment of the present application;

FIG. 2 is a schematic diagram illustrating a testing principle of an impedance testing apparatus according to an embodiment of the present application;

FIG. 3 is a schematic diagram illustrating the connection positions of the first and second impedance testing pin dies with the conductive layer according to an embodiment of the present application;

FIG. 4 is a schematic external view of an impedance testing apparatus according to an embodiment of the present application;

fig. 5 is an external view schematically showing a JIG (Java Information Group Information processing apparatus) in the related art;

FIG. 6 is a schematic diagram of a current amplifier according to an embodiment of the present application;

FIG. 7 is a schematic diagram of a voltage amplifier according to an embodiment of the present application;

fig. 8 is a schematic structural diagram of an MCU (micro controller Unit, single chip microcomputer) according to an embodiment of the present application;

FIG. 9 is a schematic diagram of the first and second impedance test pin dies according to one embodiment of the present application;

FIG. 10 is a schematic view of an alarm according to an embodiment of the present application.

Detailed Description

It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings.

DGS abnormal Panel with reliability risk has difference of overall impedance of Panel and normal product caused by Cu growth or foreign matter in Panel. The impedance testing scheme disclosed by the application is not available in the prior art, so that the Panel with the DGS can find the DGS after a reliability experiment or a product is used for a long time, poor using experience is caused to a customer, and customer complaints are caused. DGS appears as poor crosshairs on the display screen in the terminal. Therefore, the impedance test scheme is designed to intercept Panel with abnormal DGS on the production line.

Example one

Fig. 1 is a schematic diagram of an impedance testing circuit according to an embodiment of the present application. As shown in fig. 1, the impedance test circuit of the present embodiment may include: the first end of the impedance sampling resistor Rx is connected with a first node A, and the first node A is connected with a first reference potential; the input end of the current amplification module 110 is connected with the second end of the impedance sampling resistor Rx; the input end of the voltage amplification module 120 is connected to the output end of the current amplification module 110, and the output end of the voltage amplification module 120 is connected to the second node B; the impedance to be measured is connected between the first node a and the second node B, and is connected in parallel with the impedance sampling resistor Rx, the current amplification module 110, and the branch where the voltage amplification module 120 is located.

By using the impedance test circuit of this embodiment, an input voltage may be applied to the impedance to be tested through the first node a, and at the same time, the same input voltage Vin may be applied to the branch where the impedance sampling resistor Rx, the current amplification module 110, and the voltage amplification module 120 are located through the first node. The voltage difference value V between the first node A and the second node B is determined by detecting the voltage Vout of the second node B, and whether the impedance to be detected is larger can be judged according to the voltage difference value because the voltages at the two ends of the parallel circuit are equal. Impedance is a parameter related to the circuit structure, and in a circuit having resistance, inductance, and capacitance, the resistance acting on the current in the circuit is called impedance.

The impedance to be measured may be the internal impedance of the Panel to be measured. DGS is caused by growth of Cu foreign bodies or the presence of slow flashes inside the Panel. Panel without Cu foreign matter or slow flashes, whose overall impedance is substantially unchanged and at a relatively low level; the presence of Cu foreign material or slow flashes makes the impedance of the Panel greater than the Panel without Cu foreign material or slow flashes. Therefore, the impedance of the Panel to be detected can be determined by testing the partial pressure of the Panel, and whether the Panel to be detected has the Cu foreign matter or the slow overflow matter, that is, whether the DGS exists in the Panel to be detected is judged according to the impedance of the Panel to be detected.

As shown in fig. 1, a first node Power IC (Power Integrated Circuit) voltage Vin of a Printed Circuit Board Assembly (PCBA) may be input from a Power Generation line PG (Power Generation mechanism), where V is a voltage difference between Vout and Vin, and the voltage difference between Vout and Vin may be detected by a device such as a voltmeter or a voltage sensor. If the Panel to be detected does not have DGS, namely the internal impedance of the Panel to be detected is smaller, V is a relatively smaller value; if the Panel to be detected has DGS, namely the internal impedance of the Panel to be detected is larger, V is a relatively larger value. Therefore, whether the DGS exists in the Panel to be tested can be judged according to the magnitude of the V value.

With the scheme of this embodiment, whether the Panel has DGS can be determined by testing the internal impedance of the Panel. If there is no bad screen such as Cu foreign matter, its internal impedance is basically unchanged, and if there is defect in Panel, and there is bad factor such as foreign matter, its internal impedance will be larger than that of normal Panel. Products with larger impedance (namely Panel with DGS risk) can be screened out through the scheme of the embodiment.

The impedance difference between Panel with DGS and normal Panel is very weak, approximately in milliohms, and correspondingly, the voltage difference is also very weak. In the embodiment, the weak voltage can be amplified by a plurality of times through the current amplification module and the voltage amplification module, and the voltage difference between the Panel with the DGS and the normal Panel can be clearly displayed, so that the Panel with the DGS can be accurately screened out.

In an embodiment, the current amplifying module 110 may include: an operational amplifier, a current sampling resistor 111, and a feedback resistor Rf; the positive input end of the operational amplifier is connected to the second end of the impedance sampling resistor Rx and the first end of the current sampling resistor 111, the second end of the current sampling resistor 111 is connected to the second reference potential, the negative input end of the operational amplifier is connected to the first end of the feedback resistor Rf, and the second end of the feedback resistor Rf is connected to the output end of the operational amplifier. Wherein the second reference potential may comprise a ground potential.

In one embodiment, as shown in fig. 1, the current sampling resistor 111 may include two resistors R1 and R2 with relatively large resistance values, for example, the resistance values of R1 and R2 are 0.068 Ω and 1 Ω, respectively.

In the embodiment, the current passing through the impedance sampling resistor can be amplified through the operational amplifier, and correspondingly, the divided voltage of the impedance to be detected can be amplified, so that the divided voltage change of the impedance to be detected is more obvious, the impedance to be detected can be more accurately judged whether to be in a normal value range, and the Panel with the DGS can be accurately screened out by using the scheme of the embodiment.

Of course, the current amplifying module 110 may also adopt one or more other devices connected to each other, as long as the current amplifying module can amplify the current, which is not limited in the present application.

In an embodiment, the voltage amplifying module 120 may include: a high voltage generator comprising: the high-voltage transformer T, the diode D, the protective resistor R, the capacitor C, the ammeter mu A and the lightning arrester Cx; the first end of a secondary coil of the high-voltage transformer T and the cathode of the diode D are connected with the output end of the current amplification module together, the second end of the secondary coil of the high-voltage transformer T is connected with the first end of the capacitor C and the bottom end of the lightning arrester Cx, the anode of the diode D is connected with the first end of the protective resistor R, and the second end of the protective resistor R is connected with the second end of the capacitor C and the top end of the lightning arrester Cx; wherein the ammeter μ a is connected between the protection resistor R and the tip of the lightning arrester Cx.

In the embodiment, the partial pressure of the impedance to be measured can be further amplified through the high-voltage generator, so that the partial pressure change of the impedance to be measured is more obvious, the impedance to be measured can be more accurately judged whether to be in a normal value range, and the Panel with the DGS can be accurately screened out by utilizing the scheme of the embodiment.

Of course, the voltage amplifying module 120 may also adopt one or more other devices connected to each other, as long as the voltage amplifying module can achieve the effect of amplifying the voltage, and the application is not limited thereto.

In one embodiment, the impedance testing circuit may further include: voltage detection means (not shown in the figure) for detecting a voltage difference between the first node and the second node; and a controller (not shown in the figure), which is used for judging whether the impedance to be measured meets the preset requirement according to the voltage difference value between the first node and the second node.

The voltage detection device may include a voltmeter, a voltage sensor, and the like, which is not limited in this application.

The preset requirement may be set according to an actual requirement, for example, the normal divided voltage of the Panel to be detected may be calibrated in advance, so that the calibrated divided voltage is used as a preset voltage threshold, and the preset requirement may be that a voltage difference between the first node and the second node is less than or equal to the preset voltage threshold. Of course, other preset requirements may also be set, which are not limited in this application.

The controller is integrated in the impedance test circuit, and the controller can execute the step of judging whether the impedance to be tested meets the preset requirement, so that the judgment result is directly output, and the convenience of the impedance test circuit is improved.

Although the embodiment describes the scheme of the embodiment by taking the internal impedance of the Panel to be tested as an example, the impedance to be tested may also be other impedances, which is not specifically limited in this application.

According to the embodiment, through the combined action of the current amplification module and the voltage amplification module, whether the impedance of the impedance to be detected is in a preset range can be sensitively tested, and whether DGS defects exist in Panel can be effectively and rapidly detected.

Example two

Fig. 2 is a schematic diagram illustrating a testing principle of an impedance testing apparatus according to an embodiment of the present application.

As shown in fig. 2, the impedance testing apparatus of the present embodiment may include: the impedance test circuit 1 described above; the first end of the first impedance test needle model 2 is connected with a first node A of the impedance test circuit; a first end of the second impedance test needle die 3 is connected with a second node B of the impedance test circuit; the impedance to be tested is connected between the second end of the first impedance test needle die 2 and the second end of the second impedance test needle die 3.

As shown in fig. 3, for the impedance Panel to be tested, the gap between the POL (Polarizer) layer and the glass layer boundary is about 1mm, and the first impedance test pin die 2 and the second impedance test pin die 3 may be pressed on the ITO (Indium Tin Oxide) layer having a width of about 1 mm.

The Panel to be tested can be fixed through the first impedance test pin module 2 and the second impedance test pin module 3, and voltage is input to the Panel to be tested.

In an embodiment, the impedance testing apparatus of this embodiment may further include: and a first end of the impedance test switch 4 is connected with a first node A of the impedance test circuit, and a second end of the impedance test switch 4 is connected with a first reference potential.

The on/off of the impedance test circuit can be controlled by the impedance test switch 4.

In one embodiment, the impedance test switch 4 may comprise a point-contact switch, i.e. a test action is triggered once per press.

Through the point contact type switch, the damage of the impedance to be measured due to long-term electrification can be avoided.

In one embodiment, in a case where the impedance testing circuit includes a controller, the impedance testing apparatus further includes: and the alarm 5 is connected with the controller and used for giving an alarm when the controller determines that the impedance to be measured does not meet the preset requirement.

The alarm is used for alarming, and related personnel can be informed of processing the impedance which does not meet the preset requirements in time.

The positions of the impedance test circuit 1, the first impedance test pin die 2, the second impedance test pin die 3, the impedance test switch 4 and the alarm 5 in the impedance test device are shown in fig. 4. Two impedance test pin dies are arranged on two sides, so that the Panel to be tested can be connected to the test circuit in parallel. The impedance testing apparatus in fig. 4 may be a JIG, and may be connected to the PCBA Connect of the Panel through the first impedance testing pin of the JIG to input Vin to the Panel.

The probe in the impedance test pin mold is contacted with a conductive layer of the Panel, the conductive layer can be a common electrode layer, further, the common electrode can be ITO, an ITO common electrode (ITO on a glass layer, the whole surface is coated with ITO, the ITO can be Back ITO (Back Indium Tin Oxide) surface Indium Tin Oxide), the main function is to be connected with the Panel GND (Panel group screen grounding) through Ag glue to form a grounding field, the functions of releasing the internal charge of the Panel and shielding the Panel electric field are achieved, the display mode of the liquid crystal can be ADS (Advanced Super Dimension Switch) mode), and the two impedance test pin molds are integrally connected with an impedance test circuit. (the contact position of the impedance test needle film and the Panel can be changed, and the bare leakage ITO position of the non-POL area at the left edge and the right edge of the whole Panel can be changed, refer to fig. 3).

Fig. 5 is an external view of a JIG in the related art. The lighting JIG JIG in the prior art does not have the function of impedance test.

The current amplifying module 110 may be a current amplifier, and fig. 6 is a schematic diagram of the current amplifier according to an embodiment of the present application. The current amplifier comprises a power supply, a power electronic circuit, an inductive load, a controller and the like, adopts output current closed-loop control, and regulates current through a current sampling resistor and a triode series-parallel circuit after the original current is input. The power electronics is integrated in the left half 111 of fig. 6 and the inductive load, controller is integrated in the right half 112 of fig. 6.

The voltage amplifying module 120 may be a voltage amplifier, and fig. 7 is a schematic diagram of the voltage amplifier according to an embodiment of the present application. The weak voltage can be boosted to a high voltage output by the voltage amplifier.

The controller 130 may include a central processing Unit (cpu), a digital signal processor (dsp), a Micro Controller Unit (MCU), an integrated circuit (ic), etc., and fig. 8 is a schematic structural diagram of an MCU according to an embodiment of the present disclosure. The MCU may be composed of a Central Processing Unit (CPU), a memory (ROM and RAM), and an I/O interface. And writing an impedance test program into a Read Only Memory (ROM) of the single chip microcomputer by using a downloader, and when the CPU runs the impedance test program, if the voltage difference value is higher than a preset voltage threshold value, displaying specific data of the impedance test program by the single chip microcomputer and controlling the buzzer to alarm.

FIG. 9 is a schematic diagram of the first and second impedance testing pin dies according to an embodiment of the present application. As shown in fig. 9, 2 elongated pinholes 201 insulated from each other are formed in the vertical direction of each impedance test needle model, metal probes (which do not extend out of the elongated pinholes 201) capable of extending and retracting along the hole wall of the elongated pinholes 201 are correspondingly formed in the elongated pinholes 201, and the metal probes are pressed by an elastic pressure head 202 to be in contact with the surface of the Panel, so that the impedance test of the Panel is performed.

FIG. 10 is a schematic view of an alarm according to an embodiment of the present application. When receiving the alarm signal of the MCU, the alternating current signal passes through the coil wound on the bracket, so that alternating magnetic flux is generated on the core column of the bracket, the alternating magnetic flux is superposed with the constant magnetic flux on the magnetic ring, the molybdenum sheet is enabled to vibrate at a given alternating current signal frequency and is matched with the resonant cavity to give an alarm, and the alarm can adopt a buzzer.

In one embodiment, the impedance to be tested may include a display panel to be tested; the impedance to be tested is connected between the second end of the first impedance test pin die 2 and the second end of the second impedance test pin die 3, and may include: the ITO layer of the display panel to be tested is connected between the second end of the first impedance test needle model 2 and the second end of the second impedance test needle model 3.

Although the present embodiment describes the scheme of the present embodiment by taking the internal impedance of the Panel to be measured as an example, the impedance to be measured may be other impedances, which is not specifically limited in the present application.

According to the embodiment, through the combined action of the current amplifier and the voltage amplifier, whether the impedance of the impedance to be detected is in a preset range can be sensitively tested, and whether DGS defects exist in Panel can be effectively and rapidly detected.

EXAMPLE III

The present embodiment provides an impedance testing method, which is applied to the impedance testing circuit or the impedance testing apparatus, and the impedance testing method of the present embodiment may include:

s100: and connecting the impedance to be measured between the first node A and the second node B, and respectively obtaining the voltage of the first node A and the voltage of the second node B.

S200: and calculating a voltage difference value between the first node A and the second node B, comparing the voltage difference value with a preset voltage threshold value, and determining that the impedance to be measured does not meet the preset requirement when the voltage difference value is greater than the preset voltage threshold value.

By using the method of the embodiment, when the impedance to be detected is Panel, the impedance of the Panel to be detected can be determined by testing the partial pressure of the Panel, and then whether the Panel to be detected has a Cu foreign matter or a slow overflow or not, that is, whether the Panel to be detected has a DGS or not, is determined according to the impedance of the Panel to be detected.

Although the embodiment describes the scheme of the embodiment by taking the internal impedance of the Panel to be tested as an example, the impedance to be tested may also be other impedances, which is not specifically limited in this application.

It is noted that the terms used herein are merely for describing particular embodiments and are not intended to limit exemplary embodiments according to the present application, and when the terms "include" and/or "comprise" are used in this specification, they specify the presence of features, steps, operations, devices, components, and/or combinations thereof.

It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the accompanying drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances.

It should be understood that the exemplary embodiments herein may be embodied in many different forms and should not be construed as limited to only the embodiments set forth herein. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions. These embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art, and should not be construed as limiting the present invention.

While the spirit and principles of the invention have been described with reference to several particular embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, nor is the division of aspects, which is for convenience only as the features in such aspects may not be combined to benefit. The invention is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims (10)

1. An impedance testing circuit, comprising:

the impedance sampling resistor is connected with a first node at a first end, and the first node is connected with a first reference potential;

the input end of the current amplification module is connected with the second end of the impedance sampling resistor;

the input end of the voltage amplification module is connected with the output end of the current amplification module, and the output end of the voltage amplification module is connected with a second node;

the impedance to be measured is connected between the first node and the second node and is connected in parallel with the impedance sampling resistor, the current amplification module and the branch where the voltage amplification module is located.

2. The impedance testing circuit of claim 1, wherein the current amplification module comprises: the circuit comprises an operational amplifier, a current sampling resistor and a feedback resistor;

the positive input end of the operational amplifier is connected with the second end of the impedance sampling resistor and the first end of the current sampling resistor, the second end of the current sampling resistor is connected with the second reference potential, the negative input end of the operational amplifier is connected with the first end of the feedback resistor, and the second end of the feedback resistor is connected with the output end of the operational amplifier.

3. The impedance testing circuit of claim 1, wherein the voltage amplification module comprises: a high voltage generator, the high voltage generator comprising: the high-voltage transformer, the diode, the protective resistor, the capacitor, the ammeter and the lightning arrester;

a first end of a secondary coil of the high-voltage transformer and a negative electrode of the diode are connected with an output end of the current amplification module, a second end of the secondary coil of the high-voltage transformer is connected with a first end of the capacitor and the bottom end of the lightning arrester, an anode of the diode is connected with a first end of the protection resistor, and a second end of the protection resistor is connected with a second end of the capacitor and the top end of the lightning arrester; wherein the ammeter is connected between the protection resistance and a top end of the arrester.

4. The impedance testing circuit of claim 1, further comprising:

voltage detection means for detecting a voltage difference between the first node and the second node;

the controller is used for judging whether the impedance to be detected meets a preset requirement or not according to the voltage difference value between the first node and the second node.

5. An impedance testing device, comprising:

an impedance testing circuit according to any one of claims 1 to 4;

the first end of the first impedance test needle die is connected with the first node of the impedance test circuit;

the first end of the second impedance test needle die is connected with the second node of the impedance test circuit;

and the impedance to be tested is connected between the second end of the first impedance test needle die and the second end of the second impedance test needle die.

6. The impedance testing device of claim 5, further comprising:

and a first end of the impedance test switch is connected with a first node of the impedance test circuit, and a second end of the impedance test switch is connected with a first reference potential.

7. The impedance test apparatus of claim 6, wherein the impedance test switch comprises a point-contact switch.

8. The impedance testing device of claim 5, wherein in the case where the impedance testing circuit includes a controller, the impedance testing device further comprises:

and the alarm is connected with the controller and used for giving an alarm when the controller determines that the impedance to be detected does not meet the preset requirement.

9. The impedance testing device of claim 5, wherein the impedance to be tested comprises a display panel to be tested;

the impedance to be tested is connected between the second end of the first impedance test needle model and the second end of the second impedance test needle model, and the impedance to be tested comprises:

and the conducting layer of the display panel to be tested is connected between the second end of the first impedance test needle die and the second end of the second impedance test needle die.

10. An impedance testing method applied to the impedance testing circuit according to any one of claims 1 to 4 or the impedance testing apparatus according to any one of claims 6 to 9, the method comprising:

connecting the impedance to be measured between the first node and the second node, and respectively obtaining the voltages of the first node and the second node;

and calculating a voltage difference value between the first node and the second node, comparing the voltage difference value with a preset voltage threshold value, and determining that the impedance to be measured does not meet preset requirements when the voltage difference value is greater than the preset voltage threshold value.

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