CN115544042A

CN115544042A - Cached information updating method and device, equipment and medium

Info

Publication number: CN115544042A
Application number: CN202211364586.0A
Authority: CN
Inventors: 梁子豪; 欧阳剑; 漆维; 王京
Original assignee: Kunlun Core Beijing Technology Co ltd
Current assignee: Kunlun Core Beijing Technology Co ltd
Priority date: 2022-11-02
Filing date: 2022-11-02
Publication date: 2022-12-30

Abstract

The disclosure provides a method and a device for updating cached information, a chip, equipment and a medium, and relates to the technical field of computers, in particular to the technical field of chip technology and caching. The implementation scheme is as follows: receiving a first read request for first data; marking the target read data of the first cache line as the first data in response to determining that none of the target read data of the plurality of cache lines is the first data; storing the first read request to a request set; updating a request identification of the first cache line to indicate that a read request for the first data exists in the request set; receiving a second read request for the first data; in response to determining that there is a first cache line for which the target read data is the first data, storing the request to a request set; when the first data is stored to the first cache line, reading the first data, returning the first and second read requests and removing them from the request set; and updating the request identification of the first cache line to indicate that there is no read request for the first data in the request set.

Description

Cached information updating method and device, equipment and medium

Technical Field

The present disclosure relates to the field of computer technologies, and in particular, to the field of chip technologies and cache technologies, and in particular, to a method and an apparatus for updating cached information, an electronic device, a computer-readable storage medium, and a computer program product.

Background

With the development of artificial intelligence technology, more and more applications have achieved effects far exceeding those of traditional algorithms based on artificial intelligence technology. Deep learning is a data intensive algorithm and a calculation intensive algorithm, and in order to improve the execution efficiency of the deep learning algorithm, the utilization rate of system cache needs to be improved.

The approaches described in this section are not necessarily approaches that have been previously conceived or pursued. Unless otherwise indicated, it should not be assumed that any of the approaches described in this section qualify as prior art merely by virtue of their inclusion in this section. Similarly, the problems mentioned in this section should not be considered as having been acknowledged in any prior art, unless otherwise indicated.

Disclosure of Invention

The present disclosure provides a cached information updating method, apparatus, electronic device, computer-readable storage medium, and computer program product.

According to an aspect of the present disclosure, a cached information updating method is provided, including: receiving a first read request for first data; in response to determining that none of the target read data of the plurality of cache lines is the first data, marking the target read data of a first cache line of the plurality of cache lines as the first data; storing the first read request to a request set; updating a request identification of the first cache line to indicate that there is a read request for the first data in the request set; receiving a second read request for the first data; storing the second read request to the request set in response to determining that there is a first cache line for which the target read data is the first data and in response to determining that the first data is not included in the first cache line; in response to determining that the first data is stored in the first cache line, reading the first data from the first cache line and returning the first read request and the second read request; removing the first and second read requests from the request set; and updating the request identification of the first cache line to indicate that there is no read request for the first data in the request set.

According to another aspect of the present disclosure, there is provided a cached information updating apparatus, including: a receiving unit configured to receive a first read request for first data; a marking unit configured to mark a target read data of a first cache line of the plurality of cache lines as the first data in response to determining that none of the target read data of the plurality of cache lines is the first data; a storage unit configured to store the first read request to a request set; an update unit configured to update a request identification of the first cache line to indicate that there is a read request for the first data in the request set; the receiving unit is further configured to receive a second read request for the first data; the storage unit is further configured to store the second read request to the request set in response to determining that there is a first cache line for which the target read data is the first data and in response to determining that the first data is not included in the first cache line; a read unit configured to read the first data from the first cache line and return the first read request and the second read request in response to determining that the first data is stored in the first cache line; and a removal unit configured to remove the first and second read requests from the request set; the update unit is further configured to update a request identification of the first cache line to indicate that no read request for the first data exists in the request set.

According to another aspect of the present disclosure, a chip is provided, which includes the above-mentioned cached information updating apparatus.

According to another aspect of the present disclosure, there is provided an electronic device including: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the above-described cached information updating method.

According to another aspect of the present disclosure, there is provided a non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the above-described cached information updating method.

According to another aspect of the present disclosure, a computer program product is provided, comprising a computer program, wherein the computer program is capable of implementing the above-mentioned cached information updating method when executed by a processor.

According to one or more embodiments of the present disclosure, cached information may be updated.

It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present disclosure, nor do they limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the embodiments and, together with the description, serve to explain the exemplary implementations of the embodiments. The illustrated embodiments are for purposes of example only and do not limit the scope of the claims. Throughout the drawings, identical reference numbers designate similar, but not necessarily identical, elements.

FIG. 1 shows a schematic diagram of an exemplary system in which various methods described herein may be implemented, according to an exemplary embodiment of the present disclosure;

FIG. 2 shows a flow chart of a cached information update method according to an example embodiment of the present disclosure;

FIG. 3 illustrates a data structure diagram of a cache according to an exemplary embodiment of the present disclosure;

fig. 4 is a block diagram illustrating a structure of a cached information updating apparatus according to an exemplary embodiment of the present disclosure;

FIG. 5 shows a schematic structural diagram of a data reading apparatus according to an exemplary embodiment of the present disclosure;

FIG. 6 illustrates a block diagram of an exemplary electronic device that can be used to implement embodiments of the present disclosure.

Detailed Description

Exemplary embodiments of the present disclosure are described below with reference to the accompanying drawings, in which various details of embodiments of the present disclosure are included to assist understanding, and which are to be considered as merely exemplary. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope of the present disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

In the present disclosure, unless otherwise specified, the use of the terms "first", "second", etc. to describe various elements is not intended to define a positional relationship, a temporal relationship, or an importance relationship of the elements, and such terms are used only to distinguish one element from another. In some examples, a first element and a second element may refer to the same instance of the element, while in some cases they may refer to different instances based on the context of the description.

The terminology used in the description of the various described examples in this disclosure is for the purpose of describing the particular examples only and is not intended to be limiting. Unless the context clearly indicates otherwise, if the number of elements is not specifically limited, the elements may be one or more. Furthermore, the term "and/or" as used in this disclosure is intended to encompass any and all possible combinations of the listed items.

Generally, a data processing unit executing a deep learning algorithm needs to issue a data read request to a main memory to obtain data to be processed. When convolution operation is executed, the same data in the main memory needs to be repeatedly accessed for multiple times in a short time, so that a cache can be arranged between the data processing unit and the main memory, the accessed data can be stored in the cache, and when a read request of the data processing unit for the data included in the cache is received, the data can be directly read from the cache.

In this case, when a read request for data not included in the cache memory by the data processing unit is received, the read request needs to be issued to the main memory. In the related art, it is common to allocate a corresponding cache line for the pending read request, store the read request in a specific register, and wait for the main memory to return corresponding data. However, in such an implementation, when there are multiple pending read requests for the same data, the read requests are repeatedly issued to the main memory and the cache lines are repeatedly occupied, thereby reducing cache utilization.

Based on this, the present disclosure provides an information updating method for a cache, in which a data read request count value corresponding to each cache line is stored in the cache, so as to indicate the number of multiple pending read requests associated with each cache line, and enable multiple pending read requests pointing to the same data to multiplex data to be read in one cache line, thereby improving the cache utilization.

Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

Fig. 1 illustrates a schematic diagram of an exemplary system 100 in which various methods and apparatus described herein may be implemented in accordance with embodiments of the present disclosure. Referring to fig. 1, the system 100 includes one or

more client devices

101, 102, 103, 104, 105, and 106, a server 120, and one or more communication networks 110 coupling the one or more client devices to the server 120.

Client devices

101, 102, 103, 104, 105, and 106 may be configured to execute one or more applications.

In embodiments of the present disclosure, the server 120 may run one or more services or software applications that enable the cached information update method to be performed.

In some embodiments, the server 120 may also provide other services or software applications, which may include non-virtual environments and virtual environments. In some embodiments, these services may be provided as web-based services or cloud services, for example, provided to users of

client devices

101, 102, 103, 104, 105, and/or 106 under a software as a service (SaaS) model.

In the configuration shown in fig. 1, server 120 may include one or more components that implement the functions performed by server 120. These components may include software components, hardware components, or a combination thereof, which may be executed by one or more processors. A user

operating client devices

101, 102, 103, 104, 105, and/or 106 may, in turn, utilize one or more client applications to interact with server 120 to take advantage of the services provided by these components. It should be understood that a variety of different system configurations are possible, which may differ from system 100. Accordingly, fig. 1 is one example of a system for implementing the various methods described herein and is not intended to be limiting.

A user may send a data read request using

client devices

101, 102, 103, 104, 105, and/or 106. The client device may provide an interface that enables a user of the client device to interact with the client device. The client device may also output information to the user via the interface. Although fig. 1 depicts only six client devices, those skilled in the art will appreciate that any number of client devices may be supported by the present disclosure.

Client devices

101, 102, 103, 104, 105, and/or 106 may include various classes of computer devices, such as portable handheld devices, general purpose computers (such as personal computers and laptops), workstation computers, wearable devices, smart screen devices, self-service terminal devices, service robots, gaming systems, thin clients, various messaging devices, sensors, or other sensing devices, and so forth. These computer devices may run various classes and versions of software applications and operating systems, such as MICROSOFT Windows, APPLE iOS, UNIX-like operating systems, linux, or Linux-like operating systems (e.g., GOOGLE Chrome OS); or include various Mobile operating systems, such as MICROSOFT Windows Mobile OS, iOS, windows Phone, android. Portable handheld devices may include cellular telephones, smart phones, tablets, personal Digital Assistants (PDAs), and the like. Wearable devices may include head-mounted displays (such as smart glasses) and other devices. The gaming system may include a variety of handheld gaming devices, internet-enabled gaming devices, and the like. The client device is capable of executing a variety of different applications, such as various Internet-related applications, communication applications (e.g., email applications), short Message Service (SMS) applications, and may use a variety of communication protocols.

Network 110 may be any type of network known to those skilled in the art that may support data communications using any of a variety of available protocols, including but not limited to TCP/IP, SNA, IPX, etc. By way of example only, one or more networks 110 may be a Local Area Network (LAN), an ethernet-based network, a token ring, a Wide Area Network (WAN), the internet, a virtual network, a Virtual Private Network (VPN), an intranet, an extranet, a blockchain network, a Public Switched Telephone Network (PSTN), an infrared network, a wireless network (e.g., bluetooth, WIFI), and/or any combination of these and/or other networks.

The server 120 may include one or more general purpose computers, special purpose server computers (e.g., PC (personal computer) servers, UNIX servers, mid-end servers), blade servers, mainframe computers, server clusters, or any other suitable arrangement and/or combination. The server 120 may include one or more virtual machines running a virtual operating system, or other computing architecture involving virtualization (e.g., one or more flexible pools of logical storage that may be virtualized to maintain virtual storage for the server). In various embodiments, the server 120 may run one or more services or software applications that provide the functionality described below.

The computing units in server 120 may run one or more operating systems including any of the operating systems described above, as well as any commercially available server operating systems. The server 120 may also run any of a variety of additional server applications and/or middle tier applications, including HTTP servers, FTP servers, CGI servers, JAVA servers, database servers, and the like.

In some implementations, the server 120 may include one or more applications to analyze and consolidate data feeds and/or event updates received from users of the

client devices

101, 102, 103, 104, 105, and 106. Server 120 may also include one or more applications to display data feeds and/or real-time events via one or more display devices of

client devices

101, 102, 103, 104, 105, and 106.

In some embodiments, the server 120 may be a server of a distributed system, or a server incorporating a blockchain. The server 120 may also be a cloud server, or a smart cloud computing server or a smart cloud host with artificial intelligence technology. The cloud Server is a host product in a cloud computing service system, and is used for solving the defects of high management difficulty and weak service expansibility in the conventional physical host and Virtual Private Server (VPS) service.

The system 100 may also include one or more databases 130. In some embodiments, these databases may be used to store data and other information. For example, one or more of the databases 130 may be used to store information such as audio files and video files. The database 130 may reside in various locations. For example, the database used by the server 120 may be local to the server 120, or may be remote from the server 120 and may communicate with the server 120 via a network-based or dedicated connection. The database 130 may be of different categories. In certain embodiments, the database used by the server 120 may be, for example, a relational database. One or more of these databases may store, update, and retrieve data to and from the database in response to the command.

In some embodiments, one or more of the databases 130 may also be used by applications to store application data. The databases used by the applications may be different classes of databases, such as key-value stores, object stores, or regular stores supported by a file system.

The system 100 of fig. 1 may be configured and operated in various ways to enable application of the various methods and apparatus described in accordance with the present disclosure.

Fig. 2 shows a flow chart of an information updating method 200 of a cache including a plurality of cache lines according to an exemplary embodiment of the present disclosure. As shown in fig. 2, the method 200 includes:

step S201, receiving a first read request aiming at first data;

step S202, in response to determining that none of the target read data of the plurality of cache lines is the first data, marking the target read data of a first cache line of the plurality of cache lines as the first data;

step S203, storing the first read request to a request set, and updating a request identifier of the first cache line to indicate that a read request for the first data exists in the request set;

step S204, receiving a second read request aiming at the first data;

step S205, in response to determining that there is a first cache line in which the target read data is the first data, and in response to determining that the first data is not included in the first cache line, storing the second read request to the request set;

step S206, in response to determining that the first data is stored in the first cache line, reading the first data from the first cache line and returning the first read request and the second read request; and

step S207, removing the first read request and the second read request from the request set, and updating the request identifier of the first cache line to indicate that there is no read request for the first data in the request set.

Therefore, whether a pending read request associated with the first cache line exists in the request set can be indicated by using the request identifier of the first cache line, when the first data does not return to the first cache line yet, only the second read request needs to be stored in the request set for the received second read request pointing to the same first data, so that the first read request and the second read request can multiplex the data in the cache line after the first data is stored in the first cache line, and the cache utilization rate can be improved. And meanwhile, in this case, the first cache line only needs to send a read request for the first data to the main memory once, so that the occupation of main memory access resources can be reduced.

According to some embodiments, the request identification is a request count value, the request count value of the first cache line being capable of indicating a number of read requests for the first data in the request set, and wherein storing the first read request to the request set is followed by performing an update to the count value of the first cache line, and storing the second read request to the request set is followed by performing an update to the count value of the first cache line. Thus, the number of read requests for the first data in the request set can be simply and efficiently indicated by the request count value.

In some examples, in step S202, a first cache line may be randomly selected from the plurality of cache lines, and the target read data of the first cache line is marked as the first data, or the first cache line may be determined from the plurality of cache lines based on a preset policy, which is not limited herein.

According to some embodiments, the target read data of the first cache line of the plurality of cache lines for which the request count value is zero is marked as the first data in step S202. When the request count value of the cache line is not zero, the request set is indicated to further include a pending read request waiting for target read data corresponding to the cache line, and the cache line associated with the pending request can be prevented from being occupied by a new request by selecting the first cache line with the request count value of zero.

The applicant has noted that, in a practical application scenario, for a plurality of received ordered data read requests, a plurality of corresponding data needs to be orderly returned to a request issuing party to ensure the timing of data processing.

Based on this, according to some embodiments, the data structure of the request set is a first-in first-out queue, and reading the first data from the first cache line and returning the first read request and the second read request in step S206 includes: in response to determining that the first read request is located at a dequeue position of the queue, reading the first data from the first cache line and returning the first read request; and in response to determining that the second read request is located in a dequeued position of the queue, reading the first data from the first cache line and returning the second read request. Therefore, the data structure of the first-in first-out queue can be used for realizing the ordered return of the plurality of data reading requests, namely the data reading requests are returned to the request sender according to the receiving order of the plurality of data reading requests, so that the time sequence of data processing is ensured.

Further, according to some embodiments, when the request identification is a request count value, in step S207, in response to determining that the first data has been returned to the first read request, removing the first read request from the request set and performing a decremental update to the request count value of the first cache line; in response to determining that the first data has been returned to the second read request, the second read request is removed from the set of requests and a decremental update is performed to the request count value of the first cache line. By updating the request count value for a cache line based on a read request move-out operation in the request set, the request count value can be utilized to accurately indicate the number of read requests in the request set for the target read data for the cache line.

In this case, the method 200 may further include: in response to determining that there is a first cache line for which the target read data is the first data and in response to determining that the queue is not empty, storing the second read request to the request set and performing an increment update to a request count value of the first cache line. Therefore, the second data reading request can be temporarily stored in the request set when the queue is not empty, so that the ordering of data return is ensured.

In some examples, the cache may be shared by multiple data processing units, such that data read requests from different processing units may be received. In this case, the data read requests issued in order by each processing unit need to implement an in-order return.

Based on this, according to some embodiments, the request set comprises a first sub-queue and a second sub-queue, the first read request is received from a first processing unit in step S201, a second read request is received from a second processing unit different from the first processing unit in step S204, and the first read request is stored to the first sub-queue in step S203, and the second read request is stored to the second sub-queue in step S205. Therefore, the data reading requests sent by different processing units can be stored by the first sub-queue and the second sub-queue respectively, the data reading requests from different processing units can be processed efficiently and parallelly, the data reading efficiency is improved, and meanwhile, the data can be returned orderly for each processing unit.

According to some embodiments, each of the plurality of cache lines includes a cache data identification indicating target read data of the cache line, and wherein marking the target read data of a first cache line of the plurality of cache lines as the first data in step S202 includes: updating the cache data identification of the first cache line to a first data identification corresponding to the first data, and wherein the second read request for the first data is stored to the request set in response to determining that the cache data identification of the first cache line is the first data identification and in response to determining that the first data is not included in the first cache line. Therefore, the target read data of the cache line can be indicated by the cache data identification, and when a new read request is received, whether the hit cache line exists in the plurality of cache lines can be simply, conveniently and efficiently determined by comparing the identification of the data pointed by the new read request with the cache data identification.

According to some embodiments, the first data is identified as a storage address of the first data in the main memory. Thus, the target read data can be simply and efficiently instructed by using the memory address.

In some examples, the first data identifier may be of another type, for example, when the data in the main memory is stored in the form of an index table, an index corresponding to the first data may be used as the first data identifier.

According to some embodiments, the method 200 further comprises: after marking target read data in the plurality of cache lines as the first data, marking the first cache line as a data invalid state; and marking the first cache line as a data valid state in response to determining that the first data is stored into the first cache line, and reading the first data from the first cache line in response to determining that the first cache line is a data valid state in step S206. Therefore, whether the cache line comprises the data corresponding to the cache data identification can be simply and accurately indicated by using the data valid state or the data invalid state of the cache line.

In some examples, the data valid state or the data invalid state of the cache line may be indicated by using a binary valid state identifier, for example, the valid state identifier may be assigned with 1 to indicate that the cache line data is valid, and the valid state identifier may be assigned with 0 to indicate that the cache line data is invalid.

Fig. 3 shows a data structure diagram of a cache 300 according to an exemplary embodiment of the present disclosure. As shown in fig. 3, the cache 300 includes a plurality of cache lines, and each cache line includes a valid status identifier, a request count value, a cache data identifier, and cache data. In one example, when the cache is shared by a plurality of data processing units, each data processing unit may read or update the above information in the cache 300, so as to improve the utilization rate of the cache line and improve the data reading efficiency.

In one example, the first processing unit and the second processing unit share the same cache 300 to initiate a read request. The data corresponding to the read request with the data identifier a is A, and the data corresponding to the read request with the data identifier B is B. By performing the method 200 described above, this example may include, for example, the following processes:

s1, receiving a reading request with a data identifier a sent by a first processing unit;

s2, in response to the fact that the cache data identification of any cache line in the cache is not a, updating the cache data identification of the cache line A with the request count value of 0 to a, updating the request count value to 1, marking the cache line A to be in a data invalid state, and sending a read request with the data identification of a to the main memory;

s3, storing the read request with the data identifier a into a first queue;

s4, receiving a reading request with a data identifier b sent by the second processing unit;

s5, in response to the fact that the cache data identification of any cache line in the cache is not B, updating the cache data identification of the cache line B with the request counting value of 0 to be B, updating the request counting value to be 1, marking the cache line B to be in a data invalid state, and sending a read request with the data identification of B to a main memory;

s6, storing the read request with the data identifier b into a second queue;

s7, receiving a read request with a data identifier b sent by the first processing unit;

s8, updating the request count value of the cache line B to be 2;

s9, storing the read request with the data identifier b into a first queue;

s10, receiving a reading request with a data identifier a sent by a second processing unit;

s11, updating the request count value of the cache line A to 2;

s12, storing the read request with the data mark a into a second queue;

s13, in response to the fact that the data A are stored in the cache line A, marking the cache line A in a data valid state;

s14, in response to the fact that the read request with the data identifier a is located at the dequeuing position of the first queue, returning the data A to the first processing unit, moving the read request with the data identifier a out of the first queue, and updating the request count value of the cache line A to be 1;

s15, in response to the fact that the data B is stored in the cache line B, marking the cache line B in a data valid state;

s16, in response to the fact that the read request with the data identifier B is located at the dequeuing position of the second queue, returning the data B to the second processing unit, moving the read request with the data identifier B out of the second queue, and updating the request count value of the cache line B to be 1;

s17, in response to the fact that the read request with the data identifier a is located at the dequeuing position of the second queue, returning the data A to the second processing unit, moving the read request with the data identifier a out of the second queue, and updating the request count value of the cache line A to be 0;

and S18, in response to the fact that the read request with the data identifier B is located at the dequeuing position of the first queue, returning the data B to the first processing unit, shifting the read request with the data identifier B out of the first queue, and updating the request count value of the cache line B to be 0.

It can be seen that the first processing unit and the second processing unit issue 4 read requests in total, by using the method 200 of the present disclosure, the cache line a can be shared by the 2 read requests with data id a, the cache line B can be shared by the 2 read requests with data id B, and the cache only issues 2 read requests to the main memory. And for the second processing unit, although the data a corresponding to the second read request is stored in the cache first, before the data B corresponding to the first read request is returned, because the second read request is not located at the dequeue position of the second queue, the data a corresponding to the second read request is not returned to the second processing unit, and the request count value of the cache line a is 1 at this time, it is ensured that the data a in the cache line a is not replaced until the data a is returned to the second processing unit. Therefore, the data are returned according to the receiving sequence of the corresponding data reading requests, and the data processing time sequence is ensured.

According to another aspect of the present disclosure, an apparatus for updating cached information is also provided. Fig. 4 shows a block diagram of an information updating apparatus 400 of a cache including a plurality of cache lines according to an exemplary embodiment of the present disclosure. As shown in fig. 4, the apparatus 400 includes:

a receiving unit 401 configured to receive a first read request for first data;

a marking unit 402 configured to mark a target read data of a first cache line of the plurality of cache lines as the first data in response to determining that none of the target read data of the plurality of cache lines is the first data;

a storage unit 403 configured to store the first read request to a request set;

an update unit 404 configured to update a request identification of the first cache line to indicate that there is a read request for the first data in the request set;

the receiving unit 401 is further configured to receive a second read request for the first data;

the storage unit 403 is further configured to store the second read request to the request set in response to determining that there is a first cache line for which the target read data is the first data and in response to determining that the first data is not included in the first cache line;

a read unit 405 configured to, in response to determining that the first data is stored in the first cache line, read the first data from the first cache line and return the first read request and the second read request; and

a removal unit 406 configured to remove the first read request and the second read request from the request set;

the update unit 404 is further configured to update the request identification of the first cache line to indicate that there is no read request for the first data in the request set.

According to some embodiments, the request identification is a request count value, the request count value of the first cache line can indicate a number of read requests for the first data in the request set, and the updating unit 404 is configured to perform an update of the count value of the first cache line after the first read request is stored in the request set, and further configured to perform an update of the count value of the first cache line after the second read request is stored in the request set.

According to some embodiments, the marking unit 402 is configured to mark the target read data of a first cache line of the plurality of cache lines for which a count value is zero as the first data.

According to some embodiments, the data structure of the request set is a first-in-first-out queue, and the reading unit 405 is configured to: in response to determining that the first read request is located at a dequeue position of the queue, reading the first data from the first cache line and returning the first read request; in response to determining that the second read request is located in a dequeued position of the queue, reading the first data from the first cache line and returning the second read request.

According to some embodiments, when the request identification is a request count value, the removing unit 406 is configured to: in response to determining that the first data has been returned to the first read request, the first read request is removed from the request set, and the update unit 404 is configured to perform a minus one update on a request count value of the first cache line; in response to determining that the first data has been returned to the second read request, the second read request is removed from the request set, and the update unit 404 is configured to perform a minus one update to the request count value of the first cache line.

According to some embodiments, the receiving unit 401 is configured to receive the first read request from a first processing unit, receive a second read request from a second processing unit different from the first processing unit, and the request set includes a first sub-queue and a second sub-queue, and the storing unit 403 is configured to store the first read request to the first sub-queue and store the second read request to the second sub-queue.

According to some embodiments, each cache line of the plurality of cache lines comprises a cache data identification for indicating target read data for the cache line, and wherein the tagging unit 402 is configured to: updating the cache data identification of the first cache line to a first data identification corresponding to the first data, and wherein the storage unit 403 is configured to store the second read request for the first data to the request set in response to determining that the cache data identification of the first cache line is the first data identification and in response to determining that the first data is not included in the first cache line.

According to some embodiments, the first data is identified as a storage address of the first data in the main memory.

According to some embodiments, the marking unit 402 is further configured to: after marking target read data of a first cache line in the plurality of cache lines as the first data, marking the first cache line as a data invalid state; and in response to determining that the first data is stored into the first cache line, marking the first cache line as a data valid state, and wherein read unit 405 is configured to read the first data from the first cache line in response to determining that the first cache line is a data valid state.

The operations of the units 401 to 406 of the cached information updating apparatus 400 are similar to the operations of the steps S201 to S207 described above, and are not described herein again.

Fig. 5 shows a schematic structural diagram of a data reading apparatus 500 according to an exemplary embodiment of the present disclosure. As shown in fig. 5, the data reading apparatus 500 may include: main memory 510, arbitration unit 520, cache 300, and a plurality of cached information update apparatuses 400. The plurality of devices 400 are respectively configured to process data read requests from different processing units, and store the received data read requests into the first sub-queue 531, the second sub-queue 532, and the third sub-queue 533 respectively corresponding to the received data read requests. The solid arrows in the figure show the flow of data read requests, and the dashed arrows show the flow of information in cache 300.

Illustratively, the operation process of the data reading device comprises the following steps:

s21, the device 400 corresponding to the first sub-queue 531 receives the third data read request;

s22, in response to determining that the first sub-queue 531 is not full, executing the following substeps 3-S4:

s23, in response to determining that the third data identifier included in the third data read request is the same as the cache data identifier of the third cache line, performing an update on the request count value of the third cache line, and storing the third data read request information to the first sub-queue 531;

s24, in response to determining that the third data identifier included in the third data read request is different from the cache data identifier of any cache line, and in response to determining that there is a third cache line whose request count value is zero, updating the cache data identifier of the third cache line to a third data identifier, performing an update on the request count value of the third cache line, sending a data read request for the third data to the arbitration unit 520, marking a data invalid state of the third cache line, and storing the third data read request information to the first sub-queue 531;

s25, in response to receiving the multiple data read requests, the arbitration unit 520 sorts the multiple data read requests based on a preset policy, and sequentially sends the multiple data read requests to the main memory 510, where the preset policy may be, for example, a polling policy, or may be sorting based on manually configured priority information of each processing unit, which is not limited to this;

s26, writing third data into a third cache line by the main memory 510, and marking the third cache line as a data valid state;

s27, the apparatus 400 corresponding to the first sub-queue 531 responds to determining that the third data read request is at the dequeue position of the first sub-queue 531, reads the third data from the third cache line and returns the third data read request, removes the third data read request from the first sub-queue 531, and performs a minus-one update on the request count value of the third cache line.

According to another aspect of the present disclosure, there is also provided an electronic device including: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the above-described cached information updating method.

According to another aspect of the present disclosure, there is also provided a non-transitory computer readable storage medium storing computer instructions for causing the computer to perform the above-described cached information updating method.

According to another aspect of the present disclosure, there is also provided a computer program product comprising a computer program, wherein the computer program when executed by a processor implements the above-mentioned cached information updating method.

Referring to fig. 6, a block diagram of a structure of an electronic device 600, which may be a server or a client of the present disclosure, which is an example of a hardware device that may be applied to aspects of the present disclosure, will now be described. Electronic device is intended to represent various forms of digital electronic computer devices, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not intended to limit implementations of the disclosure described and/or claimed herein.

As shown in fig. 6, the device 600 comprises a computing unit 601, which may perform various suitable actions and processes according to a computer program stored in a Read Only Memory (ROM) 602 or loaded from a storage unit 608 into a Random Access Memory (RAM) 603. In the RAM 603, various programs and data required for the operation of the device 600 can also be stored. The calculation unit 601, the ROM 602, and the RAM 603 are connected to each other via a bus 604. An input/output (I/O) interface 605 is also connected to bus 604.

A number of components in the device 600 are connected to the I/O interface 605, including: an input unit 606, an output unit 607, a storage unit 608 and a communication unit 609. The input unit 606 may be any type of device capable of inputting information to the device 600, and the input unit 606 may receive input numeric or character information and generate key signal inputs related to user settings and/or function controls of the electronic device, and may include, but is not limited to, a mouse, a keyboard, a touch screen, a track pad, a track ball, a joystick, a microphone, and/or a remote control. Output unit 607 may be any type of device capable of presenting information and may include, but is not limited to, a display, speakers, a video/audio output terminal, a vibrator, and/or a printer. The storage unit 608 may include, but is not limited to, a magnetic disk, an optical disk. The communication unit 609 allows the device 600 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunications networks, and may include, but is not limited to, a modem, a network card, an infrared communication device, a wireless communication transceiver, and/or a chipset, such as a bluetooth (TM) device, an 802.11 device, a WiFi device, a WiMax device, a cellular communication device, and/or the like.

The computing unit 601 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of the computing unit 601 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The calculation unit 601 performs the respective methods and processes described above, such as the cached information updating method. For example, in some embodiments, the cached information updating method may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as storage unit 608. In some embodiments, part or all of a computer program may be loaded onto and/or installed onto device 600 via ROM 602 and/or communications unit 609. When the computer program is loaded into RAM 603 and executed by computing unit 601, one or more steps of the above-described cached information updating method may be performed. Alternatively, in other embodiments, the computing unit 601 may be configured to perform the cached information update method in any other suitable manner (e.g., by means of firmware).

Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), system on a chip (SOCs), complex Programmable Logic Devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.

Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.

In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user may provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.

The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), the internet, and blockchain networks.

The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server combining a blockchain.

It should be understood that various forms of the flows shown above, reordering, adding or deleting steps, may be used. For example, the steps described in the present disclosure may be performed in parallel, sequentially or in different orders, and are not limited herein as long as the desired results of the technical solutions disclosed in the present disclosure can be achieved.

Although embodiments or examples of the present disclosure have been described with reference to the accompanying drawings, it is to be understood that the above-described methods, systems and apparatus are merely exemplary embodiments or examples and that the scope of the present invention is not limited by these embodiments or examples, but only by the claims as issued and their equivalents. Various elements in the embodiments or examples may be omitted or may be replaced with equivalents thereof. Further, the steps may be performed in an order different from that described in the present disclosure. Further, the various elements in the embodiments or examples may be combined in various ways. It is important that as technology evolves, many of the elements described herein may be replaced with equivalent elements that appear after the present disclosure.

Claims

1. A method of information updating of a cache, the cache comprising a plurality of cache lines, the method comprising:

receiving a first read request for first data;

in response to determining that none of the target read data of the plurality of cache lines is the first data, marking the target read data of a first cache line of the plurality of cache lines as the first data;

storing the first read request to a request set;

updating a request identification of the first cache line to indicate that there is a read request for the first data in the request set;

receiving a second read request for the first data;

storing the second read request to the request set in response to determining that there is a first cache line for which the target read data is the first data and in response to determining that the first data is not included in the first cache line;

in response to determining that the first data is stored in the first cache line, reading the first data from the first cache line and returning the first read request and the second read request;

removing the first read request and the second read request from the request set; and

updating the request identification of the first cache line to indicate that there is no read request for the first data in the request set.

2. The method of claim 1, wherein the request identification is a request count value, the request count value of the first cache line capable of indicating a number of read requests in the set of requests for the first data,

and wherein after storing the first read request to a request set, performing an update to a count value of the first cache line,

and wherein storing the second read request to the request set is followed by performing an update of a count value of the first cache line.

3. The method of claim 2, wherein the target read data for a first cache line of the plurality of cache lines for which a count value is zero is marked as the first data.

4. The method of any of claims 1-3, wherein a data structure of the set of requests is a first-in-first-out queue, the reading the first data from the first cache line and returning the first read request and the second read request comprising:

in response to determining that the first read request is located at a dequeue position of the queue, reading the first data from the first cache line and returning the first read request;

in response to determining that the second read request is located in a dequeued position of the queue, reading the first data from the first cache line and returning the second read request.

5. The method of claim 4, wherein removing the first and second read requests from the request set and updating the request identification of the first cache line when the request identification is a request count value comprises:

in response to determining that the first data has been returned to the first read request, removing the first read request from the set of requests and performing a decremental update to a request count value of the first cache line;

in response to determining that the first data has been returned to the second read request, the second read request is removed from the set of requests and a decremental update is performed to the request count value of the first cache line.

6. The method of claim 4 or 5,

receiving the first read request from a first processing unit, receiving the second read request from a second processing unit different from the first processing unit,

and wherein the request set includes a first sub-queue and a second sub-queue, the first read request being stored to the first sub-queue and the second read request being stored to the second sub-queue.

7. The method of any of claims 1-6, wherein each of the plurality of cache lines includes a cache data identification to indicate target read data for the cache line, and wherein the marking the target read data for a first cache line of the plurality of cache lines as the first data comprises:

updating the cache data identification of the first cache line to a first data identification corresponding to the first data,

and wherein the second read request for the first data is stored to the request set in response to determining that the cached data identification of the first cache line is the first data identification and in response to determining that the first data is not included in the first cache line.

8. The method of claim 7, wherein the first data is identified as a memory address of the first data in a main memory.

9. The method of any of claims 1-8, further comprising:

after marking target read data of a first cache line in the plurality of cache lines as the first data, marking the first cache line as a data invalid state; and

in response to determining that the first data is stored in the first cache line, marking the first cache line in a data valid state,

and wherein the first data is read from the first cache line in response to determining that the first cache line is in a data valid state.

10. An apparatus for updating information of a cache, the cache including a plurality of cache lines, the apparatus comprising:

a receiving unit configured to receive a first read request for first data;

a marking unit configured to mark a target read data of a first cache line of the plurality of cache lines as the first data in response to determining that none of the target read data of the plurality of cache lines is the first data;

a storage unit configured to store the first read request to a request set;

an update unit configured to update a request identification of the first cache line to indicate that there is a read request for the first data in the request set;

the receiving unit is further configured to receive a second read request for the first data;

the storage unit is further configured to store the second read request to the request set in response to determining that there is a first cache line for which the target read data is the first data and in response to determining that the first data is not included in the first cache line;

a read unit configured to read the first data from the first cache line and return the first read request and the second read request in response to determining that the first data is stored in the first cache line; and

a removal unit configured to remove the first and second read requests from the request set;

the update unit is further configured to update a request identification of the first cache line to indicate that no read request for the first data exists in the request set.

11. The apparatus of claim 10, wherein the request identification is a request count value, the request count value of the first cache line capable of indicating a number of read requests in the set of requests for the first data,

and wherein the update unit is configured to perform an update of the count value of the first cache line after the first read request is stored in the request set, and further configured to perform an update of the count value of the first cache line after the second read request is stored in the request set.

12. The apparatus of claim 11, wherein the marking unit is configured to mark a target read data of a first cache line of the plurality of cache lines for which a request count value is zero as the first data.

13. The apparatus of any of claims 10-12, wherein the data structure of the request set is a first-in-first-out queue, the read unit configured to:

14. The apparatus of claim 13, when the request identification is a request count value, the removal unit configured to:

in response to determining that the first data has been returned to the first read request, removing the first read request from the request set, and the update unit is configured to perform a minus one update on a request count value of the first cache line;

in response to determining that the first data has been returned to the second read request, the second read request is removed from the request set, and the update unit is configured to perform a minus one update to a request count value of the first cache line.

15. The apparatus of claim 13 or 14,

the receiving unit is configured to receive the first read request from a first processing unit, receive a second read request from a second processing unit different from the first processing unit,

and the request set includes a first sub-queue and a second sub-queue, the storage unit configured to store the first read request to the first sub-queue and the second read request to the second sub-queue.

16. The apparatus of any of claims 10-15, wherein each cache line of the plurality of cache lines includes a cache data identification to indicate target read data for the cache line, and wherein the tag unit is configured to:

and wherein the storage unit is configured to store the second read request for the first data to the request set in response to determining that the cache data identification of the first cache line is the first data identification and in response to determining that the first data is not included in the first cache line.

17. The apparatus of claim 16, wherein the first data is identified as a storage address of the first data in a main memory.

18. The apparatus of any one of claims 10-17, the tagging unit further configured to:

and wherein the read unit is configured to read the first data from the first cache line in response to determining that the first cache line is in a data valid state.

19. A chip comprising the apparatus of any one of claims 10-18.

20. An electronic device, comprising:

at least one processor; and

a memory communicatively coupled to the at least one processor; wherein

The memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of any one of claims 1-9.

21. A non-transitory computer readable storage medium having stored thereon computer instructions for causing a computer to perform the method of any one of claims 1-9.

22. A computer program product comprising a computer program, wherein the computer program realizes the method according to any of claims 1-9 when executed by a processor.