CN115514599A - Method and system for automatically removing interference signals in asynchronous serial communication - Google Patents
Method and system for automatically removing interference signals in asynchronous serial communication Download PDFInfo
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Abstract
The invention discloses a method for automatically removing interference signals in asynchronous serial communication, which comprises the following steps: counting the maximum pulse width of an interference signal in an input signal under the current environment in real time; determining a sampling filter coefficient according to a set sampling frequency and the maximum pulse width of an interference signal; and sampling the input signal at the sampling frequency, counting the sampled high and low levels by using a sampling filter coefficient, and reconstructing an output signal without interference signals. The system for automatically removing the interference signal in the asynchronous serial communication is also used for realizing the method for automatically removing the interference signal in the asynchronous serial communication. The system and the method are simple and convenient to realize, wide in range of the removable interference signals, strong in applicability and adaptive.
Description
Technical Field
The invention relates to the field of asynchronous serial communication, in particular to a method and a system for automatically removing interference signals in asynchronous serial communication.
Background
Asynchronous serial communication is a common communication mode in engineering application, has simple hardware support and protocol and low implementation cost, and is widely applied to low-speed communication among different devices. However, asynchronous serial communication is easily interfered by external environment, and has the problem of weak anti-interference capability. If data is received in a conventional mode through a jumping edge, as long as interference exists, bit errors can be caused, and even normal communication cannot be performed when the interference is serious.
Aiming at the problem that asynchronous serial communication is easy to be interfered, the currently adopted method comprises the following steps: determining the level of a single-bit pulse of a signal at a particular location (e.g., an intermediate location); or sampling the single-bit pulse of the signal for multiple times, and counting the number of high and low levels to judge the level of the single-bit pulse. The two methods can improve the anti-interference capability of serial communication, but the two methods use the premise that the start bit of the serial communication must be correctly identified, and the sampling position and the sampling pulse are determined by taking the start bit as a reference, but the start bit cannot be correctly judged due to interference signals; and the method of determining the level of a single-bit pulse of a signal at a specific position may also generate a false determination for an interference signal occurring at the level determination position.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a method and a system for automatically removing interference signals in asynchronous serial communication.
The invention adopts the following technical scheme:
a method for automatically removing interference signals in asynchronous serial communication specifically comprises the following steps:
the method comprises the following steps: counting the maximum pulse width of an interference signal in an input signal under the current environment in real time;
step two: according to the set sampling frequency and the maximum pulse width of the interference signal obtained in the first step, determining a sampling filter coefficient by the following method:
obtaining a sampling interval according to the sampling frequency, comparing the pulse width of the maximum interference signal with the size of the sampling interval, and when the pulse width of the maximum interference signal is smaller than the sampling interval, taking the value of a sampling filter coefficient as 2; when the pulse width of the maximum interference signal is greater than the sampling interval and less than M times of the sampling interval, the value of the sampling filter coefficient is M;
step three: and sampling the input signal by the sampling frequency, counting the sampled high and low levels by using the sampling filter coefficient obtained in the second step, and reconstructing an output signal of an interference-free signal.
Further, in the third step, the sampled filter coefficients obtained in the second step are used to count the high and low levels of the samples as follows:
after the count value is reduced to 0, if the sampling is continued to the low level, keeping the count value 0 unchanged; when the high level is sampled, adding 1 to the counting value, and keeping the counting value F unchanged if the high level is continuously sampled after the counting value is added to the value F of the sampling filter coefficient;
the reconstruction of the output signal without interference signal is carried out as follows:
in the low level case, when the count is added to F from F-1, the reconstructed output signal is high; in the high case, when the count is reduced from 1 to 0, the reconstructed output signal is low.
Further, comprising: the device comprises an interference pulse width statistic module, a sampling filter coefficient generation module and an output signal reconstruction module;
the interference pulse width counting module counts the maximum pulse width of an interference signal in an input signal under the current environment in real time;
the sampling filter coefficient generating module determines a sampling filter coefficient according to a sampling frequency and the maximum pulse width of the interference signal;
and the output signal reconstruction module samples the input signal at the sampling frequency, counts the sampled high and low levels by using the sampling filter coefficient and reconstructs an output signal without interference signals.
Further, the interference pulse width statistic module includes: the system comprises a latch, a high-level pulse width counter and a low-level pulse width counter; the latch is used for storing the maximum pulse width of an interference signal, the high-level pulse width counter is used for counting the high-level pulse width, and the low-level pulse width counter is used for counting the low-level pulse width;
the high-level pulse width counter and the low-level pulse width counter count in the following modes: counting is started by taking one jumping edge of the input signal as a starting point, counting is ended by taking the next jumping edge as an ending point, the widths of all input pulses are counted in real time, signals smaller than half of the width of a single-bit pulse are considered as interference signals, and the maximum pulse width value of the interference signals is latched by utilizing a latch.
Further, the sampling filter coefficient generating module compares the pulse width of the maximum interference signal with the size of the sampling interval, and when the pulse width of the maximum interference signal is smaller than the sampling interval, the value of the sampling filter coefficient is 2; and when the pulse width of the maximum interference signal is greater than the sampling interval and less than integral multiple M of the sampling interval, the sampling filter coefficient value is M.
Further, the output signal reconstruction module samples the input signal according to the sampling frequency, and counts the sampled high and low levels by using the sampling filter coefficients as follows:
when the system samples to a high level, the count value starts to be added with 1 until the count value is added to the value F of the sampling filter coefficient, and if the system continues to sample to the high level, the count value F is kept unchanged; if the sampling is continued to the low level, the count value is subtracted by 1 until the count value is subtracted by 0 and is kept unchanged;
reconstructing an output signal of the interference free signal by:
in the low level condition, when the counting value is added to F from F-1, reconstructing the output signal as high level; in the high state, when the count value is decreased from 1 to 0, the reconstructed output signal is at a low level.
Furthermore, the sampling interval is determined by a sampling frequency, and the sampling frequency is selected to ensure that single-bit pulse data is sampled for an integer number of times and the delay of signal processing is considered.
Further, when the pulse width of the maximum interference signal is smaller than the sampling interval, the delay of the system does not exceed 3 times of the sampling interval at most; when the pulse width of the maximum interference signal is larger than the sampling interval and smaller than the integral multiple M of the sampling interval, the delay of the system processing is not more than M +1 times of the sampling interval at most.
The invention has the beneficial effects that:
(1) Compared with the prior art, the method does not rely on the start bit as the reference for judging the single-bit pulse level, and can not generate misjudgment on distinguishable interference signals appearing at any sampling position.
(2) The invention is suitable for removing all interference signals of which the maximum pulse width of the interference signal is less than half of the pulse width of a communication single bit and the resolution is greater than the pulse width of the interference signal (namely, the distance between a useful signal and the interference signal with the same level is greater than the pulse width of the interference signal), and the range of the removable interference signals is wide.
(3) The invention counts the maximum pulse width of the interference signal in real time to adjust the filtering parameter, thereby improving the self-adaptability of the system.
(4) The invention uses a separate system, and does not need to be coupled with other processing modules, thereby improving the flexibility of the system.
Drawings
Fig. 1 is a block flow diagram of a system for automatically removing an interference signal in asynchronous serial communication in accordance with the present invention.
Fig. 2 is an example of reconstructing an output signal when the interference signal pulse width is smaller than the sampling interval.
Fig. 3 is an example of reconstructing an output signal when the interference signal pulse width is larger than the sampling interval.
Fig. 4 is an example of reconstructing an output signal when the pulse width of an interference signal captured by the logic analyzer is smaller than the sampling interval.
Fig. 5 is an example of a reconstructed output signal when the logic analyzer grabs a glitch pulse width greater than the sampling interval.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings and preferred embodiments, and the objects and effects of the present invention will become more apparent, and the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The method for automatically removing the interference signal in the asynchronous serial communication comprises the following specific steps:
the method comprises the following steps: and counting the maximum pulse width of the interference signal in the input signal under the current environment in real time.
Step two: and determining a sampling filter coefficient according to the sampling frequency and the maximum pulse width of the interference signal.
Obtaining a sampling interval from the sampling frequency, comparing the pulse width of the maximum interference signal with the size of the sampling interval, and when the pulse width of the maximum interference signal is smaller than the sampling interval, taking the value of a sampling filter coefficient as 2; and when the pulse width of the maximum interference signal is greater than the sampling interval and less than M times of the sampling interval, the value of the sampling filter coefficient is M.
Step three: and sampling the input signal according to the sampling frequency, and counting the sampled high and low levels by using the sampling filter coefficient to complete the reconstruction of the output signal of the non-interference signal.
Counting according to the sampling level, and keeping the count value 0 unchanged if the count value is continuously sampled to a low level after the count value is reduced to 0; and adding 1 to the high-level count, and keeping the count value F unchanged if the count value is continuously sampled to the high level after the count value is added to the value F of the sampling filter coefficient.
In the high level condition, when the count is reduced from 1 to 0, the output signal is reconstructed to be in a low level; and under the condition of low level, when the counting is added to F from F-1, reconstructing the output signal to be high level, and completing the reconstruction after the interference signal is removed from the input signal.
As shown in fig. 1, a system for automatically removing an interference signal in asynchronous serial communication includes: the device comprises an interference pulse width statistic module, a sampling filter coefficient generation module and an output signal reconstruction module.
The interference pulse width counting module is used for counting the maximum pulse width of an interference signal in an input signal under the current environment in real time.
The interference pulse width statistic module comprises: latch, high level pulse width counter, low level pulse width counter. The latch is used for storing the maximum pulse width of the interference signal and is initialized to 0; the two counters count the high-level pulse width and the low-level pulse width respectively.
The high-level pulse width counter starts counting by taking an upper jumping edge of an input signal as a starting point, finishes counting by taking a lower jumping edge of the input signal as an end point, and counts the width of a high-level pulse in real time; performing accumulation operation in a high-level pulse period, and clearing zero in a low-level pulse period; if the width of the high-level pulse is less than half of the width of the communication single-bit pulse at the lower jumping edge, the high-level pulse is judged to be an interference signal; otherwise, judging the high-level pulse to be a normal signal; and for the interference signal, continuously judging whether the high-level pulse width value at the moment is larger than the value in the latch, if so, updating the value in the latch by using the high-level pulse width value at the moment, and otherwise, keeping the value in the latch unchanged.
The low-level pulse width counter starts counting by taking the lower jumping edge of the input signal as a starting point, finishes counting by taking the upper jumping edge of the input signal as an end point, and counts the width of the low-level pulse in real time; performing accumulation operation in a low-level pulse period, and clearing zero in a high-level pulse period; if the pulse width of the low level is less than half of the pulse width of the communication single bit at the upper jumping edge, the low level pulse is judged to be an interference signal; otherwise, judging that the low-level pulse signal is a normal signal; and for the interference signal, continuously judging whether the low-level pulse width at the moment is larger than the value in the latch, if so, updating the value in the latch by using the value of the low-level pulse width at the moment, and otherwise, keeping the value in the latch unchanged.
And the sampling filter coefficient generating module determines a sampling filter coefficient according to the sampling frequency and the maximum pulse width of the interference signal.
The baud rates of asynchronous serial communication are different, the sampling frequency N can also be different, and the integral sampling of single-bit pulse data is ensured, and the delay of signal processing is considered. The sampling frequency N is typically between 8 and 32. In this embodiment, the sampling frequency N is 16.
When the maximum pulse width of the interference signal is smaller than the sampling interval, the sampling filter coefficient is 2, and in this case, the sampling pulse is only sampled once at most for the same interference signal. As shown in fig. 2, the interference signal 1 is sampled, and the interference signal 2 is not sampled.
When the maximum pulse width of the interference signal is larger than the sampling interval and smaller than M times of the sampling interval, M is a positive integer, and the value of the sampling filter coefficient is M, under the condition, for the same interference signal, the sampling pulse can continuously acquire the interference signal for M-1 times. As shown in fig. 3, the interference signal 1 is less than 5 times the sampling interval and is sampled 4 times; the interference signal 2 is less than 3 times the sampling interval and is sampled 2 times.
And the output signal reconstruction module samples the input signal according to the sampling frequency, counts the sampled high and low levels by using the sampling filter coefficient and completes the reconstruction of the output signal without the interference signal.
In the example shown in fig. 2, the pulse width of the interference signal is smaller than the sampling interval, so the sampling filter coefficient F takes a value of 2, the system samples to a high level, the count value starts to add 1 until the count reaches F, the count value continues to sample to a high level, and keeps F unchanged, after the interference signal 1 of a low level is sampled, the count value subtracts 1, the subsequent sampling continues to a high level, and the count value adds 1 again until F is kept unchanged; and (4) acquiring a low level, subtracting 1 by the counter until the count reaches 0, and keeping the count value to be 0 if the low level is continuously acquired. The interference signal 2 of high level is not sampled, and the change of the counter is not caused.
In the example shown in fig. 3, the pulse width of the interference signal is greater than the sampling interval, and the pulse width of the largest interference signal is less than 5 times the sampling interval, so the sampling filter coefficient F takes a value of 5. When the system samples to a high level, the counting value is added with 1 until the counting reaches F, and if the system continues to sample to the high level, the counting value keeps F unchanged; if sampling continues to low, the count value is decremented by 1 until the count value is decremented to 0. As shown in fig. 3, the system is initially low, and the count value is 0; then sampling to a high level, and adding 1 to the count value until 5 is obtained; after the low-level interference signal 1 is continuously sampled at the moment, the count value is subtracted by 1 until the count value is reduced to 1; sampling to a high level again, adding 1 to the count value until 5 is added, and keeping 5 unchanged; continuing to sample to a low level, and subtracting 1 from the counting value until the counting value is reduced to 0; continuing to sample the interference signal 2 with high level, and adding 1 to the count until 2; then, the sampling is continued to the low level, the counter is decremented by 1 until the counter reaches 0, and the 0 is kept unchanged.
In the example of fig. 2 and 3, the reconstructed output signal is high when the count value is from F-1 to F, low when the count value is from 1 to 0, the unit pulse width of the output signal is 16 sampling frequencies, and the input is identical. In fig. 2, the reconstructed output signal is high when the count value is from 1 to 2, until the reconstructed output signal is low when the count value is from 1 to 0. In fig. 3, the reconstructed output signal is high when the count value is from 4 to 5 until it is low when the count value is from 1 to 0.
For the maximum pulse width of the interference signal is less than half of the pulse width of the communication single bit, and the resolution is greater than the pulse width of the interference signal (i.e. the distance between the useful signal and the interference signal with the same level is greater than the pulse width of the interference signal), the counting change caused by all the interference signals cannot be changed from F-1 to F or from 1 to 0, so that the interference can be automatically removed by sampling counting. When the maximum pulse width of the interference signal is smaller than the sampling interval, the delay of signal processing does not exceed 3 times of the sampling interval at most; when the maximum pulse width of the interference signal is larger than the sampling interval and smaller than M times of the sampling interval, the maximum delay time of signal processing does not exceed M +1 times of the sampling interval.
As shown in fig. 4 and 5, for the verification of the present invention on an actual system, actual data is captured by a logic analyzer of the FPGA on the board. Artificially adding interference signals to serial input signals to form input test signals, setting sampling filter coefficients according to the maximum pulse width of the interference signals counted in real time, and sampling single-bit pulse data at a sampling frequency of N = 16; and counting the counter according to the sampling filter coefficient, and finally reconstructing an output signal of the non-interference signal.
The maximum pulse width of the interference signal captured in fig. 4 is smaller than the sampling interval, so the sampling filter coefficient is 2, and the delay of the output signal with respect to the input signal is not greater than 3 sampling intervals; the maximum pulse width of the interference signal captured in fig. 5 is less than 6 times the sampling interval, so the sampling filter coefficient is 6, and the delay of the output signal with respect to the input signal is not greater than 7 sampling intervals.
Comparing the input serial input signal in fig. 4 and 5 with the reconstructed output signal without interference signal, the method of the present invention can effectively remove the interference signal in the asynchronous serial communication, and the reconstructed output signal is complete and accurate.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and although the invention has been described in detail with reference to the foregoing examples, it will be apparent to those skilled in the art that various changes in the form and details of the embodiments may be made and equivalents may be substituted for elements thereof. All modifications, equivalents and the like which come within the spirit and principle of the invention are intended to be included within the scope of the invention.
Claims (8)
1. A method for automatically removing interference signals in asynchronous serial communication is characterized by comprising the following steps:
the method comprises the following steps: counting the maximum pulse width of an interference signal in an input signal under the current environment in real time;
step two: according to the set sampling frequency and the maximum pulse width of the interference signal obtained in the first step, determining a sampling filter coefficient by the following method:
obtaining a sampling interval according to the sampling frequency, comparing the pulse width of the maximum interference signal with the size of the sampling interval, and when the pulse width of the maximum interference signal is smaller than the sampling interval, taking the value of a sampling filter coefficient as 2; when the pulse width of the maximum interference signal is greater than the sampling interval and less than M times of the sampling interval, the value of the sampling filter coefficient is M;
step three: and sampling the input signal by the sampling frequency, counting the sampled high and low levels by using the sampling filter coefficient obtained in the second step, and reconstructing an output signal without interference signals.
2. The method for automatically removing interference signals in asynchronous serial communication according to claim 1, wherein in step three, the sampled filter coefficients obtained in step two are used to count the high and low levels of the samples by:
after the count value is reduced to 0, if the sampling is continued to the low level, keeping the count value 0 unchanged; when the high level is sampled, adding 1 to the counting value, and keeping the counting value F unchanged if the high level is continuously sampled after the counting value is added to the value F of the sampling filter coefficient;
the reconstruction of the output signal without interference signal is carried out as follows:
in the low level situation, when the counting is added to F from F-1, the output signal is reconstructed to be high level; in the high case, when the count is reduced from 1 to 0, the reconstructed output signal is low.
3. A system for automatically removing an interference signal in asynchronous serial communication, comprising: the device comprises an interference pulse width statistic module, a sampling filter coefficient generation module and an output signal reconstruction module;
the interference pulse width counting module counts the maximum pulse width of an interference signal in an input signal under the current environment in real time;
the sampling filter coefficient generating module determines a sampling filter coefficient according to the sampling frequency and the maximum pulse width of the interference signal;
and the output signal reconstruction module samples the input signal at the sampling frequency, counts the sampled high and low levels by using the sampling filter coefficient and reconstructs an output signal without interference signals.
4. The system for automatically removing the interference signal in asynchronous serial communication according to claim 3, wherein said interference pulse width statistic module comprises: the system comprises a latch, a high-level pulse width counter and a low-level pulse width counter; the latch is used for storing the maximum pulse width of an interference signal, the high-level pulse width counter is used for counting the high-level pulse width, and the low-level pulse width counter is used for counting the low-level pulse width;
the high-level pulse width counter and the low-level pulse width counter count in the following modes: counting is started by taking one jumping edge of the input signal as a starting point, counting is ended by taking the next jumping edge as an ending point, the widths of all input pulses are counted in real time, signals smaller than half of the width of a single-bit pulse are considered as interference signals, and the maximum pulse width value of the interference signals is latched by utilizing a latch.
5. The system for automatically removing the interference signal in the asynchronous serial communication according to claim 3, wherein the sampling filter coefficient generating module compares the pulse width of the maximum interference signal with the size of the sampling interval, and when the pulse width of the maximum interference signal is smaller than the sampling interval, the sampling filter coefficient takes a value of 2; and when the pulse width of the maximum interference signal is greater than the sampling interval and less than integral multiple M of the sampling interval, the sampling filter coefficient value is M.
6. The system according to claim 3, wherein the output signal reconstructing module samples the input signal according to the sampling frequency, and counts the sampled high and low levels by using the sampling filter coefficients by:
when the system samples to a high level, the counting value is added with 1 until the counting value is added to the value F of the sampling filter coefficient, and if the system continues to sample to the high level, the counting value F is kept unchanged; if the sampling is continued to the low level, the count value is reduced by 1 until the count value is reduced to 0 and is kept unchanged;
reconstructing an output signal of the non-interfering signal by:
in the low level condition, when the counting value is added to F from F-1, the output signal is reconstructed to be high level; in the high state, when the count value is decreased from 1 to 0, the reconstructed output signal is at a low level.
7. The system for automatically removing the interference signal in the asynchronous serial communication according to claim 5, wherein the sampling interval is determined by a sampling frequency, and the sampling frequency is selected to ensure that the single-bit pulse data is sampled an integer number of times and to take into account the delay of signal processing.
8. The system for automatically removing interference signals in asynchronous serial communication according to claim 6, wherein when the pulse width of the maximum interference signal is smaller than the sampling interval, the delay time of the system is not more than 3 times of the sampling interval at most; when the pulse width of the maximum interference signal is larger than the sampling interval and smaller than the integral multiple M of the sampling interval, the delay of the system processing is not more than M +1 times of the sampling interval at most.
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