CN115514365A - Digital-to-analog conversion circuit of R-2R ladder resistance network architecture - Google Patents
Digital-to-analog conversion circuit of R-2R ladder resistance network architecture Download PDFInfo
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- CN115514365A CN115514365A CN202211167627.7A CN202211167627A CN115514365A CN 115514365 A CN115514365 A CN 115514365A CN 202211167627 A CN202211167627 A CN 202211167627A CN 115514365 A CN115514365 A CN 115514365A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M1/0602—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic
- H03M1/0604—Continuously compensating for, or preventing, undesired influence of physical parameters of deviations from the desired transfer characteristic at one point, i.e. by adjusting a single reference value, e.g. bias or gain error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/74—Simultaneous conversion
- H03M1/78—Simultaneous conversion using ladder network
- H03M1/785—Simultaneous conversion using ladder network using resistors, i.e. R-2R ladders
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Abstract
The embodiment of the present disclosure provides a digital-to-analog conversion circuit of an R-2R ladder resistance network architecture, the digital-to-analog conversion circuit of the R-2R ladder resistance network architecture includes: the circuit comprises a branch resistor, a branch switch, a bridge resistor and a compensation resistor; the bridge resistors between the branch circuit from the preset position and the branch circuit at the lowest position are connected in series with a compensation resistor, and the resistance value of the compensation resistor is related to the on-resistance of the branch circuit switch of the branch circuit at the highest position and the weight of the branch circuit at the preset position; the on-resistance of the branch switches of all the branches at one side of the branch with the preset bit to the lowest bit is equal to the preset on-resistance, and the preset on-resistance is twice of the compensation resistance. The digital-to-analog conversion circuit solves the problems that the existing high-precision digital-to-analog conversion circuit with the R-2R ladder resistance network architecture is large in switch size requirement and high in design cost.
Description
Technical Field
The embodiment of the disclosure relates to the technical field of integrated circuits, in particular to a digital-to-analog conversion circuit of an R-2R ladder resistance network architecture.
Background
Digital to Analog converters (DACs) have a very important function and position in the fields of communication, computer, electronic products, etc. today, they convert Digital codes into Analog signals. There are many different types of DAC architectures, and among them, the R-2R ladder resistor network architecture digital-to-analog converter is a very common one. However, with the requirement of high-precision transmission, the number of branches is required to be increased correspondingly, and the size requirement (area requirement) of branch switches (generally transistors) in the branches is increased exponentially with the accuracy (corresponding to the number of bits of the DAC) of the R-2R ladder network. This makes the layout area requirement of the high-precision R-2R ladder network large, and although in practical circuit design, proportional increase of the switch size is no longer sought on the low-order branches with relatively small influence, the total switch size required to guarantee the requirement of precision is still large. The larger the switch size is, the higher the design cost is, and the larger the matching difficulty of the device layout is.
Disclosure of Invention
Embodiments described herein provide a digital-to-analog conversion circuit of an R-2R ladder resistance network architecture, in order to solve the problems of large switch size requirement and high design cost of the existing digital-to-analog conversion circuit of a high-precision R-2R ladder resistance network architecture.
A first aspect of the present disclosure provides a digital-to-analog conversion circuit of an R-2R ladder resistance network architecture, the digital-to-analog conversion circuit including: the circuit comprises a branch resistor, a branch switch, a bridge resistor and a compensation resistor; the branch resistor and the branch switch are sequentially connected in series on each branch; bridging a bridging resistor between every two branches from the branch at the lowest position to the branch at the highest position, wherein the resistance value of the branch resistors is equal to twice that of the bridging resistor, and the branches from the branch at the lowest position to the branch at the highest position correspond to different digital signal positions respectively; the bridge resistors between the branch circuit at the highest position and the branch circuit at the lowest position are connected in series with one compensation resistor, and the resistance value of the compensation resistor is related to the on-resistance of the branch circuit switch of the branch circuit at the highest position and the weight of the branch circuit at the preset position; the on-resistance of the branch switches of all the branches on one side of the branch with the lowest position from the branch with the preset position is equal to the preset on-resistance, the preset on-resistance is twice of the compensation resistance, and the on-resistance of the branch switches of other branches is in proportional relation with the weight of the corresponding branch.
Optionally, a ratio of the on-resistance of the branch switch corresponding to the highest bit to the resistance of the compensation resistor is equal to twice the weight of the branch at the preset bit.
Optionally, the range of the preset bits is greater than 2 and less than or equal to the number of bits of the digital-to-analog conversion circuit.
Optionally, the value of the preset bit is adjusted according to the requirement of precision and the design cost of the layout.
Optionally, the branch switch is a transistor.
Optionally, the digital-to-analog conversion circuit is a voltage-type digital-to-analog conversion circuit or a current-type digital-to-analog conversion circuit.
Optionally, one end of the branch switch of each branch from the lowest branch to the highest branch is connected to the branch resistor, and the other end is connected to the reference voltage of high potential or the reference voltage of low potential; one end of the branch resistor of the highest branch is connected with one end of the corresponding branch switch, and the other end of the branch resistor of the highest branch is connected with the output voltage end.
Optionally, if the reference voltage with the low potential is a zero reference voltage, the digital-to-analog conversion circuit is a single-reference-voltage digital-to-analog conversion circuit; if the low-potential reference voltage is a non-zero reference voltage, the digital-to-analog conversion circuit is a voltage type digital-to-analog conversion circuit with double reference voltages.
Optionally, one end of the branch switch of each branch from the lowest branch to the highest branch is connected to the branch resistor, and the other end is connected to the current output end or the ground end; one end of the branch resistor of the highest branch is connected with one end of the corresponding branch switch, and the other end of the branch resistor of the highest branch is connected with the reference current end.
Optionally, the adjusting the value of the preset bit according to the requirement of the precision and the design cost of the layout includes: the higher the precision is, the larger the value of the preset bit is, and the lower the precision is, the smaller the value of the preset bit is; the smaller the design cost of the layout is, the larger the value of the preset bit is, the larger the design cost of the layout is, and the smaller the value of the preset bit is.
The digital-to-analog conversion circuit of the R-2R ladder resistance network architecture of the embodiment of the present disclosure includes: the circuit comprises a branch resistor, a branch switch, a bridge resistor and a compensation resistor, wherein the branch resistor and the branch switch are sequentially connected in series on each branch; from the branch at the lowest position to the branch at the highest position, bridging a bridging resistor between every two branches, wherein the resistance value of the branch resistor is equal to twice that of the bridging resistor, and the branches from the branch at the lowest position to the branch at the highest position correspond to different digital signal positions respectively; the bridge resistors between the branch circuit from the preset position and the branch circuit at the lowest position are all connected in series with a compensation resistor, and the resistance value of the compensation resistor is related to the on-resistance of the branch circuit switch of the branch circuit at the highest position and the weight of the branch circuit at the preset position; the on-resistance of the branch switches of all the branches on one side of the branch with the lowest bit from the branch with the preset bit is equal to the preset on-resistance, the preset on-resistance is twice of the compensation resistance, and the on-resistance of the branch switches of other branches is in proportional relation with the weight of the corresponding branch. In the digital-to-analog conversion circuit of the R-2R ladder resistance network architecture of the embodiment of the present disclosure, the on-resistances of the branch switches of all branches on one side of the preset bit are set to be equal, and compared with the digital-to-analog conversion circuit of the existing R-2R ladder resistance network architecture, the size of the branch switches is reduced, so that the layout area can be greatly saved, the design cost is reduced, and on this basis, the weight of each branch is ensured to be unchanged by performing resistance compensation on part of the bridge resistors.
Drawings
To more clearly illustrate the technical aspects of the embodiments of the present disclosure, reference will now be made in brief to the accompanying drawings of the embodiments, it being understood that the drawings described below relate only to some embodiments of the disclosure and are not limiting thereof, and wherein:
FIG. 1 is a network diagram of a digital-to-analog conversion circuit of a conventional R-2R ladder resistor network architecture;
FIG. 2 is a network schematic diagram of a digital-to-analog conversion circuit of an R-2R ladder resistance network architecture according to an embodiment of the disclosure;
FIG. 3 is a diagram of the INL simulation result corresponding to the digital-to-analog conversion circuit of the conventional R-2R ladder resistor network architecture in FIG. 1;
fig. 4 is a diagram of an INL simulation result corresponding to the digital-to-analog conversion circuit of the R-2R ladder resistance network architecture in fig. 2 according to the embodiment of the disclosure.
The elements in the drawings are schematic and not drawn to scale.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described below in detail and completely with reference to the accompanying drawings. It is to be understood that the described embodiments are only a few embodiments of the present disclosure, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the disclosure without inventive step, are also within the scope of protection of the disclosure.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the presently disclosed subject matter belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. As used herein, the statement that two or more parts are "connected" or "coupled" together shall mean that the parts are joined together either directly or joined through one or more intermediate components.
In all embodiments of the present disclosure, terms such as "first" and "second" are used only to distinguish one element (or a part of an element) from another element (or another part of an element).
Referring to fig. 1, a schematic diagram of a conventional digital-to-analog conversion circuit 100 with an R-2R ladder resistor network architecture is shown in fig. 1, where fig. 1 shows a schematic diagram of an N-bit digital-to-analog conversion circuit 100, the digital-to-analog conversion circuit with an N-bit R-2R ladder resistor network architecture is composed of N-1 bridge resistors R and N +1 branches, each branch except for the leftmost branch has a respective weight W, and when a switch of the branch is turned on, an output voltage (current) of the R-2R ladder resistor network is increased by a voltage (current) W × V corresponding to the weight W REF (W*I REF ). Therefore, the output voltage of R-2R ladder resistor network (Current) is ∑ W × V REF (∑W*I REF )。
The R-2R ladder resistance network obtains binary weighted output resistance by depending on the precise matching relation of the bridge resistance R and the branch resistance 2R, and the on-resistance R introduced by the branch switch ON The method is characterized in that if the R-2R ladder resistance network is required to realize accurate transmission relation, the on-resistance of a branch switch and the weight W corresponding to the branch need to be enabled N (N =1, 2 \8230, N) are in proportional relation, the higher branch with a higher weight and the lower branch with a lower weight. Specifically, the on-resistance of the branch switch in fig. 1 is 2 N-1 *R ON The corresponding weight of the branch is 1/2 N 。
Branch switches are typically implemented in modern circuits using transistors, in which case the on-resistance of the branch switch is equal to the channel resistance of the transistor in the linear region, the impedance being inversely proportional to the width-to-length ratio of the transistor, so that a branch switch with a proportional on-resistance can be obtained by adjusting the size of the transistor. When the R-2R ladder resistor network requires a high-precision transmission relationship, the number of required branches is correspondingly increased, and it can be seen from fig. 1 that the ratio of the maximum on-resistance to the minimum on-resistance of the branch switch of an N-bit R-2R ladder resistor network can reach 2 N-1 This is because the size requirement (area requirement) of the branch switch also increases exponentially as the precision of the R-2R ladder network (corresponding to the number of bits of a Digital to analog converter (DAC)) increases. This makes the layout area of the high-precision R-2R ladder network very large due to the increased size of the transistors used as the branch switches, and increases the matching difficulty of the device layout. In practical circuit designs, the switch size cannot be infinitely multiplied due to the increased number of bits in the high-precision DAC, so that a proportional increase in the switch impedance matching affecting the relatively small low-order branch is no longer sought, but the total switch size required to meet the precision performance is still large.
In order to solve the problems of increased precision, increased number of bits, large switch size requirement, high design cost and increased difficulty in matching of device layout in the digital-to-analog conversion circuit of the R-2R ladder-type resistor network architecture in fig. 1, an embodiment of the present disclosure provides an improved digital-to-analog conversion circuit of the R-2R ladder-type resistor network architecture, and a detailed description is provided below for the digital-to-analog conversion circuit 200 of the R-2R ladder-type resistor network architecture of the present disclosure.
As shown in fig. 2, a network schematic diagram of a digital-to-analog conversion circuit 200 of an R-2R ladder resistor network architecture according to an embodiment of the present disclosure is provided, including: a branch resistor 2R, a branch switch 210, a bridge resistor R, and a compensation resistor Δ R; the branch resistor 2R and the branch switch 210 are sequentially connected in series on each branch, and the branch switch 210 in this embodiment is a transistor, and specifically may be an MOS transistor, a bipolar transistor, a field effect transistor-JFET, or the like; from the least significant branch to the most significant branch (high bit with high weight, low bit with low weight, W in fig. 2) 1 Is the most significant bit, weighted W N The lowest order branch) is connected with a bridge resistor R, the resistance value of the branch resistor 2R is equal to twice that of the bridge resistor R, and the branch from the lowest order branch to the highest order branch corresponds to different digital signal positions respectively; the bridge resistors R from the branch at the preset position to the branch at the lowest position are all connected in series with a compensation resistor Δ R, and the resistance value of the compensation resistor Δ R is related to the on-resistance of the branch switch 210 of the branch at the highest position and the weight of the branch at the preset position; further, the ratio of the on-resistance of the branch switch 210 corresponding to the highest bit to the resistance of the compensation resistor Δ R is equal to twice the weight of the branch at the preset bit; to illustrate with reference to a specific example, assuming that the preset bit is the M +1 th bit (the bit numbering is performed in a manner that the lowest bit is the 1 st bit and the highest bit is the nth bit), as shown in fig. 2, the weight corresponding to the branch of the preset bit is W N-M ＝1/2 N-M Assume that the on-resistance of the branch switch 210 corresponding to the highest bit is R ON Then the value of the compensation resistance Δ R can be determined to be Δ R =1/2 × 2 N-M *R ON (ii) a On-resistance of the branch switches 210 of all the branches on the side from the branch of the predetermined bit to the branch of the lowest bit is equalIn the preset on-resistance, the preset on-resistance is twice the compensation resistance Δ R, and the on-resistances of the branch switches 210 of the other branches are in a proportional relationship with the weights of the corresponding branches. Assuming the predetermined bit is M +1 th bit, starting from the branch (including the branch) and proceeding to W as shown in FIG. 2 N All branches of (A), and W N The left branch, whose branch switches 210 all have an impedance of 2 × Δ R =2 N-M *R ON . Other branches, i.e. branches higher than the predetermined bit, or having a weight W N-M The on-resistances of the branch switches 210 on the branches on the right side of the branch are proportional to the weights of the corresponding branches, i.e. the on-resistances of the switches of the branch switches in fig. 1 are consistent with the weights of the corresponding branches, i.e. the on-resistances of the switches are increased by a factor of 2 and the weights of the corresponding branches are decreased by a factor of 2.
In addition, it should be further noted that the range of the preset bits in the embodiment of the present disclosure is greater than 2 and less than or equal to the number of bits of the digital-to-analog conversion circuit, and in practical applications, the value of the preset bits can be adjusted according to the requirement of precision and the design cost of the layout. Specifically, the higher the required precision, the larger the value of the preset bit; the lower the required precision is, the smaller the value of the preset bit is; the smaller the design cost of the layout is, the larger the value of the preset bit is; the larger the design cost of the layout is, the smaller the value of the preset bit is. The value of the predetermined bit refers to the corresponding number of bits, for example, the 5 th bit, and the value of the corresponding number of bits is 5.
From the above description, it can be seen that the ratio of the maximum on-resistance to the minimum on-resistance of the branch switch 210 becomes 2 N-M In comparison with the digital-to-analog conversion circuit 100 using the R-2R ladder resistor network architecture of fig. 1, the ratio of the maximum on-resistance to the minimum on-resistance of the branch switch is 2 N-1 And the effective reduction of the size of the total branch switch is realized. And the weight of each leg of the improved R-2R ladder network architecture of fig. 2 is unchanged compared to the corresponding leg of fig. 1. In summary, the R-2R ladder network architecture in the embodiment of the present disclosure can greatly reduce layout area, reduce device matching difficulty, reduce cost of tape-out, and enable low-level branches to be usedIdeal switch impedance matching can be satisfied.
Further, in the embodiment of the present disclosure, the digital-to-analog conversion circuit 200 of the R-2R ladder resistance network architecture is a voltage-type digital-to-analog conversion circuit or a current-type digital-to-analog conversion circuit. When the digital-to-analog conversion circuit is a voltage type digital-to-analog conversion circuit, one end of the branch switch 210 of each branch from the lowest branch to the highest branch is connected to the branch resistor 2R, and the other end is connected to the reference voltage V of high potential H Or a low potential reference voltage V L (ii) a One end of the branch resistor 2R of the highest branch is connected to one end of the corresponding branch switch 210, and the other end is connected to the voltage output end V OUT . In addition, if the reference voltage V is low potential L The digital-to-analog conversion circuit is a single-reference voltage type digital-to-analog conversion circuit with zero reference voltage; if the reference voltage V is low L The reference voltage is non-zero (positive or negative), and the digital-to-analog conversion circuit is a voltage type digital-to-analog conversion circuit with double reference voltages. When the current-mode digital-to-analog conversion circuit is used, one end of the branch switch 210 of each branch from the lowest branch to the highest branch is connected to the branch resistor 2R, and the other end is connected to the current output terminal I OUT Or ground terminal group; one end of the branch resistor 2R of the highest branch is connected to one end of the corresponding branch switch 210, and the other end is connected to the reference current terminal I REF . Note that, in fig. 2, one end of the branch switch 210 of the leftmost branch (the branch on the lowest left side) is always grounded.
In addition, for the series connection of R and Δ R in fig. 2, in practical applications, the series connection of R and Δ R may be used as a whole to form a resistor with a resistance value of R + Δ R, and of course, the effect of the resistance value of R + Δ R may also be achieved by connecting 2R and 2 × Δ R in parallel.
To further illustrate the effect of the digital-to-analog conversion circuit 200 of the R-2R ladder resistance network architecture in the embodiment of the present disclosure, a simulation result diagram of comparison between fig. 1 and fig. 2 under the same conditions is given, fig. 3 is a simulation result diagram of Integral Nonlinearity (INL) corresponding to the digital-to-analog conversion circuit 100 of the R-2R ladder resistance network architecture of fig. 1, and fig. 4 is a simulation result diagram corresponding to the digital-to-analog conversion circuit 200 of the R-2R ladder resistance network architecture of fig. 2, as can be seen from comparison between fig. 3 and fig. 4, compared with the digital-to-analog conversion circuit 100 of the existing R-2R ladder resistance network architecture of fig. 1 and the digital-to-analog conversion circuit 200 of the R-2R ladder resistance network architecture of fig. 2 after improvement in the embodiment of the present disclosure, differential Nonlinearity (DNL) caused by the low-order branch circuit is smaller, and the overall linearity performance is almost unchanged. Therefore, the embodiment of the disclosure can improve the linearity performance on the premise that the layout size of the circuit is obviously reduced.
The description of the same or corresponding modular units in the various embodiments of the disclosure may be referred to one another.
In the above description, well-known structural elements and steps are not described in detail. It should be understood by those skilled in the art that the corresponding structural elements and steps may be implemented by various technical means. In addition, in order to form the same structural elements, those skilled in the art can also design a method which is not exactly the same as the method described above. In addition, although the embodiments are described separately above, this does not mean that the measures in the embodiments cannot be used in combination to advantage.
In accordance with the present invention, as set forth above, these embodiments are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various embodiments with various modifications as are suited to the particular use contemplated. The protection scope of the present invention should be subject to the scope defined by the claims of the present invention.
As used herein and in the appended claims, the singular forms of words include the plural and vice versa, unless the context clearly dictates otherwise. Thus, when reference is made to the singular, it is generally intended to include the plural of the corresponding term. Similarly, the terms "comprising" and "including" are to be construed as being inclusive rather than exclusive. Likewise, the terms "include" and "or" should be construed as inclusive unless such an interpretation is explicitly prohibited herein. Where the term "example" is used herein, particularly when it comes after a set of terms, it is merely exemplary and illustrative and should not be considered exclusive or extensive.
Further aspects and ranges of adaptability will become apparent from the description provided herein. It should be understood that various aspects of the present disclosure may be implemented alone or in combination with one or more other aspects. It should also be understood that the description and specific examples herein are intended for purposes of illustration only and are not intended to limit the scope of the present disclosure.
Several embodiments of the present disclosure have been described in detail above, but it is apparent that various modifications and variations can be made to the embodiments of the present disclosure by those skilled in the art without departing from the spirit and scope of the present disclosure. The scope of the present disclosure is defined by the appended claims.
Claims (10)
1. A digital-to-analog conversion circuit with an R-2R ladder resistance network architecture is characterized by comprising: the circuit comprises a branch resistor, a branch switch, a bridge resistor and a compensation resistor;
the branch resistor and the branch switch are sequentially connected in series on each branch;
bridging a bridging resistor between every two branches from the branch at the lowest position to the branch at the highest position, wherein the resistance value of the branch resistors is equal to twice that of the bridging resistor, and the branches from the branch at the lowest position to the branch at the highest position correspond to different digital signal positions respectively;
the bridge resistors between the branch circuit at the highest position and the branch circuit at the lowest position are connected in series with one compensation resistor, and the resistance value of the compensation resistor is related to the on-resistance of the branch circuit switch of the branch circuit at the highest position and the weight of the branch circuit at the preset position;
the on-resistance of the branch switches of all the branches on one side of the branch with the lowest position from the branch with the preset position is equal to the preset on-resistance, the preset on-resistance is twice of the compensation resistance, and the on-resistance of the branch switches of other branches is in proportional relation with the weight of the corresponding branch.
2. The digital-to-analog conversion circuit of the R-2R ladder resistor network architecture of claim 1, wherein a ratio of an on-resistance of the branch switch corresponding to the highest bit to a resistance of the compensation resistor is equal to twice a weight of the branch of the preset bit.
3. The R-2R ladder resistance network architecture digital-to-analog conversion circuit of claim 2, wherein the range of the preset bits is greater than 2 and less than or equal to the number of bits of the digital-to-analog conversion circuit.
4. The digital-to-analog conversion circuit of the R-2R ladder resistance network architecture according to claim 3, wherein the value of the preset bit is adjusted according to the requirement of precision and the design cost of layout.
5. The R-2R ladder resistance network architecture digital-to-analog conversion circuit of claim 4, wherein the branch switch is a transistor.
6. The R-2R ladder resistance network architecture digital-to-analog conversion circuit of claim 5, characterized in that the digital-to-analog conversion circuit is a voltage-type digital-to-analog conversion circuit or a current-type digital-to-analog conversion circuit.
7. The digital-to-analog conversion circuit of the R-2R ladder resistance network architecture according to claim 6, wherein the digital-to-analog conversion circuit is a voltage type digital-to-analog conversion circuit, characterized in that one end of a branch switch of each branch from the lowest order branch to the highest order branch is connected with a branch resistor, and the other end is connected with a high-potential reference voltage or a low-potential reference voltage; one end of the branch resistor of the highest branch is connected with one end of the corresponding branch switch, and the other end of the branch resistor of the highest branch is connected with the output voltage end.
8. The R-2R ladder resistance network configured digital-to-analog conversion circuit of claim 7, wherein if the low potential reference voltage is zero reference voltage, the digital-to-analog conversion circuit is a single reference voltage type digital-to-analog conversion circuit;
if the low-potential reference voltage is a non-zero reference voltage, the digital-to-analog conversion circuit is a voltage type digital-to-analog conversion circuit with double reference voltages.
9. The digital-to-analog conversion circuit of the R-2R ladder resistance network architecture of claim 6, which is a current-type digital-to-analog conversion circuit, characterized in that one end of a branch switch of each branch from the lowest-order branch to the highest-order branch is connected with a branch resistor, and the other end is connected with a current output end or a ground end; one end of the branch resistor of the highest branch is connected with one end of the corresponding branch switch, and the other end of the branch resistor of the highest branch is connected with the reference current end.
10. The digital-to-analog conversion circuit of the R-2R ladder resistance network architecture according to claim 4, wherein the adjusting the value of the preset bit according to the requirement of precision and the design cost of the layout comprises:
the higher the precision is, the larger the value of the preset bit is, and the lower the precision is, the smaller the value of the preset bit is;
the smaller the design cost of the layout is, the larger the value of the preset bit is, the larger the design cost of the layout is, and the smaller the value of the preset bit is.
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