CN115511694A - Resource recovery settlement method and system based on FPGA - Google Patents
Resource recovery settlement method and system based on FPGA Download PDFInfo
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- CN115511694A CN115511694A CN202211125819.1A CN202211125819A CN115511694A CN 115511694 A CN115511694 A CN 115511694A CN 202211125819 A CN202211125819 A CN 202211125819A CN 115511694 A CN115511694 A CN 115511694A
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- 238000000034 method Methods 0.000 title claims abstract description 38
- 238000011084 recovery Methods 0.000 title claims abstract description 37
- 238000013528 artificial neural network Methods 0.000 claims abstract description 8
- 238000004064 recycling Methods 0.000 claims description 12
- 238000005457 optimization Methods 0.000 claims description 9
- 238000011176 pooling Methods 0.000 claims description 7
- 230000004913 activation Effects 0.000 claims description 6
- 238000013139 quantization Methods 0.000 claims description 5
- 238000013135 deep learning Methods 0.000 abstract description 4
- 230000010354 integration Effects 0.000 abstract description 3
- 230000008901 benefit Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
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- 101100498818 Arabidopsis thaliana DDR4 gene Proteins 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N3/00—Computing arrangements based on biological models
- G06N3/02—Neural networks
- G06N3/08—Learning methods
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N5/00—Computing arrangements using knowledge-based models
- G06N5/04—Inference or reasoning models
Abstract
The invention discloses a resource recovery settlement method and system based on an FPGA (field programmable gate array), relating to the technical field of FPGA application; the method of the invention utilizes the strong parallel operation and store-and-forward capability of the FPGA to accelerate the deep learning reasoning process of the neural network, realizes high-speed and accurate identification of specific resources and classification, integrates a Cortex-A53 processor inside, realizes settlement according to the identification result, achieves the requirements of high integration and low power consumption of the whole system, has flexible deployment and development period, meets the customized requirements of customers and adapts to various application scenes.
Description
Technical Field
The invention discloses a method and a system, relates to the technical field of FPGA application, and particularly relates to a resource recycling and settlement method and a system based on an FPGA.
Background
The classification of household garbage and the recycling of renewable resources are needed, but the practical operation is still inconvenient and the like according to the practical popularization condition, and at present, no relevant reasonable method or tool is available for effectively improving the recognition capability of the recyclable resources, and the real-time settlement is completed according to the classification of recognition results, the recycling of the resources is quickly and accurately completed, and the practical benefits are fed back to users.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides the resource recovery and settlement method and the resource recovery and settlement system based on the FPGA, which can effectively improve the recognition capability of the recoverable resource, complete real-time settlement according to the classification of the recognition result, quickly and accurately complete the recovery of the resource and feed back the actual benefit to the user.
The specific scheme provided by the invention is as follows:
the invention provides a resource recovery settlement method based on FPGA, which utilizes a resource recovery settlement system based on FPGA to carry out resource recovery settlement, the resource recovery settlement system comprises a hardware board card, the hardware board card comprises an ISP chip, an FPGA chip, a power chip, a DDR, an IAS interface and a camera module,
the FPGA chip comprises a Mipi _ Rx module, a Video _ Pipe module, a Cdma _ Rd module, a Cdma _ Wr module, a Format _ resume module, an Image _ Conv module, an Active module, a Powing module and a Cortex-A53CPU,
the method comprises the steps that a camera module collects Image data, the Image data are transmitted to an ISP chip through an IAS interface and then transmitted to the FPGA chip after being optimized, the input Image data are cached into DDR through a Mipi _ Rx module and a Video _ Pipe module in the FPGA chip, the Image data are read through a Cdma _ Rd module, the Image data are shaped through a Format _ reshape module, the Image convolution, activation and Pooling processes are accelerated through an Image _ Conv module, an Active module and a Powing module, characteristic data are extracted and fed back to a Cortex-A53CPU through the Cdma _ Wr module, image classification is recognized through the Cortex-A53CPU according to a resource recognition model, a recognition result is obtained, and settlement is initiated according to the recognition result and account information provided by a user.
Further, in the FPGA-based resource recycling settlement method, the image classification is identified by the Cortex-a53CPU according to the resource identification model, including:
pre-training a resource identification model, wherein a user-defined regenerated resource data set is utilized, training learning is carried out based on a LeNet-5 neural network architecture, the resource identification model is obtained, optimization and quantization are carried out through TensrT, and the resource identification model is loaded through a Cortex-A53CPU after Compiler compiling is completed.
Further, in the resource recycling and settlement method based on the FPGA, the camera module is an IMX247 image sensor.
Further, in the resource recycling settlement method based on the FPGA, the ISP chip employs an AP1302 image signal processor.
The invention provides a resource recovery settlement system based on FPGA, which utilizes the resource recovery settlement system based on FPGA to carry out resource recovery settlement and comprises a hardware board card, wherein the hardware board card comprises an ISP chip, an FPGA chip, a power chip, a DDR, an IAS interface and a camera module,
the FPGA chip comprises a Mipi _ Rx module, a Video _ Pipe module, a Cdma _ Rd module, a Cdma _ Wr module, a Format _ resume module, an Image _ Conv module, an Active module, a Powing module and a Cortex-A53CPU,
the method comprises the steps that a camera module collects Image data, the Image data are transmitted to an ISP chip through an IAS interface and then transmitted to the FPGA chip after being optimized, the input Image data are cached into DDR through a Mipi _ Rx module and a Video _ Pipe module in the FPGA chip, the Image data are read through a Cdma _ Rd module, the Image data are shaped through a Format _ reshape module, the Image convolution, activation and Pooling processes are accelerated through an Image _ Conv module, an Active module and a Powing module, characteristic data are extracted and fed back to a Cortex-A53CPU through the Cdma _ Wr module, image classification is recognized through the Cortex-A53CPU according to a resource recognition model, a recognition result is obtained, and settlement is initiated according to the recognition result and account information provided by a user.
Further, the Cortex-a53CPU in the FPGA-based resource recycling settlement system recognizes image classification according to a resource recognition model, and includes:
pre-training a resource identification model, wherein a user-defined regenerated resource data set is utilized, training learning is carried out based on a LeNet-5 neural network architecture, the resource identification model is obtained, optimization and quantization are carried out through TensrT, and the resource identification model is loaded through a Cortex-A53CPU after Compiler compiling is completed.
Further, the camera module in the resource recycling settlement system based on the FPGA is an IMX247 image sensor.
Further, the ISP chip in the FPGA-based resource recycling and settlement system employs an AP1302 image signal processor.
The invention has the advantages that:
the invention provides a resource recovery settlement method based on an FPGA (field programmable gate array), which accelerates the deep learning reasoning process of a neural network by utilizing the strong parallel operation and store-and-forward capabilities of the FPGA, realizes classification by identifying specific resources at high speed and accurately, integrates a Cortex-A53 processor inside, and realizes settlement according to the identification result. The whole system meets the requirements of high integration and low power consumption. The deployment and development cycle is flexible, the customization requirements of customers are met, and the method is suitable for various application scenes.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a diagram of a system hardware board of the present invention.
FIG. 2 is a schematic diagram of interaction of modules within an FPGA chip in the system of the present invention.
Detailed Description
The present invention is further described below in conjunction with the following figures and specific examples so that those skilled in the art may better understand the present invention and practice it, but the examples are not intended to limit the present invention.
The invention provides a resource recovery settlement method based on FPGA, which utilizes a resource recovery settlement system based on FPGA to carry out resource recovery settlement, the resource recovery settlement system comprises a hardware board card, the hardware board card comprises an ISP chip, an FPGA chip, a power chip, a DDR, an IAS interface and a camera module,
the FPGA chip comprises a Mipi _ Rx module, a Video _ Pipe module, a Cdma _ Rd module, a Cdma _ Wr module, a Format _ resume module, an Image _ Conv module, an Active module, a Powing module and a Cortex-A53CPU,
the camera module collects Image data, the Image data are transmitted to an ISP chip through an IAS interface and then transmitted to the FPGA chip after optimization processing, the input Image data are cached into a DDR through a Mipi _ Rx module and a Video _ Pipe module in the FPGA chip, the Image data are read through a Cdma _ Rd module, the Image data are shaped through a Format _ reshape module, the Image convolution, activation and Pooling processes are accelerated through an Image _ Conv module, an Active module and a Powing module, feature data are extracted and fed back to a Cortex-A53CPU through the Cdma _ Wr module, image classification is recognized through the Cortex-A53CPU according to a resource recognition model, a recognition result is obtained, and settlement is initiated according to the recognition result and account information provided by a user.
The method can effectively improve the identification capability of the recyclable resources, and can complete real-time settlement, quickly and accurately complete the recycling of the resources and feed back the actual benefits to the user by classifying according to the identification results.
In some embodiments of the method, image information is acquired through a camera module, transmitted to an ISP chip through an IAS interface, and is transmitted to the FPGA chip through an MIPI interface after being optimized, the Image data is stored into DDR4 through a Mipi _ Rx module and a Video _ Pipe module inside the FPGA, the Image data is read by a Cdma _ Rd module, and is processed through a Format _ reshape module, an Image _ Conv convolution module, an Active module and a Pooling module to obtain characteristic data of the Image, and the characteristic data is fed back to a Cortex-A53CPU to realize Image classification by using a resource identification model, so that an identification result is obtained, and settlement is initiated according to the identification result and account information provided by a user. Further, the Cortex-A53CPU identifies image classifications according to a resource identification model, including:
pre-training a resource identification model, wherein a user-defined regenerated resource data set is utilized, training learning is carried out based on a LeNet-5 neural network architecture, the resource identification model is obtained, model data Loadable is obtained after TensorRT optimization and quantization are carried out, compiler compiling is completed, and the resource identification model is loaded through a Cortex-A53 CPU.
Further, the camera module in the FPGA-based resource recycling and settlement system is an IMX247 image sensor; the ISP chip employs an AP1302 image signal processor.
The method utilizes a resource recovery settlement system to integrate the current CNN deep learning reasoning and image processing technology, realizes accurate and rapid identification, conveniently realizes customized resource recovery by a customized training data set, is safe, reliable and easy to deploy.
The invention also provides a resource recovery and settlement system based on FPGA, which utilizes the resource recovery and settlement system based on FPGA to carry out resource recovery and settlement, the resource recovery and settlement system comprises a hardware board card, the hardware board card comprises an ISP chip, an FPGA chip, a power chip, a DDR, an IAS interface and a camera module,
the FPGA chip comprises a Mipi _ Rx module, a Video _ Pipe module, a Cdma _ Rd module, a Cdma _ Wr module, a Format _ resume module, an Image _ Conv module, an Active module, a Powing module and a Cortex-A53CPU,
the camera module collects Image data, the Image data are transmitted to an ISP chip through an IAS interface and then transmitted to the FPGA chip after optimization processing, the input Image data are cached into a DDR through a Mipi _ Rx module and a Video _ Pipe module in the FPGA chip, the Image data are read through a Cdma _ Rd module, the Image data are shaped through a Format _ reshape module, the Image convolution, activation and Pooling processes are accelerated through an Image _ Conv module, an Active module and a Powing module, feature data are extracted and fed back to a Cortex-A53CPU through the Cdma _ Wr module, image classification is recognized through the Cortex-A53CPU according to a resource recognition model, a recognition result is obtained, and settlement is initiated according to the recognition result and account information provided by a user.
The information interaction, execution process and other contents between the modules in the system are based on the same concept as the method embodiment of the present invention, and specific contents can be referred to the description in the method embodiment of the present invention, and are not described herein again.
Similarly, the system of the invention utilizes the strong parallel operation, storage and forwarding capabilities of the FPGA to accelerate the deep learning reasoning process of the neural network, quickly and accurately identify specific resources, realize classification, integrate a Cortex-A53 processor inside and realize settlement according to the identification result. The whole system meets the requirements of high integration and low power consumption. The deployment and development period is flexible, the customized requirements of customers are met, and the method is suitable for various application scenes.
It should be noted that not all steps and modules in the above flows and system structures are necessary, and some steps or modules may be omitted according to actual needs. The execution sequence of the steps is not fixed and can be adjusted according to the needs. The system structure described in the above embodiments may be a physical structure or a logical structure, that is, some modules may be implemented by the same physical entity, or some modules may be implemented by a plurality of physical entities, or some components in a plurality of independent devices may be implemented together.
The above-mentioned embodiments are merely preferred embodiments for fully illustrating the present invention, and the scope of the present invention is not limited thereto. The equivalent substitutions or changes made by the person skilled in the art on the basis of the present invention are all within the protection scope of the present invention. The protection scope of the invention is subject to the claims.
Claims (8)
1. The resource recovery settlement method based on the FPGA is characterized in that a resource recovery settlement system based on the FPGA is utilized to carry out resource recovery settlement, the resource recovery settlement system comprises a hardware board card, the hardware board card comprises an ISP chip, an FPGA chip, a power supply chip, a DDR interface, an IAS interface and a camera module,
the FPGA chip comprises a Mipi _ Rx module, a Video _ Pipe module, a Cdma _ Rd module, a Cdma _ Wr module, a Format _ resume module, an Image _ Conv module, an Active module, a Powing module and a Cortex-A53CPU,
the camera module collects Image data, the Image data are transmitted to an ISP chip through an IAS interface and then transmitted to the FPGA chip after optimization processing, the input Image data are cached into a DDR through a Mipi _ Rx module and a Video _ Pipe module in the FPGA chip, the Image data are read through a Cdma _ Rd module, the Image data are shaped through a Format _ reshape module, the Image convolution, activation and Pooling processes are accelerated through an Image _ Conv module, an Active module and a Powing module, feature data are extracted and fed back to a Cortex-A53CPU through the Cdma _ Wr module, image classification is recognized through the Cortex-A53CPU according to a resource recognition model, a recognition result is obtained, and settlement is initiated according to the recognition result and account information provided by a user.
2. The FPGA-based resource recovery settlement method of claim 1, wherein said identifying image classifications by a Cortex-a53CPU based on a resource identification model comprises:
pre-training a resource identification model, wherein a user-defined regenerated resource data set is utilized, training learning is carried out based on a LeNet-5 neural network architecture, the resource identification model is obtained, optimization and quantization are carried out through TensrT, and the resource identification model is loaded through a Cortex-A53CPU after Compiler compiling is completed.
3. The FPGA-based resource recycling settlement method of claim 1, wherein said camera module is an IMX247 image sensor.
4. The FPGA-based resource recovery settlement method as claimed in claim 1, wherein the ISP chip employs an AP1302 image signal processor.
5. The resource recovery and settlement system based on the FPGA is characterized in that the resource recovery and settlement system based on the FPGA is utilized to carry out resource recovery and settlement, the resource recovery and settlement system comprises a hardware board card, the hardware board card comprises an ISP chip, an FPGA chip, a power supply chip, a DDR, an IAS interface and a camera module,
the FPGA chip comprises a Mipi _ Rx module, a Video _ Pipe module, a Cdma _ Rd module, a Cdma _ Wr module, a Format _ resume module, an Image _ Conv module, an Active module, a Powing module and a Cortex-A53CPU,
the camera module collects Image data, the Image data are transmitted to an ISP chip through an IAS interface and then transmitted to the FPGA chip after optimization processing, the input Image data are cached into a DDR through a Mipi _ Rx module and a Video _ Pipe module in the FPGA chip, the Image data are read through a Cdma _ Rd module, the Image data are shaped through a Format _ reshape module, the Image convolution, activation and Pooling processes are accelerated through an Image _ Conv module, an Active module and a Powing module, feature data are extracted and fed back to a Cortex-A53CPU through the Cdma _ Wr module, image classification is recognized through the Cortex-A53CPU according to a resource recognition model, a recognition result is obtained, and settlement is initiated according to the recognition result and account information provided by a user.
6. The FPGA-based resource recovery accounting system of claim 5, wherein said Cortex-a53CPU recognizes image classes according to a resource recognition model, comprising:
pre-training a resource identification model, wherein a user-defined regenerated resource data set is utilized, training learning is carried out based on a LeNet-5 neural network architecture, the resource identification model is obtained, optimization and quantization are carried out through TensrT, and the resource identification model is loaded through a Cortex-A53CPU after Compiler compiling is completed.
7. The FPGA-based resource recovery settlement system of claim 5, wherein the camera module is an IMX247 image sensor.
8. The FPGA-based resource recovery settlement method of claim 5, wherein the ISP chip adopts an AP1302 image signal processor.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116092302A (en) * | 2023-01-10 | 2023-05-09 | 山东浪潮科学研究院有限公司 | Intelligent snapshot system and method based on FPGA |
| CN116153004A (en) * | 2023-01-17 | 2023-05-23 | 山东浪潮科学研究院有限公司 | Intelligent monitoring alarm system based on FPGA |
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- 2022-09-16 CN CN202211125819.1A patent/CN115511694A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116092302A (en) * | 2023-01-10 | 2023-05-09 | 山东浪潮科学研究院有限公司 | Intelligent snapshot system and method based on FPGA |
| CN116153004A (en) * | 2023-01-17 | 2023-05-23 | 山东浪潮科学研究院有限公司 | Intelligent monitoring alarm system based on FPGA |
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