CN115511064A - Neural circuit, detection system and circuit preparation method - Google Patents

Neural circuit, detection system and circuit preparation method Download PDF

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Publication number
CN115511064A
CN115511064A CN202110632366.0A CN202110632366A CN115511064A CN 115511064 A CN115511064 A CN 115511064A CN 202110632366 A CN202110632366 A CN 202110632366A CN 115511064 A CN115511064 A CN 115511064A
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load resistor
sensor
memristor
resistor
output
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刘琦
冯冠
吴祖恒
汪泳州
张续猛
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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Priority to CN202110632366.0A priority Critical patent/CN115511064A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/049—Temporal neural networks, e.g. delay elements, oscillating neurons or pulsed inputs

Abstract

The invention discloses a neural circuit, a detection system and a circuit preparation method, wherein the neural circuit comprises a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor and a second memristor, wherein the first sensor and the second sensor sequentially convert the sensed motion state of an external object into a first excitation signal and a second excitation signal, the first load resistor, the second load resistor, the third load resistor and the fourth load resistor can divide the voltage of the first excitation signal and the second excitation signal and generate two response signals with opposite intensity change trends which are respectively supplied to the first memristor and the second memristor, and the first memristor the second memristor maintains the self resistance state according to the intensity of the received response signals to output or not output pulse signals.

Description

Neural circuit, detection system and circuit preparation method
Technical Field
The invention relates to the field of bionic electronics, in particular to a neural circuit, a detection system and a circuit preparation method.
Background
The impulse neural network has the advantages of event driving, sparse coding and the like, is an ideal choice for constructing a high-energy-efficiency storage and calculation integrated data processing unit, and is considered as a next-generation neuromorphic calculation technology. The artificial visual neuron constructed based on the impulse neural network can convert an external analog signal into a system impulse signal, and has important application in constructing a system for simulating biological vision.
However, the conventional artificial visual neuron circuit is mainly based on a CMOS circuit, often needs many transistors or complex logic gate circuits, and has a complex structure, high power consumption and poor scalability.
Disclosure of Invention
The embodiment of the application solves the technical problem that the artificial vision neural circuit in the prior art is complex in structure by providing the neural circuit, the detection system and the circuit preparation method.
In a first aspect, the present application provides a neural circuit comprising a first sensor, a second sensor, a first load resistance, a second load resistance, a third load resistance, a fourth load resistance, a first output resistance, a second output resistance, a first capacitance, a second capacitance, a first memristor, and a second memristor;
one end of the first sensor, one end of the first load resistor and one end of the fourth load resistor are connected; one end of the second sensor, one end of the second load resistor and one end of the third load resistor are connected; the other end of the first load resistor, the other end of the second load resistor, one end of the first capacitor and one end of the first memristor are connected; the other end of the third load resistor, the other end of the fourth load resistor, one end of the second capacitor and one end of the second memristor are connected;
the other end of the first memristor is used as a first output end and used for outputting a first pulse signal, and is connected with one end of the first output resistor; the other end of the second memristor is used as a second output end and used for outputting a second pulse signal, and is connected with one end of the second output resistor;
the other end of the first capacitor is connected with the other end of the first output resistor and then grounded, the other end of the second capacitor is connected with the other end of the second output resistor and then grounded, and the other end of the first sensor and the other end of the second sensor are grounded respectively.
Optionally, the first load resistor and the third load resistor have the same resistance value, the second load resistor and the fourth load resistor have the same resistance value, and the first load resistor and the third load resistor have resistance values greater than the second load resistor and the fourth load resistor.
Optionally, the relative positions of the first sensor and the second sensor on the circuit board are set in a horizontal direction or a vertical direction;
when the first sensor and the second sensor are arranged in the vertical direction of the circuit board, the neural circuit is used for detecting the motion direction of an object in the vertical direction;
when the first sensor and the second sensor are arranged in the horizontal direction of the circuit board, the neural circuit is used for detecting the motion direction of an object in the horizontal direction.
In a second aspect, the present application provides a motion direction detection circuit, including a first detection circuit and a second detection circuit, where the first detection circuit and the second detection circuit are the neural circuit of any one of the above first aspects;
the first sensor and the second sensor in the first detection circuit are arranged on the circuit board along the vertical direction and used for detecting the movement direction of an object in the vertical direction;
and the first sensor and the second sensor in the second detection circuit are arranged on the circuit board along the horizontal direction and are used for detecting the movement direction of the object in the horizontal direction.
In a third aspect, the present application provides a collision detection system, which includes N motion direction detection circuits according to the second aspect, where N is a natural number greater than or equal to 1.
In a fourth aspect, the present application provides a method for preparing a circuit, wherein two of the circuits are connected in parallel to form a neural circuit according to any one of the first aspect, the method comprising:
depositing an isolation layer on a semiconductor substrate;
depositing a first electrode layer on the isolation layer;
preparing the first output resistor and the first memristor on the surface of a first region of the first electrode layer from bottom to top in sequence, and depositing a capacitance dielectric layer and a second electrode layer on the surface of a second region of the first electrode layer from bottom to top in sequence, wherein the first electrode layer, the capacitance dielectric layer and the second electrode layer form the first capacitor;
depositing an insulating layer on a third region of the first electrode layer, wherein the insulating layer separates the first output resistive layer and the first memristor from the first capacitance;
preparing a load resistor, the first sensor and a third electrode layer on the surfaces of the first memristor, the insulating layer and the first capacitor from bottom to top in sequence, wherein the load resistor comprises the first load resistor and the second load resistor.
Optionally, the preparing, from bottom to top, a first output resistor and a first memristor on a surface of a first region of the first electrode layer in sequence includes:
depositing a first output resistance layer on the surface of a first area of the first electrode layer;
and depositing a bottom electrode layer, a functional layer and a top electrode layer on the surface of the first output resistance layer from bottom to top in sequence to form the memristor.
Optionally, the functional layer is made of VO2, nbOx, siO2: ag, hfO2, siNx, taOx, a-Si: cu, and a-Si: ag.
Optionally, the functional layer has a thickness of 5nm to 50nm.
Optionally, the material of the sensing material layer is cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, or zinc sulfide.
One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:
the neural circuit comprises a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor and a second memristor, wherein the first sensor and the second sensor sequentially convert the sensed motion state of an external object into a first excitation signal and a second excitation signal, the first load resistor, the second load resistor, the third load resistor and the fourth load resistor can divide the voltage of the first excitation signal and the second excitation signal based on the connection relation provided by the application, two response signals with opposite intensity change trends are generated and respectively provided for the first memristor and the second memristor, the first memristor and the second memristor change or keep the self-resistance state according to the intensity of the received response signals to output or not output pulse signals, and therefore the boundary motion direction of the external object can be judged according to the output states of the first memristor the second memristor.
Compared with the traditional artificial visual neuron circuit, the neural circuit provided by the application is simple in structure, does not comprise a complex logic gate circuit, is low in power consumption and has good scalability.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the description below are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on the drawings without creative efforts.
FIG. 1 is a schematic diagram of a neural circuit in an embodiment of the present application;
FIG. 2 is a schematic diagram of a motion direction detection circuit in an embodiment of the present application;
FIG. 3 is a schematic view of a collision detection system in an embodiment of the present application;
FIG. 4 is a schematic view of a collision detection system in an embodiment of the present application;
FIG. 5 is a schematic diagram of a circuit fabrication method in an embodiment of the present application;
fig. 6 is a schematic diagram of a circuit structure manufactured by the circuit manufacturing method shown in fig. 5 in the embodiment of the present application.
Detailed Description
The embodiment of the application solves the technical problem that the artificial visual nerve circuit in the prior art is complex in structure by providing the nerve circuit.
In order to solve the technical problems, the general idea of the embodiment of the application is as follows:
providing a neural circuit, which comprises a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor and a second memristor;
one end of the first sensor, one end of the first load resistor and one end of the fourth load resistor are connected; one end of the second sensor, one end of the second load resistor and one end of the third load resistor are connected; the other end of the first load resistor, the other end of the second load resistor, one end of the first capacitor and one end of the first memristor are connected; the other end of the third load resistor, the other end of the fourth load resistor, one end of the second capacitor and one end of the second memristor are connected;
the other end of the first memristor is used as a first output end and used for outputting a first pulse signal, and is connected with one end of the first output resistor; the other end of the second memristor is used as a second output end for outputting a second pulse signal and is connected with one end of the second output resistor;
the other end of the first capacitor is connected with the other end of the first output resistor and then grounded, the other end of the second capacitor is connected with the other end of the second output resistor and then grounded, and the other end of the first sensor and the other end of the second sensor are grounded respectively.
In order to better understand the technical scheme, the technical scheme is described in detail in the following with reference to the attached drawings of the specification and specific embodiments.
Example one
The present embodiment provides a neural circuit, as shown in fig. 1, including a first sensor 1110, a second sensor 1120, a first load resistor 1210, a second load resistor 1220, a third load resistor 1230, a fourth load resistor 1240, a first output resistor 1310, a second output resistor 1320, a first capacitor 1410, a second capacitor 1420, a first memristor 1510, and a second memristor 1520;
one end of the first sensor 1110, one end of the first load resistor 1210, and one end of the fourth load resistor 1240 are connected; one end of the second sensor 1120, one end of the second load resistor 1220, and one end of the third load resistor 1230 are connected; the other end of the first load resistor 1210, the other end of the second load resistor 1220, one end of the first capacitor 1410, and one end of the first memristor 1510 are connected; the other end of the third load resistor 1230, the other end of the fourth load resistor 1240, one end of the second capacitor 1420, and one end of the second memristor 1520 are connected;
the other end of the first memristor 1510 is used as a first output end for outputting a first pulse signal, and is connected with one end of the first output resistor 1310; the other end of the second memristor 1520 serves as a second output end, is used for outputting a second pulse signal, and is connected with one end of the second output resistor 1320;
the other end of the first capacitor 1410 is connected to the other end of the first output resistor 1310 and then grounded, the other end of the second capacitor 1420 is connected to the other end of the second output resistor 1320 and then grounded, and the other end of the first sensor 1110 and the other end of the second sensor 1120 are respectively grounded.
In a specific implementation process, the first sensor 1110 and the second sensor 1120 are used for sensing a motion state of an external object and converting the sensed motion state into an excitation signal, where the first sensor 1110 and the second sensor 1120 may be, but are not limited to, a photoelectric sensor or a pressure sensor. The movement state of the object specifically refers to a movement direction of the object, for example, from left to right or from right to left in a horizontal direction, from top to bottom in a vertical direction, or from bottom to top. The neural circuit provided by the application is used for judging the motion direction of an external moving object.
In a specific embodiment, whether the neural circuit is used to detect the movement direction in the horizontal direction or the movement direction in the vertical direction may be determined by the distribution direction of the relative positions of the first sensor 1110 and the second sensor 1120 on the circuit board, that is, the relative positions of the first sensor 1110 and the second sensor 1120 on the circuit board may be set in the horizontal direction or the vertical direction: when the first sensor 1110 and the second sensor 1120 are disposed in the vertical direction of the circuit board, the neural circuit is used to detect the moving direction of the object in the vertical direction; when the first sensor 1110 and the second sensor 1120 are disposed in the horizontal direction of the circuit board, the neural circuit is used to detect the moving direction of the object in the horizontal direction, and the first sensor and the second sensor are disposed in the vertical direction on the circuit board in the neural circuit shown in fig. 1, and are used to detect the moving direction of the object in the vertical direction.
In a particular embodiment, the first load resistance 1210 is connected in parallel with the fourth load resistance 1240, the second load resistance 1220 is connected in parallel with the third load resistance 1230, and the first load resistance 1210 is connected with the first memristor 1510 along with the second load resistance 1220, and the third load resistance 1230 is connected with the second memristor 1520 along with the fourth load resistance 1240; in addition, the first load resistor 1210 and the third load resistor 1230 have the same resistance, the second load resistor 1220 and the fourth load resistor 1240 have the same resistance, and the first load resistor 1210 and the third load resistor 1230 have the resistance greater than the second load resistor 1220 and the fourth load resistor 1240. Therefore, after the first excitation signal generated by the first sensor 1110 and the second excitation signal generated by the second sensor 1120 are divided by the four resistors, two response signals with opposite intensity variation trends can be generated and respectively provided for the first memristor 1510 and the second memristor 1520, and the first memristor 1510 and the second memristor 1520 change or maintain their own resistance states according to the intensity of the received response signals to output or not output pulse signals, so that the motion direction of the external object can be judged according to the output states of the first memristor and the second memristor. It should be noted here that the memristor has threshold transition characteristics, that is, when a voltage is applied to a single device, if the applied voltage exceeds the threshold voltage of the device, the resistance state of the device will transition from a high resistance state to a low resistance state; if the applied voltage is below the holding voltage of the device, the resistance state of the device will revert to the high resistance state.
Specifically, taking fig. 1 as an example, when the external object moves from top to bottom in the vertical direction, the first sensor 1110 first senses the movement of the object and generates a first excitation signal, which is divided by the first load resistors 1210 and 1240 and then applied to the first capacitors 1410 and 1420, respectively; the second sensor 1120 senses the motion of the object and generates a second excitation signal, which is divided by the second load resistor 1220 and the third load resistor 1230 and applied to the first capacitors 1410 and 1420, respectively, that is, the first capacitor 1410 and the second capacitor 1420 obtain two pulse signals, respectively. Because the resistances of the first load resistor 1210 and the third load resistor 1230 are greater than the resistances of the second load resistor 1220 and the fourth load resistor 1240, the intensities of two pulse signals on the first capacitor 1410 are first small and then large, after the first pulse signal is enhanced by the second pulse signal, the voltage across the first capacitor 1410 can exceed the threshold voltage of the first memristor 1520, so that the first memristor 1510 is converted into a low-resistance state at this time, the first capacitor 1410 discharges through the first memristor 1510, and the first memristor 1510 can output a pulse signal; the strength of the two pulse signals on the second capacitor 1420 is first large and then small, and cannot reach the threshold voltage of the second memristor 1520, so that the second memristor 1520 is in a high resistance state and cannot output the pulse signals, and therefore, the first memristor 1510 responds to the top-down motion. Similarly, when the external object moves from bottom to top in the vertical direction, the first memristor 1510 is in the high resistance state, the second memristor 1520 is in the low configuration, and thus the second memristor 1520 outputs the pulse signal, and the first memristor 1510 cannot output the pulse signal, that is, the second memristor 1520 responds to the movement of the external object from bottom to top.
Similarly, when the relative positions of the first sensor 1110 and the second sensor 1120 on the circuit board are disposed in a horizontal direction, the first memristor 1510 may respond to a left-to-right movement in the horizontal direction, and the second memristor 1520 may respond to a right-to-left movement of an object in the horizontal direction, based on the same analysis process.
In addition, the present embodiment also provides a specific structure of the first memristor 1510 and the first memristor 1520, including a bottom electrode, a top electrode, and a functional layer therebetween. The bottom electrode can be made of Pd, pt, si, W or Au and other inert conductive materials, and the thickness of the bottom electrode can be 10 nm-200 nm; the material of the functional layer may be SiO 2 、SiO 2 ：Ag、NbO x 、HfO 2 、SiN x 、TaO x Or a-Si: cu and a-Si: ag and other mixed materials, wherein the value of x is different according to different stoichiometric ratios, and the thickness of x can be 3 nm-50 nm; the top electrode can be made of TiN, poly-Si, pd, pt, W, cu, ag or Au conductive materials, and the thickness of the top electrode can be 10 nm-100 nm.
The technical scheme in the embodiment of the application at least has the following technical effects or advantages:
the neural circuit provided by the embodiment comprises a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor and a second memristor, wherein the first sensor and the second sensor convert the sensed motion state of the external object into a first excitation signal and a second excitation signal in sequence, the first load resistor, the second load resistor, the third load resistor and the fourth load resistor can divide the voltage of the first excitation signal and the second excitation signal based on the connection relation provided by the application, two response signals with opposite intensity change trends are generated and provided for the first memristor and the second memristor respectively, and the first memristor and the second memristor change or keep the self-resistance state according to the intensity of the received response signals to output or not output pulse signals, so that the motion direction of the external object can be judged according to the output states of the first memristor the second memristor.
Compared with the traditional artificial visual neuron circuit, the neural circuit provided by the application has a simple structure, does not comprise a complex logic gate circuit, so that the power consumption is low and the neural circuit has good scalability.
Example two
The present embodiment provides a motion direction detection circuit, as shown in fig. 2, including a first detection circuit 201 and a second detection circuit 202, where the first detection circuit 201 and the second detection circuit 202 are the neural circuits described in the first embodiment above, respectively;
wherein, the first sensor 1110 and the second sensor 1120 in the first detection circuit 201 are disposed in a vertical direction on the circuit board for detecting a moving direction of the object in the vertical direction; the first sensor 1130 and the second sensor 1140 of the second detection circuit 202 are disposed in a horizontal direction on the circuit board for detecting a moving direction of an object in the horizontal direction.
In a specific implementation process, the first detection circuit 201 and the second detection circuit 202 respectively implement the detection of the movement direction of the object in the vertical direction and the horizontal direction according to the principle described in the first embodiment, and for the sake of brevity of the description, detailed description is omitted here.
The motion direction detection circuit provided by the embodiment can detect the motion directions of the object in the vertical direction and the horizontal direction at the same time, and has the advantages of simple structure and lower power consumption.
EXAMPLE III
The present embodiment provides a collision detection system, as shown in fig. 3, including N motion direction detection circuits provided in the second embodiment, where N is a natural number greater than or equal to 1.
In a specific embodiment, the collision detection system may be composed of four motion direction detection circuits provided in the second embodiment, and the four motion direction detection circuits may be disposed on the circuit board in an up-down and left-right arrangement manner, so as to detect the direction of the moving object comprehensively and take into account the manufacturing cost of the device.
FIG. 4 is an illustration of a collision detection process, wherein a motion direction detection circuit is provided in each block, and each small circle within each block represents a memristor in the motion detection circuit; and an external moving object is represented at the intersection point of the right center of the square frame. Specifically, the four motion direction detection circuits can be regarded as a wide receptive field composed of four small-range receptive fields in the biological retina. When the object appears at the center of the field of view and gets closer, the projection onto the field of view is gradually increased from a small point. In the process of gradually increasing, the sensors of the collision detection system are respectively stimulated, so that eight neurons in the collision system simultaneously respond, and whether a frontal collision occurs can be judged.
Example four
Based on the same inventive concept, this embodiment provides a circuit preparation method, in which two of the circuits are connected in parallel to form a neural circuit in the first embodiment, as shown in fig. 5, the method includes:
step S501, depositing an isolation layer on a semiconductor substrate;
step S502, depositing a first electrode layer on the isolation layer;
step S503, sequentially preparing the first output resistor and the first memristor from bottom to top on a first region surface of the first electrode layer, and sequentially depositing a capacitance dielectric layer and a second electrode layer from bottom to top on a second region surface of the first electrode layer, wherein the first electrode layer, the capacitance dielectric layer and the second electrode layer constitute the first capacitor;
step S504, depositing an insulating layer on a third region of the first electrode layer, wherein the insulating layer separates the first output resistive layer and the first memristor from the first capacitor;
step S505, sequentially preparing a load resistor, the first sensor, and a third electrode layer on the surfaces of the first memristor, the insulating layer, and the first capacitor from bottom to top, where the load resistor includes the first load resistor and the second load resistor.
The circuit manufacturing method is described in detail below with reference to fig. 5 to 6:
first, step S501 is performed to deposit an isolation layer 6200 on the semiconductor substrate 6100. In a specific implementation, the semiconductor substrate 6100 may be a silicon substrate, a quartz substrate, an organic flexible thin film substrate, or the like, which is not limited herein. The isolation layer 6200 may specifically be SiO 2 SiN, etc. with a thickness of 100nm to 300nm, the isolation layer may be deposited by a chemical vapor deposition method or a thermal oxidation method.
Then, step S502 is performed, and a first electrode layer 6300 is deposited on the isolation layer. Specifically, the first electrode layer 6300 may be deposited on the surface of the isolation layer by magnetron sputtering, ion beam sputtering, or electron beam evaporation. The material of the first electrode layer is not limited as long as it is conductive.
Next, step S503 is executed, the first output resistor and the first memristor are sequentially prepared on the surface of the first region of the first electrode layer from bottom to top, and a capacitance dielectric layer and a second electrode layer are sequentially deposited on the surface of the second region of the first electrode layer from bottom to top, where the first electrode layer, the capacitance dielectric layer, and the second electrode layer constitute the first capacitor.
Specifically, first, a first output resistance thin film 6410 may be prepared in a first region of the first electrode layer 6300 by magnetron sputtering, ion beam sputtering, or electron beam evaporation, and the resistance value of the thin film may be set according to the high and low resistance states of the functional layers in the first memristor, and may be, for example, 1 Ω to 10k Ω. The first region may be a region to the left, the middle, or the right of the first electrode layer, which is not limited in the present application. Then, a bottom electrode 6420 is deposited on the first output resistive film, bottomThe electrode can be made of TiN, poly-Si, pd, pt, W or Au and other inert conductive materials, and the deposition thickness can be 10 nm-200 nm; thereafter, a functional layer 6430, which may be VO, is deposited on the bottom electrode 2 、NbOx、SiO 2 :Ag、HfO 2 The functional layer can be prepared by common methods such as chemical vapor deposition, magnetron sputtering, electron beam evaporation, pulsed laser deposition, atomic layer deposition and the like, wherein the materials are SiNx, taOx, a-Si: cu, a-Si: ag and the like, and the thicknesses of the materials can be between 5nm and 50nm; finally, a top electrode 6440 is deposited on the functional layer 6430, the top electrode has a thickness of 10nm to 100nm, and the material may be TiN, poly-Si, pd, pt, W, cu, ag or Au. Here, the bottom electrode 6420, the functional layer 6430, and the top electrode 6440 constitute the first memristor.
After the first memristor is manufactured, a first capacitor can be manufactured in a second area of the first electrode layer. Specifically, the second region may be a region to the left, the middle, or the right of the first electrode layer, as long as the second region is distinguishable from the region where the first memristor is located. A capacitor dielectric layer thin film 6310 is deposited on the first electrode layer 6300 by magnetron sputtering, ion beam sputtering or electron beam evaporation, and the dielectric constant and the thickness of the deposited capacitor dielectric layer thin film can be selected according to actual requirements.
Next, step S504 is performed to deposit an insulating layer on the third region of the first electrode layer, where the insulating layer separates the first output resistive layer and the first memristor from the first capacitor. The third region is a part of the first electrode layer except the first region and the second region, and on the third region, an insulating layer 6500 is deposited first, and the material used for deposition can be SiN or SiO 2 Etching the insulating layer by the aid of the insulating substances, wherein the etching depth is based on the fact that the top electrode and the capacitor dielectric layer can be exposed; then, a second electrode layer 6320 is deposited on the capacitor dielectric layer, and the material of the second electrode layer may be an inert conductive material such as Pd, pt, W, or Au. First electrode layer 6300, capacitor dielectric layer 6310, and second electrodeThe electrode layer 6320 constitutes a first capacitor.
Finally, step S505 is executed to sequentially fabricate, from bottom to top, a load resistor, the first sensor, and a third electrode layer on the surfaces of the first memristor, the insulating layer, and the first capacitor, where the load resistor includes the first load resistor and the second load resistor. Specifically, the load resistance layer 6600 may be deposited on the surfaces of the first memristor, the insulating layer and the first capacitor by magnetron sputtering, ion beam sputtering or electron beam evaporation, where the load resistance layer 6600 includes two regions, a first load resistance region and a second load resistance region. The load resistive layer may connect the top electrode 6440 and the second electrode layer 6320 to enable parallel connection of the first memristor with the first capacitance. The resistance value of the load resistance layer 6600 may be set according to the actual moving speed of the external object, and may be, for example, 1 Ω to 10k Ω.
Then, a first sensor 6700 is prepared on the load resistance layer 6600, in the specific implementation process, the first sensor can be a photoelectric sensor, the material of the first sensor can be selected from light-sensitive materials such as cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, zinc sulfide and the like, and the first sensing layer can be deposited by a method common in the prior art. Finally, a third electrode layer 6800 (i.e., a ground terminal) is deposited on the first sensing layer, and the material of the third electrode material layer may be a common conductive material, which is not limited in this application.
The circuit preparation method provided by the present embodiment is used for preparing a part of the neural circuit in the first embodiment, and the neural circuit in the first embodiment can be obtained by connecting two such circuits in parallel.
The neural circuit obtained by the circuit preparation method provided by the embodiment comprises a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor and a second memristor, wherein the first sensor and the second sensor sequentially convert the sensed motion state of the external object into a first excitation signal and a second excitation signal, the first load resistor, the second load resistor, the third load resistor and the fourth load resistor can divide the voltage of the first excitation signal and the second excitation signal based on the connection relation provided by the application, two response signals with opposite intensity change trends are generated and respectively provided for the first memristor and the second memristor, the first memristor and the second memristor change or keep their own resistance states according to the intensity of the received response signals to output or not output pulse signals, and therefore, the motion direction of the external object can be judged according to the output states of the first memristor the second memristor.
Compared with the traditional artificial visual neuron circuit, the neural circuit provided by the application is simple in structure, does not comprise a complex logic gate circuit, is low in power consumption and high in integration level, and has good scalability.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (10)

1. A neural circuit is characterized by comprising a first sensor, a second sensor, a first load resistor, a second load resistor, a third load resistor, a fourth load resistor, a first output resistor, a second output resistor, a first capacitor, a second capacitor, a first memristor and a second memristor;
one end of the first sensor, one end of the first load resistor and one end of the fourth load resistor are connected; one end of the second sensor, one end of the second load resistor and one end of the third load resistor are connected; the other end of the first load resistor, the other end of the second load resistor, one end of the first capacitor and one end of the first memristor are connected; the other end of the third load resistor, the other end of the fourth load resistor, one end of the second capacitor and one end of the second memristor are connected;
the other end of the first memristor is used as a first output end and used for outputting a first pulse signal, and is connected with one end of the first output resistor; the other end of the second memristor is used as a second output end and used for outputting a second pulse signal, and is connected with one end of the second output resistor;
the other end of the first capacitor is connected with the other end of the first output resistor and then grounded, the other end of the second capacitor is connected with the other end of the second output resistor and then grounded, and the other end of the first sensor and the other end of the second sensor are grounded respectively.
2. The neural circuit of claim 1, wherein the first load resistor and the third load resistor have the same resistance value, the second load resistor and the fourth load resistor have the same resistance value, and the first load resistor and the third load resistor have larger resistance values than the second load resistor and the fourth load resistor.
3. The neural circuit of claim 1, wherein the relative positions of the first sensor and the second sensor on the circuit board are arranged in a horizontal direction or a vertical direction;
when the first sensor and the second sensor are arranged in the vertical direction of the circuit board, the neural circuit is used for detecting the motion direction of an object in the vertical direction;
when the first sensor and the second sensor are arranged in the horizontal direction of the circuit board, the neural circuit is used for detecting the motion direction of an object in the horizontal direction.
4. A motion direction detection circuit comprising a first detection circuit and a second detection circuit, the first detection circuit and the second detection circuit being the neural circuit according to any one of claims 1 to 3, respectively;
the first sensor and the second sensor in the first detection circuit are arranged on the circuit board along the vertical direction and used for detecting the movement direction of an object in the vertical direction;
and the first sensor and the second sensor in the second detection circuit are arranged on the circuit board along the horizontal direction and are used for detecting the movement direction of the object in the horizontal direction.
5. A collision detection system comprising N pieces of the movement direction detection circuit according to claim 4, N being a natural number equal to or greater than 1.
6. A method of preparing a circuit, wherein two of said circuits are connected in parallel to form a neural circuit as claimed in any one of claims 1 to 3, said method comprising:
depositing an isolation layer on a semiconductor substrate;
depositing a first electrode layer on the isolation layer;
preparing the first output resistor and the first memristor on the surface of a first region of the first electrode layer from bottom to top in sequence, and depositing a capacitance dielectric layer and a second electrode layer on the surface of a second region of the first electrode layer from bottom to top in sequence, wherein the first electrode layer, the capacitance dielectric layer and the second electrode layer form the first capacitor;
depositing an insulating layer on a third region of the first electrode layer, wherein the insulating layer separates the first output resistive layer and the first memristor from the first capacitance;
preparing a load resistor, the first sensor and a third electrode layer on the surfaces of the first memristor, the insulating layer and the first capacitor from bottom to top in sequence, wherein the load resistor comprises the first load resistor and the second load resistor.
7. The method for preparing the circuit according to claim 6, wherein the preparing the first output resistor and the first memristor on the surface of the first region of the first electrode layer from bottom to top in sequence comprises:
depositing a first output resistance layer on the surface of a first area of the first electrode layer;
and depositing a bottom electrode layer, a functional layer and a top electrode layer on the surface of the first output resistance layer from bottom to top in sequence to form the memristor.
8. The method of claim 7, wherein the functional layer is VO 2 、NbO x 、SiO 2 :Ag、HfO 2 、SiN x 、TaO x 、a-Si:Cu、a-Si:Ag。
9. The method of claim 7 wherein the functional layer has a thickness of 5nm to 50nm.
10. The method of claim 6, wherein the sensing material layer is selected from the group consisting of cadmium sulfide, cadmium selenide, cadmium telluride, gallium arsenide, and zinc sulfide.
CN202110632366.0A 2021-06-07 2021-06-07 Neural circuit, detection system and circuit preparation method Pending CN115511064A (en)

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CN202110632366.0A CN115511064A (en) 2021-06-07 2021-06-07 Neural circuit, detection system and circuit preparation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110632366.0A CN115511064A (en) 2021-06-07 2021-06-07 Neural circuit, detection system and circuit preparation method

Publications (1)

Publication Number Publication Date
CN115511064A true CN115511064A (en) 2022-12-23

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Country Link
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