CN115497433A - Multi-region multi-frequency display device - Google Patents
Multi-region multi-frequency display device Download PDFInfo
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- CN115497433A CN115497433A CN202211336235.9A CN202211336235A CN115497433A CN 115497433 A CN115497433 A CN 115497433A CN 202211336235 A CN202211336235 A CN 202211336235A CN 115497433 A CN115497433 A CN 115497433A
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- 238000010586 diagram Methods 0.000 description 6
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- 230000009286 beneficial effect Effects 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2007—Display of intermediate tones
- G09G3/2018—Display of intermediate tones by time modulation using two or more time intervals
- G09G3/2022—Display of intermediate tones by time modulation using two or more time intervals using sub-frames
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/2085—Special arrangements for addressing the individual elements of the matrix, other than by driving respective rows and columns in combination
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The invention relates to a multi-area multi-frequency display device, which comprises at least one first display area and at least one second display area, wherein a grid line of at least one first partial area of the first display area is provided with a driving signal by at least one first clock signal line; the gate line of the second partial region of at least one of the first display regions is supplied with a driving signal by at least one of the second clock signal lines; wherein the gate line of the third partial region of at least one of the second display regions is supplied with a driving signal by at least one of the first clock signal lines; the grid lines of the fourth partial area of at least one of the second display areas are provided with driving signals by at least one second clock signal line; the first clock signal line is locally different from the signal line of another frame, and the second clock signal line is locally different from the signal line of another frame. The invention achieves the effect that the refresh frequency of different display areas of the display panel is different.
Description
Technical Field
The invention relates to the technical field of display panels, in particular to a multi-region multi-frequency display device.
Background
With the development of display technology, users put higher and higher requirements on the effect and quality of display. For example, in a display screen such as a mobile phone tablet, where different windows are displayed in different areas on one screen, a part of the screen displays a sports video, and another part of the screen reads text or displays pictures. The requirement on the sports video is high in refresh frequency, and the requirement on the display of the text pictures is not the same as the sports video in refresh frequency, namely the refresh frequency of different areas in one screen is different.
The Gate Driver On Array (GOA) technology is an Array substrate line driving technology, which is a driving method for realizing line-by-line scanning by manufacturing a Gate scanning driving circuit On a Thin Film Transistor Array substrate by using a Thin Film Transistor (TFT) liquid crystal display Array.
The GOA display panel and the GOA display apparatus disclosed in chinese patent document CN107315291 are disclosed, where the GOA display panel includes a plurality of first clock signal control terminals and a plurality of second clock signal control terminals with the same number as the first clock signal control terminals, and the adjacent first clock signal control terminals and second clock signal control terminals sequentially turn on the corresponding scan lines. However, the ordinary display panel, such as the GOA display panel disclosed in CN107315291 mentioned above, cannot meet the requirement that the refresh frequency of different display areas in one screen is different.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: a multi-region multi-frequency display device is provided, in which refresh frequencies of different display regions are different.
The technical scheme adopted by the invention for solving the technical problems is as follows: a multi-region multi-frequency display device comprises at least one first display region and at least one second display region, wherein the first display region and the second display region respectively comprise a plurality of rows of grid lines; wherein, the grid line of the first partial area of at least one of the first display areas is provided with a driving signal by at least one first clock signal line through at least one first grid driving unit; the grid lines of the second partial area of at least one of the first display areas are provided with driving signals by at least one second clock signal line through at least one second grid driving unit; wherein the gate line of the third partial region of at least one of the second display regions is supplied with a driving signal by at least one first clock signal line via at least one first gate driving unit; the grid lines of the fourth partial area of at least one of the second display areas are provided with driving signals by at least one second clock signal line through at least one second grid driving unit; the first clock signal line is locally different from the signal line of another frame, and the second clock signal line is locally different from the signal line of another frame.
Preferably, the signal line of a certain frame of the first clock signal line is different from the signal line of a corresponding frame of the second clock signal line.
Preferably, a first signal line for supplying a driving signal to a part of the gate lines of the first display region in a certain frame of the first clock signal line is the same as or different from a second signal line for supplying a driving signal to a part of the gate lines of the first display region in another frame of the first clock signal line; the first clock signal line has a third signal line for supplying a driving signal to a part of the gate lines of the second display region in one frame, and the first clock signal line has a fourth signal line for supplying no driving signal to a part or all of the gate lines of the second display region in another frame.
Preferably, a fifth signal line for supplying a driving signal to a part of the gate lines of the first display region in a certain frame of the second clock signal line is the same as or different from a sixth signal line for supplying a driving signal to a part of the gate lines of the first display region in another frame of the second clock signal line; the second clock signal line has a seventh signal line for supplying no driving signal to a part or all of the gate lines of the second display region in one frame, and has an eighth signal line for supplying a driving signal to a part of the gate lines of the second display region in another frame.
Preferably, the first signal line of one frame of the first clock signal lines and the fifth signal line of the corresponding frame of the second clock signal lines are combined to supply the driving signal to the gate lines of the first display region, and the third signal line of one frame of the first clock signal lines and the eighth signal line of the other frame of the second clock signal lines are combined to supply the driving signal to the gate lines of the second display region.
Preferably, the multi-region multi-frequency display device comprises at least two first clock signal lines and at least two second clock signal lines, wherein the signal lines of the two first clock signal lines corresponding to the frames are different; the signal lines of the two second clock signal lines corresponding to the frames are different.
Preferably, the two first clock signal lines supply the driving signals to a part of the gate lines of the second display region in one frame, and the two first clock signal lines do not supply the driving signals to a part or all of the gate lines of the second display region in another frame.
Preferably, the two second clock signal lines supply no driving signal to a part or all of the gate lines of the second display region in a certain frame, and the two second clock signal lines supply driving signals to a part of the gate lines of the second display region in another frame.
Preferably, one of the first clock signal lines supplies a driving signal to a part of the gate lines of the second display region in a certain frame, and the one of the first clock signal lines does not supply a driving signal to a part or all of the gate lines of the second display region in another frame; the other first clock signal line does not provide a driving signal for part or all of the gate lines of the second display region in a corresponding frame; the other first clock signal line supplies a driving signal to a portion of the gate lines of the second display region in another corresponding frame.
Preferably, one of the second clock signal lines supplies a driving signal to a part of the gate lines of the second display region in a certain frame, and the one of the second clock signal lines does not supply a driving signal to a part or all of the gate lines of the second display region in another frame; the other second clock signal line does not provide a driving signal for part or all of the gate lines of the second display region in a certain frame; the other second clock signal line supplies a driving signal to a part of the gate lines of the second display region in another frame.
The invention has the beneficial effects that: the refresh frequency of the first display area in a certain two frames or more is different from the refresh frequency of the second display area in a corresponding two frames or more, so the invention achieves the effect that the refresh frequency of different display areas of the display panel is different. The display area with higher refresh frequency is suitable for competitive games or videos, and the display area with lower refresh frequency is suitable for text reading or picture viewing and the like.
Drawings
The invention is further described below with reference to the accompanying drawings.
FIG. 1 is a schematic diagram of a gate driving connection of a display panel according to a first embodiment;
FIG. 2 is a diagram of a display panel according to a first embodiment of the present invention;
FIG. 3 is a diagram of odd and even rows of the display panel according to the second and third embodiments;
FIG. 4 is a corresponding driving timing diagram of the embodiment;
FIG. 5 is a corresponding driving timing diagram of the embodiment;
FIG. 6 is a driving timing chart according to the third embodiment;
fig. 7 is a schematic circuit diagram of a GOA driving circuit.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments that can be derived by one of ordinary skill in the art from the description herein are intended to be within the scope of the present disclosure.
In a first embodiment, as shown in fig. 1, 2, and 7, a multi-region multi-frequency display device includes at least one first display region and at least one second display region. In this embodiment, the display screen is divided into a first display region corresponding to the 1 st to 10 th gate lines and a second display region corresponding to the 11 th to 20 th gate lines, and the display screen has 20 rows of gate lines in total, where the first display region corresponding to the 1 st to 10 th gate lines is required to have a higher refresh frequency, and the second display region corresponding to the 11 th to 20 th gate lines is required to have a lower refresh frequency. The division of the display area may also be adjusted so that the display screen is divided into more display areas, and the display areas are divided into a first display area and a second display area, wherein a portion of the display areas require a higher refresh rate, and wherein a portion of the display areas require a lower refresh rate.
The first display area and the second display area respectively comprise a plurality of rows of grid lines; wherein the gate line of the first partial region of at least one of the first display regions is supplied with a driving signal by at least one first clock signal line via at least one first gate driving unit; the gate lines of the second partial region of at least one of the first display regions are supplied with driving signals from at least one of the second clock signal lines through at least one of the second gate driving units. Wherein the gate line of the third partial region of at least one of the second display regions is supplied with a driving signal by at least one first clock signal line via at least one first gate driving unit; the grid line of the fourth partial area of at least one of the second display areas provides a driving signal by at least one second clock signal line through at least one second grid driving unit; the first clock signal line is locally different from the signal line of another frame, and the second clock signal line is locally different from the signal line of another frame.
Specifically, as an optional implementation manner in this embodiment, a signal line of a certain frame of the first clock signal line is different from a signal line of a corresponding frame of the second clock signal line.
Specifically, as an optional implementation manner in this embodiment, a first signal line which supplies a driving signal to a part of gate lines of a first display region in a certain frame of the first clock signal line is the same as or different from a second signal line which supplies a driving signal to a part of gate lines of a first display region in another frame of the first clock signal line; the first clock signal line has a third signal line for supplying a driving signal to a part of the gate lines of the second display region in one frame, and the first clock signal line has a fourth signal line for supplying no driving signal to a part or all of the gate lines of the second display region in another frame.
Specifically, as an optional implementation manner in this embodiment, a fifth signal line which supplies a driving signal to a part of gate lines of the first display region in a certain frame of the second clock signal line is the same as or different from a sixth signal line which supplies a driving signal to a part of gate lines of the first display region in another frame of the second clock signal line; the second clock signal line has a seventh signal line for supplying no driving signal to a part or all of the gate lines of the second display region in one frame, and has an eighth signal line for supplying a driving signal to a part of the gate lines of the second display region in another frame.
Specifically, as an optional implementation manner in this embodiment, the first signal line of a certain frame of the first clock signal lines and the fifth signal line of a corresponding frame of the second clock signal lines are combined to provide a driving signal to the gate line of the first display region, and the third signal line of a certain frame of the first clock signal lines and the eighth signal line of another frame of the second clock signal lines are combined to provide a driving signal to the gate line of the second display region.
As shown in fig. 2, in the first embodiment, the 1 st, 3 rd, 5 th, 7 th, and 9 th gate lines correspond to gate lines in the first partial region of the first display region, and the 2 nd, 4 th, 6 th, 8 th, and 10 th gate lines correspond to gate lines in the second partial region of the first display region. The 11 th, 13 th, 15 th, 17 th, 19 th grid lines correspond to the grid lines of the third partial area of the second display area, and the 12 th, 14 th, 16 th, 18 th, 20 th grid lines correspond to the grid lines of the fourth partial area of the second display area.
As shown in figure 4 of the drawings, a control end of a first clock CK _ L sends out a first clock signal line to enable the 1 st, 3 rd, 5 th, 7 th and 9 th grid lines to be opened for data writing in a certain frame and another frame through a first grid driving unit; the CK _ L clock control end sends out a first clock signal line to enable 11 th, 13 th, 15 th, 17 th and 19 th grid lines to be opened in the frame for data writing; in another frame, the 11 th, 13 th, 15 th, 17 th, 19 th gate line has no driving signal.
The CK _ R clock control end sends out a second clock signal line to enable the 2 nd, 4 th, 6 th, 8 th and 10 th grid lines to be opened for data writing through a second grid driving unit in a certain frame; 12 th, 14 th, 16 th, 18 th in the frame 20 gate lines have no drive signal. The control terminal of the second clock CK _ R sends out a second clock signal line to enable the 2 nd, 4 th, 6 th, 8 th, 10 th gate lines and the 12 th, 14 th, 16 th, 18 th, 20 th gate lines to be opened for data writing through the second gate driving unit in another frame.
As can be seen from the above, in the two frames, data is written into the first display region corresponding to the gate lines in the 1 st to 10 th rows twice in total, that is, the first display region is refreshed in each frame. In the second display area corresponding to the 11 th to 20 th row of gate lines, a part of data is written in the first frame, the rest of data is written in the second frame, and the two parts of data form a complete display picture. Thus, the second display area is refreshed once over two frames. The refresh times of the first display region in a certain two frames or more are different from the refresh times of the second display region in a corresponding two frames or more. It can be seen from the above-mentioned solutions of the present invention that the first display region has a higher refresh frequency, and the second display region has a lower refresh frequency, so that the refresh frequencies of the different display regions of the multi-region multi-frequency display device of the present invention are different, the display region with the higher refresh frequency is suitable for sports games or videos, and the display region with the lower refresh frequency is suitable for text reading or picture viewing.
The first gate driving unit and the second gate driving unit may adopt a GOA driving unit, and the GOA driving unit may adopt a GOA driving circuit as shown in fig. 7.
In a second embodiment, as shown in fig. 5, the multi-domain multi-frequency display device includes at least two first clock signal lines and at least two second clock signal lines, wherein the signal lines of the two first clock signal lines corresponding to frames are different; the signal lines of the two second clock signal lines corresponding to the frames are different. As shown in fig. 5, two first clock signal lines are respectively sent from the CK1_ L clock control terminal and the CK2_ L clock control terminal; the CK1_ R clock control end and the CK2_ R clock control end respectively send out two second clock signal lines.
Specifically, as an optional implementation manner in this embodiment, two first clock signal lines provide a driving signal to a part of the gate lines of the second display region in a certain frame, and two first clock signal lines provide no driving signal to a part or all of the gate lines of the second display region in another frame.
Specifically, as an optional implementation manner in this embodiment, two second clock signal lines do not provide a driving signal to part or all of the gate lines of the second display region in a certain frame, and two second clock signal lines provide a driving signal to part of the gate lines of the second display region in another frame.
Specifically, as an optional implementation manner in this embodiment, one first clock signal line supplies a driving signal to a part of the gate lines of the second display region in a certain frame, and the one first clock signal line does not supply a driving signal to a part or all of the gate lines of the second display region in another frame; the other first clock signal line does not provide a driving signal for part or all of the gate lines of the second display region in a corresponding frame; the other first clock signal line supplies a driving signal to a portion of the gate lines of the second display region in another corresponding frame.
As shown in fig. 5, in a certain frame, the first clock signal line from the CK1_ L clock control terminal and the first clock signal line from the CK2_ L clock control terminal are combined to sequentially turn on the 1 st, 3 rd, 5 th, 7 th, 9 th, 11 th, 13 th, 15 th, 17 th, and 19 th gate lines for data writing; a second clock signal line sent by the CK1_ R clock control end and a second clock signal line sent by the CK2_ R clock control end are combined to sequentially open the 2 nd, 4 th, 6 th, 8 th and 10 th grid lines for data writing; there is no drive signal on the 12 th, 14 th, 16 th, 18 th, 20 th gate line in the frame.
In another frame, a first clock signal line sent by a CK1_ L clock control end and a first clock signal line sent by a CK2_ L clock control end are combined to sequentially enable the 1 st, 3 rd, 5 th, 7 th and 9 th grid lines to be opened for data writing; no driving signal is provided to the 11 th, 13 th, 15 th, 17 th and 19 th grid lines. The second clock signal line from the CK1_ R clock control terminal and the second clock signal line from the CK2_ R clock control terminal are combined to sequentially open the 2 nd, 4 th, 6 th, 8 th, 10 th, 12 th, 14 th, 16 th, 18 th and 20 th gate lines for data writing.
In the second embodiment, in the two frames, data is written into the first display region corresponding to the gate lines in the 1 st to 10 th rows twice in total, that is, the first display region is refreshed in each frame. The second display region corresponding to the 11 th to 20 th row gate lines is written with a part of data in the first frame and the rest of data in the second frame, so that the second display region is refreshed once after two frames. The refresh frequency of the first display area in a certain two frames or more frames is different from the refresh frequency of the second display area in a corresponding two frames or more frames, so that the effect that the refresh frequency of different display areas of the display panel is different is achieved.
Third embodiment, as shown in fig. 6, the third embodiment is different from the second embodiment in that one of the second clock signal lines supplies a driving signal to a part of the gate lines of the second display region in a certain frame, and the one of the second clock signal lines does not supply a driving signal to a part or all of the gate lines of the second display region in another frame; the other second clock signal line does not provide a driving signal for part or all of the gate lines of the second display region in a certain frame; the other second clock signal line supplies a driving signal to a part of the gate lines of the second display region in another frame.
As shown in fig. 6, in a certain frame, the first clock signal line from the CK1_ L clock control terminal and the first clock signal line from the CK2_ L clock control terminal are combined to sequentially turn on the 1 st, 3 rd, 5 th, 7 th, 9 th, 13 th, and 17 th gate lines for data writing; the second clock signal line sent by the CK1_ R clock control end and the second clock signal line sent by the CK2_ R clock control end are combined to sequentially open the 2 nd, 4 th, 6 th, 8 th, 10 th, 14 th and 18 th grid lines for data writing; there is no driving signal on the 11 th, 12 th, 15 th, 16 th, 19 th, 20 th gate line in the frame.
As shown in FIG. 6, in another frame, the combination of the first clock signal line from the CK1_ L clock control terminal and the first clock signal line from the CK2_ L clock control terminal sequentially turns on the 1 st, 3 rd, 5 th, 7 th, 9 th, 11 th, 15 th, and 19 th gate lines for data writing. The second clock signal line from the CK1_ R clock control terminal and the second clock signal line from the CK2_ R clock control terminal are combined to sequentially open the 2 nd, 4 th, 6 th, 8 th, 10 th, 12 th, 16 th and 20 th gate lines for data writing. The 13 th, 14 th, 17 th, 18 th gate line has no driving signal in the frame.
In the third embodiment, in the two frames, data is written into the first display region corresponding to the gate lines in the 1 st to 10 th rows twice in total, that is, the first display region is refreshed in each frame. The second display region corresponding to the 11 th to 20 th row gate lines is written with a part of data in the first frame and the rest of data in the second frame, so that the second display region is refreshed once after two frames. The refresh frequency of the first display area in a certain two frames or more frames is different from the refresh frequency of the second display area in a corresponding two frames or more frames, so that the effect that the refresh frequency of different display areas of the display panel is different is achieved.
Similarly, the driving timings of the second clock signal line and the second clock signal line may be adjusted to perform multi-frequency display on the screen in multiple regions, which is not limited to the two display regions shown herein and will not be described herein again. It should be noted that, in this document, the technical features in the various alternatives can be combined to form the scheme as long as the technical features are not contradictory, and the scheme is within the scope of the disclosure of the present application. Relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
The embodiments in the present specification are described in a related manner, each embodiment focuses on differences from other embodiments, and the same and similar parts in the embodiments are referred to each other. The above description is only for the preferred embodiment of the present application and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application are included in the protection scope of the present application.
Claims (10)
1. A multi-region multi-frequency display device comprises at least one first display region and at least one second display region, wherein the first display region and the second display region respectively comprise a plurality of rows of grid lines; the method is characterized in that: wherein the gate line of the first partial region of at least one of the first display regions is supplied with a driving signal by at least one first clock signal line via at least one first gate driving unit; the grid line of the second partial area of at least one of the first display areas is provided with a driving signal by at least one second clock signal line through at least one second grid driving unit; wherein the gate line of the third partial region of at least one of the second display regions is supplied with a driving signal by at least one first clock signal line via at least one first gate driving unit; the grid line of the fourth partial area of at least one of the second display areas provides a driving signal by at least one second clock signal line through at least one second grid driving unit; the first clock signal line is partially different from the signal line of another frame, and the second clock signal line is partially different from the signal line of another frame.
2. The multi-region multi-frequency display device of claim 1, wherein: the signal line of a certain frame of the first clock signal line is different from the signal line of a corresponding frame of the second clock signal line.
3. The multi-region multi-frequency display device of claim 1, wherein: a first signal line for supplying a driving signal to a part of gate lines of a first display region in a certain frame of the first clock signal line and a second signal line for supplying a driving signal to a part of gate lines of a first display region in another frame of the first clock signal line are the same or different; the first clock signal line has a third signal line for supplying a driving signal to a part of the gate lines of the second display region in one frame, and the first clock signal line has a fourth signal line for supplying no driving signal to a part or all of the gate lines of the second display region in another frame.
4. The multi-region multi-frequency display device of claim 3, wherein: a fifth signal line for supplying a driving signal to a part of the gate lines of the first display region in a certain frame of the second clock signal line is the same as or different from a sixth signal line for supplying a driving signal to a part of the gate lines of the first display region in another frame of the second clock signal line; the second clock signal line has a seventh signal line for supplying no driving signal to a part or all of the gate lines of the second display region in one frame, and has an eighth signal line for supplying a driving signal to a part of the gate lines of the second display region in another frame.
5. The multi-region multi-frequency display device of claim 1 or 4, wherein: and the third signal line of one frame of the first clock signal line and the eighth signal line of the other frame of the second clock signal line are combined to provide a driving signal for the grid line of the second display area.
6. The multi-region multi-frequency display device of claim 1, wherein: the display device comprises at least two first clock signal lines and at least two second clock signal lines, wherein the signal lines of the two first clock signal lines corresponding to frames are different; the signal lines of the two second clock signal lines corresponding to the frames are different.
7. The multi-region multi-frequency display device of claim 6, wherein: the two first clock signal lines supply a driving signal to a part of the gate lines of the second display region in a certain frame, and the two first clock signal lines do not supply a driving signal to a part or all of the gate lines of the second display region in another frame.
8. The multi-region multi-frequency display device of claim 6, wherein: two second clock signal lines provide no driving signals to a part or all of the gate lines of the second display region in a certain frame, and two second clock signal lines provide driving signals to a part of the gate lines of the second display region in another frame.
9. The multi-region multi-frequency display device of claim 6, wherein: one of the first clock signal lines supplies a driving signal to a part of the gate lines of the second display region in a certain frame, and the one of the first clock signal lines does not supply a driving signal to a part or all of the gate lines of the second display region in another frame; the other first clock signal line does not provide a driving signal for part or all of the gate lines of the second display region in a corresponding frame; the other first clock signal line supplies a driving signal to a portion of the gate lines of the second display region in another corresponding frame.
10. The multi-region multi-frequency display device of claim 6, wherein: one of the second clock signal lines provides a drive signal to a part of the gate lines of the second display region in a certain frame, and the other second clock signal line does not provide a drive signal to a part or all of the gate lines of the second display region in another frame; the other second clock signal line does not provide a driving signal for part or all of the gate lines of the second display region in a certain frame; the other second clock signal line supplies a driving signal to a part of the gate lines of the second display region in another frame.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211336235.9A CN115497433B (en) | 2022-10-28 | 2022-10-28 | Multi-region multi-frequency display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211336235.9A CN115497433B (en) | 2022-10-28 | 2022-10-28 | Multi-region multi-frequency display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115497433A true CN115497433A (en) | 2022-12-20 |
| CN115497433B CN115497433B (en) | 2023-11-28 |
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| CN116229872A (en) * | 2023-02-24 | 2023-06-06 | 昆山国显光电有限公司 | Display panel, driving method thereof and computer readable storage medium |
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