CN115497411A - Pixel circuit, driving method thereof and display panel - Google Patents
Pixel circuit, driving method thereof and display panel Download PDFInfo
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- CN115497411A CN115497411A CN202211160466.9A CN202211160466A CN115497411A CN 115497411 A CN115497411 A CN 115497411A CN 202211160466 A CN202211160466 A CN 202211160466A CN 115497411 A CN115497411 A CN 115497411A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
Abstract
The invention discloses a pixel circuit, a driving method thereof and a display panel, wherein the pixel circuit comprises a driving module, a leakage suppression module, an initialization module, a first compensation module, a first storage module, a second storage module and a light-emitting module; the control end of the driving module and the electric leakage suppression module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, the first storage module is connected with the first node, the second storage module is connected with the second node, and the first compensation module is connected with the second node and used for responding to a voltage signal of the first node to perform voltage compensation on the second node. The technical scheme provided by the embodiment stabilizes the potential of the first node by arranging the leakage suppression module and the second storage module; in addition, the voltage of the second node is self-compensated by arranging the first compensation module, so that the voltage difference between the first node and the second node is reduced, the leakage current is further reduced, and the display effect is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display panel.
Background
With the development of display technology, people have higher and higher requirements on the display quality of pictures.
The display panel usually includes a plurality of pixel circuits, and the magnitude of the driving current flowing through the light-emitting module in the pixel circuit determines the light-emitting luminance of the display panel. The existing display panel has the problem of electric leakage, which affects the display effect.
Disclosure of Invention
The invention provides a pixel circuit, a driving method thereof and a display panel, which aim to improve the display effect of the display panel using the pixel circuit.
According to an aspect of the present invention, there is provided a pixel circuit including: the device comprises a driving module, a leakage suppression module, an initialization module, a first compensation module, a first storage module, a second storage module and a light-emitting module;
the control end of the driving module and the electric leakage suppression module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, and the initialization module is used for transmitting initialization voltage to the first node through the electric leakage suppression module in an initialization stage and initializing the control end of the driving module; the driving module and the light-emitting module are connected between a first power line and a second power line, and the driving module is used for driving the light-emitting module to emit light in a light-emitting stage;
the first storage module is connected with the first node and used for storing the voltage of the first node; the second storage module is connected with the second node and used for storing the voltage of the second node;
the first compensation module is connected with the second node and used for responding to the voltage signal of the first node and performing voltage compensation on the second node.
Optionally, the system further comprises a second compensation module and a data writing module;
the data writing module is connected between a data line and the first end of the driving module, and the second compensation module is connected between the second end of the driving module and the second node;
the first end of the first storage module is connected with the first power line, the second end of the first storage module is connected with the control end of the driving module in the first node, the first end of the electric leakage suppression module is connected with the first node, the second end of the electric leakage suppression module is connected with the second end of the initialization module in the second node, the first end of the initialization module is connected into the initialization voltage, the first end of the second storage module is connected with the first power line, and the second end of the second storage module is connected with the second node.
Optionally, the first compensation module includes a first compensation subunit and a second compensation subunit; a first end of the first compensation subunit is connected with the first power line, a second end of the first compensation subunit is connected with the second node, and a control end of the first compensation subunit is connected with the first node;
a first end of the second compensation subunit is connected to the initialization voltage, a second end of the second compensation subunit is connected to the second node, and a control end of the second compensation subunit is connected to the first node;
wherein the first compensation subunit and the second compensation subunit are not turned on simultaneously.
Optionally, the driving module comprises a first transistor, the first compensation subunit comprises a second transistor, and the second compensation subunit comprises a third transistor;
a gate of the second transistor and a gate of the first transistor are connected to the first node, a first pole of the second transistor is connected to the second node, a second pole of the second transistor is connected to the first power supply line, a gate of the third transistor is connected to the first node, a first pole of the third transistor is connected to the second node, and a second pole of the third transistor is connected to the initialization voltage;
the second transistor is of a different channel type than the third transistor.
Optionally, the first storage module comprises a first capacitor, and the second storage module comprises a second capacitor; a first end of the first capacitor is connected with the first power line, a second end of the first capacitor is connected with the first node, a first end of the second capacitor is connected with the first power line, and a second end of the second capacitor is connected with the second node;
the capacitance value of the first capacitor is larger than that of the second capacitor.
Optionally, the leakage suppression module includes a fourth transistor, the initialization module includes a fifth transistor, the second compensation module includes a sixth transistor, and the data writing module includes a seventh transistor; the pixel circuit further comprises a first light-emitting control module and a second light-emitting control module, wherein the first light-emitting control module comprises an eighth transistor, the second light-emitting control module comprises a ninth transistor, and the light-emitting module comprises a light-emitting diode;
a gate of the fourth transistor is connected to a first scan signal, a first pole of the fourth transistor is connected to the first node, a second pole of the fourth transistor is connected to the second node, a gate of the fifth transistor is connected to a second scan signal, a first pole of the fifth transistor is connected to the initialization voltage, a second pole of the fifth transistor is connected to the second node, a gate of the sixth transistor is connected to a third scan signal, a first pole of the sixth transistor is connected to the second end of the driving module, a second pole of the sixth transistor is connected to the second node, a gate of the seventh transistor is connected to the third scan signal, a first pole of the seventh transistor is connected to the data line, and a second pole of the seventh transistor is connected to the first end of the driving module;
a gate of the eighth transistor and a gate of the ninth transistor are both connected to a light emitting control signal, a first pole of the eighth transistor is connected to the first power line, a second pole of the eighth transistor is connected to the first end of the driving module, a first pole of the ninth transistor is connected to the second end of the driving module, a second pole of the ninth transistor is connected to the first pole of the light emitting diode, and a second pole of the light emitting diode is connected to the second power line;
preferably, the fourth transistor, the fifth transistor, and the sixth transistor are double-gate transistors.
Optionally, the first compensation module comprises a first compensation subunit and a second compensation subunit;
the first end of the first compensation subunit is connected with the second compensation module, the second end of the first compensation subunit is connected with the second node, and the control end of the first compensation subunit is connected with the first node;
a first end of the second compensation subunit is connected with the initialization module, a second end of the second compensation subunit is connected with the second node, and a control end of the second compensation subunit is connected with the first node;
wherein the first compensation subunit and the second compensation subunit are not turned on at the same time.
According to another aspect of the present invention, there is provided a driving method of a pixel circuit, the pixel circuit including a driving module, a leakage current suppressing module, an initializing module, a first compensating module, a first storage module, a second storage module, and a light emitting module; the control end of the driving module and the electric leakage suppression module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, the driving module and the light emitting module are connected between a first power line and a second power line, the first storage module is connected with the first node, the second storage module is connected with the second node, and the first compensation module is connected with the second node;
the driving method of the pixel circuit includes:
in an initialization stage, controlling the initialization module to transmit initialization voltage to the first node through the leakage suppression module, and initializing a control end of the driving module;
and in a light-emitting stage, the driving module is controlled to drive the light-emitting module to emit light, and the first compensation module is controlled to respond to the voltage signal conduction of the first node and perform voltage compensation on the second node.
Optionally, the pixel circuit further includes a second compensation module and a data writing module, the data writing module is connected between a data line and the first end of the driving module, and the second compensation module is connected between the second end of the driving module and the second node;
before the light emitting stage, the driving method of the pixel circuit further includes:
in a data writing stage, controlling the data writing module to transmit the data voltage on the data line to the control end of the driving module through the conducted second compensation module;
the first compensation module comprises a first compensation subunit and a second compensation subunit, wherein a first end of the first compensation subunit is connected with the first power line, a second end of the first compensation subunit is connected with the second node, and a control end of the first compensation subunit is connected with the first node; a first end of the second compensation subunit is connected to the initialization voltage, a second end of the second compensation subunit is connected to the second node, and a control end of the second compensation subunit is connected to the first node;
the step of controlling the first compensation module to respond to the voltage signal conduction of the first node, and performing voltage compensation on the second node specifically includes:
when the voltage of the second node is negatively biased, controlling the first compensation subunit to be switched on in response to the voltage signal of the first node, and carrying out positive compensation on the voltage of the second node;
when the voltage of the second node is positively biased, the second compensation subunit is controlled to be switched on in response to the voltage signal of the first node, and the voltage of the second node is subjected to negative compensation.
According to another aspect of the present invention, there is provided a display panel including the pixel circuit provided in any of the embodiments of the present invention.
In the technical scheme provided by this embodiment, the adopted pixel circuit includes a driving module, a leakage suppression module, an initialization module, a first compensation module, a first storage module, a second storage module and a light emitting module; the control end and the electric leakage suppression module of the driving module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, and the initialization module is used for transmitting initialization voltage to the first node through the electric leakage suppression module in an initialization stage and initializing the control end of the driving module; the driving module and the light-emitting module are connected between the first power line and the second power line, and the driving module is used for driving the light-emitting module to emit light in a light-emitting stage; the first storage module is connected with the first node and used for storing the voltage of the first node; the second storage module is connected with the second node and used for storing the voltage of the second node; the first compensation module is connected with the second node and used for responding to the voltage signal of the first node and performing voltage compensation on the second node. In the light-emitting stage, on one hand, the electric potential of the first node is stabilized by arranging the electric leakage suppression module and the second storage module; on the other hand, the voltage of the second node is self-compensated by arranging the first compensation module, so that the voltage difference between the first node and the second node is reduced, the leakage current is further reduced, the electric leakage phenomenon of the pixel circuit can be improved, and the display effect is improved.
It should be understood that the statements in this section do not necessarily identify key or critical features of the embodiments of the present invention, nor do they necessarily limit the scope of the invention. Other features of the present invention will become apparent from the following description.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention;
fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the disclosure;
FIG. 6 is a waveform diagram of a driving timing of a pixel circuit according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 8 is a schematic view of a leakage current curve according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 12 is a flowchart of a driving method of a pixel circuit according to an embodiment of the invention;
fig. 13 is a flowchart of another driving method of a pixel circuit according to an embodiment of the invention;
fig. 14 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
As described in the background, the conventional display panel has a leakage phenomenon. The inventor researches and discovers that the above problems occur because the array substrate of the existing display panel structure is mostly an LTPS TFT substrate, the pixel circuit generally comprises a driving transistor and an initializing transistor for resetting the gate potential of the driving transistor, both the driving transistor and the initializing transistor are LTPS TFTs, and the gate potential of the driving transistor is affected by the leakage current of the initializing transistor in the light emitting stage due to the large leakage current of the LTPS TFTs, so that the gate potential of the driving transistor is unstable, and the display effect is affected. The existing solution usually adopts a mode of optimizing the pressure maintaining capability of a storage capacitor at the gate of a driving transistor, or adopts an LGZO transistor (LTPO technology) with smaller leakage current to reduce the electric leakage, but the process difficulty is large, the cost is high, and the improvement effect on solving the electric leakage problem is limited.
In view of the above problems, an embodiment of the present invention provides a pixel circuit, and fig. 1 is a schematic structural diagram of a pixel circuit provided in an embodiment of the present invention, and referring to fig. 1, the pixel circuit includes a driving module 110, a leakage current suppressing module 120, an initializing module 130, a first compensating module 140, a first storage module 150, a second storage module 160, and a light emitting module 170.
The control terminal of the driving module 110 and the leakage suppression module 120 are connected to a first node N1, the initialization module 130 and the leakage suppression module 120 are connected to a second node N2, and the initialization module 130 is configured to transmit an initialization voltage Vref to the first node N1 through the leakage suppression module 120 in an initialization stage, and initialize the control terminal of the driving module 110; the driving module 110 and the light emitting module 170 are connected between the first power line L1 and the second power line L2, and the driving module 110 is configured to drive the light emitting module 170 to emit light in a light emitting phase.
The first storage module 150 is connected to the first node N1, and is configured to store a voltage of the first node N1; the second storage module 160 is connected to the second node N2, and is configured to store a voltage of the second node N2; the first compensation module 140 is connected to the second node N2, and configured to perform voltage compensation on the second node N2 in response to the voltage signal of the first node N1.
Specifically, the first node N1 and the second node N2 are voltage nodes in the pixel circuit, where the first node N1 is a connection node between the control terminal of the driving module 110 and the first terminal of the leakage suppression module 120, the second node N2 is a connection node between the second terminal of the leakage suppression module 120 and the second terminal of the initialization module 130, and the second terminal of the initialization module 130 is connected to an initialization voltage Vref, where the initialization voltage Vref may be provided by an initialization signal line.
In the embodiment, the first power line L1 is used for transmitting the first power voltage VDD, the second power line L2 is used for transmitting the second power voltage VSS, and when the discharging path between the first power line L1 and the second power line L2 is turned on, the driving module 110 drives the light emitting module 170 to emit light according to the voltage of the control terminal thereof. The first storage module 150 and the second storage module 160 are respectively configured to store voltages of the first node N1 and the second node N2, and hold the voltages of the nodes during a light emitting period. For example, one end of the first memory module 150 and one end of the second memory module 160 are both connected to the first power voltage VDD, the other end of the first memory module 150 is connected to the first node N1, and the other end of the second memory module 160 is connected to the second node N2. When the initialization module 130 and the leakage suppression module 120 are both turned on, the initialization voltage Vref is written into the first node N1, and the potential of the control terminal of the driving module 110 is reset. Here, the initialization voltage Vref may be a negative polarity voltage.
If the leakage current suppressing module 120 is not provided, in the light emitting stage, the initializing module 130 is turned off, and the first storage module 150 maintains the voltage of the first node N1, but since the initializing module 130 has a leakage current, the potential of the control terminal of the driving module 110 is unstable, and the lower the refresh rate is, the longer the pressure maintaining time of the first storage module 150 is, the more serious the leakage current of the initializing module 130 is, and the greater the change degree of the display brightness in one display period is, so that the display screen flickers.
In the present embodiment, the leakage is reduced by providing the leakage suppressing module 120 and the second storage module 160 between the initialization module 130 and the first node N1. After the initialization module 130 is turned off, the leakage current will flow to the second node N2, and the potential of the second node N2 will change. In the process of the potential change of the second node N2, the voltage difference between the first node N1 and the second node N2 is gradually increased, and the leakage current is further increased. Therefore, the second storage module 160 is configured to store the potential of the second node N2 and maintain the voltage, so that the voltage of the second node N2 is maintained at a stable level, the voltage difference between the first node N1 and the second node N2 is stabilized, and the leakage phenomenon of the first node N1 is further improved.
On the other hand, the pixel circuit provided in this embodiment further includes a first compensation module 140, and the first compensation module 140 can be turned on according to the voltage signal of the first node N1, and then compensates the voltage of the second node N2, so as to reduce the voltage difference between the first node N1 and the second node N2, and ensure that no leakage current flows through the leakage current suppression module 120, so that the potential of the first node N1 is kept constant, and the display effect of the display image is improved. For example, when the voltage of the second node N2 is biased positively with respect to the voltage of the first node N1, the first compensation module 140 is controlled to be turned on to provide a negative voltage to the second node N2, so as to perform negative compensation on the second node N2, thereby reducing the voltage difference between the first node N1 and the second node N2. When the second node N2 is negatively biased, the first compensation module 140 is controlled to be turned on to provide a positive voltage to the second node N2, so as to perform positive compensation on the second node N2, and also reduce the voltage difference between the first node N1 and the second node N2.
In the technical solution provided by this embodiment, the adopted pixel circuit includes a driving module, a leakage suppression module, an initialization module, a first compensation module, a first storage module, a second storage module, and a light emitting module; the control end and the electric leakage suppression module of the driving module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, and the initialization module is used for transmitting initialization voltage to the first node through the electric leakage suppression module in an initialization stage and initializing the control end of the driving module; the driving module and the light-emitting module are connected between the first power line and the second power line, and the driving module is used for driving the light-emitting module to emit light in a light-emitting stage; the first storage module is connected with the first node and used for storing the voltage of the first node; the second storage module is connected with the second node and used for storing the voltage of the second node; the first compensation module is connected with the second node and used for responding to the voltage signal of the first node and performing voltage compensation on the second node. In the light emitting stage, on one hand, the electric potential of the first node is stabilized by arranging the electric leakage suppression module and the second storage module; on the other hand, the voltage of the second node is self-compensated by arranging the first compensation module, so that the voltage difference between the first node and the second node is reduced, the leakage current is further reduced, the electric leakage phenomenon of the pixel circuit can be improved, and the display effect is improved.
Fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 1 and fig. 2, based on the above technical solutions, optionally, the pixel circuit further includes a second compensation module 180 and a Data writing module 190, the Data writing module 190 is connected between the Data line Data and the first end of the driving module 110, and the second compensation module 180 is connected between the second end of the driving module 110 and the second node N2.
Wherein the pixel circuit can implement the threshold compensation function of the driving module 110. After the initialization phase is finished, the driving module 110 is in a conducting state, after the data writing phase is entered, the data voltage Vdata is written into the first node N1 through the data writing module 190, the driving module 110, the second compensation module 180 and the leakage suppression module 120, and when the driving module 110 is turned off due to the potential of the first node N1, the first storage module 150 stores the voltage of the first node N1, where the voltage includes the data voltage Vdata and the threshold information of the driving module 110, so as to implement threshold compensation on the driving module 110.
In the light emitting phase, the initialization module 130, the leakage current suppression module 120, and the second compensation module 180 are all turned off, and the driving module 110 drives the light emitting module 170 to emit light.
Fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 2 and fig. 3, based on the above technical solution, the first compensation module 140 includes a first compensation subunit 141 and a second compensation subunit 142.
Specifically, a first terminal of the first compensation subunit 141 is connected to the first power line L1, a second terminal of the first compensation subunit 141 is connected to the second node N2, and a control terminal of the first compensation subunit 141 is connected to the first node N1; a first end of the second compensation subunit 142 is connected to the initialization voltage Vref, a second end of the second compensation subunit 142 is connected to the second node N2, and a control end of the second compensation subunit 142 is connected to the first node N1. Wherein the first compensation subunit 141 and the second compensation subunit 142 are not turned on at the same time.
At this time, there are two leakage paths of the voltage of the first node N1 (stored in the first memory module 150), one is leaked through the second compensation module 180, and the other is leaked through the initialization module 130. The leakage rate is positively correlated to the voltage difference across the corresponding module. After writing data, the voltages of the first node N1 and the second node N2 are equal, which is the difference between the data voltage Vdata and the threshold voltage of the driving module 110, and during the leakage process, the potential change of the second node N2 is different because the leakage rates of the two leakage paths are different. As time goes on, when the potential of the second node N2 is biased positively, the second compensation subunit 142 is controlled to be turned on, the initialization voltage Vref charges negative charges to the second node N2, until the voltage difference between the second node N2 and the first node N1 meets the turn-off condition of the second compensation subunit 142, the second compensation subunit 142 stops performing voltage compensation on the second node N1, and at this time, the voltage difference between the first node N1 and the second node N2 is small, so that the leakage current from the second node N2 to the first node N1 through the leakage current suppression module 130 can be effectively suppressed, and the voltage stability of the first node N1 can be maintained.
Similarly, when the potential of the second node N2 is negatively biased, the first compensation subunit 141 is controlled to be turned on, the first power voltage VDD charges positive charges to the second node N2, and the first compensation subunit 141 stops performing the voltage compensation on the second node N1 until the voltage difference between the second node N2 and the first node N1 satisfies the turn-off condition of the first compensation subunit 141, at this time, the voltage difference between the first node N1 and the second node N2 is small, so that the leakage current from the first node N1 to the second node N2 through the leakage current suppressing module 130 can be effectively suppressed, and the stability of the voltage of the first node N1 can be maintained.
Exemplarily, fig. 4 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present invention, and shows a specific structure of the pixel circuit shown in fig. 3, and referring to fig. 4, based on the above technical solution, optionally, the first storage module 150 includes a first capacitor C1, the second storage module 160 includes a second capacitor C2, a first end of the first capacitor C1 is connected to the first power line L1, a second end of the first capacitor C1 is connected to the first node N1, a first end of the second capacitor C2 is connected to the first power line L1, and a second end of the second capacitor C2 is connected to the second node N2.
The capacitance value of the first capacitor C1 is greater than that of the second capacitor C2, that is, the pressure maintaining capability of the first capacitor C1 is greater than that of the second capacitor C2, so that the voltage of the second node N2 can be conveniently adjusted.
The driving module 110 includes a first transistor T1, the first compensation subunit 141 includes a second transistor T2, and the second compensation subunit 142 includes a third transistor T3; a gate of the second transistor T2 and a gate of the first transistor T1 are connected to the first node N1, a first pole of the second transistor T2 is connected to the second node N2, a second pole of the second transistor T2 is connected to the first power supply line L1, a gate of the third transistor T3 is connected to the first node N1, a first pole of the third transistor T3 is connected to the second node N2, and a second pole of the third transistor T3 is connected to the initialization voltage Vref.
In the present embodiment, the channel types of the second transistor T2 and the third transistor T3 are different, for example, the second transistor T2 is an N-type transistor, and the third transistor T3 is a P-type transistor. After the data writing is completed, the voltages of the first node N1 and the second node N2 are both Vdata-Vth1, where Vth1 is the threshold voltage of the first transistor T1. In the leakage process, as time goes by, when the potential of the second node N2 is biased positively by the leakage currents of the two leakage paths, and the voltage of the second node N2 is greater than the difference between the voltage of the first node N1 and the threshold voltage Vth3 of the third transistor T3 (i.e., VN2 > VN1+ Vth 3), the third transistor T3 is turned on, and the second transistor T2 is turned off, so that the initialization voltage Vref charges negative charges to the second node N2 through the third transistor T3 (i.e., charges negative charges to the second capacitor C2), until VN2= VN1+ Vth3, the third transistor T3 is turned off, and it can be considered that the voltage between the first node N1 and the second node N2 reaches a balance, and the voltage difference between the first node N1 and the second node N2 is small, so that the leakage current between the first node N1 and the second node N2 is effectively suppressed.
If the two leakage currents in the two leakage paths make the potential of the second node N2 negatively biased, and the voltage of the second node N2 is smaller than the difference between the voltage of the first node N1 and the threshold voltage Vth2 of the second transistor T2 (i.e. VN2 < VN1-Vth 2), the second transistor T2 is turned on, and the third transistor T3 is turned off, so that the first power voltage VDD charges positive charges to the second node N2 through the second transistor T2 (i.e. charges positive charges to the second capacitor C2), until VN2= VN1-Vth2, the second transistor T2 is turned off, and it can be considered that the voltages between the first node N1 and the second node N2 reach a balance, and the voltage difference between the two is small, thereby effectively suppressing the leakage current between the first node N1 and the second node N2.
In the technical scheme provided by this embodiment, the N-type second transistor T2 and the P-type third transistor T3 are arranged, and the second transistor T2 or the third transistor T3 is controlled to be turned on according to the difference between the second node N2 and the first node N1, so as to perform self-compensation on the voltage of the second node N1, thereby reducing the voltage across the first node N1 and the second node N2, and further reducing the leakage current between the first capacitor C1 and the second capacitor C2.
Fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 5, based on the above technical solutions, the leakage suppression module 120 includes a fourth transistor T4, the initialization module 130 includes a fifth transistor T5, the second compensation module 180 includes a sixth transistor T6, and the data writing module 190 includes a seventh transistor T7; the pixel circuit further includes a first light-emitting control module 111 and a second light-emitting control module 112, the first light-emitting control module 111 includes an eighth transistor T8, the second light-emitting control module 112 includes a ninth transistor T9, and the light-emitting module 170 includes a light-emitting diode D1; a gate of the fourth transistor T4 is connected to the first scanning signal S1, a first pole of the fourth transistor T4 is connected to the first node N1, a second pole of the fourth transistor T4 is connected to the second node N2, a gate of the fifth transistor T5 is connected to the second scanning signal S2, a first pole of the fifth transistor T5 is connected to the initialization voltage Vref, a second pole of the fifth transistor T5 is connected to the second node N2, a gate of the sixth transistor T6 is connected to the third scanning signal S3, a first pole of the sixth transistor T6 is connected to the second end of the driving module 110, a second pole of the sixth transistor T6 is connected to the second node N2, a gate of the seventh transistor T7 is connected to the third scanning signal S3, a first pole of the seventh transistor T7 is connected to the Data line Data, and a second pole of the seventh transistor T7 is connected to the first end of the driving module 110; the gate of the eighth transistor T8 and the gate of the ninth transistor T9 are both connected to the emission control signal EM, the first pole of the eighth transistor T8 is connected to the first power line L1, the second pole of the eighth transistor T8 is connected to the first pole of the driving module 110, the first pole of the ninth transistor T9 is connected to the second pole of the driving module 110, the second pole of the ninth transistor T9 is connected to the first pole of the light emitting diode D1, and the second pole of the light emitting diode D1 is connected to the second power line L2.
Fig. 6 is a waveform diagram of a driving timing sequence of a pixel circuit according to an embodiment of the present invention, which can be applied to the pixel circuit shown in fig. 5, and referring to fig. 5 and 6, taking the second transistor T2 as an N-type transistor and the other transistors as P-type transistors as an example, a working process of the pixel circuit according to the embodiment includes an initialization stage T1, a data writing stage T2, and a light emitting stage T3.
In the initialization stage T1, the first scan signal S1 is at a low level, the second scan signal S2 is at a low level, the third scan signal S3 is at a high level, and the emission control signal EM is at a high level, so that the fourth transistor T4 and the fifth transistor T5 are turned on, the initialization voltage Vref is written to the gate of the first transistor T1 through the fifth transistor T5 and the fourth transistor T4, and the gate voltage of the first transistor T1 is reset to the initialization voltage Vref. At this time, the voltage of the first node N1 is equal to the voltage of the second node N2, and is the initialization voltage Vref, so the second transistor T2 and the third transistor T3 are in an off state.
In the data writing phase T2, the first scan signal S1 is at a low level, the second scan signal S2 is at a high level, the third scan signal S3 is at a low level, and the emission control signal EM is at a high level, so that the fourth transistor T4, the sixth transistor T6, and the seventh transistor T7 are turned on, the fifth transistor T5 is turned off, and the data voltage Vdata is written into the gate of the first transistor T1 through the seventh transistor T7, the first transistor T1, the sixth transistor T6, and the fourth transistor T4, thereby implementing data writing and compensation of the first transistor T1. At this time, the voltages of the first node N1 and the second node N2 are both Vdata + Vth1.
In the light emitting period T3, the first scan signal S1 is at a high level, the second scan signal S2 is at a high level, the third scan signal S3 is at a high level, and the light emitting control signal EM is at a low level, so that the eighth transistor T8 and the ninth transistor T9 are turned on, and the first transistor T1 generates a driving current according to a gate voltage thereof to drive the light emitting diode D1 to emit light.
In the light-emitting stage t3, the specific working principle of reducing the leakage of the first node N1 is as follows:
fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention, and the difference from the pixel circuit shown in fig. 5 is that the pixel circuit shown in fig. 7 does not include the leakage current suppressing module 120, the first compensating subunit 141, and the second compensating subunit 142. In fig. 7, after the data voltage Vdata is written into the gate of the first transistor T1, the fifth transistor T5 and the sixth transistor T6 are both in an off state, and there are two leakage paths of the first capacitor C1 (the first node N1), one is leakage through the sixth transistor T6, and the other is leakage through the fifth transistor T5. When | VDD-VN1| > | VN1-Vref | during the pressure maintaining process of the first capacitor C1, the first node N1 is charged with positive charges due to leakage current, the voltage of the first node N1 is biased positively, and reaches the equilibrium state | VDD-VN1| = | VN1-Vref | after a period of time, at this time, the voltage of the first node N1 is the equilibrium voltage. Here, VDD to VN1 refer to a voltage difference across the sixth transistor T6 at the light emitting stage, and VN1 to Vref refer to a voltage difference across the fifth transistor T5. On the contrary, when | VDD-VN1| < | VN1-Vref |, during the pressure maintaining process of the first capacitor C1, due to the leakage current, the first node N1 is charged with negative charges, the voltage of the first node N1 is negatively biased, and the first node N1 also reaches the equilibrium voltage after a period of time. Therefore, the drain rate of the first node N1 of the pixel circuit shown in fig. 7 is gradually decreased and has the maximum drain rate at the initial stage of drain.
In fig. 5, at the initial time of the leakage, the voltage difference between the first node N1 and the second node N2 is zero, and thus the initial leakage rate of the first node N1 is zero. As time goes on, the second node N2 is biased by the leakage current, but due to the turn-off of the fourth transistor T4, the voltage difference between the first node N1 and the second node N2 gradually increases, the first node N1 starts to leak and gradually increases, when the second node N2 reaches the equilibrium voltage, the first node N1 continues to leak to the second node C2 due to the leakage current of the fourth transistor T1, and the leakage current of the first node N1 also gradually decreases as the voltage difference between the first node N1 and the second node N2 gradually decreases until the first node N1 and the second node N2 reach the equilibrium state.
Fig. 8 is a schematic diagram of a leakage curve according to an embodiment of the present invention, in which a solid line represents a leakage of the first node N1 in the pixel circuit shown in fig. 7, a dotted line represents a leakage of the first node N1 in the pixel circuit shown in fig. 5, an AA 'line represents a time required for the first node N1 in the pixel circuit shown in fig. 7 to reach an equilibrium voltage, and a BB' line represents a time required for the first node N1 in the pixel circuit shown in fig. 5 to reach the equilibrium voltage. Compared with a pixel circuit without the leakage suppression module 120, the technical solution provided in this embodiment enables the first node N1 to reach the equilibrium voltage for a longer time, that is, the leakage rate of the first node N1 is slower, and especially in a period of time when the leakage is initial, the leakage of the first node N1 approaches zero.
Further, in the leakage process, the second pole of the first transistor T1 is positive voltage, the initialization voltage Vref is negative voltage, and the voltage difference between the two ends of the sixth transistor T6 is inconsistent with the voltage difference between the two ends of the fifth transistor T5, so the leakage rates of the two leakage paths are also different, which results in that the voltage difference between the first node N1 and the second node N2 cannot be maintained at 0V, and leakage current still occurs.
In the present embodiment, the voltage of the second node N2 is self-compensated by adding the second transistor T2 and the third transistor T3, so that the leakage current between the first node N1 and the second node N2 is suppressed.
Specifically, according to the difference in drain current rates of the two drain current paths, when the drain current causes the voltage of the second node N2 to be biased positively, and VN2 > VN1+ Vth3, the third transistor T3 is turned on, and the second transistor T2 is turned off, so that the initialization voltage Vref charges the second node N2 with negative charge through the third transistor T3, that is, charges the second capacitor C2 with negative charge, until VN2= VN1+ Vth3, the third transistor T3 is turned off, and it can be considered that the voltage between the first node N1 and the second node N2 reaches a balance, the voltage difference between the two is small, and the drain current between the first node N1 and the second node N2 is effectively suppressed.
When the voltage of the second node N2 is negatively biased by the leakage current and VN2 is less than VN1 to Vth2, the second transistor T2 is turned on and the third transistor T3 is turned off, so that the first power voltage VDD charges positive charges to the second node N2 through the second transistor T2 (i.e., charges positive charges to the second capacitor C2), until VN2= VN1 to Vth2, the second transistor T2 is turned off, and at this time, it can be regarded that the voltages between the first node N1 and the second node N2 reach a balance, and the voltage difference therebetween is small, thereby effectively suppressing the leakage current between the first node N1 and the second node N2.
In this embodiment, the voltage difference between the first node N1 and the second node N2 is controlled within the range of (VN 1- | Vth2 |) - (VN 1+ | Vth3 |) by the self-compensation function of the second transistor T2 and the third transistor T3, so that the leakage current from the first node N1 to the second node N2 is effectively suppressed, the stability of the voltage of the first node N1 is ensured, and the flicker phenomenon is prevented under low frequency display.
Fig. 9 is a schematic structural diagram of another pixel circuit provided in the embodiment of the present invention, based on the above technical solution, optionally, the fourth transistor T4, the fifth transistor T5, and the sixth transistor T6 are double-gate transistors, and the double-gate transistors have smaller leakage current than the single-gate transistors, so that the leakage current of the first node N1 can be further reduced.
Alternatively, the first compensation module 140 may have other connection modes. Fig. 10 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present invention, fig. 11 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present invention, and illustrates a specific structure of the pixel circuit shown in fig. 10, and referring to fig. 2 and fig. 10, on the basis of the above technical solutions, the first compensation module 140 includes a first compensation subunit 141 and a second compensation subunit 142; a first end of the first compensation subunit 141 is connected to the second compensation module 180, a second end of the first compensation subunit 141 is connected to the second node N2, and a control end of the first compensation subunit 141 is connected to the first node N1; a first end of the second compensation subunit 142 is connected to the initialization module 130, a second end of the second compensation subunit 142 is connected to the second node N2, and a control end of the second compensation subunit 142 is connected to the first node N1.
Specifically, referring to fig. 11, the first compensating subunit 141 includes a second transistor T2, and the second compensating subunit 142 includes a third transistor T3, where the second transistor T2 is connected between an intermediate node of the sixth transistor T6 and the second node N2, and the third transistor T3 is connected between an intermediate node of the fifth transistor T5 and the second node N2, and compared to the pixel circuit shown in fig. 5, in the pixel circuit shown in fig. 11, the voltage of the intermediate node of the sixth transistor T6 is closer to the first power supply voltage VDD than the voltage of the point M1, and the positive charge leakage rate is greater; the middle node of the fifth transistor T5 is closer to the initialization voltage Vref than the voltage at the point M2, and the drain rate of negative charges is greater. When the drain current at the point M1 is larger than that at the point M2, more negative charges can be supplied to the point M1 to balance the voltage of the second node N2 at the same time by turning on the third transistor T3. When the drain current at the point M1 is smaller than that at the point M2, more positive charges can be supplied to the point M2 to balance the voltage at the second node N2 at the same time by turning on the second transistor T2. In addition, since the second transistor T2 and the third transistor T3 are not directly connected to the first power voltage VDD or the initialization voltage Vref, power consumption increase due to leakage current of the second transistor T2 and the third transistor T3 can be effectively avoided.
Optionally, an embodiment of the present invention further provides a driving method of a pixel circuit, which is used for driving the pixel circuit provided in any embodiment of the present invention. Fig. 12 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention, and with reference to fig. 1 and fig. 12, the driving method of the pixel circuit includes:
and S110, in an initialization stage, controlling the initialization module to transmit the initialization voltage to the first node through the electric leakage suppression module, and initializing the control end of the driving module.
And S120, in the light-emitting stage, controlling the driving module to drive the light-emitting module to emit light, and controlling the first compensation module to respond to the voltage signal conduction of the first node to perform voltage compensation on the second node.
In the technical scheme provided by this embodiment, the adopted pixel circuit includes a driving module, a leakage suppression module, an initialization module, a first compensation module, a first storage module, a second storage module and a light emitting module; the control end and the electric leakage suppression module of the driving module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, and the initialization module is used for transmitting initialization voltage to the first node through the electric leakage suppression module in an initialization stage and initializing the control end of the driving module; the driving module and the light-emitting module are connected between the first power line and the second power line, and the driving module is used for driving the light-emitting module to emit light in a light-emitting stage; the first storage module is connected with the first node and used for storing the voltage of the first node; the second storage module is connected with the second node and used for storing the voltage of the second node; the first compensation module is connected with the second node and used for responding to the voltage signal of the first node and performing voltage compensation on the second node. In the light emitting stage, on one hand, the electric potential of the first node is stabilized by arranging the electric leakage suppression module and the second storage module; on the other hand, the voltage of the second node is self-compensated by arranging the first compensation module, so that the voltage difference between the first node and the second node is reduced, the leakage current is further reduced, the electric leakage phenomenon of the pixel circuit can be improved, and the display effect is improved.
Optionally, fig. 13 is a flowchart of another driving method of a pixel circuit according to an embodiment of the present invention, and with reference to fig. 3 and fig. 13, the driving method includes:
and S110, in an initialization stage, controlling the initialization module to transmit the initialization voltage to the first node through the electric leakage suppression module, and initializing the control end of the driving module.
And S210, in the data writing stage, controlling the data writing module to transmit the data voltage on the data line to the control end of the driving module through the conducted second compensation module.
S121, in a light-emitting stage, controlling the driving module to drive the light-emitting module to emit light, and controlling the first compensation subunit to respond to the voltage signal conduction of the first node to perform positive compensation on the voltage of the second node when the voltage of the second node is negatively biased; when the voltage of the second node is positively biased, the second compensation subunit is controlled to be conducted in response to the voltage signal of the first node, and negative compensation is carried out on the voltage of the second node.
The specific working principle of the driving method of the pixel circuit provided in this embodiment can refer to the description of the pixel circuit in any of the embodiments above, and has the same beneficial effects as those described in any of the embodiments above, and will not be described again here.
Optionally, an embodiment of the present invention further provides a display panel, including the pixel circuit provided in the foregoing embodiment, so that the display panel also has the beneficial effects described in any of the foregoing embodiments. Fig. 14 is a schematic structural diagram of a display panel according to an embodiment of the present invention, in this embodiment, the display panel may be applied to a mobile phone, and may also be applied to any electronic product with a display function, including but not limited to the following categories: the touch screen display system comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like, and the embodiment of the invention is not particularly limited in this respect.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present invention may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired results of the technical solution of the present invention can be achieved.
The above-described embodiments should not be construed as limiting the scope of the invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A pixel circuit, comprising: the device comprises a driving module, a leakage suppression module, an initialization module, a first compensation module, a first storage module, a second storage module and a light-emitting module;
the control end of the driving module and the electric leakage suppression module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, and the initialization module is used for transmitting initialization voltage to the first node through the electric leakage suppression module in an initialization stage and initializing the control end of the driving module; the driving module and the light-emitting module are connected between a first power line and a second power line, and the driving module is used for driving the light-emitting module to emit light in a light-emitting stage;
the first storage module is connected with the first node and used for storing the voltage of the first node; the second storage module is connected with the second node and used for storing the voltage of the second node;
the first compensation module is connected with the second node and used for responding to the voltage signal of the first node and performing voltage compensation on the second node.
2. The pixel circuit according to claim 1, further comprising a second compensation module and a data writing module;
the data writing module is connected between a data line and the first end of the driving module, and the second compensation module is connected between the second end of the driving module and the second node;
the first end of the first storage module is connected with the first power line, the second end of the first storage module is connected with the control end of the driving module in the first node, the first end of the electric leakage suppression module is connected with the first node, the second end of the electric leakage suppression module is connected with the second end of the initialization module in the second node, the first end of the initialization module is connected into the initialization voltage, the first end of the second storage module is connected with the first power line, and the second end of the second storage module is connected with the second node.
3. The pixel circuit of claim 2, wherein the first compensation module comprises a first compensation subunit and a second compensation subunit;
a first end of the first compensation subunit is connected with the first power line, a second end of the first compensation subunit is connected with the second node, and a control end of the first compensation subunit is connected with the first node;
a first end of the second compensation subunit is connected to the initialization voltage, a second end of the second compensation subunit is connected to the second node, and a control end of the second compensation subunit is connected to the first node;
wherein the first compensation subunit and the second compensation subunit are not turned on at the same time.
4. The pixel circuit according to claim 3, wherein the driving module comprises a first transistor, the first compensation subunit comprises a second transistor, and the second compensation subunit comprises a third transistor;
a gate of the second transistor and a gate of the first transistor are connected to the first node, a first pole of the second transistor is connected to the second node, a second pole of the second transistor is connected to the first power supply line, a gate of the third transistor is connected to the first node, a first pole of the third transistor is connected to the second node, and a second pole of the third transistor is connected to the initialization voltage;
the second transistor is of a different channel type than the third transistor.
5. The pixel circuit of claim 3, wherein the first memory module comprises a first capacitor and the second memory module comprises a second capacitor;
a first end of the first capacitor is connected with the first power line, a second end of the first capacitor is connected with the first node, a first end of the second capacitor is connected with the first power line, and a second end of the second capacitor is connected with the second node;
the capacitance value of the first capacitor is larger than that of the second capacitor.
6. The pixel circuit according to claim 3, wherein the leakage suppression module comprises a fourth transistor, the initialization module comprises a fifth transistor, the second compensation module comprises a sixth transistor, and the data write module comprises a seventh transistor; the pixel circuit further comprises a first light-emitting control module and a second light-emitting control module, wherein the first light-emitting control module comprises an eighth transistor, the second light-emitting control module comprises a ninth transistor, and the light-emitting module comprises a light-emitting diode;
a gate of the fourth transistor is connected to a first scan signal, a first pole of the fourth transistor is connected to the first node, a second pole of the fourth transistor is connected to the second node, a gate of the fifth transistor is connected to a second scan signal, a first pole of the fifth transistor is connected to the initialization voltage, a second pole of the fifth transistor is connected to the second node, a gate of the sixth transistor is connected to a third scan signal, a first pole of the sixth transistor is connected to the second end of the driving module, a second pole of the sixth transistor is connected to the second node, a gate of the seventh transistor is connected to the third scan signal, a first pole of the seventh transistor is connected to the data line, and a second pole of the seventh transistor is connected to the first end of the driving module;
a gate of the eighth transistor and a gate of the ninth transistor are both connected to a light emitting control signal, a first pole of the eighth transistor is connected to the first power line, a second pole of the eighth transistor is connected to the first end of the driving module, a first pole of the ninth transistor is connected to the second end of the driving module, a second pole of the ninth transistor is connected to the first pole of the light emitting diode, and a second pole of the light emitting diode is connected to the second power line;
preferably, the fourth transistor, the fifth transistor, and the sixth transistor are double-gate transistors.
7. The pixel circuit of claim 2, wherein the first compensation module comprises a first compensation subunit and a second compensation subunit;
the first end of the first compensation subunit is connected with the second compensation module, the second end of the first compensation subunit is connected with the second node, and the control end of the first compensation subunit is connected with the first node;
a first end of the second compensation subunit is connected with the initialization module, a second end of the second compensation subunit is connected with the second node, and a control end of the second compensation subunit is connected with the first node;
wherein the first compensation subunit and the second compensation subunit are not turned on at the same time.
8. The driving method of the pixel circuit is characterized in that the pixel circuit comprises a driving module, a leakage suppression module, an initialization module, a first compensation module, a first storage module, a second storage module and a light-emitting module; the control end of the driving module and the electric leakage suppression module are connected to a first node, the initialization module and the electric leakage suppression module are connected to a second node, the driving module and the light emitting module are connected between a first power line and a second power line, the first storage module is connected with the first node, the second storage module is connected with the second node, and the first compensation module is connected with the second node;
the driving method of the pixel circuit includes:
in an initialization stage, controlling the initialization module to transmit initialization voltage to the first node through the electric leakage suppression module, and initializing a control end of the driving module;
and in a light-emitting stage, the driving module is controlled to drive the light-emitting module to emit light, and the first compensation module is controlled to respond to the voltage signal conduction of the first node and perform voltage compensation on the second node.
9. The driving method of the pixel circuit according to claim 8, wherein the pixel circuit further comprises a second compensation block and a data writing block, the data writing block is connected between a data line and the first end of the driving block, the second compensation block is connected between the second end of the driving block and the second node;
before the light emitting stage, the driving method of the pixel circuit further includes:
in a data writing stage, controlling the data writing module to transmit the data voltage on the data line to the control end of the driving module through the conducted second compensation module;
the first compensation module comprises a first compensation subunit and a second compensation subunit, wherein a first end of the first compensation subunit is connected with the first power line, a second end of the first compensation subunit is connected with the second node, and a control end of the first compensation subunit is connected with the first node; a first end of the second compensation subunit is connected to the initialization voltage, a second end of the second compensation subunit is connected to the second node, and a control end of the second compensation subunit is connected to the first node;
the step of controlling the first compensation module to respond to the voltage signal conduction of the first node, and performing voltage compensation on the second node specifically includes:
when the voltage of the second node is negatively biased, controlling the first compensation subunit to be switched on in response to the voltage signal of the first node to perform positive compensation on the voltage of the second node;
when the voltage of the second node is positively biased, the second compensation subunit is controlled to respond to the voltage signal conduction of the first node, and negative compensation is carried out on the voltage of the second node.
10. A display panel comprising the pixel circuit according to any one of claims 1 to 7.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211160466.9A CN115497411A (en) | 2022-09-22 | 2022-09-22 | Pixel circuit, driving method thereof and display panel |
| PCT/CN2022/128102 WO2024060355A1 (en) | 2022-09-22 | 2022-10-28 | Pixel circuit and driving method therefor, and display panel |
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| CN202211160466.9A CN115497411A (en) | 2022-09-22 | 2022-09-22 | Pixel circuit, driving method thereof and display panel |
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| WO (1) | WO2024060355A1 (en) |
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| KR101040786B1 (en) * | 2009-12-30 | 2011-06-13 | 삼성모바일디스플레이주식회사 | Pixel and organic light emitting display device using the same |
| KR20150070718A (en) * | 2013-12-17 | 2015-06-25 | 삼성디스플레이 주식회사 | Organic Light Emitting Display Device |
| CN110751927B (en) * | 2019-10-31 | 2021-10-26 | 上海天马有机发光显示技术有限公司 | Pixel driving circuit, driving method thereof, display panel and display device |
| CN110930883B (en) * | 2019-12-12 | 2021-09-10 | 昆山国显光电有限公司 | Display panel and display device |
| KR20220001049A (en) * | 2020-06-26 | 2022-01-05 | 삼성디스플레이 주식회사 | Pixel circuit and display apparatus |
| KR20220014366A (en) * | 2020-07-23 | 2022-02-07 | 삼성디스플레이 주식회사 | Pixel and display device having the same |
| CN114023260A (en) * | 2021-12-07 | 2022-02-08 | 云谷（固安）科技有限公司 | Pixel driving circuit |
| CN113284454A (en) * | 2021-06-30 | 2021-08-20 | 云谷（固安）科技有限公司 | Pixel circuit and display panel |
| CN113707089B (en) * | 2021-09-02 | 2023-06-23 | 合肥维信诺科技有限公司 | Pixel driving circuit, display panel and display device |
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