CN115495159A - Chip multi-hardware domain starting method and device - Google Patents
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
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Abstract
The invention relates to the technical field of chips, in particular to a chip multi-hardware domain starting method and a device, wherein the method comprises the following steps: responding to a starting instruction of a first processor in the first hardware domain, acquiring a first image file from a first storage medium in the first hardware domain and starting the first processor; acquiring storage medium information where a second image file for starting a second hardware domain is located, and recording the information in a public storage area; acquiring the storage medium information from the common storage area in response to a boot instruction of a second processor in the second hardware domain; and based on the storage medium information, acquiring the second image file and starting the second processor, wherein a flexible processor starting mode can be realized in a multi-hardware domain chip, so that the storage space is effectively saved, and the image file is convenient to update and upgrade.
Description
Technical Field
The invention relates to the technical field of chips, in particular to a chip multi-hardware domain starting method and device.
Background
With the rapid development of the technologies of automatic driving and intelligent vehicles, the structure and function of the SoC chip for vehicles are also evolving to be more complex. The vehicle system realizes various functions through a plurality of application domains such as a power domain, a chassis domain, a cabin domain/intelligent information domain, an automatic driving domain and a vehicle body domain, and correspondingly, a plurality of processors are arranged in the vehicle SoC chip to control the application domains. The processors of the chip need to be started through the image files, so the image files of the processors are usually stored in a fixed medium in advance when a vehicle system is designed, and the image files are acquired to start the chip processors when the vehicle system is started. However, the existing chip starting mode is usually fixed when a chip is designed or a vehicle system is built, and is difficult to change again according to actual requirements subsequently, and is difficult to modify or replace when the vehicle system or the image file is subjected to OTA (over the air) upgrading. Therefore, it is necessary to provide a more advanced chip start-up method.
Disclosure of Invention
The present invention is directed to a method and apparatus for starting up multiple hardware domains of a chip, which overcome, at least to some extent, the above-mentioned problems due to the limitations and disadvantages of the related art.
According to an aspect of the present invention, there is provided a multi-hardware domain booting method for a chip, the chip including a first hardware domain and a second hardware domain hardware-isolated from the first hardware domain, the method including:
responding to a starting instruction of a first processor in the first hardware domain, acquiring a first image file from a first storage medium in the first hardware domain and starting the first processor;
acquiring storage medium information where a second mirror image file for starting a second hardware domain is located, and recording the information in a public storage area; wherein the storage medium information is storage information recorded in an uncovered area of the first storage medium when the second image file is saved to a storage medium, and the common storage area is accessible by the first hardware domain and the second hardware domain;
in response to a boot instruction of a second processor in the second hardware domain, obtaining the storage medium information from the common storage area;
and acquiring the second image file and starting the second processor based on the storage medium information.
In an exemplary embodiment, the chip multi-hardware domain booting method further includes:
and saving the second image file for starting the second hardware domain to the storage medium, and recording the storage information of the second image file in the uncovered area of the first storage medium.
In an exemplary embodiment, the first storage medium is an ospi storage medium, and the uncovered region in the first storage medium is a tail region of a DIL image in the ospi storage medium.
In an exemplary embodiment, the common storage area is a general purpose register that is accessible by each hardware domain in the chip.
In an exemplary embodiment, the storage medium of the second image file is an emmc storage medium and/or an SD card storage medium.
In an exemplary embodiment, the storage medium information includes address information of the second image file in the storage medium and address information of the storage medium, and the obtaining the second image file includes:
and accessing the storage medium according to the address information of the storage medium, and acquiring the second image file according to the address information of the second image file in the storage medium.
Another aspect of the present invention provides a multi-hardware domain starting apparatus for a chip, where the chip includes a first hardware domain and a second hardware domain isolated from the first hardware domain, and the apparatus includes:
the first starting module is used for acquiring a first image file from a first storage medium in the first hardware domain and starting a first processor when responding to a starting instruction of the first processor in the first hardware domain;
the first information acquisition module is used for acquiring the information of a storage medium where a second mirror image file of a second hardware domain is started and recording the information in a public storage area; wherein the storage medium information is storage information recorded in an uncovered area of the first storage medium when the second image file is saved to the storage medium, and the common storage area is accessible by the first hardware domain and the second hardware domain;
a second information obtaining module, configured to obtain the storage medium information from the common storage area in response to a start instruction of a second processor in the second hardware domain;
and the second starting module is used for acquiring the second image file based on the storage medium information and starting the second processor.
Another aspect of the present invention provides a chip, which includes the multi-hardware domain starting apparatus as described above.
Another aspect of the present invention provides a computer-readable storage medium, which stores a computer program, and when the computer program is executed by a processor, the computer program implements the above chip multi-hardware domain boot method.
Another aspect of the present invention provides an electronic device, including:
at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the above chip multi-hardware domain boot method.
The invention provides a chip multi-hardware domain starting method and a device, which can write an image file into any available medium according to actual needs when a processor is started, acquire the image file for starting by recording the storage position of the image file, do not need to determine the starting image file and the storage medium of each hardware domain when the chip is designed or a vehicle system is built, and can realize a flexible processor starting mode in a multi-hardware domain chip; on the other hand, the processor can be started by expanding an external storage medium instead of being limited to the storage medium in each hardware domain, so that the storage space can be effectively saved, and the updating and upgrading of the mirror image file are facilitated.
Drawings
FIG. 1 is a flowchart illustrating a method for booting a chip in multiple hardware domains according to an exemplary embodiment of the invention;
FIG. 2 is a diagram illustrating an application scenario of a chip multi-hardware domain booting method according to an exemplary embodiment of the present invention;
fig. 3 is a schematic structural diagram of a chip multi-hardware domain boot apparatus according to an exemplary embodiment of the present invention.
Detailed Description
In order to make the objects, features and advantages of the present invention more obvious and understandable, embodiments and technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Example embodiments and examples, however, may be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments and examples are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments and examples to those skilled in the art. The described features, structures, or characteristics of the invention may be combined in any suitable manner in one or more embodiments and examples. In the following description, numerous specific details are provided to provide a thorough understanding of embodiments and examples of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, devices, steps, and so forth. In other instances, well-known technical solutions have not been shown or described in detail to avoid obscuring aspects of the invention.
Furthermore, the drawings are merely schematic illustrations of the invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and a repetitive description thereof will be omitted. Although the steps of the method of the present invention are depicted in the drawings in a particular order, this does not require or imply that the steps must be performed in this particular order, or that all of the depicted steps must be performed, to achieve desirable results. The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the steps. For example, some steps may be decomposed, some steps may be combined or partially combined, and thus the actual execution order may be changed according to the actual situation. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.
The vehicle system realizes various functions through a modularized structure, including a power domain (safety), a chassis domain (vehicle motion), a cabin domain/intelligent information domain (entertainment information), an automatic driving domain (auxiliary driving), a vehicle body domain (vehicle body electronics) and the like, and the abundant functional modules of the vehicle system also provide new requirements for functional domain division of the chip. Corresponding to the function realization of different application domains, the SoC chip is also divided into a plurality of hardware domains to realize different functions. Wherein, each hardware domain is provided with a processor and a storage medium, and the processor is started through an image file in the storage medium when the chip is started. In the process of starting the chip, the processor in each hardware domain is started through the image file stored in the hardware domain, the image file is already configured in a fixed medium when the system is set in the starting mode, the processor can only be started according to the fixed mode, subsequent change or update and upgrade are not facilitated, and the starting mode is difficult to expand from other storage media.
Based on the above problems in the related art, the present invention provides a method for starting up multiple hardware domains of a chip, where the chip includes a first hardware domain and a second hardware domain that is hardware-isolated from the first hardware domain, and the method includes: responding to a starting instruction of a first processor in the first hardware domain, acquiring a first image file from a first storage medium in the first hardware domain and starting the first processor; acquiring storage medium information where a second image file for starting a second hardware domain is located, and recording the information in a public storage area; wherein the storage medium information is storage information recorded in an uncovered area of the first storage medium when the second image file is saved to a storage medium, and the common storage area is accessible by the first hardware domain and the second hardware domain; acquiring the storage medium information from the common storage area in response to a boot instruction of a second processor in the second hardware domain; and acquiring the second image file and starting the second processor based on the storage medium information. On one hand, the method and the device can write the image file into any available medium according to actual needs when the processor is started, acquire the image file for starting by recording the storage position of the image file, do not need to determine the starting image file and the storage medium of each hardware domain when a chip is designed or a vehicle system is built, and can realize a flexible processor starting mode in a multi-hardware domain chip; on the other hand, the processor can be started by expanding an external storage medium instead of being limited to the storage medium in each hardware domain, so that the storage space can be effectively saved, and the updating and upgrading of the mirror image file are facilitated.
An exemplary embodiment of the present invention provides a method for starting a chip with multiple hardware domains, and fig. 1 is a schematic flow chart of the method for starting the chip with multiple hardware domains in an exemplary embodiment of the present invention; the chip includes a first hardware domain and a second hardware domain that is hardware isolated from the first hardware domain, the method comprising the steps of:
step S11: responding to a starting instruction of a first processor in the first hardware domain, acquiring a first image file from a first storage medium in the first hardware domain and starting the first processor;
the SoC chip is used as a core component to play an important supporting role in a vehicle system, the chip is divided into a plurality of hardware domains corresponding to an application domain of a vehicle, the hardware domains are isolated from each other and perform data interaction in an inter-core communication mode, each hardware domain comprises a corresponding processor, and the processor is started through an image file stored in a medium when the chip is started. The starting instruction of the processor can be an instruction signal automatically sent by a vehicle system according to a preset condition or a starting signal received by a man-machine interaction function. For example, the first hardware domain or the second hardware domain of the SoC chip may correspond to any one of a security domain, a driving domain, a cabin domain, and the like in the vehicle. In an exemplary embodiment, a boot pin of a kunlen 9 series chip may be set to 0 as a start instruction of the chip, where a first hardware domain corresponds to a security domain in a vehicle system, and a first storage medium is an ospi storage medium, and in response to the start instruction, a security domain side acquires an image file from the ospi medium, and starts a processor saf R5 core of the image file.
It is understood that, in the method, the SoC chip may include not only two hardware domains, i.e. the first hardware domain and the second hardware domain, but also three or more hardware domains, that is, the first hardware domain and the second hardware domain do not represent that the number of the hardware domains is limited, and when the chip includes three or more hardware domains, the second hardware domain represents another hardware domain different from the first hardware domain in the plurality of hardware domains. Therefore, the method may be applied to any two hardware domains in a multi-hardware domain chip, and may also be executed multiple times to activate multiple hardware domains in the multi-hardware domain chip, which is not set forth in any limitation of the present invention.
Step S13: acquiring storage medium information where a second mirror image file for starting a second hardware domain is located, and recording the information in a public storage area; wherein the storage medium information is storage information recorded in an uncovered area of the first storage medium when the second image file is saved to the storage medium, and the common storage area is accessible by the first hardware domain and the second hardware domain;
in an exemplary embodiment, the method may further include: and saving the second image file for starting the second hardware domain to the storage medium, and recording the storage information of the second image file in an uncovered area of the first storage medium. Specifically, when a vehicle system is built, all image files do not need to be determined and stored in a fixed medium, the image files are stored in a certain medium according to actual needs in vehicle use, and storage information is recorded in a first medium, so that a hardware domain can be effectively read into the image files when being started. Wherein the storage information may include storage information of the image file in the storage medium and address information for accessing the storage medium, and the acquiring the second image file includes: and accessing the storage medium according to the address information of the storage medium, and acquiring the second image file according to the address information of the second image file in the storage medium.
In an exemplary embodiment, the first storage medium is an opsi (the external-spi flash) storage medium, which belongs to a nor flash, and the storage medium is characterized by low writing and erasing speeds, a complex structure, high cost and small storage capacity, is generally used for storing bootloaders and operating systems or program codes, and can directly run the codes inside a chip; the second storage medium may be an emmc (Embedded multimedia card) storage medium, which is nand flash defined by the physical architecture and access interface and protocol of the storage system based on the Embedded multimedia card. Emmc is an embedded, nonvolatile storage system, mainly comprises flash memory, flash memory controller and Emmc protocol interface, etc., has advantages such as fast, the low cost of simple structure, the memory capacity is great of writing in and erasing, is fit for being used as the storage medium of consumption electronic equipment such as smart mobile phone, panel computer, mobile internet equipment.
In an exemplary embodiment, the first hardware domain corresponds to a security domain in the vehicle system, which requires a higher boot speed as the first boot portion of the vehicle system, so that opsi storage medium may be selected as the first storage medium, through which the boot program may be directly executed on-chip at a faster reading speed; the second hardware domain corresponds to any other application domain in the vehicle system, and correspondingly, the storage medium of the second image file can be an emmc storage medium in the hardware domain and an externally-extended SD card storage medium, which can both provide a larger storage space for the second hardware domain.
In an exemplary embodiment, the common storage area may be a general purpose register accessible to each hardware domain. Each hardware domain in the SoC chip is in an isolated state, because each hardware domain can only access the storage medium of the hardware domain, and does not have the right to access the storage medium in other hardware domains, that is, the second hardware domain cannot directly read the image file from the first storage medium, in order to start the second hardware domain, first, information stored in the first storage medium needs to be transferred to a common storage area, in the common storage area, the first hardware domain can write information into the common storage area, and the second hardware domain can read information from the common storage area, that is, the second hardware domain can access the area. In an exemplary embodiment, the first storage medium is an ospi storage medium, the uncovered area of the ospi storage medium is a tail area of a DIL (DDR initiator and Loader) image, the area is used as a first level of Boot ROM Boot, and OTA upgrade is not performed on the area in a system running process, so that it can be ensured that an image file stored in the area is not always covered by update.
Step S15: in response to a boot instruction of a second processor in the second hardware domain, obtaining the storage medium information from the common storage area;
the start instruction for the processor in the hardware domain may be a start instruction independently issued for each hardware domain, for example, in an SoC chip with multiple hardware domains, respective start instructions are independently sent for a first hardware domain and a second hardware domain, and then a start order of each hardware domain should be preset in the vehicle system, for example, in the case that the second image file storage information is recorded in the first storage medium in the present scheme, the start instruction should be sent to the first hardware domain first, the second image file storage information is read after the first hardware domain is started, and the start instruction is sent to the second hardware domain; in another exemplary embodiment, it may also be that the SoC chip receives a unified boot instruction, and the SoC chip needs to first determine the hardware domain in which the image file is stored, first boot the hardware domain, and then boot the corresponding hardware domain according to the storage information of the image file read from the storage medium of the hardware domain to the other hardware domain.
Step S17: and acquiring the second image file and starting the second processor based on the storage medium information.
The storage medium information obtained from the public storage area comprises storage address information of the image file in the storage medium and address information of the storage medium which accesses the storage medium to read the image file, namely the storage medium can be accessed and the second image file can be read according to the storage medium information, so that the second processor is started according to the second image file. In an exemplary embodiment, the SoC chip for the vehicle is a kunlun 9 series chip, an application scenario of the method is shown in fig. 2, the SoC chip includes a security domain and an application domain, the application domain may be a cockpit domain (car navigation entertainment system) or a driving domain (ADAS/ADS domain controller), and data transmission is performed between the application domains by means of inter-core communication. Before starting a chip, writing an image file of a security domain into an ospi storage medium through an upper computer tool, writing an image file of an application domain into an emmc storage medium or an SD card storage medium, and writing storage information of the image file of the application domain in the emmc storage medium or the SD card into the tail of a DIL (DDR Initializer and Loader) image in the ospi storage medium; the DIL is the first level of Boot ROM Boot, and the position is used as the storage position of the Boot medium information of the application domain, so that OTA upgrade or updating coverage can be realized. The specific process of chip starting comprises the following steps: when the boot pin is set to 0, starting the saf R5 core (arm Cortex-R5 core) at the security domain side from ospi, and defaulting to loading the image file from ospi; the security domain loads the image file from the opsi, reads the application domain starting medium information stored at the tail of the DIL image at the same time, and records the application domain starting medium information in a general register which can be accessed by the security domain and the application domain; when the application domain starts, the startup medium information stored in the general register is read to confirm whether the startup medium information is the emmc or the SD card, then the image file required by subsequent startup is read from the corresponding storage medium, and the startup process is completed according to the image file.
Fig. 3 is a schematic structural diagram of a multi-hardware domain starting apparatus for a chip according to another exemplary embodiment of the present invention; the chip includes a first hardware domain and a second hardware domain that is hardware isolated from the first hardware domain, the apparatus comprising:
a first starting module 30, configured to, in response to a starting instruction of a first processor in the first hardware domain, obtain a first image file from a first storage medium in the first hardware domain and start the first processor;
a first information obtaining module 32, configured to obtain information about a storage medium where a second image file of a second hardware domain is located, and record the information in a common storage area; wherein the storage medium information is storage information recorded in an uncovered area of the first storage medium when the second image file is saved to the storage medium, and the common storage area is accessible by the first hardware domain and the second hardware domain;
a second information obtaining module 34, configured to obtain the storage medium information from the common storage area in response to a start instruction of a second processor in the second hardware domain;
and a second starting module 36, configured to obtain the second image file based on the storage medium information and start the second processor.
Another exemplary embodiment of the present invention provides a chip, where the chip includes the modules of the above chip multi-hardware domain startup device. The details of each module/unit in the above device have been described in detail in the corresponding method section, and are not described herein again. It should be noted that although in the above detailed description several modules or units of the device for action execution are mentioned, such a division is not mandatory. Indeed, the features and functionality of two or more modules or units described above may be embodied in one module or unit, according to embodiments of the invention. Conversely, the features and functions of one module or unit described above may be further divided into embodiments by a plurality of modules or units.
In addition to the above-described methods and apparatus, chips, embodiments of the invention may also be a computer program product comprising computer program instructions which, when executed by a processor, cause the processor to perform the steps in the method according to various embodiments of the invention described in the "exemplary methods" section of this specification above.
The computer program product may write program code for carrying out operations for embodiments of the present invention in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the C language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server.
Another embodiment of the present invention provides an electronic device, which may be used to perform all or part of the steps of the method described in this example embodiment. The device comprises: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to cause the at least one processor to perform steps in a method according to various embodiments of the present invention described in the "exemplary method" section above.
Another implementation of the present invention provides a computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, cause the processor to perform the steps in the method according to various embodiments of the present invention described in the above "exemplary method" of the present specification.
The computer-readable storage medium may take any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may include, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The basic principles of the present invention have been described above with reference to specific embodiments, but it should be noted that the advantages, effects, etc. mentioned in the present invention are only examples and are not limiting, and the advantages, effects, etc. must not be considered to be possessed by various embodiments of the present invention. Furthermore, the foregoing disclosure of specific details is for the purpose of illustration and description and is not intended to be limiting, since the invention is not limited to the specific details described above.
The block diagrams of devices, apparatuses, systems involved in the present invention are only given as illustrative examples and are not intended to require or imply that the connections, arrangements, configurations, etc. must be made in the manner shown in the block diagrams. These devices, apparatuses, devices, systems may be connected, arranged, configured in any manner, as will be appreciated by those skilled in the art. Words such as "including," "comprising," "having," and the like are open-ended words that mean "including, but not limited to," and are used interchangeably therewith. The words "or" and "as used herein mean, and are used interchangeably with, the word" and/or, "unless the context clearly dictates otherwise. The word "such as" is used herein to mean, and is used interchangeably with, the phrase "such as but not limited to".
Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. The invention is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.
It will be understood that the invention is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.
Claims (10)
1. A method for starting up multiple hardware domains of a chip, wherein the chip comprises a first hardware domain and a second hardware domain which is isolated from the first hardware domain by hardware, the method comprising:
responding to a starting instruction of a first processor in the first hardware domain, acquiring a first image file from a first storage medium in the first hardware domain and starting the first processor;
acquiring storage medium information where a second image file for starting a second hardware domain is located, and recording the information in a public storage area; wherein the storage medium information is storage information recorded in an uncovered area of the first storage medium when the second image file is saved to the storage medium, and the common storage area is accessible by the first hardware domain and the second hardware domain;
acquiring the storage medium information from the common storage area in response to a boot instruction of a second processor in the second hardware domain;
and acquiring the second image file and starting the second processor based on the storage medium information.
2. The chip multi-hardware domain boot method of claim 1, further comprising:
and saving the second image file for starting the second hardware domain to a storage medium, and recording the storage information of the second image file in an uncovered area of the first storage medium.
3. The chip multi-hardware domain booting method according to claim 2, wherein the first storage medium is an ospi storage medium, and the uncovered region in the first storage medium is a tail region of a DIL image in the ospi storage medium.
4. The chip multi-hardware domain boot method according to claim 1, wherein the common storage area is a general purpose register, and the general purpose register is accessible by each hardware domain in the chip.
5. The chip multi-hardware domain booting method according to claim 1, wherein a storage medium of the second image file is an emmc storage medium and/or an SD card storage medium.
6. The chip multi-hardware domain booting method according to claim 1, wherein the storage medium information includes address information of the second image file in the storage medium and address information of the storage medium, and the obtaining the second image file includes:
and accessing the storage medium according to the address information of the storage medium, and acquiring the second image file according to the address information of the second image file in the storage medium.
7. A chip multi-hardware domain boot apparatus, wherein the chip comprises a first hardware domain and a second hardware domain that is hardware isolated from the first hardware domain, the apparatus comprising:
the first starting module is used for acquiring a first image file from a first storage medium in the first hardware domain and starting a first processor when responding to a starting instruction of the first processor in the first hardware domain;
the first information acquisition module is used for acquiring the information of a storage medium where a second mirror image file of a second hardware domain is started and recording the information in a public storage area; wherein the storage medium information is storage information recorded in an uncovered area of the first storage medium when the second image file is saved to a storage medium, and the common storage area is accessible by the first hardware domain and the second hardware domain;
a second information obtaining module, configured to obtain the storage medium information from the common storage area in response to a start instruction of a second processor in the second hardware domain;
and the second starting module is used for acquiring the second image file based on the storage medium information and starting the second processor.
8. A chip comprising the chip multi-hardware domain boot apparatus of claim 7.
9. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the chip multi-hardware domain boot method according to any one of claims 1 to 6.
10. An electronic device, comprising:
at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the chip multi-hardware domain boot method of any one of claims 1-6.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211417399.4A CN115495159A (en) | 2022-11-14 | 2022-11-14 | Chip multi-hardware domain starting method and device |
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| CN115857861A (en) * | 2023-03-02 | 2023-03-28 | 上海励驰半导体有限公司 | Display control method, system, chip, electronic device and storage medium |
| CN116088784A (en) * | 2023-02-28 | 2023-05-09 | 南京芯驰半导体科技有限公司 | Image screen projection method, device, electronic equipment, chip, storage medium and vehicle |
| CN116775085A (en) * | 2023-08-17 | 2023-09-19 | 北京芯驰半导体科技有限公司 | Multi-core heterogeneous system-on-chip updating method, device, chip and traffic equipment |
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| CN116737244A (en) | 2023-09-12 |
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