CN115474060B - HEVC parallel accelerated coding method, system, equipment and storage medium - Google Patents
HEVC parallel accelerated coding method, system, equipment and storage medium Download PDFInfo
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Abstract
The invention discloses a HEVC parallel accelerated coding method, a system, equipment and a storage medium, wherein the method acquires a predicted motion vector, takes the predicted motion vector as a starting point and presets a first prediction range of the motion vector; presetting a second prediction range of the motion vector by taking the origin as a starting point; delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform SAD calculation on all motion vectors in a first prediction range and perform SAD calculation on all motion vectors in a second prediction range; when SAD calculation is carried out on motion vectors in HEVC inter-frame coding, if SAD calculation is finished by a plurality of idle threads and the motion vectors are in a first prediction range or a second prediction range, SAD calculation results corresponding to the motion vectors are directly called; the coding unit is coded according to the SAD calculation result. The invention can ensure the quality of video coding and improve the coding speed of HEVC.
Description
Technical Field
The invention relates to the technical field of video coding, in particular to a HEVC parallel accelerated coding method, a HEVC parallel accelerated coding system, HEVC parallel accelerated coding equipment and a HEVC parallel accelerated coding storage medium.
Background
At present, the video coding widely uses the HEVC coding standard, and the coding process of the HEVC coding has higher complexity, so the coding time is longer. Compared with H264 coding, HEVC coding has higher complexity, so that the coding time is also improved while the code rate is reduced, and parallel acceleration is a better method for accelerating the coding time. However, the existing Parallel method generally uses frame-level parallelism, wavefront Parallel Processing (WPP) and the like, the Parallel unit is still a coarse-grained level above a Code Tree Unit (CTU), and the parallelism is still not high enough in a multi-core scene. The industry has less research on finer-grained parallel acceleration methods, and existing researches, such as an intra-frame mode selection parallel method, a parallel method based on a Motion Estimation Region (MER), and the like, all destroy the dependency relationship between adjacent blocks in a coding spatial-temporal domain, and bring about a certain degree of rate-distortion loss, thereby causing low video coding quality.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides an HEVC parallel accelerated coding method, system, device and storage medium, which can ensure the quality of video coding and improve the coding speed of HEVC.
In a first aspect, an embodiment of the present invention provides an HEVC parallel accelerated coding method, where the HEVC parallel accelerated coding method includes:
according to the spatial correlation of a coding tree unit, acquiring a predicted motion vector, taking the predicted motion vector as a starting point, and presetting a first prediction range of the motion vector;
presetting a second prediction range of the motion vector by taking the origin as a starting point;
delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform absolute error and SAD calculation on all motion vectors in the first prediction range to obtain a first SAD data set, and performing absolute error and SAD calculation on all motion vectors in the second prediction range to obtain a second SAD data set;
when absolute error and SAD (sum of absolute difference) calculation is carried out on a motion vector in HEVC (high efficiency video coding) inter-frame coding, if the absolute error and SAD calculation is finished by the idle threads and the motion vector is in the first prediction range or the second prediction range, directly calling the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector;
and coding the coding unit according to the SAD calculation result.
Compared with the prior art, the first aspect of the invention has the following beneficial effects:
in order to ensure the quality of video coding and improve the coding speed of HEVC, a predicted motion vector is obtained according to the spatial correlation of a coding tree unit, and the predicted motion vector is used as a starting point to preset a first prediction range of the motion vector; presetting a second prediction range of the motion vector by taking the origin as a starting point; delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform absolute error and SAD calculation on all motion vectors in a first prediction range to obtain a first SAD data set, and performing absolute error and SAD calculation on all motion vectors in a second prediction range to obtain a second SAD data set; when the absolute error and the SAD are calculated for the motion vector in HEVC inter-frame coding, if the absolute error and the SAD are calculated by a plurality of idle threads and the motion vector is in a first prediction range or a second prediction range, directly calling the SAD calculation result in a first SAD data set or a second SAD data set corresponding to the motion vector; and coding the coding unit according to the SAD calculation result. According to the method, the absolute error and SAD of the motion vector in the range are calculated in advance through the preset prediction range of the motion vector, the SAD calculation result can be directly called under the condition that the absolute error and SAD calculation is finished by a plurality of idle threads and the motion vector is in the first prediction range or the second prediction range, the calculation time can be reduced, and the coding speed of HEVC can be improved.
According to some embodiments of the present invention, the obtaining a predicted motion vector according to a spatial correlation of a coding tree unit, and presetting a first prediction range of the motion vector using the predicted motion vector as a starting point, includes:
according to the spatial correlation of the coding tree unit, calculating and obtaining a predicted motion vector corresponding to the motion vector average value of the coding tree unit coded in the preamble;
presetting a range value MPR, and taking the predicted motion vector (x, y) as a starting point, obtaining a first prediction range of the motion vector as-MPR < = x < = MPR, -MPR < = y < = MPR.
According to some embodiments of the invention, the presetting of the second prediction range of the motion vector with the origin as the starting point comprises:
presetting a range value MPR, and taking an origin as a starting point, wherein a second prediction range for obtaining the motion vector is-MPR < =0 < = MPR, -MPR < =0 < = MPR.
According to some embodiments of the present invention, after the preset multiple idle threads perform the absolute error and SAD calculation on all motion vectors in the first prediction range to obtain a first SAD data set, and perform the absolute error and SAD calculation on all motion vectors in the second prediction range to obtain a second SAD data set, the HEVC parallel accelerated coding method further comprises:
dividing the coding tree unit into a plurality of coding units in a quadtree recursion mode, and setting a completion flag bit for each coding unit;
if the absolute errors and SAD calculation of all the motion vectors in the first prediction range is finished through presetting the idle threads; and finishing the absolute error and SAD calculation of all motion vectors in the second prediction range, and setting the finishing flag bit to be 1;
and if the absolute error sum SAD calculation of all the motion vectors in the first prediction range is not completed or the absolute error sum SAD calculation of all the motion vectors in the second prediction range is not completed by presetting the idle threads, setting the completion flag bit to be 0.
According to some embodiments of the present invention, if the absolute error sum SAD calculation of all motion vectors in the first prediction range is not completed or the absolute error sum SAD calculation of all motion vectors in the second prediction range is not completed by presetting the idle threads, after setting the completion flag to 0, the HEVC parallel accelerated coding method further comprises:
and if the completion flag bits of the continuous coding units are 0 after delaying the coding units, stopping the absolute error and SAD calculation, and binding more idle threads in the next coding tree unit than the previous coding tree unit.
According to some embodiments of the present invention, before directly invoking SAD calculation results in the first SAD data set or the second SAD data set corresponding to the motion vector when absolute error and SAD calculation is performed on the motion vector in HEVC inter coding and if the idle threads have completed absolute error and SAD calculation and the motion vector is in the first prediction range or the second prediction range, the HEVC parallel accelerated coding method further comprises:
and if the plurality of idle threads do not complete the absolute error and SAD calculation or the motion vector is not in the first prediction range or the second prediction range, performing the absolute error and SAD calculation.
In a second aspect, an embodiment of the present invention further provides an HEVC parallel accelerated coding system, where the HEVC parallel accelerated coding system includes:
a first prediction range obtaining module, configured to obtain a predicted motion vector according to spatial correlation of a coding tree unit, and preset a first prediction range of the motion vector with the predicted motion vector as a starting point;
a second prediction range obtaining module, configured to preset a second prediction range of the motion vector with the origin as a starting point;
the absolute error sum calculation module is used for delaying a plurality of preset coding units, presetting a plurality of idle threads to perform absolute error sum SAD calculation on all motion vectors in the first prediction range to obtain a first SAD data set, and performing absolute error sum SAD calculation on all motion vectors in the second prediction range to obtain a second SAD data set;
the device comprises an absolute error sum calling module and a motion vector calculating module, wherein the absolute error sum calling module is used for directly calling the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector if the absolute error sum SAD calculation is completed by the idle threads and the motion vector is in the first prediction range or the second prediction range when the absolute error sum SAD calculation is carried out on the motion vector in HEVC (high efficiency video coding);
and the coding unit coding module is used for coding the coding unit according to the SAD calculation result.
According to some embodiments of the present invention, the first prediction range acquisition module includes a motion vector calculation unit and a range preset unit, wherein:
the motion vector calculation unit is used for calculating and obtaining a predicted motion vector corresponding to the motion vector average value of the coded coding tree unit according to the spatial correlation of the coding tree unit;
the range presetting unit is configured to preset a range value MPR, and with the predicted motion vector (x, y) as a starting point, obtain a first prediction range of the motion vector as-MPR < = x < = MPR, -MPR < = y < = MPR.
In a third aspect, an embodiment of the present invention further provides an HEVC parallel accelerated coding apparatus, including at least one control processor and a memory, where the memory is used for being connected to the at least one control processor in communication; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform a HEVC parallel accelerated coding method as described above.
In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, where computer-executable instructions are stored, and the computer-executable instructions are configured to cause a computer to execute an HEVC parallel accelerated coding method as described above.
It is to be understood that the advantageous effects of the second aspect to the fourth aspect compared to the related art are the same as the advantageous effects of the first aspect compared to the related art, and reference may be made to the related description of the first aspect, which is not repeated herein.
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The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a flowchart of an HEVC parallel accelerated coding method according to an embodiment of the present invention;
FIG. 2 is a graph of the results of an experiment of temporal reduction and motion vector prediction range according to an embodiment of the present invention;
fig. 3 is a block diagram of an HEVC parallel turbo coding system according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention and are not to be construed as limiting the present invention.
In the description of the present invention, if there are first, second, etc. described, it is only for the purpose of distinguishing technical features, and it is not understood that relative importance is indicated or implied or that the number of indicated technical features is implicitly indicated or that the precedence of the indicated technical features is implicitly indicated.
In the description of the present invention, it should be understood that the orientation or positional relationship referred to, for example, the upper, lower, etc., is indicated based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, but does not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present invention.
In the description of the present invention, it should be noted that unless otherwise explicitly defined, terms such as arrangement, installation, connection and the like should be broadly understood, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.
At present, the video coding widely uses the HEVC coding standard, and the coding process of the HEVC coding has higher complexity, so the coding time is longer. Compared with H264 coding, HEVC coding has higher complexity, so that the coding time is also improved while the code rate is reduced, and parallel acceleration is a better method for accelerating the coding time. However, the existing Parallel method generally uses frame-level parallelism, wavefront Parallel Processing (WPP) and the like, the Parallel unit is still a coarse-grained level above a Code Tree Unit (CTU), and the parallelism is still not high enough in a multi-core scene. In the industry, there are few researches on finer-grained parallel acceleration methods, and existing researches, such as an intra-frame mode selection parallel method, a parallel method based on a Motion Estimation Region (MER), etc., all destroy the dependency relationship between adjacent blocks in a coding time-space domain, and bring about a certain degree of rate distortion loss, thereby causing low video coding quality.
In order to solve the above problems, in order to ensure the quality of video coding and improve the coding speed of HEVC, a predicted motion vector is obtained according to the spatial correlation of a coding tree unit, and the predicted motion vector is used as a starting point to preset a first prediction range of the motion vector; presetting a second prediction range of the motion vector by taking the origin as a starting point; delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform absolute error and SAD calculation on all motion vectors in a first prediction range to obtain a first SAD data set, and performing absolute error and SAD calculation on all motion vectors in a second prediction range to obtain a second SAD data set; when absolute errors and SAD (sum of absolute differences) are calculated for motion vectors in HEVC (high efficiency video coding) interframe coding, if absolute errors and SAD calculations are finished by a plurality of idle threads and the motion vectors are in a first prediction range or a second prediction range, directly calling SAD calculation results in a first SAD data set or a second SAD data set corresponding to the motion vectors; the coding unit is coded according to the SAD calculation result. According to the invention, the prediction range of the motion vector is preset, the absolute error and SAD of the motion vector in the range are calculated in advance, the absolute error and SAD calculation is completed by a plurality of idle threads, and the SAD calculation result can be directly called under the condition that the motion vector is in the first prediction range or the second prediction range, so that the calculation time can be reduced, and the coding speed of HEVC can be improved.
Referring to fig. 1, an embodiment of the present invention provides an HEVC parallel accelerated coding method, where the HEVC parallel accelerated coding method includes:
s100, acquiring a predicted motion vector according to the spatial correlation of the coding tree unit, and presetting a first prediction range of the motion vector by taking the predicted motion vector as a starting point;
step S200, a second prediction range of the motion vector is preset by taking the origin as a starting point;
step S300, delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform absolute error and SAD calculation on all motion vectors in a first prediction range to obtain a first SAD data set, and performing absolute error and SAD calculation on all motion vectors in a second prediction range to obtain a second SAD data set;
step S400, when absolute errors and SAD calculation are carried out on motion vectors in HEVC inter-frame coding, if a plurality of idle threads finish the absolute errors and SAD calculation and the motion vectors are in a first prediction range or a second prediction range, directly calling SAD calculation results in a first SAD data set or a second SAD data set corresponding to the motion vectors;
in step S500, the coding unit is coded according to the SAD calculation result.
In steps S100 to S500 of some embodiments, in order to ensure the quality of video coding and improve the coding speed of HEVC, a predicted motion vector is obtained according to the spatial correlation of a coding tree unit, and a first prediction range of the motion vector is preset with the predicted motion vector as a starting point; presetting a second prediction range of the motion vector by taking the origin as a starting point; delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform absolute error and SAD calculation on all motion vectors in a first prediction range to obtain a first SAD data set, and performing absolute error and SAD calculation on all motion vectors in a second prediction range to obtain a second SAD data set; when the absolute error and the SAD are calculated for the motion vector in HEVC inter-frame coding, if the absolute error and the SAD are calculated by a plurality of idle threads and the motion vector is in a first prediction range or a second prediction range, directly calling the SAD calculation result in a first SAD data set or a second SAD data set corresponding to the motion vector; the coding unit is coded according to the SAD calculation result. According to the method, the absolute error and SAD of the motion vector in the range are calculated in advance through the preset prediction range of the motion vector, the calculation of the absolute error and SAD can be completed by a plurality of idle threads, and the calculation result of the SAD can be directly called under the condition that the motion vector is in the first prediction range or the second prediction range, so that the calculation time can be reduced, and the coding speed of HEVC can be improved.
It should be noted that the preset multiple encoding units of the present embodiment may be modified according to actual needs, and the present embodiment is not limited in particular.
In some embodiments, obtaining the predicted motion vector according to the spatial correlation of the coding tree unit, and using the predicted motion vector as a starting point, presetting a first prediction range of the motion vector comprises:
according to the spatial correlation of the coding tree unit, calculating and obtaining a predicted motion vector corresponding to the motion vector average value of the coding tree unit coded in the preamble;
presetting a range value MPR, and taking the predicted motion vector (x, y) as a starting point, wherein a first prediction range for obtaining the motion vector is-MPR < = x < = MPR, -MPR < = y < = MPR.
It should be noted that the range value in this embodiment may be changed according to actual needs, and this embodiment is not particularly limited.
In some embodiments, the presetting of the second prediction range of the motion vector with the origin as the starting point includes:
and presetting a range value MPR, and taking the origin as a starting point, wherein a second prediction range for obtaining the motion vector is-MPR < =0 < = MPR, -MPR < =0 < = MPR.
It should be noted that the range value in this embodiment may be changed according to actual needs, and this embodiment is not particularly limited.
In some embodiments, after the steps of performing the absolute error sum SAD calculation on all motion vectors in the first prediction range to obtain a first SAD data set and performing the absolute error sum SAD calculation on all motion vectors in the second prediction range to obtain a second SAD data set, the HEVC parallel accelerated coding method further comprises:
dividing the coding tree unit into a plurality of coding units in a quadtree recursion mode, and setting a completion flag bit for each coding unit;
if absolute errors and SAD (sum of absolute differences) of all motion vectors in the first prediction range are calculated through presetting a plurality of idle threads; and finishing the absolute error and SAD calculation of all motion vectors in the second prediction range, and setting a finishing flag bit to be 1;
if the absolute error sum SAD calculation of all the motion vectors in the first prediction range is not completed or the absolute error sum SAD calculation of all the motion vectors in the second prediction range is not completed by presetting a plurality of idle threads, the completion flag is set to 0.
It should be noted that, the preset multiple idle threads in this embodiment may be modified according to actual needs, and this embodiment is not limited in particular.
In some embodiments, if the absolute error sum SAD calculation of all motion vectors in the first prediction range is not completed or the absolute error sum SAD calculation of all motion vectors in the second prediction range is not completed by presetting a plurality of idle threads, after setting the completion flag to 0, the HEVC parallel accelerated coding method further includes:
if the completion flag bit of a plurality of continuous coding units is 0 after delaying a plurality of coding units, stopping the absolute error and SAD calculation, and binding more idle threads in the next coding tree unit than the previous coding tree unit.
In some embodiments, when performing the absolute error and SAD calculation on the motion vector in the HEVC inter-frame coding, if the absolute error and SAD calculation has been completed by a plurality of idle threads and the motion vector is within the first prediction range or the second prediction range, the HEVC parallel accelerated coding method further includes, before directly invoking the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector:
if the absolute error and SAD calculations are not completed by the idle threads or the motion vectors are not within the first prediction range or the second prediction range, then the absolute error and SAD calculations are performed.
To facilitate understanding by those skilled in the art, a set of preferred embodiments is provided below:
a basic coding unit in the HEVC video coding standard is a Coding Tree Unit (CTU), which may be divided into Coding Units (CUs) in a quadtree recursive manner. When a CU is subjected to prediction coding, motion Vectors (MVs) of spatially adjacent blocks of a coding tree unit have strong correlation, and therefore, the HEVC video coding standard proposes Merge and AVMP techniques to perform MV prediction. Only the index value of the best prediction MV needs to be transmitted when encoding, thereby reducing the encoding rate. However, both techniques require the MV of the neighboring coded CU block in the spatial domain to be referenced, and therefore, the CTU can be split into several CUs and can be coded serially only in a zigzag manner.
The embodiment solves the above problems by a parallel accelerated coding method, and specifically includes:
the method comprises the steps of firstly, obtaining a predicted motion vector according to the spatial correlation of a coding tree unit, taking the predicted motion vector as a starting point, and presetting a first prediction range of the motion vector.
Specifically, according to the spatial correlation of the coding tree unit, a predicted motion vector corresponding to the motion vector average value of the coded coding tree unit in the preamble is calculated and obtained; the range value MPR is preset, and starting from the predicted motion vector (x, y), the first prediction range for obtaining the motion vector is-MPR < = x < = MPR, -MPR < = y < = MPR.
The reasons are that: in a video sequence with global motion of a picture, motion vectors between two spatially adjacent CTUs are correlated, and if two CTUs have the same motion characteristics, the MV of a CU in the following CTU may have similar magnitude and direction as the average MV of the preceding CTU. Therefore, according to the motion vector correlation between CTUs, the motion vector start point of the current CTU can be predicted by the MV average value of the previously encoded CTUs in the present embodiment.
And step two, presetting a second prediction range of the motion vector by taking the origin as a starting point.
Specifically, the range value MPR is preset, and the origin is used as a starting point, and the second prediction range for obtaining the motion vector is-MPR < =0 < = MPR, -MPR < =0 < = MPR.
The reason is that: test sequences ParkScene and BasketCallDrive of HEVC video coding are coded through experiments, MV ranges of coded CUs of P frames and B frames are counted, and the probability that the MV ranges are within the range of plus 1 and minus 1 is found to be 16% and the probability that the MV ranges are within the range of plus 5 and minus 5 is about 45% in a video sequence with relatively gentle motion. Therefore, in a smooth motion video sequence, the optimal MV is usually within a small range, and the embodiment uses the origin as the starting point to preset a small range for the motion vector.
And step three, delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform absolute error and SAD calculation on all motion vectors in the first prediction range to obtain a first SAD data set, and performing absolute error and SAD calculation on all motion vectors in the second prediction range to obtain a second SAD data set.
Specifically, a coding tree unit is divided into a plurality of coding units in a quadtree recursion mode, and a completion flag bit is set for each coding unit; if absolute errors and SAD (sum of absolute differences) of all motion vectors in the first prediction range are calculated through presetting a plurality of idle threads; and finishing the absolute error and SAD calculation of all motion vectors in the second prediction range, and setting a finishing flag bit to be 1; if the absolute error sum SAD calculation of all the motion vectors in the first prediction range is not completed or the absolute error sum SAD calculation of all the motion vectors in the second prediction range is not completed by presetting a plurality of idle threads, the completion flag is set to 0. If the completion flag bit of a plurality of continuous coding units is 0 after delaying a plurality of coding units, stopping the absolute error and SAD calculation, and binding more idle threads in the next coding tree unit than the previous coding tree unit. In this embodiment, to implement parallel coding, the absolute error and SAD calculation needs to be performed on MVs in a plurality of preset coding units in advance before formal coding, which specifically includes:
at the time of encoding, a plurality of encoding units N are preset, and absolute error and SAD calculation of motion vectors is performed N CUs after the CTU start time delay. Dividing the coding tree unit into a plurality of coding units in a quadtree recursion mode, setting a completion flag bit for each coding unit, and setting the completion flag bit to be 1 after the absolute error and SAD (sum of absolute differences) of the motion vectors in each preset coding unit are calculated. When formally coding the CU, the SAD calculation result is called only when the flag bit is 1, otherwise, normal coding is directly carried out. If the finishing flag bit of the continuous CUs is 0 after the N CUs, which indicates that the speed of performing the absolute error and SAD calculation on the MVs in the preset multiple coding units in advance is less than the coding speed, stopping performing the absolute error and SAD calculation on the MVs in the preset multiple coding units in advance, and trying to bind more idle threads in the next CTU coding flow to perform the SAD value calculation of the predicted MVs.
In the embodiment, absolute errors and SAD (sum of absolute differences) calculation are performed on MVs in a plurality of preset coding units in advance, so that HEVC parallel accelerated coding is ensured.
And step four, when the absolute error and the SAD are calculated for the motion vector in the HEVC inter-frame coding, if the absolute error and the SAD are calculated by a plurality of idle threads and the motion vector is in the first prediction range or the second prediction range, directly calling the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector. If the absolute error and SAD calculations are not completed by the idle threads or the motion vectors are not within the first prediction range or the second prediction range, then the absolute error and SAD calculations are performed.
Specifically, when calculating the absolute error and the SAD of a motion vector in HEVC inter-frame coding, if a plurality of idle threads have completed the absolute error and SAD calculation and the motion vector is within a first prediction range or a second prediction range, the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector is directly called. If the absolute error and SAD calculations are not completed by the plurality of idle threads, or the motion vector is not within the first prediction range or the second prediction range, then the absolute error and SAD calculations are performed. For example:
in the normal HEVC mode selection process of a CU according to the HEVC video coding standard, when inter prediction of the Merge mode and the AMVP mode is performed, absolute error and SAD calculation need to be performed on the spatial MV candidate set to obtain the best candidate. In the general inter-frame motion estimation, motion search needs to be performed with the best prediction MV as a starting point, absolute error and SAD calculation needs to be performed, and if the motion vector is in the first prediction range or the second prediction range, the pre-calculated SAD calculation result can be directly called to shorten the motion search time. Wherein, for one motion vector (i, j), the absolute error sum SAD calculation formula for the current frame C and the reference frame R with respect to the block of MxN at one (l, k) position is as follows:
where (x, y) denotes a motion vector, and M and N denote the length and width of the prediction block, respectively.
And step five, coding the coding unit according to the SAD calculation result.
Specifically, after the SAD calculation result is obtained in the above manner, in HEVC video coding, a coding unit may be coded according to the SAD calculation result, and other normal coding processes, and subsequent processes such as a partition mode and a prediction mode may be performed.
It should be noted that other processes, partition modes, prediction modes, and other subsequent processes for performing normal encoding are normal processes required for completing inter-frame encoding in HEVC video encoding, and this embodiment is not described in detail.
For better illustration, this example performs the following experimental analysis:
the motion prediction range MPR is used as a variable, the number of the maximum allocable idle thread resources is 10, the main coding task is a single thread, 100 frames are coded, in the aspect of motion Search, an x265 basic coder is adopted in an experiment, and STAR Search (HM adaptive) is used as a motion Search method for testing. Other experimental parameters were as follows:
the sequence is as follows: parkScene _ 1920xt1080.yuv; a platform: AMD 3700x 16x logical processors.
TABLE 1
Post-coding computation time reduction
Where T _ red represents a time reduction, T _ enc represents an encoding time after acceleration, and T _ ori represents an encoding time of an original encoder during acceleration, the following experimental results can be obtained, as shown in table 1.
Referring to fig. 2, the abscissa is a prediction range and the ordinate is a reduction time value, and a graph of a relationship between a time reduction and a motion vector prediction range is obtained. As is clear from fig. 2, when the motion is gentle, the prediction accuracy of the motion vector having the prediction range of about 5 is high, and a large motion vector is relatively difficult to predict. When the prediction range is 4 or 5, the speed increase of about 20% can be obtained, and the prediction range is increased again, so that the speed increase is not large, and more CPU thread resources are occupied. Therefore, when the moving picture is relatively flat, the technical scheme of the embodiment is utilized to select the motion prediction range to be within 5, so that the coding can be accelerated without influencing the coding quality. Meanwhile, the technical scheme of the embodiment is only parallel acceleration during the inner coding of the CTU, the original parallel methods such as Wavefront level parallel and frame level parallel can still be synchronously performed, and the technical scheme of the embodiment can further reduce the coding time on the basis of the original parallel methods.
Referring to fig. 3, an embodiment of the present invention further provides an HEVC parallel accelerated coding system, which includes a first prediction range obtaining module 100, a second prediction range obtaining module 200, an absolute error sum calculating module 300, an absolute error sum invoking module 400, and a coding unit coding module 500, where:
a first prediction range obtaining module 100, configured to obtain a predicted motion vector according to spatial correlation of a coding tree unit, and preset a first prediction range of the motion vector by using the predicted motion vector as a starting point;
a second prediction range obtaining module 200, configured to preset a second prediction range of the motion vector with the origin as a starting point;
an absolute error sum calculation module 300, configured to delay a plurality of preset coding units, and preset a plurality of idle threads to perform absolute error sum SAD calculation on all motion vectors in a first prediction range to obtain a first SAD data set, and perform absolute error sum SAD calculation on all motion vectors in a second prediction range to obtain a second SAD data set;
the SAD calculation module 400 is configured to, when calculating the absolute error and the SAD of a motion vector in HEVC inter-frame coding, directly call the SAD calculation result in a first SAD data set or a second SAD data set corresponding to the motion vector if a plurality of idle threads have completed the absolute error and SAD calculation and the motion vector is within a first prediction range or a second prediction range;
and an encoding unit encoding module 500 for encoding the encoding unit according to the SAD calculation result.
In some embodiments, the first prediction range acquisition module includes a motion vector calculation unit and a range preset unit, wherein:
the motion vector calculation unit is used for calculating and obtaining a predicted motion vector corresponding to the motion vector average value of the encoding tree unit coded in the preamble according to the spatial correlation of the encoding tree unit;
and the range presetting unit is used for presetting a range value MPR, and taking the predicted motion vector (x, y) as a starting point, wherein the first prediction range for obtaining the motion vector is-MPR < = x < = MPR, -MPR < = y < = MPR.
It should be noted that, since an HEVC parallel accelerated coding system in this embodiment is based on the same inventive concept as the above-mentioned HEVC parallel accelerated coding method, the corresponding contents in the method embodiments are also applicable to the system embodiments, and detailed descriptions thereof are omitted here.
The embodiment of the present invention further provides an HEVC parallel accelerated coding device, including: at least one control processor and a memory for communicative connection with the at least one control processor.
The memory, which is a non-transitory computer readable storage medium, may be used to store non-transitory software programs as well as non-transitory computer executable programs. Further, the memory may include high speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory optionally includes memory located remotely from the processor, and these remote memories may be connected to the processor through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
Non-transitory software programs and instructions required to implement an HEVC parallel accelerated coding method of the above embodiments are stored in a memory, and when executed by a processor, perform an HEVC parallel accelerated coding method of the above embodiments, for example, perform the above-described method steps S100 to S500 in fig. 1.
The above described system embodiments are merely illustrative, wherein the units illustrated as separate components may or may not be physically separate, i.e. may be located in one place, or may also be distributed over a plurality of network elements. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Embodiments of the present invention also provide a computer-readable storage medium storing computer-executable instructions, which are executed by one or more control processors, and may cause the one or more control processors to perform an HEVC parallel accelerated coding method in the above method embodiments, for example, perform the functions of the above described method steps S100 to S500 in fig. 1.
It will be understood by those of ordinary skill in the art that all or some of the steps, systems, and methods disclosed above may be implemented as software, firmware, hardware, or suitable combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on computer readable media, which may include computer storage media (or non-transitory media) and communication media (or transitory media). The term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data, as is well known to those of ordinary skill in the art. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital Versatile Disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information and which can accessed by a computer. In addition, communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and includes any information delivery media as known to those skilled in the art.
While the preferred embodiments of the present invention have been described in detail, it will be understood, however, that the invention is not limited to those precise embodiments, and that various other modifications and substitutions may be affected therein by one skilled in the art without departing from the scope of the invention.
Claims (10)
1. An HEVC parallel accelerated coding method, comprising:
acquiring a predicted motion vector according to the spatial correlation of a coding tree unit, taking the predicted motion vector as a starting point, and presetting a first prediction range of the motion vector;
presetting a second prediction range of the motion vector by taking the origin as a starting point;
delaying a plurality of preset coding units, and presetting a plurality of idle threads to perform absolute error and SAD calculation on all motion vectors in the first prediction range to obtain a first SAD data set, and performing absolute error and SAD calculation on all motion vectors in the second prediction range to obtain a second SAD data set;
when absolute error and SAD (sum of absolute difference) calculation is carried out on a motion vector in HEVC (high efficiency video coding), if absolute error and SAD calculation is finished by the idle threads and the motion vector is in the first prediction range or the second prediction range, directly calling the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector;
and coding the coding unit according to the SAD calculation result.
2. An HEVC parallel accelerated coding method according to claim 1, wherein said obtaining the predicted motion vector according to the spatial correlation of coding tree unit, and using the predicted motion vector as the starting point to preset the first prediction range of the motion vector comprises:
according to the spatial correlation of the coding tree unit, calculating to obtain a predicted motion vector corresponding to the motion vector average value of the coded coding tree unit in the preamble;
presetting a range value MPR, and taking the predicted motion vector (x, y) as a starting point, obtaining a first prediction range of the motion vector as-MPR < = x < = MPR, -MPR < = y < = MPR.
3. HEVC parallel accelerated coding method according to claim 1, wherein said presetting a second prediction range of motion vectors with an origin as a starting point comprises:
presetting a range value MPR, and taking an origin as a starting point, wherein a second prediction range for obtaining the motion vector is-MPR < =0 < = MPR, -MPR < =0 < = MPR.
4. An HEVC parallel accelerated coding method according to claim 1, wherein said predetermined plurality of idle threads perform the absolute error and SAD calculations on all motion vectors within said first prediction range to obtain a first SAD data set, and perform the absolute error and SAD calculations on all motion vectors within said second prediction range, after obtaining a second SAD data set, the HEVC parallel accelerated coding method further comprises:
dividing the coding tree unit into a plurality of coding units in a quadtree recursion mode, and setting a completion flag bit for each coding unit;
if the absolute errors and SAD calculation of all the motion vectors in the first prediction range is finished through presetting the idle threads; and finishing the absolute error and SAD calculation of all motion vectors in the second prediction range, and setting the finishing flag bit to be 1;
and if the absolute error sum SAD calculation of all the motion vectors in the first prediction range is not completed or the absolute error sum SAD calculation of all the motion vectors in the second prediction range is not completed by presetting the idle threads, setting the completion flag bit to be 0.
5. An HEVC parallel accelerated coding method according to claim 4, wherein if the absolute error sum SAD calculation of all motion vectors in the first prediction range is not completed or the absolute error sum SAD calculation of all motion vectors in the second prediction range is not completed by presetting the idle threads, after setting the completion flag to 0, the HEVC parallel accelerated coding method further comprises:
and if the completion flag bits of the continuous coding units are 0 after delaying the coding units, stopping the absolute error and SAD calculation, and binding more idle threads in the next coding tree unit than the previous coding tree unit.
6. An HEVC parallel acceleration coding method according to claim 1, wherein when calculating the absolute error and SAD of a motion vector in HEVC inter-frame coding, if the plurality of idle threads have completed the absolute error and SAD calculation and the motion vector is in the first prediction range or the second prediction range, then the HEVC parallel acceleration coding method further comprises, before directly calling the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector, the method further comprising:
and if the plurality of idle threads do not complete the absolute error and SAD calculation or the motion vector is not in the first prediction range or the second prediction range, performing the absolute error and SAD calculation.
7. An HEVC parallel accelerated coding system, comprising:
a first prediction range obtaining module, configured to obtain a predicted motion vector according to spatial correlation of a coding tree unit, and preset a first prediction range of the motion vector with the predicted motion vector as a starting point;
a second prediction range obtaining module, configured to preset a second prediction range of the motion vector with the origin as a starting point;
the absolute error sum calculation module is used for delaying a plurality of preset coding units, presetting a plurality of idle threads to perform absolute error sum SAD calculation on all motion vectors in the first prediction range to obtain a first SAD data set, and performing absolute error sum SAD calculation on all motion vectors in the second prediction range to obtain a second SAD data set;
the device comprises an absolute error sum calling module and a motion vector calculating module, wherein the absolute error sum calling module is used for directly calling the SAD calculation result in the first SAD data set or the second SAD data set corresponding to the motion vector if the absolute error sum SAD calculation is completed by the idle threads and the motion vector is in the first prediction range or the second prediction range when the absolute error sum SAD calculation is carried out on the motion vector in HEVC (high efficiency video coding);
and the coding unit coding module is used for coding the coding unit according to the SAD calculation result.
8. HEVC parallel accelerated coding system according to claim 7, wherein said first prediction range acquisition module comprises a motion vector calculation unit and a range presetting unit, wherein:
the motion vector calculation unit is used for calculating and obtaining a predicted motion vector corresponding to the motion vector average value of the coded coding tree unit in the preamble according to the spatial correlation of the coding tree unit;
the range presetting unit is configured to preset a range value MPR, and with the predicted motion vector (x, y) as a starting point, obtain a first prediction range of the motion vector, where the first prediction range is-MPR < = x < = MPR, -MPR < = y < = MPR.
9. An HEVC parallel accelerated coding device, comprising at least one control processor and a memory for communicative connection with the at least one control processor; the memory stores instructions executable by the at least one control processor to enable the at least one control processor to perform a HEVC parallel accelerated coding method as claimed in any one of claims 1 to 6.
10. A computer-readable storage medium storing computer-executable instructions for causing a computer to perform the HEVC parallel accelerated coding method of any one of claims 1 to 6.
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