CN115473749B - Method and circuit for realizing network card bypass function based on single chip microcomputer control - Google Patents

Method and circuit for realizing network card bypass function based on single chip microcomputer control Download PDF

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Publication number
CN115473749B
CN115473749B CN202210886617.2A CN202210886617A CN115473749B CN 115473749 B CN115473749 B CN 115473749B CN 202210886617 A CN202210886617 A CN 202210886617A CN 115473749 B CN115473749 B CN 115473749B
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network card
server
driver
relay
singlechip
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CN115473749A (en
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陈江瑞
马晔
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Beijing Shiningda Technology Co ltd
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Beijing Shiningda Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/02Details
    • H04L12/12Arrangements for remote connection or disconnection of substations or of equipment thereof
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06Management of faults, events, alarms or notifications
    • H04L41/0654Management of faults, events, alarms or notifications using network fault recovery
    • H04L41/0663Performing the actions predefined by failover planning, e.g. switching to standby network elements
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Sources (AREA)

Abstract

The application relates to a method and a circuit for realizing a network card bypass function based on single chip microcomputer control, wherein current server state information is obtained through a PCIEX8 network card; analyzing the server state information by a singlechip to determine the real-time state of the server; the singlechip controls the driver according to the real-time state and controls the direction of a power supply through the driver; and switching the network port communication state by changing the power supply direction, thereby controlling the PCIEX8 network card to realize bypass function. The singlechip is additionally arranged on the network card, the singlechip executes the acquired server state and control information and drives the relay to switch the state, so that the switching of the bypass function of the network card is realized when the server fails. Specifically, the SCM is controlled by SMBUS signals, so that the SCM controls the state switching of the relay, a special server is not required to be specially equipped, and the universality of the network card with bypass function is effectively improved.

Description

Method and circuit for realizing network card bypass function based on single chip microcomputer control
Technical Field
The application relates to the field of network security, in particular to a method and a circuit for realizing a network card bypass function based on single chip microcomputer control.
Background
The network security device is generally applied between two or more networks, such as an intranet and an extranet, and an application program in the network security device analyzes a network packet through the network packet to determine whether a threat exists, and forwards the packet according to a certain routing rule. When the network security device fails, bypass needs to be applied to ensure that each network is in a connected state, specifically, two networks are directly and physically connected without passing through the network security device system through a specific trigger state, such as power failure or crash, so that the bypass function belongs to a function necessary in a network security product.
Currently, a network card with bypass function on the market needs to be equipped with a special server to realize the bypass function, and has no universality.
Disclosure of Invention
In view of this, the application provides a method and a circuit for realizing the bypass function of the network card based on the control of the singlechip, and the singlechip control driver is additionally arranged, so that the network card is applicable to different servers, and the universality of the network card is effectively improved.
According to one aspect of the application, a method for realizing a network card bypass function based on single chip microcomputer control is provided, which comprises the following steps:
s100, acquiring current server state information through a PCIEX8 network card;
s200, analyzing the server state information by the singlechip to determine the real-time state of the server;
s300, the singlechip controls a driver according to the real-time state, and controls the direction of a power supply through the driver;
s400, switching the network port communication state by changing the power supply direction, thereby controlling the PCIEX8 network card to realize bypass function.
As an optional implementation manner of the present application, optionally, in step S100, the obtaining, by the pcie x8 network card, current server status information includes:
s110, obtaining PCIEX8 slot information through an SMBUS to realize communication between the PCIEX8 network card and the server;
s120, transmitting the received server state information by the SMBUS signal.
As an optional implementation manner of the present application, optionally, in step S200, the analyzing, by the single chip microcomputer, the server status information, and determining the real-time status of the server includes:
s210, the singlechip receives an I2C control signal sent by the server through the SMBUS and executes the server state information by the singlechip;
s220, the singlechip judges the real-time state of the server according to the server information.
As an optional implementation manner of the present application, optionally, in step S300, the single chip microcomputer controls a driver according to the real-time state, and controls a power direction by the driver, including:
s310, the singlechip controls the driver to output two paths of signals through an IO port according to the received I2C signal;
s320, the two paths of signals respectively control the power supply direction through the MOS tube.
As an optional implementation manner of the present application, optionally, in step S400, the controlling the pcie x8 network card to implement bypass function by changing the power direction includes:
s410, controlling the latching relay to switch states through the change of the power supply direction;
s420, when the power supply direction is the positive direction, the bypass function of the PCIEX8 network card is invalid, and the PCIEX8 network card communicates normally;
and S430, when the power supply direction is the opposite direction, enabling a bypass function of the PCIEX8 network card, and mutually conducting the network ports controlled by the relay with the latch to ensure that the network can be connected to the standby server.
According to another aspect of the application, a circuit for implementing the method for implementing the network card bypass function based on the single chip microcomputer control is provided, which comprises a PCIEX8 network card;
the PCIEX8 network card is integrated with a singlechip, a driver group, a PCIEX8 golden finger and a bypass module;
the number of the single-chip microcomputer is one; the input end of the singlechip is electrically connected with one end of the PCIEX8 golden finger, and the output end of the singlechip is electrically connected with the input end of the driver group; the PCIEX8 golden finger is suitable for introducing server detection state and server control information;
the bypass module comprises PCIE SWITCH, a network card chip set, a relay set and a network card electric port set;
the input end of PCIE SWITCH with PCIEX8 golden finger one end electricity is connected, PCIE SWITCH's output with the input of network card chipset is connected, the output of network card chipset with the input of relay group is connected, the input of relay group still with the output of driver group is connected, the output of relay group with network card electricity mouthful group electricity is connected, wherein, network card electricity mouthful group includes a plurality of network card electricity mouthfuls.
As an optional embodiment of the present application, optionally, the network card chipset includes a first network card chip and a second network card chip;
the first network card chip and the second network card chip are gigabit network card chips.
As an optional embodiment of the present application, optionally, the relay group includes a first relay group, a second relay group, a third relay group, and a fourth relay group;
the input ends of the first relay group and the second relay group are electrically connected with the output end of the first network card chip;
the input ends of the third relay group and the fourth relay group are electrically connected with the output end of the second network card chip;
the first relay group, the second relay group, the third relay group, and the fourth relay group each include eight relays.
As an optional embodiment of the present application, optionally, the driver set includes a first driver, a second driver, a third driver, and a fourth driver;
the first driver is electrically connected with the first relay group, the second driver is electrically connected with the second relay group, the third driver is electrically connected with the third relay group, and the fourth driver is electrically connected with the fourth relay group.
As an optional implementation manner of the application, the device further comprises a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a first resistor and a second resistor;
the sixth pin of the first driver is electrically connected with the G end of the first MOS tube, the D end of the first MOS tube is electrically connected with the G end of the second MOS tube, the D end of the second MOS tube is connected with one end of a first resistor, and the other end of the first resistor is electrically connected with a plurality of first pins of the relays in the first relay group respectively;
the third pin of the first driver is electrically connected with the G end of the third MOS tube, the D end of the third MOS tube is electrically connected with the G end of the fourth MOS tube, the D end of the fourth MOS tube is connected with one end of the second resistor, and the other end of the second resistor is electrically connected with the eighth pins of the relays in the first relay group respectively.
As an optional implementation manner of the present application, optionally, the network card electric port group includes a plurality of network card electric ports, and each four relays are connected to one network card electric port.
According to the invention, the singlechip is additionally arranged on the network card main board, the server sends the control signal to the singlechip, the singlechip controls the state of the relay through the driver according to the acquired server information and the detected real-time state, and particularly, the state of the relay is switched successively when the power supply direction is changed, so that the network card bypass function is triggered when the server fails, and the switching of the network state when the server is abnormal is realized; the single chip microcomputer is controlled through the original SMBUS signal on the network card, and the relay is controlled through the single chip microcomputer, so that a special server is not required to be specially arranged, and the universality of the network card with bypass function is effectively improved.
Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features and aspects of the present application and together with the description, serve to explain the principles of the present application.
Fig. 1 shows a flowchart of a method for implementing a network card bypass function based on single chip microcomputer control in an embodiment of the present application;
FIG. 2 shows a schematic circuit connection diagram of an embodiment of the present application;
FIG. 3 shows another schematic circuit connection diagram of an embodiment of the present application;
fig. 4 shows a circuit connection schematic diagram of a pcie x8 golden finger according to an embodiment of the present application;
fig. 5 shows a schematic circuit connection diagram of a single chip microcomputer according to an embodiment of the present application;
FIG. 6 shows a schematic diagram of the circuit connections of a first driver according to an embodiment of the present application;
fig. 7 shows a schematic circuit connection diagram of a first driver controlling a first relay group according to an embodiment of the present application;
fig. 8 shows a schematic circuit connection diagram of four relays in the first relay group of the embodiment of the present application;
fig. 9 shows a schematic diagram of network card electrical port connection according to an embodiment of the present application;
fig. 10 is a schematic diagram illustrating a working process of a bypass network card when a server in an embodiment of the present application is powered on;
FIG. 11 is a schematic diagram showing a network card bypass control process by a singlechip in a restarting process of a server according to an embodiment of the present application;
fig. 12 is a schematic diagram of a network card bypass control process by a singlechip in a server outage process according to an embodiment of the present application.
Detailed Description
Various exemplary embodiments, features and aspects of the present application will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers indicate identical or functionally similar elements. Although various aspects of the embodiments are illustrated in the accompanying drawings, the drawings are not necessarily drawn to scale unless specifically indicated.
It should be understood, however, that the terms "center," "longitudinal," "transverse," "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counter-clockwise," "axial," "radial," "circumferential," and the like indicate or are based on the orientation or positional relationship shown in the drawings, and are merely for convenience of description or to simplify the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be configured and operated in a particular orientation, and therefore should not be construed as limiting the present application.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more such feature. In the description of the present application, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.
The word "exemplary" is used herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
In addition, numerous specific details are set forth in the following detailed description in order to provide a better understanding of the present application. It will be understood by those skilled in the art that the present application may be practiced without some of these specific details. In some instances, methods, means, elements, and circuits have not been described in detail as not to unnecessarily obscure the present application.
The present application will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.
As shown in FIG. 1, the invention provides a method for realizing a network card bypass function based on single chip microcomputer control, which comprises the following steps: s100, acquiring current server state information through a PCIEX8 network card; s200, analyzing the server state information by the singlechip to determine the real-time state of the server; s300, the singlechip controls a driver according to the real-time state, and controls the direction of a power supply through the driver; s400, switching the network port communication state by changing the power supply direction, thereby controlling the PCIEX8 network card to realize bypass function.
In this embodiment, the connected server information is obtained through the pcie x8 network card motherboard, the server state at this time is determined according to the obtained server information, and the detected server information is executed according to the singlechip set on the pcie x8 network card motherboard, so as to control the relay switching state, thereby ensuring that the pcie x8 network card implements bypass function when the server fails. It should be noted that, the relay is controlled by the singlechip, so that a special server is not required to be equipped, and the universality of the network card can be effectively improved. Specifically, server information is introduced from a PCIE 8 golden finger to the singlechip, a PRSNT signal is used as a PCIEX8 network card plug-in card detection signal, when the PRSNT signal is in a low level, the PCIEX8 network card is plugged into a corresponding slot, signal transmission with the server is established, meanwhile, SMB_IPMB_SCL and SMB_IPMB_SDA signals are transmitted to the singlechip through an SMCLK pin and an SMDAT pin, and the singlechip analyzes the state information of the server. In a specific embodiment of the present invention, in step S100, the obtaining, by the pcie x8 network card, current server status information includes: s110, obtaining PCIEX8 slot information through an SMBUS to realize communication between the PCIEX8 network card and the server; s120, transmitting the received server state information by the SMBUS signal.
In this embodiment, the pcie x8 network card is matched with the pcie x8 slot phase, so that information can be conveniently exchanged between the pcie x8 network card and the server, the original SMBUS signal on the pcie x8 network card controls the single chip microcomputer, and the single chip microcomputer executes the server information accordingly, thereby achieving the purpose that the pcie x8 network card receives the server information. The PA10_RX and PA9_TX of the singlechip are used as signal input/output interfaces for signal transmission.
In a specific embodiment of the present invention, in step S200, the analyzing, by the singlechip, the server status information, and determining the real-time status of the server includes: s210, the singlechip receives an I2C control signal sent by the server through the SMBUS and executes the server state information by the singlechip; s220, the singlechip judges the real-time state of the server according to the server information.
In this embodiment, the server information is directly transmitted into the single chip microcomputer from the SMBUS signal, the single chip microcomputer analyzes after receiving the SMBUS signal, determines whether the server state is normal at this time, and judges whether to start the network card bypass function, and it should be noted that the SMBUS signal on the pcie x8 network card controls the single chip microcomputer, and the single chip microcomputer executes to obtain the state and the control information from the server, so that the network card has universality, and in particular, the PA9 pin of the single chip microcomputer transmits the usarto_tx signal, and the PA10 pin receives the usarto_rx signal.
In a specific embodiment of the present invention, in step S300, the single chip microcomputer controls the driver according to the real-time status, and the driver controls the power direction, including: s310, the singlechip controls the driver to output two paths of signals through an IO port according to the received I2C signal; s320, the two paths of signals respectively control the power supply direction through the MOS tube.
In this embodiment, the singlechip controls the drivers through five paths of IO ports according to the received I2C signals, wherein one path of signals is an enable signal to control each driver to be effective, and the other four paths of signals respectively control four drivers. Specifically, the control driver outputs two paths of signals, the level directions of the two paths of signals are always opposite, the four drivers comprise a VCC end and a GND end, the VCC end is connected with a power supply, the GND end is grounded, and the 1Y end and the 2Y end respectively output RELAY_BYPASS_A_DIS and RELAY_BYPASS_A_EN signals.
In a specific embodiment of the present invention, in step S400, the controlling the pcie x8 network card to implement bypass function by changing the power direction includes: s410, controlling the latching relay to switch states through the change of the power supply direction; s420, when the power supply direction is the positive direction, the bypass function of the PCIEX8 network card is invalid, and the PCIEX8 network card communicates normally; and S430, when the power supply direction is the opposite direction, enabling a bypass function of the PCIEX8 network card, and mutually conducting the network ports controlled by the relay with the latch to ensure that the network can be connected to the standby server.
In this embodiment, when the 5V power supply is in the forward direction, the pcie x8 network card communicates normally, but when the 5V power supply is in the reverse direction, the bypass function of the pcie x8 network card is enabled, at this time, eight RJ45 network ports connected to the latching relay are connected to each other in a group, and two ports are mutually connected, so that when the server is abnormal, the network is ensured to be connected to the standby server, and loss caused when the server is abnormal is minimized.
In summary, the specific working process of implementing the bypass network card based on the singlechip during power-on of the server is as follows, as shown in fig. 10, the singlechip starts to supply power from time t1, wherein the power used by the singlechip is a standby power supply of the server, the power starts to supply power from a 12V power supply at time t2, and the relay power starts to supply power at time t3, and the relay power is specifically obtained by DC-DC conversion of the 12V power supply. At time t4, the PCIE reset signal, i.e., pcie_rstn, starts to be high, and at this time, the single-chip microcomputer pins detect the signal, so at time t5, the single-chip microcomputer sends out a bypass_gate_en enable signal, and the relay is controlled by the driver, so that BYPASS of the network card is controlled to be turned on and off, and the network card is realized in a preset manner of the server. And ending the control from the time t6, and stabilizing the network card bypass state.
It should be noted that, during the restarting process of the server, the singlechip controls the network card bypass. As shown in fig. 11, the 12V power supply, the 5V power supply, and the 3.3V power supply are unchanged during the restarting process. When the PCIE reset signal is low, the server state is abnormal, and the singlechip controls the bypass_GATE_EN to switch the BYPASS network card into the abnormal state; when the PCIE reset signal is high, the server normally works at the moment, and the singlechip controls the bypass_GATE_EN to switch the BYPASS network card into a normal state.
Specifically, the bypass control is further implemented on the network card by the singlechip when the server is suddenly powered off, as shown in fig. 12, specifically, when the server is suddenly powered off, the PCIE reset signal becomes low at time t1, the singlechip starts to control the driver and the relay to switch the state of the network card, the 12V power supply is powered off at time t3, the network card state switching is completed at time t4, the relay power supply is powered off at time t5, the network card state switching is completed at this time, and the singlechip power supply is powered off at time t6. Therefore, the singlechip controls the relay through the driver according to the acquired server state, and can realize the network card bypass function when the server fails without being provided with a special server.
As shown in the figure, the invention also provides a circuit for realizing the method for realizing the network card bypass function based on the single chip microcomputer control of any specific embodiment, which comprises a PCIEX8 network card 100; the PCIEX8 network card 100 is integrated with a singlechip 120, a driver group 130, a PCIEX8 golden finger 110 and a bypass module 200; the number of the single-chip microcomputer 120 is one; the input end of the singlechip 120 is electrically connected with one end of the PCIEX8 golden finger 110, and the output end of the singlechip 120 is electrically connected with the input end of the driver group 130; the pcie x8 golden finger 110 is adapted to introduce server detection status and server control information; bypass module 200 includes PCIE SWITCH, network card chipset 220, relay bank 230 and network card port bank 240; the input end of PCIE SWITC H is electrically connected with one end of PCIEX8 golden finger 110, the output end of PCIE SWITCH is electrically connected with the input end of network card chipset 220, the output end of network card chipset 220 is electrically connected with the input end of relay group 230, the input end of relay group 230 is also electrically connected with the output end of driver group 130, the output end of relay group 230 is electrically connected with network card electric port group 240, and the network card electric port group comprises a plurality of network card electric ports.
In this embodiment, the pcie x8 golden finger 110 is connected to the pcie x8 slot, so as to implement communication between the pcie x8 network card and the server, and ensure that server information is transmitted to the single-chip microcomputer 120. Wherein, the singlechip 120 controls the driver to realize the purpose of controlling the relay. When the server state is abnormal, the PCIEX8 network card is introduced by the PCIEX8 golden finger 110, and the server state and the server control information obtained from the server are executed through the singlechip 120, wherein the model of the singlechip 120 is GD32F303-CCT6. The relays used in the relay group 230 are all relays with latch function, and the type is not limited to the G6JU-2P-Y DC4.5, and may be required. The server comprises a first gigabit network card and an external network, wherein the first gigabit network card is directly connected with the external network, the second gigabit network card is directly connected with the external network, and the singlechip 120 controls a relay with a latch through a driver when the server is abnormal, so that the network card bypass function is realized, and network information does not pass through the network card at the moment, thereby preventing the server from being damaged. The network card has universality while guaranteeing the bypass function of the network card.
In one embodiment of the invention, the network card chipset 220 includes a first network card chip 221 and a second network card chip 222; the first network card chip 221 and the second network card chip 222 are gigabit network card chips.
In an embodiment of the invention, the relay unit 230 includes a first relay unit 231, a second relay unit 232, a third relay unit 233, and a fourth relay unit 234; the input ends of the first relay group 231 and the second relay group 232 are electrically connected with the output end of the first network card chip 221; the input ends of the third relay group 233 and the fourth relay group 234 are electrically connected with the output end of the second network card chip 222; the first relay group 231, the second relay group 232, the third relay group 233, and the fourth relay group 234 each include eight relays.
In one embodiment of the invention, the driver set 130 includes a first driver 131, a second driver 132, a third driver 133, and a fourth driver 134; the first driver 131 is electrically connected to the first relay group 231, the second driver 132 is electrically connected to the second relay group 232, the third driver 133 is electrically connected to the third relay group 233, and the fourth driver 133 is electrically connected to the fourth relay group 234.
In this embodiment, the model of the driver is SN74LVC2G126DCUR, and it should be noted that the relay with the latch function can control the communication between the network and the server only if the driver is active and its state changes.
In a specific embodiment of the invention, the device further comprises a first MOS tube Q10, a second MOS tube Q7, a third MOS tube Q8, a fourth MOS tube Q9, a first resistor R169 and a second resistor R172; the sixth pin of the first driver 131 is electrically connected with the G end of the first MOS transistor Q10, the D end of the first MOS transistor Q10 is electrically connected with the G end of the second MOS transistor Q7, the D end of the second MOS transistor Q7 is connected with one end of the first resistor R169, and the other end of the first resistor R169 is electrically connected with the first pins of the plurality of relays in the first relay group 231 respectively; the third pin of the first driver 131 is electrically connected with the G end of the third MOS transistor Q7, the D end of the third MOS transistor Q7 is electrically connected with the G end of the fourth MOS transistor Q9, the D end of the fourth MOS transistor Q9 is connected with one end of the second resistor R172, and the other ends of the second resistors R172 are respectively electrically connected with the eighth pins of the plurality of relays in the first relay group 231.
In this embodiment, the level of p5v_bypass_a_en and p5v_bypass_a_dis are determined by the difference between the level of the first pin and the level of the eighth pin of the relay. Here, when the level of p5v_bypass_a_en is HIGH, that is, the level of the eighth PIN8 of the relay is HIGH, the level of p5v_bypass_a_dis is LOW, that is, the level of the first PIN1 of the relay is LOW, and the server state is abnormal; when the level of p5v_bypass_a_en is LOW, i.e., the level of the eighth PIN8 of the relay is LOW, the level of p5v_bypass_a_dis is HIGH, i.e., the level of the first PIN1 of the relay is HIGH, and the server is in a normal state.
When the level of the first pin and the level of the eighth pin of each relay are different, the relay further comprises a step of connecting a third pin and a second pin of the relay when the level of the eighth pin of each relay is high and a step of connecting a sixth pin and a seventh pin of the relay when the level of the first pin is low, so that the bypass function is realized; when the eighth pin of the relay is at a low level and the first pin is at a high level, the third pin of the relay is connected with the fourth pin, and the sixth pin is connected with the fifth pin, so that the bypass function is realized.
Further, the network card chip integrated on the network card main board is communicated with the external network through each relay, and particularly, the SMBUS signal on the network card controls the singlechip, the singlechip 120 controls the relay to switch, so that when the server state is abnormal and the network card bypass function needs to be started, the singlechip 120 executes the detected signal to control the level of the first pin and the level of the eighth pin of the relay to change, the eighth pin of the relay is high level when the server is abnormal, the first pin is low level, the third pin of the relay is connected with the second pin, the sixth pin is connected with the seventh pin, and the network card bypass function is realized.
In an embodiment of the present invention, the network card port group 240 includes a plurality of network card ports 241, and each four relays are connected to one network card port 241.
In the embodiment, a mode of connecting a plurality of kilomega electric ports with a relay is adopted, and when a server fails, the physical conduction between an external network and the external network is directly realized; wherein, every four relays with latch function are connected with one kilomega electric port RJ45. Here, the gigabit electric port model is JDKA4T826-G/D1, so that when the server is abnormal, the external network and the external network can be directly and physically connected, the network information is controlled not to pass through the network card, and the problem caused by the damage of the server is prevented.
The embodiments of the present application have been described above, the foregoing description is exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the various embodiments described. The terminology used herein was chosen in order to best explain the principles of the embodiments, the practical application, or the improvement of technology in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims (8)

1. The method for realizing the network card bypass function based on the single chip microcomputer control is characterized by comprising the following steps:
s100, acquiring current server state information through a PCIEX8 network card;
s200, analyzing the server state information by the singlechip to determine the real-time state of the server;
s300, the singlechip controls a driver according to the real-time state, and controls the direction of a power supply through the driver;
s400, switching the network port communication state by changing the power supply direction, thereby controlling the PCIEX8 network card to realize bypass function;
in step S300, the single chip microcomputer controls the driver according to the real-time status, and the driver controls the power direction, including:
s310, the singlechip controls the driver to output two paths of signals through an IO port according to the received I2C signal;
s320, the two paths of signals respectively control the power supply direction through MOS tubes;
in step S400, the controlling the pcie x8 network card to implement bypass function by changing the power direction includes:
s410, controlling the latching relay to switch states through the change of the power supply direction;
s420, when the power supply direction is the positive direction, the bypass function of the PCIEX8 network card is invalid, and the PCIEX8 network card communicates normally;
and S430, when the power supply direction is the opposite direction, enabling a bypass function of the PCIEX8 network card, and mutually conducting the network ports controlled by the relay with the latch to ensure that the network can be connected to the standby server.
2. The method for implementing the network card bypass function based on the single-chip microcomputer control according to claim 1, wherein in step S100, the obtaining, by the pcie x8 network card, the current server state information includes:
s110, obtaining PCIEX8 slot information through an SMBUS to realize communication between the PCIEX8 network card and the server;
s120, transmitting the received server state information by the SMBUS signal.
3. The method for implementing the network card bypass function based on the single-chip microcomputer control according to claim 2, wherein in step S200, the single-chip microcomputer analyzes the server state information, and determines the real-time state of the server, including:
s210, the singlechip receives an I2C control signal sent by the server through the SMBUS and executes the server state information by the singlechip;
s220, the singlechip judges the real-time state of the server according to the server information.
4. A circuit for implementing the method for implementing the network card bypass function based on the single chip microcomputer control as claimed in any one of claims 1-3, characterized by comprising a pcie x8 network card;
the PCIEX8 network card is integrated with a singlechip, a driver group, a PCIEX8 golden finger and a bypass module;
the number of the single-chip microcomputer is one; the input end of the singlechip is electrically connected with one end of the PCIEX8 golden finger, and the output end of the singlechip is electrically connected with the input end of the driver group; the PCIEX8 golden finger is suitable for introducing server detection state and server control information;
the bypass module comprises PCIE SWITCH, a network card chip set, a relay set and a network card electric port set;
the input end of PCIE SWITCH with PCIEX8 golden finger one end electricity is connected, PCIE SWITCH's output with the input of network card chipset is connected, the output of network card chipset with the input of relay group is connected, the input of relay group still with the output of driver group is connected, the output of relay group with network card electricity mouthful group electricity is connected, wherein, network card electricity mouthful group includes a plurality of network card electricity mouthfuls.
5. The circuit of claim 4, wherein the network card chipset comprises a first network card chip and a second network card chip;
the first network card chip and the second network card chip are gigabit network card chips.
6. The circuit of claim 5, wherein the relay set comprises a first relay set, a second relay set, a third relay set, and a fourth relay set;
the input ends of the first relay group and the second relay group are electrically connected with the output end of the first network card chip;
the input ends of the third relay group and the fourth relay group are electrically connected with the output end of the second network card chip;
the first relay group, the second relay group, the third relay group, and the fourth relay group each include eight relays.
7. The circuit of claim 6, wherein the set of drivers includes a first driver, a second driver, a third driver, and a fourth driver;
the first driver is electrically connected with the first relay group, the second driver is electrically connected with the second relay group, the third driver is electrically connected with the third relay group, and the fourth driver is electrically connected with the fourth relay group.
8. The circuit of claim 7, further comprising a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a first resistor, and a second resistor;
the sixth pin of the first driver is electrically connected with the G end of the first MOS tube, the D end of the first MOS tube is electrically connected with the G end of the second MOS tube, the D end of the second MOS tube is connected with one end of a first resistor, and the other end of the first resistor is electrically connected with a plurality of first pins of the relays in the first relay group respectively;
the third pin of the first driver is electrically connected with the G end of the third MOS tube, the D end of the third MOS tube is electrically connected with the G end of the fourth MOS tube, the D end of the fourth MOS tube is connected with one end of the second resistor, and the other end of the second resistor is electrically connected with the eighth pins of the relays in the first relay group respectively.
CN202210886617.2A 2022-07-26 2022-07-26 Method and circuit for realizing network card bypass function based on single chip microcomputer control Active CN115473749B (en)

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