CN115473437A

CN115473437A - Control circuit of isolated power supply and isolated power supply

Info

Publication number: CN115473437A
Application number: CN202110656105.2A
Authority: CN
Inventors: 郭艳梅; 朱臻; 陈一辉; 李岳辉; 郜小茹; 缪海峰
Original assignee: Shanghai Bright Power Semiconductor Co Ltd
Current assignee: Shanghai Bright Power Semiconductor Co Ltd
Priority date: 2021-06-11
Filing date: 2021-06-11
Publication date: 2022-12-13

Abstract

The control circuit for controlling the isolated power supply comprises a secondary side control signal generator, a primary side original opening signal generator and a primary side control signal generator. The secondary side control signal generator generates a secondary side switching tube control signal which contains information of the turn-off time of the secondary side synchronous rectifier tube, and the turn-off time is used as a second turn-on time. The primary side original opening signal generator obtains the time of the primary side switching tube to be opened as a first opening time based on the feedback signal. The primary side control signal generator further determines the switching-on time of the primary side switching tube based on the second switching-on time and the later time of the first switching-on time so as to generate the primary side switching tube control signal. The control circuit can effectively prevent the original secondary side switch tube from being penetrated through and does not cause overlarge influence on the precision of feedback regulation.

Description

Control circuit of isolated power supply and isolated power supply

Technical Field

The invention relates to an electronic circuit, in particular to a control circuit of an isolated power supply and the isolated power supply.

Background

Under the background that the importance of environmental protection and energy conservation is continuously promoted at present, the requirement on the power supply efficiency is higher and higher at present. For the switching power supply, it is an effective method to improve efficiency to apply a synchronous rectification switch tube instead of the conventional freewheeling diode. When the power supply is in a continuous inductor current mode (CCM), in the process of controlling the synchronous rectifier, if the synchronous rectifier switching tube and the main switching tube are conducted simultaneously, serious explosion risks may be caused by common connection, and therefore special attention needs to be paid in the design process of the control circuit. For a non-isolated switching power supply, the control of the synchronous rectifier tube can be generally synchronous with the control of the main switching tube, and the design difficulty is not great, but for an isolated switching power supply, because the synchronous rectifier tube is positioned on the secondary side and the main switching tube is positioned on the primary side, the two have different reference grounds, and the control difficulty is higher.

To prevent the common requirement, the following two methods are generally adopted in the prior art to control the synchronous rectifier.

First, independently controlling: the switching on and off of the secondary synchronous rectifier tube does not depend on the control logic of the primary main switching tube, whether the main switching tube is switched on or not is judged by detecting the voltage on the secondary winding, and the secondary synchronous rectifier tube is switched off after the main switching tube is judged to be switched on. The product has the advantages of strong portability and no need of being matched with a primary side controller in an isolated switching power supply. The disadvantages are mainly that the reliability is not high, the common phenomenon is possible to generate under the condition that the load and the input voltage are changed, the current in the common process is limited to avoid the explosion of the engine, and the efficiency is reduced. In addition, synchronous rectification control logic needs to be completed by means of a plurality of different signal detection characteristics, and a detection circuit is sensitive and is easy to interfere.

The second type, synchronous control: the method comprises the steps of transmitting a primary side switching tube signal to a secondary side synchronous rectifier tube controller, delaying a control signal of a primary side main switching tube by a dead time, then driving the primary side switching tube, turning off the synchronous rectifier tube through the control signal of the primary side main switching tube, and then turning on the primary side main switching tube by means of the delayed control signal. The advantages of such products are mainly: the control logic is simple and has higher reliability than independent control. The defects are mainly as follows: the mode for preventing the common phenomenon through delaying has not the highest reliability grade, belongs to open loop control, requires time in the turn-off process of the synchronous rectifier tube, can still have the common phenomenon when the delay time is set unreasonably, and needs to set the delay very high when the common prevention performance is needed to be reliable, so that the feedback control accuracy of the power supply can be influenced. Furthermore, when the power supply system works in a discontinuous current mode, due to the existence of a zero current interval, the turn-off time of the synchronous rectifier tube is separated from the turn-on time of the main switching tube, and no delay is needed to be set to prevent common connection, so that the delay of the control signal of the primary side main switching tube becomes meaningless, and the performance of the power supply is affected.

Therefore, for the isolated power supply, a control scheme is needed to reliably solve the common problem of the main switch and the synchronous rectifier without losing performance.

Disclosure of Invention

The invention provides a control circuit of an isolated power supply and the isolated power supply, which aim to solve the problem that the feedback regulation precision, the transient response capability or the efficiency are lost when a main switching tube and a synchronous rectifier tube are connected in common in the prior art.

One embodiment of the present invention provides a control circuit of an isolated power supply, including: the secondary side control signal generator is used for receiving a voltage signal on a secondary side winding of the isolated power supply and generating a secondary side switching tube control signal, wherein the secondary side switching tube control signal comprises turn-off time information of a secondary side synchronous rectifying tube, and the turn-off time information of the secondary side synchronous rectifying tube is used for controlling the turn-off of the secondary side synchronous rectifying tube; the primary side original opening signal generator receives a feedback signal of the output voltage of the isolation type power supply and generates a primary side original opening time signal to prompt the opening time of the primary side switching tube as a first opening time; and the primary side control signal generator is used for receiving the secondary side switching tube control signal and a primary side original switching-on time signal to generate a primary side switching tube control signal to prompt the switching-on time of a primary side switching tube, wherein the primary side control signal generator determines a second switching-on time based on the secondary side switching tube control signal, the second switching-on time is the switching-off time of the secondary side synchronous rectifying tube, and the primary side switching-on signal generator further determines the switching-on time of the primary side switching tube based on the second switching-on time and the later time of the first switching-on time to generate the primary side switching tube control signal.

Another embodiment of the present invention provides another isolated power supply control circuit, where the isolated power supply control circuit includes: the secondary side driving signal generator is used for receiving a voltage signal on a secondary side winding of the isolation type power supply and generating a secondary side switching tube driving signal, and the secondary side switching tube driving signal is used for controlling the switching-on and switching-off of a secondary side synchronous rectifying tube; the secondary side switching tube turn-off detector is coupled with the secondary side of the isolated power supply and is used for generating a turn-off confirmation signal when the secondary side synchronous rectifier tube is turned off; the primary side original opening signal generator receives a feedback signal of the output voltage of the isolation type power supply and generates a primary side original opening time signal to prompt the opening time of the primary side switching tube to be used as the first opening time; and the primary side control signal generator is used for receiving the turn-off confirmation signal and the primary side original turn-on time signal to generate a primary side switching tube control signal to prompt the turn-on time of the primary side switching tube, wherein the primary side control signal generator determines a second turn-on time based on the turn-off confirmation signal, the second turn-on time is the time for confirming that the secondary side synchronous rectifying tube is turned off, and the primary side turn-on signal generator further determines the turn-on time of the primary side switching tube based on the second turn-on time and the later time of the first turn-on time to generate the primary side switching tube control signal.

Another aspect of the present invention provides an isolated power supply, including: the isolation converter is provided with a primary side and a secondary side, wherein the primary side comprises a primary side switching tube, and the secondary side comprises a secondary side winding and a synchronous rectifying tube; the isolated power supply control circuit is used for controlling the primary side switching tube and the synchronous rectifying tube.

The isolated power supply control circuit comprises an isolated power supply and a control method, wherein the isolated power supply comprises the control circuit, the turn-off time of a secondary synchronous rectifier tube can be independently determined without depending on the detection of the conduction of a primary side switch tube, and then the turn-off time of the secondary synchronous rectifier tube is used as the basis for determining the actual turn-on time of the primary side main switch tube, so that the aim of preventing the through connection can be achieved without delaying the control signal of the primary side main switch tube. Under the environment without punch-through risk, the primary side main switch tube can select the time to be switched on under the action of the feedback control operation of the control feedback loop of the primary side main switch tube in the control circuit, so as to determine the actual switching-on time of the primary side main switch tube without adding any extra delay processing, so that the feedback response and the circuit performance are not influenced by the punch-through prevention design, meanwhile, under the condition that the isolated power supply works in the presence of punch-through risk, the primary side main switch tube can wait for the turn-off of the secondary side synchronous rectifier tube to be switched on only under the condition that the punch-through risk is determined, so that the possibility of punch-through is avoided, meanwhile, the control circuit only determines the individual period with higher punch-through risk, so as to intervene and correct the switching-on time of the primary side main switch tube in a relatively accurate mode, and control the influence on the feedback response performance to a smaller extent.

Drawings

Throughout the following drawings, the same reference numerals indicate the same, similar or corresponding features or functions.

FIG. 1 shows a schematic block diagram of a control circuit 101 according to an embodiment of the invention;

FIG. 2 shows a schematic diagram of a control circuit 101 according to another embodiment of the present invention;

fig. 3 is a block diagram illustrating a schematic structure of a primary-side original on-signal generator 103 according to an embodiment of the present invention;

fig. 4A is a schematic diagram illustrating a specific structure of a primary-side original on-signal generator 103 according to another embodiment of the present invention;

FIG. 4B is a diagram illustrating a specific structure of the oscillator 402 according to the embodiment shown in FIG. 4A;

fig. 5A to 5D are schematic diagrams showing specific configurations of the primary side control signal generator 105 according to the embodiment of the present invention;

FIGS. 6A and 6B illustrate operational waveforms according to the embodiment illustrated in FIGS. 5A-5D;

FIG. 7 is a diagram illustrating the structure of the secondary-side control signal generator 102 according to an embodiment of the present invention;

FIG. 8 is a diagram illustrating a structure of the secondary-side control signal generator 102 according to another embodiment of the present invention;

FIG. 9 is a diagram illustrating a structure of the secondary-side control signal generator 102 according to another embodiment of the present invention;

FIG. 10 is a diagram illustrating a structure of a secondary-side control signal generator 102 according to another embodiment of the present invention;

fig. 11 shows a specific structural diagram of the isolated power supply control circuit 101 according to another embodiment of the present invention;

FIG. 12A shows a schematic diagram of a secondary-side switch-off detector 1101 according to an embodiment of the present invention;

fig. 12B shows a schematic structural diagram of the secondary-side switch-off detector 1101 according to another embodiment of the present invention.

Detailed Description

Specific embodiments of the present invention will be described in detail below, and it should be noted that the embodiments described herein are only for illustration and are not intended to limit the present invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those of ordinary skill in the art that: it is not necessary to employ these specific details to practice the present invention. In other instances, well-known circuits, materials, or methods have not been described in detail in order to avoid obscuring the present invention.

Throughout the specification, reference to "one embodiment," "an embodiment," "one example" or "an example" means: the particular features, structures, or characteristics described in connection with the embodiment or example are included in at least one embodiment of the invention. Thus, the appearances of the phrases "in one embodiment," "in an embodiment," "one example" or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable combination and/or sub-combination in one or more embodiments or examples. Further, those of ordinary skill in the art will appreciate that the illustrations provided herein are for illustrative purposes and are not necessarily drawn to scale. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements present. "time" refers to a specific time point, and "time", such as "on time" and "off time" refers to a specific time segment. Like reference numerals refer to like elements. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first element discussed below could be termed a second element without departing from the teachings of the present inventive concept. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.

Fig. 1 shows a schematic configuration of a control circuit 101 according to an embodiment of the present invention. As shown in fig. 1, the isolated power supply system adopts a flyback power supply topology, and includes a primary side and a secondary side, where the primary side includes a rectifier bridge RB, and an input end of the rectifier bridge RB is coupled to an external ac power supply. In the illustrated embodiment, the primary side further includes a primary winding P1 of the isolation transformer T1 and a primary switching tube Q1. The secondary side includes a secondary winding S1 of the T1 of the isolation transformer and a synchronous rectifier SR. Further, the isolated power supply system 100 may further include an input capacitor Cin located at the primary side, an absorption circuit CR, an output filter capacitor Cout located at the secondary side, and a load 107. Since the basic topology of flyback power supplies is well known to those skilled in the art, it will not be described in detail here.

Next, the isolated power supply control circuit 101 for controlling the isolated power supply system 100 will be described by taking the flyback topology shown in fig. 1 as an example. It should be noted that, although the power supply shown in fig. 1 is a flyback topology, a power supply system applying the isolated power supply control circuit 101 is not limited to the flyback topology, and a person skilled in the art can understand that any isolated power supply topology having a risk that a main switching tube and a synchronous rectifying tube are in common use, such as single-ended forward, dual-tube forward, active clamp forward, resonant half-bridge LLC, resonant full-bridge LLC, phase-shifted full-bridge, and the like, can be adapted to the isolated power supply control circuit 101 shown in the embodiment of the present invention.

As shown in fig. 1, the control circuit 101 of the isolated power supply receives a feedback signal VFB of an output voltage Vout of the isolated power supply 100 and obtains a time K1 of the primary switching tube Q1 to be turned on according to the output voltage feedback signal VFB, and also receives a voltage signal V _ Forw on the secondary winding S1 of the isolated power supply 100 and obtains a time K2 of the secondary synchronous rectifier SR according to the voltage signal V _ Forw of the secondary winding. Here and in the present application, "the instant at which the primary side main switch tube should be turned on" means the instant at which the primary side main switch tube should be turned on, which is derived by using the output voltage feedback signal VFB and other possible feedback parameters, such as the output current feedback signal, and the internal clock signal and/or the feedback loop compensation, based only on the design principle of the feedback control loop of the isolated power supply 100. The "obtaining the time K1 to be turned on of the primary side switching tube Q1" may be that the generated signal directly includes information of the time K1 to be turned on, or may be that the time information included in the signal is subjected to a specific operation, for example, a specific time offset is added or subtracted to obtain a value of the time K1 to be turned on. The "voltage on the secondary winding" is the voltage at the end with the non-fixed potential on the secondary winding, i.e. the voltage at the common connection end of the synchronous rectification switch tube SR and the secondary winding S1. The term "voltage signal on the secondary winding" is defined as a signal that is indicative of the voltage on the secondary winding, for example, a signal formed by passing the voltage on the secondary winding through a voltage divider, or a signal sampled directly from a terminal of non-fixed potential on the secondary winding. The times K1 and K2 are for each switching cycle, and a plurality of times K1 and K2 occur in a plurality of switching cycles. In the embodiment shown in fig. 1, the synchronous rectifier SR is connected between the secondary winding S1 and the secondary ground SGND, and the output voltage VOUT is directly provided at the same-name terminal of the secondary winding, and VOUT is constant in a steady state, so that the different-name terminal of the secondary winding is connected to the synchronous rectifier SR, and the voltage at the different-name terminal is the voltage on the secondary winding. In other embodiments, the synchronous rectifier SR may also be connected between the secondary winding shown in fig. 1 and the output terminal of the isolated power supply 100, where the voltage at the same name terminal is the voltage at the secondary winding.

The control circuit 101 of the isolated power supply further comprises a primary side control signal generator 105, the primary side control signal generator 105 is located on the primary side, the primary side control signal generator 105 further obtains the actual turn-on time of the primary side switching tube Q1 according to the turn-on time K1 of the primary side switching tube Q1 and the turn-off time K2 of the secondary side synchronous rectifying tube, and generates a primary side switching tube control signal PSG, wherein when the turn-on time K1 of the primary side switching tube is later than the turn-off time K2 of the secondary side synchronous rectifying tube, the actual turn-on time of the primary side switching tube Q1 is made to correspond to the turn-on time K1, and when the turn-on time K1 of the primary side switching tube is earlier than the turn-off time K2 of the secondary side synchronous rectifying tube, the actual turn-on time of the primary side switching tube is delayed to be not earlier than the turn-off time K2 of the secondary side synchronous rectifying tube.

The control circuit 101 independently determines the turn-off time K2 of the secondary synchronous rectifier tube, and does not depend on the detection of the conduction of the primary side switch tube, and then the turn-off time K2 of the secondary synchronous rectifier tube is used as the basis for determining the actual turn-on time of the primary side main switch tube, so that the purpose of preventing punch-through can be achieved without delaying the control signal of the primary side main switch tube. Under the environment without the risk of punch-through, for example, when the isolated power supply is in the operating mode of discontinuous inductor current (DCM), or in the operating mode of steady continuous inductor current (CCM), the primary side switching tube Q1 may select the time K1 to be turned on under the feedback control operation of the control feedback loop of the primary side switching tube in the control circuit 101 to determine the actual turn-on time of the primary side main switching tube without any additional delay processing, so that the feedback response and the circuit performance are not affected by the punch-through prevention design, and meanwhile, when the isolated power supply operates under the condition with the risk of punch-through, for example, when a load jump suddenly occurs under the operating mode of continuous inductor current CCM, the primary side switching tube Q1 may wait for the turn-off of the secondary side synchronous rectifier tube to turn on again only under the condition of determining the risk of punch-through, thereby not only eliminating the possibility of punch-through, but also controlling the influence on the feedback response performance at a smaller amplitude because the control circuit determines that the individual cycle with a higher risk of punch-through occurs.

In the illustrated embodiment, the isolated power control circuit 101 is partially connected to the secondary side of the isolated power supply 100 and partially connected to the primary side of the isolated power supply 100.

In one embodiment, the primary side switching tube control signal PSG may be a level signal, for example, a rising edge may prompt to turn on the primary side main switching tube. Further, the primary side switching tube control signal PSG may further include turn-off time information of the primary side switching tube, for example, turn-off of the primary side main switching tube is prompted by a falling edge, so that the primary side switching tube control signal PSG includes all information for controlling the turn-on and turn-off of the primary side switching tube Q1, so as to control the turn-on and turn-off of the primary side switching tube Q1.

Similarly, in the illustrated embodiment, the control circuit 101 may further output a driving signal SRG of the secondary synchronous rectifier for turning on and off the secondary synchronous rectifier SR. The secondary synchronous rectifier drive signal SRG may be generated from the secondary winding voltage signal V _ Forw. A specific manner and circuit configuration of controlling the secondary synchronous rectifier SR will be further described later.

In the illustrated embodiment, the isolated power supply 100 further includes a sensing circuit 106, and the primary control signal generator 105 receives the primary original on-time signal PSC and the secondary control signal SRoff, and generates the primary switching tube driving signal PSG according to the primary switching tube on-time information included in the primary original on-time signal and the secondary switching tube off-time information included in the secondary control signal. When the primary original on-time signal PSC also contains the off-time information of the primary switching tube, the primary control signal generator 105 can directly generate the primary switching tube driving signal PSG by using the primary original on-time signal PSC. When the primary side original on-time signal PSC only includes on-time information of the primary side switching tube, the primary side control signal generator 105 may determine the off-time of the primary side switching tube by combining other suitable feedback signals, such as a signal for detecting a current of the primary side switching tube or a signal for detecting demagnetization of a drain of the primary side switching tube. It will be apparent to those skilled in the art that the design can be made according to specific requirements and feedback characteristics to determine the turn-off time of the primary side switching tube using an appropriate signal, and the invention is not limited thereto.

The sensing circuit 106 is used for sensing the output voltage VOUT on the secondary side to generate the feedback signal VFB. In the illustrated embodiment, the sensing circuit 106 may be located outside the control circuit 101 and be comprised of discrete components. In other embodiments, the sensing circuit 106 may be integrated with the control circuit 101 in a die or chip. The conventional sensing circuit 106 may include a resistor divider, etc., which are well known in the art and will not be described herein.

As shown in fig. 1, the control circuit 101 further includes: and a secondary control signal generator 102, configured to receive a signal V _ Forw of a voltage across a secondary winding of the isolated power supply, and generate a secondary switching tube control signal SRoff, where the secondary switching tube control signal SRoff includes information of a turn-off time K2 of the secondary synchronous rectifier SR, and the information of the turn-off time K2 of the secondary synchronous rectifier SR is used to control turning-off of the secondary synchronous rectifier SR. It will be understood by those skilled in the art that the secondary switch control signal SRoff is not necessarily used to drive the secondary synchronous rectifier SR. In some embodiments, the secondary-side switching tube control signal SRoff may be directly used as the driving signal SRG of the secondary-side synchronous rectifier SR, and acts on the gate of the secondary-side synchronous rectifier SR to turn it off. In other embodiments, SRoff may also be used as an intermediate signal indirectly to generate the driving signal SRG that ultimately drives the secondary synchronous rectifier. In still other embodiments, SRoff may not directly or indirectly generate the driving signal for finally driving the secondary-side synchronous rectifier, and in these embodiments, SRoff may have a common source signal with the driving signal SRG for finally driving the secondary-side synchronous rectifier, where the source signal includes information about the turn-off time K2 of the secondary-side synchronous rectifier SR or includes all parameters for calculating the turn-off time K2 of the secondary-side synchronous rectifier SR. When SRoff occurs before SRG, the turn-off timing K2 of the synchronous rectification tube indicated by SRoff may be slightly earlier than the actual turn-off timing of the secondary synchronous rectification tube, but the object of the present invention can be achieved if SRoff includes the turn-off timing K2 information of the secondary synchronous rectification tube, regardless of the relationship between the secondary switch control signal SRoff and the drive signal SRG for finally driving the secondary synchronous rectification tube.

The secondary control signal generator 102 may use any common independent control method in the prior art to set the turn-off of the synchronous rectifier SR according to the received signal V _ Forw of the voltage on the secondary winding of the isolated power supply, so that the turn-off of the secondary control signal generator 102 does not depend on the conduction detection of the primary switch Q1. As mentioned in the background of the invention, in general, those skilled in the art can select appropriate schemes and parameters according to the prior art, so that when operating in a steady state, the secondary control signal generator 102 can substantially ensure that the synchronous rectifier SR and the primary side switch Q1 are prevented from being shared without additional design of a feedthrough or explosion-proof measure. Moreover, when the isolated power supply 100 operates in the discontinuous inductor current mode, the secondary control signal generator 102 can turn off the synchronous rectifier SR after the inductor current is zero, so as to prevent oscillation after zero crossing caused by continuous turn-on of the synchronous rectifier SR. However, the above design is not effective enough to prevent punch-through and fryer. The secondary-side control signal generator 102 will be described in more detail later.

The control circuit 101 further includes a primary original turn-on signal generator 103, configured to receive a feedback signal VFB of the isolated power output voltage to generate a primary original turn-on time signal PSC to prompt a turn-on time of the primary switching tube, where the primary control signal generator 105 determines a second turn-on time K2 based on a secondary switching tube control signal SRoff, and the second turn-on time K2 is defined as a turn-off time K2 of the secondary synchronous rectifying tube. The primary side control signal generator 105 determines a first switching-on time K1 based on the primary side original switching-on time signal PSC, where the first switching-on time K1 is defined as the time at which the primary side switching tube should be switched on. The primary side control signal generator 105 further determines an actual on time of the primary side switching tube based on the second on time K2 and the later time of the first on time K1 to generate the primary side switching tube control signal PSG.

It should also be noted that, theoretically, the second turn-on time may be completely the same as the turn-off time of the secondary synchronous rectifier tube prompted when the SRoff signal is generated, that is, the second turn-on time is the turn-off time of the secondary synchronous rectifier tube, in practical application, SRoff may be slightly different from the turn-off time of the secondary synchronous rectifier tube prompted when the SRoff signal is generated because of the delay required to be generated due to actual design and routing in the process of comparing the first turn-on time with the second turn-on time by transmitting the secondary control signal generator 102 to the primary control signal generator 105.

In another embodiment as shown in fig. 2, the secondary control signal generator 102 is a secondary controller, and is integrally connected to the secondary side, and the control circuit 101 further includes a secondary switching tube control signal transmitter 108, configured to receive a secondary switching tube control signal SRoff, and transmit the modulated secondary switching tube control signal SRoff from the secondary side to the primary side. Specifically, the secondary switching pipe control signal transmitter 108 may use any conventional primary and secondary isolated communication method, for example, optical coupling, magnetic coupling, or capacitive coupling transmission, or generate a pulse form after modulation by using an on-off keying (OOK) technique to transmit the secondary switching pipe control signal SRoff.

As further shown in fig. 2, the control circuit 101 further includes a primary original switching-on signal transmitter 104, configured to receive the primary original switching-on time signal PSC, and transmit the primary original switching-on time signal PSC to the primary side from the secondary side after being modulated. Specifically, the primary original turn-on signal transmitter 104 may use any common primary and secondary isolation communication method, for example, optical coupling, magnetic coupling, or capacitive coupling transmission, or a pulse form generated after modulation by an on-off keying (OOK) technique, to transmit the primary original turn-on time signal PSC. In addition, the original primary-side opening signal generator can be integrally connected to the secondary side, or a part of circuit is connected to the secondary side and a part of circuit is connected to the primary side.

Fig. 3 shows a specific structural diagram of the primary-side original on-signal generator 103 according to an embodiment of the present invention. The primary side original opening signal generator adopts a Constant On Time (COT) feedback control mode to control a primary side switching tube. Specifically, the primary original turn-on signal generator 103 may include a first comparison module CMP1, where the first comparison module CMP1 compares the feedback signal VFB of the isolated power output voltage with a first reference value Vref1, and when the feedback signal VFB of the isolated power output voltage drops to the first reference value Vref1, generates a comparison signal PSO to prompt that the time is used as the time when the primary main switching tube should be turned on, and the comparison signal PSO may also be directly used as the primary original turn-on time signal PSC.

In further exemplary embodiments, as shown in fig. 3, the comparison signal PSO is used as a basis for the primary original switching-on time signal PSC. As shown in fig. 3, the primary-side original-on signal generator further includes: the first flip-flop RS1 has a set terminal S, a reset terminal R, and an output terminal Q, where the set terminal S receives the comparison signal PSO and the output terminal outputs the original primary turn-on time signal PSC.

The embodiment shown in fig. 3 further includes a primary-side on-time Timer1, the output terminal of which is connected to the reset terminal R of the first flip-flop RS1, and the Timer starts timing according to the comparison signal information, and outputs a reset signal to the reset terminal R of the first flip-flop RS1 after a preset time Tonp elapses. Tonp can be used as the conduction time of the primary side switching tube. It should be noted that the preset time timed by the Timer of the present invention may be a fixed value or a variable value, and here, any signal containing the on-time information of the primary side switching tube may be used to trigger the primary side on-time Timer1 to start timing. For example, the primary side on-time Timer1 may directly receive the PSC at the input end to obtain the on-time information of the primary side switching tube as in the embodiment shown in fig. 3.

Although the embodiment shown in fig. 3 employs a constant on-time feedback control method, it can be understood by those skilled in the art that the primary-side original on-signal generator 103 can employ any feedback control method suitable for controlling the primary-side main switching tube based on the output voltage feedback signal VFB in the prior art, and is not limited to the constant on-time control. For example, fig. 4A shows a schematic diagram of a primary-side original on-signal generator 103 according to another embodiment of the present invention. As shown in fig. 4A, in the primary-side original on-signal generator 103, the primary-side switching tube is controlled in a feedback control manner based on the average value of the output voltage. Specifically, the primary-side original on-signal generator 103 shown in fig. 4A includes: a first error amplifier 401 and an oscillator 402. The first error amplifier 401 performs error amplification on the feedback signal VFB of the isolated power output voltage and a second reference value VREF2, and outputs an error amplification signal EA. The oscillator 402 receives the error amplification signal EA to generate a square wave signal as the primary side switching tube control signal PSC, wherein the frequency of the square wave signal is determined by the error amplification signal EA, the rising edge or the falling edge of the square wave signal prompts the turn-on time of the primary side switching tube, and when the oscillator 402 determines that the edge of the square wave signal should arrive according to the current frequency setting set by the EA.

Fig. 4B shows a schematic diagram of the structure of the oscillator 402 according to the embodiment shown in fig. 4A. The oscillator 402 includes: a frequency setting current source 421 for generating a frequency setting current IFREQ according to the error amplification signal EA; a frequency setting capacitor C1, a first end of which receives the frequency setting current IFREQ and a second end of which is connected with a reference ground SGND; the discharging branch 422, which in the illustrated embodiment includes a discharging control switch Q3 and a discharging resistor R1 connected in series, is connected to two ends C1 of the frequency setting capacitor; the second comparator CMP2 has two input terminals and an output terminal, wherein one input terminal is connected to the first terminal of the frequency setting capacitor C1, the other input terminal receives a first reference voltage Vth, and the output terminal outputs a signal POC while the POC controls the discharge control switch Q3. In some embodiments, the output signal POC can be used as the primary on-time signal PSC. In the embodiment shown in fig. 4B, the oscillator may further include a timer 423, and the timer 423 is used for adjusting the on-time of the signal POC to generate the primary-side original on-time signal PSC, which ultimately affects the on-time of the primary-side switching tube.

The discharging branch 422 is not limited to the structure of the discharging control switch Q3 and the discharging resistor R1 connected in series in the illustrated embodiment, for example, in other embodiments, a discharging current source may be used instead of the discharging resistor R1. The discharging branch is controlled by the signal POC to start or stop discharging, so that the discharging branch 422 and the frequency setting capacitor C1 form a discharging loop with a capacitor time constant. In some embodiments, the time constant of the capacitor can be adjusted by adjusting the resistance of R1 or adjusting the current of the discharging current source, so that the discharging branch 422 can obtain different discharging times according to different requirements, and finally the conducting time of the primary side switching tube corresponding to the primary side original switching-on time signal PSC is affected. It should be noted that, in some embodiments, the primary original on-signal generator 103 may be a secondary controller of the isolated power supply and is connected to the secondary side of the isolated power supply, in other embodiments, the primary original on-signal generator 103 may be partially connected to the secondary side of the isolated power supply and partially connected to the primary side of the isolated power supply, for example, the first trigger RS1 and the primary on-time Timer1 in fig. 3 may be connected to the primary side of the isolated power supply, for example, the first error amplifier 401 in fig. 4 may be connected to the secondary side of the isolated power supply, and the oscillator 402 is connected to the primary side of the isolated power supply, and may modulate the error amplification signal EA or the comparison signal PSO by the primary original on-signal transmitter 104 in fig. 2 and then send the modulated error amplification signal EA or the comparison signal PSO from the secondary side to the primary side.

Fig. 5A shows a schematic configuration of the primary side control signal generator 105 according to an embodiment of the present invention. As shown in fig. 5A, the primary control signal generator 105 may include anti-punch through logic. The anti-punch-through logic circuit receives a primary side original switching-on signal PSC and a secondary side switching tube control signal SRoff (generates a second switching-on time K2), and when the first switching-on time K1 is earlier than the second switching-on time K2, the primary side switching tube control signal is generated based on the secondary side switching tube control signal SRoff, so that the switching-on time of the primary side switching tube in the current period is not earlier than the second switching-on time.

In the embodiment shown in fig. 5A, the control signal of the secondary side switching tube is a level signal, and at this time, the anti-punch-through logic circuit includes a first logic gate, which receives PSC and SRoff, and when the primary side switching tube primary side original on-time signal PSC indicates that the primary side switching tube Q1 should be turned on, and the secondary side switching tube control signal SRoff indicates that the turn-off time K2 of the secondary side synchronous rectifier SR has come, the output end outputs a primary side switching tube on-time signal PON to indicate that the turn-on time of the primary side switching tube comes. In the illustrated embodiment, the first logic gate is a first AND gate AND1, AND has two inputs AND an output, where the first input receives the primary side original on-time signal PSC, the second input receives the inverted signal of the secondary side switch tube control signal SRoff, the output outputs a primary side switch tube on-time signal PON, AND the primary side switch tube on-time signal PON also includes the off-time information of the primary side switch tube Q1. In some embodiments, the primary side switching tube on-time signal PON can be directly used as the primary side switching tube control signal PSG.

In other embodiments, for example, in the embodiment shown in fig. 5B, the on-time signal PON of the primary side switching tube is used as a basis for generating the primary side switching tube control signal PSG. As shown in fig. 5B, the primary side control signal generator further includes: the second flip-flop RS2 has a set terminal S, a reset terminal R, and an output terminal Q, where the set terminal S receives a switching-on time signal PON of the primary side switching tube, and the output terminal outputs a primary side switching tube control signal PSG.

The embodiment shown in fig. 5B further includes a third comparing module, which compares the current Ip flowing through the primary side switching tube with a third reference value Ilimit, an output end of the third comparing module is connected to the reset end R of the second flip-flop RS2, and when the current flowing through the primary side switching tube rises to the third reference value Ilimit, a reset signal is output to the reset end R of the second flip-flop. Specifically, as shown in fig. 5B, the embodiment includes a third comparator CMP3, where the third comparator CMP3 has two input terminals and an output terminal, one of the input terminals receives a current (a primary side current) Ip flowing through the primary side switching tube, the other input terminal receives a third reference value Ilimit, the output terminal is connected to the reset terminal R of the second flip-flop RS2, and when the current flowing through the primary side switching tube rises to the third reference value Ilimit, a reset signal is output to the reset terminal R of the second flip-flop. The primary side switching tube control signal PSG is triggered according to the switching-on time information of the primary side switching tube, after the time Tonp elapses, the current flowing through the primary side switching tube rises to the third reference value Ilimit, and a reset signal is output to the reset terminal R of the second trigger RS2. Tonp can be used as the conduction time of the primary side switching tube, namely the conduction time of the primary side switching tube is obtained by detecting the Q1 peak current. Here, the reset signal may also be provided by a timer, and any signal including information of the on-time of the primary side switching tube may be used to trigger the timer to start timing, the timer outputs a bit signal to the reset terminal R after a preset time, the on-time of the primary side switching tube is the preset time, and the preset time may be a fixed value or a variable value.

Fig. 5C shows a schematic diagram of a specific structure of the primary side control signal generator 105 according to another embodiment of the present invention. The embodiment shown in fig. 5C differs from the embodiment shown in fig. 5A in that the secondary side switching tube control signal SRoff is a pulse signal. At this time, the feedthrough logic circuit further includes a first Latch1 for receiving and latching the secondary switch control signal SRoff and outputting a Latch signal SRL. In the illustrated embodiment, latch1 is an RS flip-flop. Correspondingly, two input ends of a first AND gate AND1 applied as a first logic gate respectively receive a primary original switching-on time signal PSC AND a latch signal SRL, AND the first AND gate AND1 outputs a primary switching tube switching-on time signal PON. In some embodiments, the primary side switching tube on-time signal PON can be directly used as the primary side switching tube control signal PSG.

Further, the primary side switching tube on-time signal PON output by the first AND gate AND1 is further provided to the first Latch1, AND is used to reset the first Latch1 according to the on-time information of the primary side switching tube. Similarly, the signal for resetting the first Latch1 is not limited to the primary side switching tube on-time signal PON, as long as the signal includes on-time information of the primary side switching tube.

In other embodiments, for example, as shown in fig. 5D, the on-time signal PON of the primary side switching tube is used as a basis for generating the primary side switching tube control signal PSG. As shown in fig. 5D, the primary side control signal generator further includes: the second flip-flop RS2 has a set terminal S, a reset terminal R, and an output terminal Q, where the set terminal S receives a switching-on time signal PON of the primary side switching tube, and the output terminal outputs a primary side switching tube control signal PSG. The embodiment shown in fig. 5D is different from the embodiment shown in fig. 5B in that the secondary-side switching tube control signal SRoff is a pulse signal, and other similar structures are not repeated.

Fig. 6A and 6B show waveforms of the operation of the primary side control signal generator 105 according to the embodiment shown in fig. 5A to 5D, which are not exclusive and only illustrate the operation principle of the primary side control signal generator 105, and the description will refer to the parts in fig. 3 and 4. Fig. 6A is a waveform diagram illustrating the operation of the isolated power supply 100 in the continuous current mode. For convenience of description, the primary current Ip and the secondary current Is are combined into the same waveform, referred to herein and hereinafter collectively as "inductor current", and those skilled in the art will understand that the term "inductor current" Is not meant to be a true current in the illustrated embodiment, but rather a combination of the waveforms of the primary current Ip and the secondary current Is. Meanwhile, here and in the following explanation about the waveform diagrams, it is assumed for convenience of explanation that the on-time of the secondary synchronous rectifier tube can be adjusted with load variation. Before the time T1, the load average current is I1, the isolation type power supply 100 is in a stable state, the working condition is ideal, and proper dead time Tdead can be established between the primary side switching tube Q1 and the synchronous rectifier tube SR to prevent the common connection only by the constant conduction time type feedback loop design of the primary side switching tube. At this time, when the feedback signal VFB is lower than the first reference Vref1 AND PSC is high, the synchronous rectifier is turned off, SRoff is low, the output is inverted to the first AND gate AND1 AND set the second flip-flop RS2. The second trigger RS2 outputs PSG with high level to prompt the switching tube on the primary side and the rising of the inductive current VFB. When the current flowing through the primary side switching tube rises to the third reference value Ilimit or the timer finishes timing, the second trigger RS2 is reset, the PSG is turned off at a low level, the synchronous rectifier tube SR is turned on to start follow current, the inductive current drops, and the VFB drops accordingly. In the whole process, SRoff does not influence the conduction time of the primary side switching tube, the theoretical conduction time of the primary side switching tube is K1, the final actual conduction time of the primary side switching tube only depends on PSC transmission to form PSG, so that the inherent delay of the primary side main switching tube in the on state is realized, no extra delay is added, and the feedback performance is excellent. When the time T1 arrives, the load average current rises and jumps from I1 to I2, and at this time, the isolated power supply 100 enters a transient response stage. As the load current rises, VFB rapidly falls to a VREF1 level, PSC jumps to be high, but the secondary synchronous rectifier SR is not turned off yet under the independent control action, SRoff is still high, the reverse phase is low level, at the moment, the first AND gate AND1 outputs low level, until the synchronous rectifier SR reaches the turn-off moment, after the SRoff becomes low, the first AND gate AND1 outputs high level to jump PSG to high level, so that the primary switch tube is turned on, AND the possible problem of punch-through of the primary switch tube is solved. When the transient response is finished at the time of T2 and the steady state is reestablished, the primary side control signal generator returns to the state before the time of T1, and SRoff no longer has actual influence on the PSG.

Fig. 6B is a waveform diagram illustrating the isolated power supply 100 operating in the discontinuous current mode. In discontinuous inductor current mode, the synchronous rectifier SR is turned off after the inductor current is zero to prevent oscillation, and SRoff is simultaneously lowered. Therefore, no matter the isolated power supply 100 is in a steady state or in a transient state due to the jump of load current, because the zero current interval exists, SRoff is lower before VFB drops to VREF1, SRoff does not affect the generation of PSG in an interrupted current mode at all, the theoretical turn-on time of the primary side switching tube is also K1, and thus, in the interrupted inductor current mode, the final actual turn-on time of the primary side switching tube only depends on the inherent delay of PSG formed by PSC transmission to turn on the primary side main switching tube, no additional delay is added, and the feedback performance is excellent.

It should be noted that the PSC signal on duration in fig. 6A and 6B is affected by the Timer1 in fig. 3, or/and is affected by the oscillator in fig. 4A and 4B, and whether the oscillator includes a Timer. Accordingly, the on-duration Tonp of the PSG signal is affected by the on-duration of the PSC signal, and also affected by the third comparing module or the timer in fig. 5A to 5D, and the turn-off time of the PSG signal may be consistent with or inconsistent with the turn-off time of the PSC signal, and of course, the on-duration of the PSC signal and the on-duration of the PSG signal may be generated by other mechanisms besides timing or Q1 peak current detection.

Next, the secondary-side control signal generator 102 is explained, and in one embodiment, the secondary-side control signal generator 102 also adopts a control mode with a constant on-time COT. The secondary control signal generator 102 receives the voltage signal V _ Forw on the secondary winding, prompts the secondary synchronous rectifier to turn on and start timing when the voltage signal V _ Forw on the secondary winding is the same as a fourth reference value VREF4, and generates a secondary switching tube control signal SRoff to prompt the turn-off time K2 of the secondary synchronous rectifier after a first predicted time Tson. The first predicted time Tson may be a fixed value or a variable value. In some embodiments, the secondary-side control signal generator 102 may further determine whether the inductor current of the secondary side crosses zero to enter a zero-current interval according to the voltage signal V _ Forw on the secondary-side winding, and generate the secondary-side switching-tube control signal SRoff to prompt the turn-off time K2 of the secondary-side synchronous rectifier when the zero-current interval is entered, regardless of whether the first predicted time Tson is timed out. Therefore, the SRoff can give consideration to both the CCM and DCM working conditions, the COT mode is adopted for turn-off in the CCM, and the turn-off is carried out in time when the inductive current crosses zero in the DCM.

As mentioned above, the secondary-side switching tube control signal SRoff may further include the turn-on information of the secondary-side synchronous rectifier, so that SRoff can be used as the driving signal of the secondary-side switching tube, and directly used for driving the secondary-side synchronous rectifier, or used for generating the driving signal of the secondary-side synchronous rectifier according to SRoff.

When the constant on-time COT mode is applied for control, in an embodiment, the turn-on information of the secondary synchronous rectifier included in the secondary switching tube control signal SRoff may also be used to prompt the turn-on of the secondary synchronous rectifier to start timing.

Fig. 7 is a schematic diagram of the secondary-side control signal generator 102 according to an embodiment of the invention. As shown in fig. 7, the secondary control signal generator includes a fourth comparator CMP4, a third flip-flop RS3, and a secondary control Timer2. The fourth comparator CMP4 has a first input terminal receiving the voltage signal V _ Forw on the secondary winding, a second input terminal receiving the fourth reference value VREF4, and an output terminal outputting a signal CMP _ S. The third flip-flop RS3 has a set terminal S, a reset terminal R and an output terminal Q, wherein the set terminal S of the third flip-flop is connected to the output terminal of the fourth comparator CMP 4. The secondary control Timer2 has a timing start end and a timing result output end, wherein the timing start end starts timing after prompting the secondary synchronous rectifier to be turned on, and the timing result output end outputs the timing result to the reset end R of the third trigger after a first predicted time Tson.

In the illustrated embodiment, the output signal SRP of the output terminal Q of the third flip-flop RS3 is connected to the timing start terminal of the secondary-side control Timer2, and is used to prompt the secondary-side synchronous rectifier to be turned on to start timing.

In another embodiment, the output signal CMP _ S at the output of the fourth comparator CMP4 may be used to prompt the secondary synchronous rectifier to turn on to start timing. At this time, the output signal CMP _ S of the output terminal of the fourth comparator CMP4 is directly connected to the timing start terminal of the secondary control Timer2.

As mentioned above, any signal containing the turn-off information of the secondary synchronous rectifier can be used as the secondary switch control signal SRoff, for example, in an embodiment, the output signal SRP at the output terminal of the second flip-flop can be used as the secondary switch control signal SRoff.

In another embodiment, the output signal SRPoff of the secondary control Timer2 at the output end of the timing result may be used as the secondary switching tube control signal SRoff, and at this time, the output signal at the output end of the timing result may be a single pulse signal.

In the illustrated embodiment, the secondary control signal generator 102 further comprises: AND a second AND gate AND2 having two input terminals AND an output terminal, the two input terminals being connected to the output terminal of the fourth comparator CMP4 AND the output terminal Q of the third flip-flop, respectively. In the illustrated embodiment, the output signal SRC at the output terminal of the second AND gate AND2 is used as the secondary-side switching transistor control signal SRoff. When the isolated power supply works in a CCM mode, after the synchronous rectifier tube is switched on, V _ Forw is approximately equal to the secondary side ground potential AND is always smaller than VREF4, at the moment, the fourth comparator CMP2 outputs high level to the input end of the second AND gate AND2, the output of the second AND gate AND2 is purely dependent on the output end Q of the third trigger RS3, namely, the timing result determines the output of the second AND gate AND 2. When the isolated power supply works in the DCM mode, if the secondary side control Timer2 does not reach the first expected time Tson AND the inductor current crosses zero, the secondary side may oscillate to make V _ Forw jump to be greater than VREF4, AND at this time, the fourth comparator CMP4 outputs a low level to make the output of the second AND gate AND2 become low immediately, which prompts to turn off the secondary side synchronous rectifier tube.

Further, the secondary-side control signal generator 102 may generate a secondary-side synchronous rectifier driving signal SRG, in the illustrated embodiment, SRC = SRG. In other embodiments, SRG may also be generated indirectly by SRC.

In the illustrated embodiment, in order to make the turn-off time of the secondary synchronous rectifier tube more accurate in a steady state and make the dead time close to the optimum to improve the efficiency, and to make the primary main switching tube capable of being turned on according to the primary corresponding turn-on time under most load conditions and working conditions, and improve the transient response capability, the secondary control signal generator 102 further includes a synchronous rectification time prediction circuit 701 configured to predict the turn-off time of the synchronous rectifier tube so as to variably generate the first predicted time Tson. The output end of the synchronous rectification time prediction circuit 701 outputs information of a first predicted time Tson to the secondary-side control Timer2, where the first predicted time Tson represents the conduction time of the secondary-side synchronous rectification tube. It will be understood by those skilled in the art that any prediction scheme that can predict the turn-off time of the synchronous rectifier (or predict the turn-off time by predicting the turn-on time of the secondary synchronous rectifier) can be applied here. For example, in the illustrated embodiment, an input end of the synchronous rectification time prediction circuit 701 may receive a voltage signal V _ Forw on the secondary winding, generate a first predicted time Tson according to the voltage signal V _ Forw on the secondary winding, and reach the turn-off time of the synchronous rectifier SR after Tson of the synchronous rectifier SR. For another example, in other embodiments, tson may receive the CMP _ S signal via the time prediction circuit to obtain the current switching frequency, and may be generated according to the current switching frequency. The detailed description of the algorithm is omitted here.

Fig. 8 shows a specific structure diagram of the secondary side control signal generator 102 according to another embodiment of the present invention. Compared with the embodiment shown in fig. 2, the isolated power control circuit 101 further includes: the first delay circuit 801 is used for delaying the turn-off of the secondary synchronous rectifier tube to reduce the interval between the turn-off time of the secondary switching tube and the turn-on time of the primary switching tube, wherein the first delay circuit 801 does not delay the turn-off time of the secondary switching tube, which is prompted by the control signal SRoff of the secondary switching tube. In the illustrated embodiment, the first delay circuit 801 receives AND delays the output signal SRC at the output end of the second AND-gate AND2, AND then the output signal SRC is used as the driving signal SRG of the secondary synchronous rectifier, AND when SRC is simultaneously used as the control signal SRoff of the secondary switching tube, the turn-off time of the secondary switching tube prompted by SRoff is earlier than the actual turn-off time of the secondary switching tube, AND the delay set in this way can partially offset the delay generated in the actual turn-on process of the primary main switching tube due to the generation AND transmission of the primary switching tube control signal PSC to the primary side, thereby further optimizing the dead time AND improving the efficiency.

Those skilled in the art will appreciate that in other embodiments, the position of the first delay circuit 801 may be different from that shown in fig. 8, as long as the first delay circuit 801 does not delay the turn-off time of the secondary switch tube indicated by the secondary switch tube control signal SRoff, but only delays the actual turn-off time of the secondary synchronous rectifier tube.

Further, as shown in fig. 9, in another embodiment, the delay time of the first delay circuit 801 is adjustable, and the control circuit 101 further includes a transient determination circuit 802. The transient state determining circuit 802 determines whether a load jump occurs in the isolated power supply, and outputs a transient signal to the first delay circuit to reduce the delay time of the first delay circuit 801 when the transient state determining circuit 802 determines that the load jump occurs.

Under the steady state condition, the actual conduction time of the primary side main switching tube is mainly determined by the time of the primary side main switching tube to be switched on, the dead time is the difference between the prompting time of PSC and the prompting time of SRoff, the dead time is the delay of the PSC transmitted to the primary side to finally switch on the main switching tube, the delay of the first delay circuit 801 is subtracted, the safety margin of the dead time is large, and therefore the dead time can be adjusted to be ideal to improve the efficiency. In the process of load jump, a primary side switch tube may be conducted in advance compared with a steady state, a prompting time of a PSC is basically equal to a prompting time of an SRoff, at this time, if delay parameters in the steady state are continued, a feedthrough risk may be aggravated, and a delay time of the first delay circuit 801 is reduced when a transient state is judged, so that more safety margins may be reserved for a transient state working condition, and meanwhile, as the transient state working condition is lower than the steady state, efficiency is not excessively sacrificed.

Regarding the determination algorithm of the transient determination circuit 802, the related description exists in the prior art, and therefore, the description thereof is omitted here.

Fig. 10 is a schematic diagram illustrating a detailed structure of the secondary-side control signal generator 102 according to still another embodiment of the present invention, in which the delay time of the first delay circuit 801 is adjustable, and the control circuit further includes a dead time detection circuit 803, compared to the embodiment illustrated in fig. 9. The dead time detection circuit 803 is configured to calculate a dead time of the last duty cycle, compare the calculated dead time with a dead time reference Tref _ D, adjust the dead time detection circuit 1303 to decrease the delay time of the first delay circuit 801 when the dead time is smaller than the dead time reference Tref _ D, and adjust the dead time detection circuit 803 to increase the delay time of the first delay circuit 801 when the dead time is larger than the dead time reference Tref _ D. Thus, the real-time response of the dead time detection circuit 803 can ensure that the dead time is always within the target interval, thereby optimizing the efficiency to the maximum.

How to detect the dead time has been designed in the prior art, and the present invention is not described herein again. Those skilled in the art will appreciate that any manner of detecting the dead time can be applied to the embodiment shown in fig. 10 to achieve the corresponding effect.

Fig. 11 shows a schematic diagram of an architecture of the control circuit 101 according to another embodiment of the invention. The control circuit 101 shown in fig. 11 is equally suitable for application to the embodiment shown in fig. 1. Wherein, to avoid repetitive descriptions, the above has been described in the description of the related embodiments shown in fig. 2 to 10, and the schemes and technical features that a person of ordinary skill in the art can easily apply to the embodiment shown in fig. 11 in the same manner will not be repeatedly described but still be a part of the disclosed embodiments of the present invention. Compared with the embodiment shown in fig. 2, the secondary control signal generator 102 of the embodiment shown in fig. 11 receives the signal V _ Forw of the voltage on the secondary winding of the isolated power supply, and generates a signal, which is the secondary synchronous rectifier driving signal SRG for controlling the secondary synchronous rectifier to be turned on and off. The control circuit 101 further comprises a secondary-side switching-tube turn-off detector 1101, coupled to the secondary side of the isolated power supply, for generating a turn-off confirmation signal SRD when the secondary-side synchronous rectifier tube is turned off. The primary side original opening signal generator 103 generates a primary side original opening time signal PSC based on the feedback signal VFB of the output voltage of the isolated power supply, and the primary side control signal generator 105 is used for receiving a turn-off confirmation signal SRD and the primary side original opening time signal PSC to generate a primary side switching tube control signal PSG to prompt the opening time of the primary side switching tube, wherein the primary side control signal generator determines a first opening time K1 based on the turn-off confirmation signal SRD and determines a second opening time K2 based on the primary side original opening time signal PSC. The primary side control signal generator 105 further determines the turn-on time of the primary side switching tube based on the second turn-on time K2 and the later time of the first turn-on time K1 to generate the primary side switching tube control signal PSG.

Because there may be a long delay between the time of determining the turn-off of the secondary synchronous rectifier and the time of finally generating the driving signal, and there may also be a turn-off delay when the driving signal turns off the synchronous rectifier, the SRD signal generated by detecting that the secondary synchronous rectifier is turned off is used to confirm the second turn-on time K2, which has higher reliability than the SRoff signal used to confirm the second turn-on time K2, and is suitable for occasions requiring particularly high reliability.

As shown in fig. 12A, in an embodiment, the secondary switch-off detector 1101 receives a signal V _ Forw of a voltage on the secondary winding of the isolated power supply, compares the signal V _ Forw with a first turn-off reference value VREFD1 (corresponding to a voltage value on the secondary winding after the synchronous rectifier is turned on during freewheeling) AND a second turn-off reference value VREFD2 (corresponding to a voltage value on the secondary winding when the parasitic body diode is turned on after the synchronous rectifier is turned off), AND performs a logical judgment on the comparison result through a logic gate (for example, an AND gate AND 4) to output a turn-off confirmation signal SRD. And when the voltage signal V _ Forw on the secondary winding is judged to fall from VREFD1 to VREFD2, the secondary synchronous rectifier tube is judged to be turned off, and a turn-off confirmation signal SRD is generated.

In another embodiment, as shown in fig. 12B, the secondary-side switching-off detector 1101 includes a current sensing circuit 1221 receiving and outputting a current sensing signal Isen indicative of a current flowing through the secondary-side synchronous rectifier SR, and a current zero-crossing edge detecting circuit 1222 receiving the current sensing signal Isen, determining that the secondary-side synchronous rectifier SR is turned off and generating a turn-off confirmation signal SRD when the current sensing signal Isen indicates that the current flowing through the secondary-side synchronous rectifier SR is approaching a falling edge zero-crossing.

It will be understood by those skilled in the art that the manner of detecting turn-off of the secondary synchronous rectifier and the structure of the secondary switching-off detector 1101 are not limited to the two embodiments described in fig. 12A and 12B, which are exemplary and not limiting, and in other embodiments, any other circuit suitable for detecting turn-off of the secondary synchronous rectifier SR may be adopted as the secondary switching-off detector 1101 and still fall within the scope of the present invention as defined in the appended claims.

The above description of the control method and steps according to the embodiments of the present invention is only exemplary and not intended to limit the present invention. In addition, some well-known control steps, control parameters used, etc. are not shown or described in detail to make the invention clear, concise, and understandable. Those skilled in the art should understand that the step numbers used in the above description of the control method and steps according to the embodiments of the present invention are not used to indicate the absolute sequence of the steps, and the steps are not implemented according to the step number sequence, but may be implemented in different sequences, or may be implemented in parallel, and are not limited to the described embodiments.

While the present invention has been described with reference to several exemplary embodiments, it is understood that the terminology used is intended to be in the nature of words of description and illustration, rather than of limitation. As the present invention may be embodied in several forms without departing from the spirit or essential characteristics thereof, it should also be understood that the above-described embodiments are not limited by any of the details of the foregoing description, but rather should be construed broadly within its spirit and scope as defined in the appended claims, and therefore all changes and modifications that fall within the meets and bounds of the claims, or equivalences of such meets and bounds are therefore intended to be embraced by the appended claims.

Claims

1. A control circuit for an isolated power supply, the control circuit comprising:

a secondary side control signal generator, configured to receive a signal of a voltage across a secondary side winding of the isolated power supply, and generate a secondary side switching tube control signal, where the secondary side switching tube control signal includes turn-off timing information of a secondary side synchronous rectifier tube, and the turn-off timing information of the secondary side synchronous rectifier tube is used to control turning-off of the secondary side synchronous rectifier tube;

the primary side original opening signal generator receives a feedback signal of the output voltage of the isolation type power supply and generates a primary side original opening time signal to prompt the opening time of the primary side switching tube as a first opening time;

and the primary side control signal generator is used for receiving the secondary side switching tube control signal and a primary side original switching-on time signal to generate a primary side switching tube control signal to prompt the switching-on time of a primary side switching tube, wherein the primary side control signal generator determines a second switching-on time based on the secondary side switching tube control signal, the second switching-on time is the switching-off time of the secondary side synchronous rectifying tube, and the primary side control signal generator further determines the switching-on time of the primary side switching tube based on the second switching-on time and the later time of the first switching-on time to generate the primary side switching tube control signal.

2. The control circuit of claim 1 wherein the primary side control signal generator is a primary side controller of the isolated power supply for coupling to a primary side of the isolated power supply.

3. The control circuit of claim 1, wherein the isolated power supply control circuit further comprises: and the secondary side switching tube control signal transmitter is used for receiving the secondary side switching tube control signal and transmitting the modulated secondary side switching tube control signal to the primary side from the secondary side.

4. The control circuit of claim 1, wherein the isolated power supply control circuit further comprises: and the primary original opening signal transmitter is used for receiving the primary original opening time signal and transmitting the modulated primary original opening time signal from the secondary side to the primary side.

5. The control circuit of claim 1 wherein the primary side switching tube control signal further comprises primary side switching tube turn-off timing information to control the turn-off of the primary side switching tube.

6. The control circuit of claim 1, wherein said primary side primary on signal generator comprises:

and the first comparison module is used for comparing the feedback signal of the output voltage of the isolated power supply with a first reference value, and generating the original primary side switching-on time signal when the feedback signal of the output voltage of the isolated power supply is reduced to the reference value.

7. The control circuit of claim 1, wherein said primary side primary on signal generator comprises:

the first comparison module is used for comparing the feedback signal of the output voltage of the isolated power supply with a first reference value, and generating a comparison signal when the feedback signal of the output voltage of the isolated power supply is reduced to the reference value;

and the first trigger is provided with a position end, a reset end and an output end, wherein the position end receives the comparison signal, and the output end outputs the original primary side switching-on time signal.

And the output end of the primary side conduction time timer is connected to the reset end of the first trigger, the primary side conduction time timer starts to time according to the comparison signal, and a reset signal is output to the reset end of the first trigger after a preset time.

8. The control circuit of claim 1, wherein said primary side primary on signal generator comprises:

the first error amplifier is used for carrying out error amplification processing on the feedback signal of the output voltage of the isolated power supply and a second reference value and outputting an error amplification signal;

and the oscillator is used for receiving the error amplification signal and generating a square wave signal as a primary side original opening time signal, wherein the frequency of the square wave signal is determined by the error amplification signal, and the rising edge or the falling edge of the square wave signal prompts the opening time of the primary side switching tube in the next period.

9. The control circuit of claim 7 or 8, wherein the isolated power supply control circuit further comprises: and the primary original opening signal transmitter is used for receiving the error amplification signal or the comparison signal and transmitting the error amplification signal or the comparison signal to the primary side from the secondary side after modulation.

10. The control circuit of claim 1, wherein said primary side control signal generator comprises: and the anti-punch-through logic circuit receives the primary side original switching-on time signal and the secondary side switching tube control signal, and generates a primary side switching tube switching-on time signal based on the secondary side switching tube control signal when the second switching-on time is later than the first switching-on time so that the current period switching-on time of the primary side switching tube is not earlier than the second switching-on time.

11. The control circuit of claim 10, wherein the secondary switch tube control signal is a level signal, the anti-punch-through logic circuit comprising: the first logic gate is provided with a first input end, a second input end and an output end, wherein the first input end receives the original primary switching-on time signal, the second input end receives an inverted signal of the control signal of the secondary side switching tube, the output end prompts that the primary side switching tube should be switched on when the original primary switching-on time signal indicates that the switching-off time of the secondary side synchronous rectifying tube arrives, and the output end outputs the switching-on time signal of the primary side switching tube to prompt that the switching-on time of the primary side switching tube arrives when the control signal of the secondary side switching tube indicates that the switching-off time of the secondary side synchronous rectifying tube arrives.

12. The control circuit of claim 11 wherein said primary side control signal generator further comprises:

the second trigger is provided with a position end, a reset end and an output end, wherein the position end receives a switching-on time signal of the primary side switching tube, and the output end outputs a control signal of the primary side switching tube;

and the output end of the third comparison module is connected to the reset end of the second trigger, and when the current of the primary side switching tube rises to the third reference value, a reset signal is output to the reset end of the first trigger.

13. The control circuit of claim 10, wherein the secondary switch tube control signal is a pulse signal, the anti-punch-through logic circuit comprising:

the first latch is used for receiving and latching the secondary side switching tube control signal and outputting a latching signal;

and the first logic gate is used for respectively receiving the original primary side switching-on time signal and the latch signal, wherein when the original primary side switching-on time signal prompts that the primary side main switching tube is required to be switched on and the latch signal prompts that the turn-off time of the secondary side synchronous rectifier tube arrives, the output end outputs the primary side switching tube switching-on time signal to prompt that the switching-on time of the primary side switching tube arrives.

14. The control circuit of claim 13 wherein said primary side control signal generator further comprises:

the second trigger is provided with a position end, a reset end and an output end, wherein the position end receives a switching-on time signal of the primary side switching tube, the output end outputs a control signal of the primary side switching tube, and the control signal of the primary side switching tube is further input into the first latch and is used for resetting the first latch according to the switching-on time information of the primary side switching tube;

15. The control circuit of claim 10 wherein said primary side switching tube on time signal is said primary side switching tube control signal.

16. The control circuit of claim 1, wherein the secondary-side control signal generator generates the secondary-side switching tube control signal in a different manner between the inductor current discontinuous mode and the inductor current continuous mode, and wherein the secondary-side control signal generator generates the secondary-side switching tube control signal at the latest when the secondary side enters a zero current interval to indicate a turn-off timing of the secondary-side synchronous rectifier tube in the inductor current discontinuous mode.

17. The control circuit of claim 1, wherein the secondary control signal generator receives a voltage signal on the secondary winding, prompts the secondary synchronous rectifier to turn on and start timing when the voltage signal on the secondary winding is the same as a fourth reference value, and generates the secondary switching tube control signal to prompt a turn-off time of the secondary synchronous rectifier after a first predetermined time.

18. The control circuit of claim 17, wherein in the inductor current discontinuous mode, the secondary-side control signal generator further determines whether the secondary side enters a zero-current interval according to a voltage signal on the secondary side winding, and generates the secondary-side switching tube control signal to indicate a turn-off time of the secondary-side synchronous rectifier tube when the secondary side enters the zero-current interval regardless of whether the first expected time is timed out.

19. The control circuit of claim 17 wherein the secondary switching transistor control signal is further configured to prompt the secondary synchronous rectifier to turn on to begin timing.

20. The control circuit of claim 17, wherein the secondary-side control signal generator comprises:

a fourth comparator having a first input terminal, a second input terminal and an output terminal, wherein the first input terminal receives the voltage signal on the secondary winding, and the second input terminal receives the fourth reference value;

the fourth trigger is provided with a set end, a reset end and an output end, wherein the set end is connected with the output end of the fourth comparator;

and the secondary side control timer is provided with a timing starting end and a timing result output end, wherein the timing starting end starts timing after prompting the secondary side synchronous rectifying tube to be switched on, and the timing result output end outputs a timing result to the reset end of the fourth trigger after the first predicted time.

21. The control circuit of claim 21, wherein an output signal of an output of the fourth comparator or the fourth flip-flop is used to prompt the secondary synchronous rectifier to turn on.

22. The control circuit of claim 21 wherein an output signal at an output of the fourth flip-flop is the secondary switching transistor control signal.

23. The control circuit of claim 21 wherein the output signal of said secondary control timer at said timing result output terminal is used as said secondary switching transistor control signal, and the output signal at said timing result output terminal is a single pulse signal.

24. The control circuit of claim 21, further comprising: and the second AND gate is provided with two input ends and an output end, and the two input ends are respectively connected to the output end of the fourth comparator and the output end of the fourth trigger.

25. The control circuit of claim 24 wherein the output signal at the output of said second and gate serves as said secondary switching tube control signal.

26. The control circuit of claim 21, further comprising a synchronous rectification time prediction circuit for predicting a turn-off timing of the secondary-side synchronous rectifier so as to variably generate the first predicted time as a turn-on time of the secondary-side synchronous rectifier, an output terminal of the synchronous rectification time prediction circuit outputting the first predicted time to the secondary-side control timer.

27. The control circuit of claim 26 wherein an input of the synchronous rectification time prediction circuit receives the voltage signal on the secondary winding and generates the first predicted time based on the voltage signal on the secondary winding.

28. The control circuit of claim 1, wherein the isolated power supply control circuit further comprises: and the first delay circuit is used for delaying the turn-off of the secondary switch tube so as to reduce the interval between the turn-off time of the secondary switch tube and the conduction time of the primary switch tube, wherein the first delay circuit does not delay the turn-off time of the secondary switch tube prompted by the control signal of the secondary switch tube.

29. The control circuit of claim 28 wherein the delay time of the first delay circuit is adjustable, the control circuit further comprising a transient determination circuit that determines whether a load jump occurs in the isolated power supply, wherein outputting a transient signal to the first delay circuit decreases the delay time of the first delay circuit when the transient determination circuit determines that a load jump occurs.

30. The control circuit of claim 29 wherein the delay time of the first delay circuit is adjustable, the control circuit further comprising a dead time detection circuit for calculating a dead time for a previous duty cycle and comparing the calculated dead time to a dead time reference, the dead time detection circuit adjusting to decrease the delay time of the first delay circuit when the dead time is less than a reference value and adjusting to increase the delay time of the first delay circuit when the dead time is greater than the dead time reference value.

31. A control circuit for an isolated power supply, the isolated power supply control circuit comprising:

the secondary side control signal generator is used for receiving a voltage signal on a secondary side winding of the isolation type power supply and generating a secondary side switching tube driving signal, and the secondary side switching tube driving signal is used for controlling the switching-on and switching-off of a secondary side synchronous rectifying tube;

the secondary side switching tube turn-off detector is coupled with the secondary side of the isolated power supply and is used for generating a turn-off confirmation signal when the secondary side synchronous rectifier tube is turned off;

the primary side original opening signal generator receives a feedback signal of the output voltage of the isolation type power supply and generates a primary side original opening time signal to prompt the opening time of the primary side switching tube to be used as the first opening time;

and the primary side control signal generator is used for receiving the turn-off confirmation signal and the primary side original turn-on time signal to generate a primary side switching tube control signal to prompt the turn-on time of the primary side switching tube, wherein the primary side control signal generator determines a second turn-on time based on the turn-off confirmation signal, the second turn-on time is the time for confirming that the secondary side synchronous rectifying tube is turned off, and the primary side control signal generator further determines the turn-on time of the primary side switching tube based on the second turn-on time and the later time of the first turn-on time to generate the primary side switching tube control signal.

32. An isolated power supply comprising:

the isolation converter is provided with a primary side and a secondary side, wherein the primary side comprises a primary side switching tube, and the secondary side comprises a secondary side winding and a synchronous rectifying tube;

the isolated power control circuit of any of claims 1 or 31, configured to control the primary switching tube and the synchronous rectifier tube.