CN115458529A - Manufacturing method of flash device - Google Patents
Manufacturing method of flash device Download PDFInfo
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- CN115458529A CN115458529A CN202211087770.5A CN202211087770A CN115458529A CN 115458529 A CN115458529 A CN 115458529A CN 202211087770 A CN202211087770 A CN 202211087770A CN 115458529 A CN115458529 A CN 115458529A
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- tungsten
- dielectric layer
- silicon
- manufacturing
- flash device
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims abstract description 31
- 229910052721 tungsten Inorganic materials 0.000 claims abstract description 30
- 239000010937 tungsten Substances 0.000 claims abstract description 30
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 24
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 17
- 239000001301 oxygen Substances 0.000 claims abstract description 17
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 17
- 229920005591 polysilicon Polymers 0.000 claims abstract description 16
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 15
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 15
- 239000002243 precursor Substances 0.000 claims abstract description 13
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 8
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 238000000151 deposition Methods 0.000 claims abstract description 7
- 238000000034 method Methods 0.000 claims description 13
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 239000000126 substance Substances 0.000 claims description 2
- 238000005530 etching Methods 0.000 abstract description 4
- 230000008021 deposition Effects 0.000 abstract description 3
- 239000007789 gas Substances 0.000 abstract description 3
- 238000013473 artificial intelligence Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000011800 void material Substances 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
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Abstract
The invention provides a manufacturing method of a flash device, which comprises the following steps of providing a substrate, wherein the substrate comprises a plurality of through holes and side walls attached to the side walls of the through holes; tungsten filled in the through hole, wherein the top of the tungsten is V-shaped; the polysilicon is positioned between two adjacent through holes, and the silicon nitride is positioned on the polysilicon; a dielectric layer is covered on the polysilicon and the silicon nitride; a gap is formed between the top of the tungsten in the through hole and the upper parts of the dielectric layers on two sides of the tungsten; depositing a silicon oxide dielectric layer on the substrate by using a silicon-containing precursor and an oxygen-containing precursor to fill the V-shaped top and the gap of the tungsten; and performing CMP on the top of the silicon oxide dielectric layer until the top of the silicon nitride is exposed. The invention aims at the problem that gaps are easy to form when oxide above tungsten is filled, and the oxide formed by adopting TEOS as a gas source can solve the problems of V shape of tungsten and depth-to-width ratio of a groove. And a smooth polycrystalline silicon layer can be obtained due to the smooth lower layer interface in the subsequent polycrystalline silicon deposition, and finally, the uniform polycrystalline silicon key size can be obtained after etching.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a manufacturing method of a flash device.
Background
In the semiconductor industry, flash devices have the advantages of low cost, high reliability, high integration level, high access speed, easy erasing and the like, so that the flash devices are widely applied to various fields such as the internet of things, AI (artificial intelligence), automotive electronics and the like.
In the conventional 38nm coater flash process, after the etch back of the tungsten, silicon oxide is filled in the process, which is to protect the tungsten from being damaged and to prepare for the subsequent CMP. However, the image of the previous layer shows that the top of the tungsten has a V shape, and the trench has a certain aspect ratio, which results in a void at the SIN level after the subsequent silicon oxide filling (as shown in fig. 1), and in the subsequent CMP process, the DHF is self-carried by the cleaning step after the oxide polishing is completed, so that the DHF enters the void to further etch the silicon oxide, and finally the silicon oxide above the tungsten forms a large pit (as shown in fig. 2), and the pit also results in uneven subsequent polysilicon filling, which causes an abnormality in the subsequent polysilicon etching CD, and finally affects the electrical performance and yield of the device.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, it is an object of the present invention to provide a method for manufacturing a flash device, which solves the problems of the prior art.
To achieve the above and other related objects, the present invention provides a method for manufacturing a flash device, comprising:
providing a substrate, wherein the substrate comprises a plurality of through holes and side walls attached to the side walls of the through holes; tungsten filled in the through hole, wherein the top of the tungsten is V-shaped; the polysilicon is positioned between the two adjacent through holes, and the silicon nitride is positioned on the polysilicon; a dielectric layer covers the polysilicon and the silicon nitride; a gap exists between the top of tungsten in the through hole and the upper parts of the dielectric layers on two sides of the through hole;
depositing a silicon oxide dielectric layer on the substrate by using a silicon-containing precursor and an oxygen-containing precursor to fill the V-shaped top of the tungsten and the gap;
and step three, performing CMP on the top of the silicon oxide dielectric layer until the top of the silicon nitride is exposed.
Preferably, in the second step, the silicon oxide dielectric layer is deposited on the substrate by a PECVD process.
Preferably, the silicon-containing precursor in step two is TEOS.
Preferably, the oxygen-containing post-driver in the second step is oxygen.
Preferably, the flow rate of the TEOS in the second step is 4500-5500 sccm.
Preferably, the flow rate of the oxygen in the second step is 4000 to 5000sccm.
Preferably, the silicon oxide dielectric layer is deposited in the second step under the environment of 400 ℃ of temperature, 700-800W of energy and 4-6T of pressure.
Preferably, the thickness of the oxygen-containing dielectric layer deposited in the second step is 2500-3500 angstroms.
As described above, the method for manufacturing a flash device of the present invention has the following advantageous effects: the Flash manufacturing method provided by the invention aims at the problem that gaps are easily formed when oxide above tungsten is filled, and the oxide formed by adopting TEOS as a gas source can well solve the problems of V-shaped tungsten and depth-to-width ratio of a groove due to certain filling capacity of TEOS. Because the oxide is filled without gaps, a flat plane can be finally obtained after CMP, a flat polycrystalline silicon layer can be obtained due to the flat lower layer interface in the subsequent polycrystalline silicon deposition, and a uniform polycrystalline silicon key size can be finally obtained after etching.
Drawings
FIG. 1 is a schematic diagram of a prior art matrix structure with voids after oxide filling;
FIG. 2 is a schematic diagram of a prior art substrate structure with pits formed by CMP of an oxide;
FIG. 3 is a schematic cross-sectional view of a substrate provided in the present invention;
FIG. 4 is a schematic cross-sectional view of a silicon oxide dielectric layer deposited on a substrate according to the present invention;
FIG. 5 is a cross-sectional view of a substrate after CMP of a silicon oxide dielectric layer according to the present invention;
FIG. 6 is a flow chart of a method for manufacturing a flash device according to the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1 to 6. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The invention provides a manufacturing method of a flash device, as shown in fig. 6, fig. 6 is a flow chart of the manufacturing method of the flash device of the invention, and the method at least comprises the following steps:
providing a substrate, wherein the substrate comprises a plurality of through holes and side walls attached to the side walls of the through holes; tungsten filled in the through hole, wherein the top of the tungsten is V-shaped; the polysilicon is positioned between the two adjacent through holes, and the silicon nitride is positioned on the polysilicon; a dielectric layer covers the polycrystalline silicon and the silicon nitride; a gap exists between the top of tungsten in the through hole and the upper parts of the dielectric layers on two sides of the through hole;
as shown in fig. 3, fig. 3 is a schematic cross-sectional view of the substrate provided in the present invention. Providing a substrate, wherein the substrate 01 is positioned at the bottom of the substrate, the substrate comprises a plurality of through holes and side walls 05 attached to the side walls of the through holes; tungsten 04 filled in the through hole, wherein the top of the tungsten 04 is V-shaped; the polysilicon 02 is positioned between the two adjacent through holes, and the silicon nitride 03 is positioned on the polysilicon 02; a dielectric layer 06 covers the polysilicon 02 and the silicon nitride 03; a gap is reserved between the top of the tungsten 04 in the through hole and the upper parts of the dielectric layers 06 on the two sides of the through hole;
depositing a silicon oxide dielectric layer on the substrate by using a silicon-containing precursor and an oxygen-containing precursor to fill the V-shaped top of the tungsten and the gap; FIG. 4 is a schematic cross-sectional view of a silicon oxide dielectric layer deposited on a substrate according to the present invention, as shown in FIG. 4; in the second step, a silicon oxide dielectric layer 07 is deposited on the substrate by using a silicon-containing precursor and an oxygen-containing precursor to fill the V-shaped top of the tungsten 04 and the gap.
Further, in the second step of this embodiment, the silicon oxide dielectric layer is deposited on the substrate by a PECVD process.
Further, in the second step of the present invention, the silicon-containing precursor is TEOS.
Further, in the second step of this embodiment, the oxygen-containing back-flooding substance is oxygen.
Further, the flow rate of the TEOS in the second step of this embodiment is 4500-5500 sccm.
Further, the flow rate of the oxygen in the second step of this embodiment is 4000 to 5000sccm.
Further, in the second step of this embodiment, the silicon oxide dielectric layer is deposited under an environment of 400 ℃ temperature, 700-800W energy, and 4-6T pressure.
Further, the thickness of the oxygen-containing dielectric layer deposited in step two of this embodiment is 2500 to 3500 angstroms.
And step three, performing CMP on the top of the silicon oxide dielectric layer until the top of the silicon nitride is exposed.
As shown in FIG. 5, FIG. 5 is a schematic cross-sectional view of a substrate after CMP of a silicon oxide dielectric layer according to the present invention. And thirdly, performing CMP on the top of the silicon oxide dielectric layer until the top of the silicon nitride is exposed.
In summary, in the method for manufacturing Flash according to the present invention, for the problem that the gap is easily formed by filling the oxide above the tungsten, the oxide formed by using TEOS as a gas source can better solve the problem that the tungsten has a V-shape and the trench has an aspect ratio due to the certain filling capability of TEOS. Because the oxide is filled without gaps, a flat plane can be finally obtained after CMP, a flat polycrystalline silicon layer can be obtained due to the flat lower layer interface in the subsequent polycrystalline silicon deposition, and a uniform polycrystalline silicon key size can be finally obtained after etching. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Those skilled in the art can modify or change the above-described embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (8)
1. A method for manufacturing a flash device, comprising:
providing a substrate, wherein the substrate comprises a plurality of through holes and side walls attached to the side walls of the through holes; tungsten filled in the through hole, wherein the top of the tungsten is V-shaped; the polysilicon is positioned between the two adjacent through holes, and the silicon nitride is positioned on the polysilicon; a dielectric layer covers the polysilicon and the silicon nitride; a gap exists between the top of tungsten in the through hole and the upper parts of the dielectric layers on two sides of the through hole;
depositing a silicon oxide dielectric layer on the substrate by using a silicon-containing precursor and an oxygen-containing precursor to fill the V-shaped top of the tungsten and the gap;
and step three, performing CMP on the top of the silicon oxide dielectric layer until the top of the silicon nitride is exposed.
2. The manufacturing method of the flash device according to claim 1, wherein: and in the second step, the silicon oxide dielectric layer is deposited on the substrate through a PECVD process.
3. The manufacturing method of the flash device according to claim 2, wherein: in the second step, the silicon-containing precursor is TEOS.
4. The manufacturing method of the flash device according to claim 2, wherein: and in the second step, the oxygen-containing back-drive substance is oxygen.
5. The manufacturing method of the flash device according to claim 3, wherein: the flow rate of the TEOS in the second step is 4500-5500 sccm.
6. The method of manufacturing a flash device according to claim 4, wherein: the flow rate of the oxygen in the second step is 4000 to 5000sccm.
7. The method of manufacturing a flash device according to claim 1, wherein: and in the second step, the silicon oxide dielectric layer is deposited under the environment of 400 ℃ of temperature, 700-800W of energy and 4-6T of pressure.
8. The manufacturing method of the flash device according to claim 1, wherein: and the thickness of the oxygen-containing dielectric layer deposited in the second step is 2500-3500 angstroms.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211087770.5A CN115458529A (en) | 2022-09-07 | 2022-09-07 | Manufacturing method of flash device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211087770.5A CN115458529A (en) | 2022-09-07 | 2022-09-07 | Manufacturing method of flash device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115458529A true CN115458529A (en) | 2022-12-09 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211087770.5A Pending CN115458529A (en) | 2022-09-07 | 2022-09-07 | Manufacturing method of flash device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115458529A (en) |
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- 2022-09-07 CN CN202211087770.5A patent/CN115458529A/en active Pending
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