CN115454512A - Chip drive loading configuration method, device, equipment and storage medium - Google Patents
Chip drive loading configuration method, device, equipment and storage medium Download PDFInfo
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Abstract
The application relates to a chip driver loading configuration method, a chip driver loading configuration device and a storage medium. The method comprises the following steps: writing the type of the variable resistor chip into the variable resistor in advance; generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address; and acquiring a chip driver from a preset hardware monitoring frame according to a preset chip driver loading configuration rule based on the model of the variable resistor chip so as to realize the loading configuration of the chip driver. The method has the advantages of realizing flexible and dynamic loading configuration of chip driving and improving the driving efficiency of the loading configuration chip.
Description
Technical Field
The present application relates to the technical field of driver loading in the technical field of electronic applications, and in particular, to a method, an apparatus, a device, and a storage medium for configuring a chip driver loading.
Background
The BMC (Baseboard Management Controller, chinese) hardware is a computer system. The hardware resources in the BMC are very limited compared to commonly used computer systems. In BMC hardware, CPU (Central processing Unit) has a slow running speed, flash memory is generally 32MB, and RAM (random access memory) is generally less than 256MB. Therefore, openBMC (open Basebard Management Controller; chinese: open source based baseboard Management Controller) is designed as a complete Linux distribution version, and can be flexibly customized to support different BMCSoC (System on chip; chinese: system chip) or board cards.
With the diversification of the server hardware style, the BMC system can be adapted to various types of board cards to monitor parameter information such as hardware temperature and voltage information. In the prior art, when a VR (Variable resistor, full name of english) chip is loaded for driving, since chip model information of the VR chip is not stored in the VR chip, a person skilled in the art usually obtains the chip model information of the VR chip based on a VR chip technical manual provided by a VR chip manufacturer. Then, chip model information based on the VR chip generates a VR chip drive, and a frame structure of a VR chip drive generation system based on the VR chip is not provided in the prior art, so that the situation that the VR chip drive is repeatedly generated based on the same chip model often occurs, and a large amount of manpower and material resources are wasted. Secondly, in the process of loading the chip drivers, the chip drivers corresponding to the chip drivers cannot be dynamically indexed based on the chip model information of the VR chip, and the chip drivers have the disadvantages of poor flexibility and large manpower and material resource consumption. In addition, the VR chip model is manually acquired and the VR chip driver is configured in a loading manner, so that the problems of low working efficiency, high economic cost and insufficient supervision are inevitable.
Therefore, there is an urgent need to provide a chip driver loading configuration method, device, apparatus, and storage medium that can implement flexible and dynamic loading configuration of chip drivers and improve the efficiency of loading configuration of chip drivers.
Disclosure of Invention
Therefore, it is necessary to provide a chip driver loading configuration method, device, apparatus, and storage medium capable of flexibly and dynamically loading and configuring a chip driver and improving the efficiency of loading and configuring the chip driver, in order to solve the above technical problems.
In one aspect, a chip driver loading configuration method is provided, where the chip includes a variable resistance chip, and the method includes:
step A: writing the model of the variable resistor chip into the variable resistor in advance;
and B: generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
and C: and based on the model of the variable resistor chip, according to a preset chip drive loading configuration rule, acquiring a chip drive from a preset hardware monitoring frame so as to realize the loading configuration of the chip drive.
In one embodiment, the preset data model generation rule includes: acquiring a variable resistance chip for monitoring the voltage data based on the voltage data to be monitored; reading the model of the variable resistance chip based on the variable resistance chip; acquiring an I2C bus channel and a register address for realizing monitoring of the voltage data based on the variable resistor chip and the voltage data to be monitored; and generating a data model based on the model of the variable resistor chip, the I2C bus channel and the register address.
In one embodiment, generating the preset hardware monitoring framework includes: monitoring whether the generation state of the data model is generated or not; if the generation state of the data model is the generation state, acquiring the model of the variable resistance chip in the data model after the data model is generated; generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip; and generating the preset hardware monitoring framework based on the chip driver.
In one embodiment, the preset chip driver loading configuration rule includes: chip driver loading rules and chip driver configuration rules; the chip driver acquisition rule includes: and loading chip drivers with names consistent with the model of the variable resistance chip from the preset hardware monitoring frame based on the model of the variable resistance chip.
In one embodiment, the chip driver configuration rule includes: acquiring the I2C bus channel and the register address based on the data model and the model of the variable resistance chip; and loading and configuring the chip driver to the source code of the equipment tree according to a configuration code generation rule based on the I2C bus channel, the register address and the chip driver.
In one embodiment, when generating the preset hardware monitoring framework, the method further includes: obtaining the model of the variable resistance chip in the data model; judging whether a chip driver with the name consistent with the model of the variable resistance chip exists in the preset hardware monitoring frame or not based on the model of the variable resistance chip; and if the chip driver with the name consistent with the model of the variable resistance chip does not exist, generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip.
In one embodiment, the pre-writing the model number of the variable resistor chip into the variable resistor includes: presetting a standard format of the model of a variable resistor chip, wherein the standard format of the model of the variable resistor chip comprises the total number of characters, the number of English characters and the number of Chinese characters; and if the variable resistance chip model written in the variable resistance chip does not conform to the standard format of the variable resistance chip model, judging that the writing in of the variable resistance chip model to the variable resistance chip fails, and giving an alarm.
In another aspect, a chip driver loading configuration apparatus is provided, where the chip includes a variable resistance chip, and the apparatus includes:
the writing unit is used for writing the type of the variable resistor chip into the variable resistor in advance;
the data model generating unit is used for generating a data model according to a preset data model generating rule based on voltage data to be monitored, and the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
and the loading configuration unit is used for acquiring the chip driver from a preset hardware monitoring frame according to a preset chip driver loading configuration rule based on the model of the variable resistor chip so as to realize the loading configuration of the chip driver.
In another aspect, a computer device is provided, which includes a memory, a processor, and a computer program stored on the memory and executable on the processor, and the processor implements the following steps when executing the computer program:
step A: writing the type of the variable resistor chip into the variable resistor in advance;
and B, step B: generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
step C: and acquiring a chip driver from a preset hardware monitoring frame according to a preset chip driver loading configuration rule based on the model of the variable resistor chip so as to realize the loading configuration of the chip driver.
In yet another aspect, a computer-readable storage medium is provided, having stored thereon a computer program which, when executed by a processor, performs the steps of:
step A: writing the model of the variable resistor chip into the variable resistor in advance;
and B, step B: generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
step C: and acquiring a chip driver from a preset hardware monitoring frame according to a preset chip driver loading configuration rule based on the model of the variable resistor chip so as to realize the loading configuration of the chip driver.
The chip driver loading configuration method, device, equipment and storage medium comprise the following steps: writing the type of the variable resistor chip into the variable resistor in advance; generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address; and based on the model of the variable resistor chip, according to a preset chip drive loading configuration rule, acquiring a chip drive from a preset hardware monitoring frame so as to realize the loading configuration of the chip drive. The method comprises the steps that the model of a variable resistor chip is written into a variable resistor, so that the model of the variable resistor chip can be read; the reusability of chip drive is realized by generating a hardware monitoring frame in advance; the chip type based on the variable resistance chip obtains the chip-driven loading configuration, dynamic loading of the chip drive is achieved, flexible loading configuration of the chip drive is achieved, consumption of manpower and material resources is reduced, and the technical defects that working efficiency is low and supervision is not in place due to manual operation are overcome. In conclusion, the method and the device have the advantages of being capable of achieving flexible and dynamic loading and configuration of the chip driver and improving the efficiency of loading and configuration of the chip driver.
Drawings
FIG. 1 is a diagram of an application environment of a configuration method for loading a chip driver in an embodiment;
FIG. 2 is a flowchart illustrating a chip driver load configuration method according to an embodiment;
FIG. 3 is a flowchart illustrating a chip driver load configuration method according to an embodiment;
FIG. 4 is a block diagram showing the structure of a chip driver loading configuration apparatus according to an embodiment;
FIG. 5 is a diagram of the internal structure of a computer device in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Example one
The driver chip loading configuration method provided by the application can be applied to the application environment shown in fig. 1. Wherein the terminal 102 communicates with the server 104 via a network. The chip driver loading configuration method is stored in the storage unit in the server 104, and when the terminal 102 sends a chip driver loading configuration request to the server 104, the server 104 calls the chip driver loading configuration method stored in the storage unit to implement the loading configuration of the chip driver. The terminal 102 may be, but not limited to, various personal computers, notebook computers, smart phones, tablet computers, and portable wearable devices, and the server 104 may be implemented by an independent server or a server cluster formed by multiple servers.
In one embodiment, a chip driver loading configuration method is provided, the method comprising: firstly, obtaining the model number of a variable resistance chip, the address of a register, the I2C BUS number (the English name is: inter-Integrated Circuit BUS used for connecting a microcontroller and peripheral equipment thereof) and channel information used when the variable resistance chip monitors voltage data, and generating a data model; secondly, adding a pin function of the variable resistance chip, acquiring the model of the variable resistance chip based on variable resistance chip generation information provided by a manufacturer when the variable resistance chip leaves a factory, and storing the model of the variable resistance chip into a storage unit in the variable resistance chip for an OpenBMC (open source based substrate management controller) end to acquire; then, when the configuration chip driver needs to be loaded, based on the model of the variable resistance chip, the chip driver is obtained from a preset hardware monitoring frame (English full name: hardware monitoring frame; english short for Hwmon); then, dynamically configuring the chip driver into a DTS (complete English name: device Tree Source; complete Chinese name: device Tree Source, a data structure for describing the hardware components of a specific computer); and finally, starting the kernel to load the related chip drive, and reading the voltage data information monitored by the variable resistance chip. The specific configuration code for dynamically configuring the chip driver into the DTS is as follows:
example two
In one embodiment, as shown in fig. 2, there is provided a chip driving loading configuration method, where the chip includes a variable resistance chip, the method includes:
step A: writing the model of the variable resistor chip into the variable resistor in advance;
specifically, the pin function of the variable resistor chip is added to hardware, and the model of the variable resistor chip is obtained based on information parameters provided by a manufacturer of the variable resistor chip
And B: generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
step C: and acquiring a chip driver from a preset hardware monitoring frame according to a preset chip driver loading configuration rule based on the model of the variable resistor chip so as to realize the loading configuration of the chip driver.
In the chip drive loading configuration method, the model of the variable resistor chip is written into the variable resistor, so that the model of the variable resistor chip can be read; the reusability of chip drive is realized by generating a hardware monitoring frame in advance; the chip model based on the variable resistance chip obtains the chip-driven loading configuration, realizes the dynamic loading of the chip drive, realizes the flexible loading configuration of the chip drive, reduces the consumption of manpower and material resources, and avoids the technical defects of low working efficiency and inadequate supervision caused by manual operation. In conclusion, the method and the device have the advantages of being capable of achieving flexible and dynamic loading and configuration of the chip driver and improving the efficiency of loading and configuration of the chip driver.
In one embodiment, the preset data model generation rule includes: acquiring a variable resistance chip for monitoring the voltage data based on the voltage data to be monitored; reading the model of the variable resistance chip based on the variable resistance chip; acquiring an I2C bus channel and a register address for realizing monitoring of the voltage data based on the variable resistance chip and the voltage data to be monitored; and generating a data model based on the model of the variable resistor chip, the I2C bus channel and the register address.
In one embodiment, as shown in fig. 3, generating the preset hardware monitoring framework includes: monitoring whether the generation state of the data model is generated or not; if the generation state of the data model is in generation, acquiring the model of the variable resistance chip in the data model after the data model is generated; generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip; and generating the preset hardware monitoring framework based on the chip driver.
In one embodiment, the preset chip driver loading configuration rule includes: chip driver loading rules and chip driver configuration rules; the chip driver acquisition rule includes: and loading chip drivers with names consistent with the model of the variable resistor chip from the preset hardware monitoring frame based on the model of the variable resistor chip.
In one embodiment, the chip driver configuration rule includes: acquiring the I2C bus channel and the register address based on the data model and the model of the variable resistance chip; and loading and configuring the chip driver to the source code of the equipment tree according to a configuration code generation rule based on the I2C bus channel, the register address and the chip driver.
In one embodiment, as shown in fig. 3, when the preset hardware monitoring framework is generated, the method further includes: obtaining the model of a variable resistance chip in the data model; judging whether a chip driver with the name consistent with the model of the variable resistance chip exists in the preset hardware monitoring frame or not based on the model of the variable resistance chip; if the chip driver with the name consistent with the model of the variable resistance chip does not exist, generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip; and if the chip driver with the name consistent with the model of the variable resistance chip exists, generating the chip driver no longer based on the model of the variable resistance chip.
In one embodiment, the pre-writing the model number of the variable resistor chip into the variable resistor includes: presetting a standard format of the model of the variable resistor chip, wherein the standard format of the model of the variable resistor chip comprises the total number of characters, the number of English characters and the number of Chinese characters; and if the variable resistance chip model written in the variable resistance chip does not conform to the standard format of the variable resistance chip model, judging that the writing in of the variable resistance chip model to the variable resistance chip fails, and giving an alarm.
It should be understood that although the various steps in the flow charts of fig. 2-3 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 2-3 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.
EXAMPLE III
In one embodiment, as shown in fig. 4, there is provided a chip driver loading configuration apparatus, including: the device comprises a writing unit, a data model generating unit and a loading configuration unit, wherein:
the writing unit is used for writing the model of the variable resistor chip into the variable resistor in advance;
the data model generating unit is used for generating a data model according to a preset data model generating rule based on voltage data to be monitored, and the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
and the loading configuration unit is used for acquiring the chip driver from a preset hardware monitoring framework according to a preset chip driver loading configuration rule based on the type of the variable resistor chip so as to realize the loading configuration of the chip driver.
In one embodiment, the data model generating unit is further configured to obtain a variable resistance chip for monitoring the voltage data based on the voltage data to be monitored; reading the model of the variable resistance chip based on the variable resistance chip; acquiring an I2C bus channel and a register address for realizing monitoring of the voltage data based on the variable resistance chip and the voltage data to be monitored; and generating a data model based on the model of the variable resistance chip, the I2C bus channel and the register address.
In one embodiment, the apparatus further comprises: the monitoring generation unit is used for monitoring whether the generation state of the data model is generated or not; if the generation state of the data model is in generation, acquiring the model of the variable resistance chip in the data model after the data model is generated; generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip; and generating the preset hardware monitoring framework based on the chip driver.
In one embodiment, the load configuration unit is further configured to load, from the preset hardware monitoring framework, a chip driver named according to the model of the variable resistance chip based on the model of the variable resistance chip.
In one embodiment, the load configuration unit is further configured to obtain the I2C bus channel and the register address based on the data model and the model of the variable resistance chip; and loading and configuring the chip driver to the source code of the equipment tree according to a configuration code generation rule based on the I2C bus channel, the register address and the chip driver.
In one embodiment, the obtaining and generating unit is further configured to obtain a model number of the variable resistor chip in the data model; judging whether a chip driver with the name consistent with the model of the variable resistance chip exists in the preset hardware monitoring frame or not based on the model of the variable resistance chip; and if the chip driver with the name consistent with the model of the variable resistance chip does not exist, generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip.
For specific limitations of the chip driver loading configuration apparatus, reference may be made to the above limitations on the chip driver loading configuration method, which is not described herein again. All or part of each module in the chip drive loading configuration device can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent of a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
Example four
In one embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as shown in fig. 5. The computer device includes a processor, a memory, a network interface, a display screen, and an input device connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a chip driver loading configuration method. The display screen of the computer equipment can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer equipment can be a touch layer covered on the display screen, a key, a track ball or a touch pad arranged on a shell of the computer equipment, an external keyboard, a touch pad or a mouse and the like.
Those skilled in the art will appreciate that the architecture shown in fig. 5 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, there is provided a computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:
step A: writing the model of the variable resistor chip into the variable resistor in advance;
and B, step B: generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
step C: and based on the model of the variable resistor chip, according to a preset chip drive loading configuration rule, acquiring a chip drive from a preset hardware monitoring frame so as to realize the loading configuration of the chip drive.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
acquiring a variable resistance chip for monitoring the voltage data based on the voltage data to be monitored; reading the model of the variable resistance chip based on the variable resistance chip; acquiring an I2C bus channel and a register address for realizing monitoring of the voltage data based on the variable resistor chip and the voltage data to be monitored; and generating a data model based on the model of the variable resistor chip, the I2C bus channel and the register address.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
monitoring whether the generation state of the data model is generated or not; if the generation state of the data model is in generation, acquiring the model of the variable resistance chip in the data model after the data model is generated; generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip; and generating the preset hardware monitoring framework based on the chip driver.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
and loading chip drivers with names consistent with the model of the variable resistance chip from the preset hardware monitoring frame based on the model of the variable resistance chip.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
acquiring the I2C bus channel and the register address based on the data model and the model of the variable resistance chip; and loading and configuring the chip driver to the source code of the equipment tree according to a configuration code generation rule based on the I2C bus channel, the register address and the chip driver.
In one embodiment, the processor when executing the computer program further performs the steps of:
obtaining the model of a variable resistance chip in the data model; judging whether a chip driver with the name consistent with the model of the variable resistance chip exists in the preset hardware monitoring frame or not based on the model of the variable resistance chip; and if the chip driver with the name consistent with the model of the variable resistance chip does not exist, generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip.
In one embodiment, the processor, when executing the computer program, further performs the steps of:
presetting a standard format of the model of the variable resistor chip, wherein the standard format of the model of the variable resistor chip comprises the total number of characters, the number of English characters and the number of Chinese characters; and if the variable resistance chip model written in the variable resistance chip does not conform to the standard format of the variable resistance chip model, judging that the writing in of the variable resistance chip model to the variable resistance chip fails, and giving an alarm.
EXAMPLE five
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored which, when executed by a processor, performs the steps of:
step A: writing the model of the variable resistor chip into the variable resistor in advance;
and B: generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
step C: and based on the model of the variable resistor chip, according to a preset chip drive loading configuration rule, acquiring a chip drive from a preset hardware monitoring frame so as to realize the loading configuration of the chip drive.
In one embodiment, the computer program when executed by the processor further performs the steps of:
acquiring a variable resistance chip for monitoring the voltage data based on the voltage data to be monitored; reading the model number of the variable resistance chip based on the variable resistance chip; acquiring an I2C bus channel and a register address for realizing monitoring of the voltage data based on the variable resistance chip and the voltage data to be monitored; and generating a data model based on the model of the variable resistance chip, the I2C bus channel and the register address.
In one embodiment, the computer program when executed by the processor further performs the steps of:
monitoring whether the generation state of the data model is generated or not; if the generation state of the data model is the generation state, acquiring the model of the variable resistance chip in the data model after the data model is generated; generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip; and generating the preset hardware monitoring framework based on the chip driver.
In one embodiment, the computer program when executed by the processor further performs the steps of:
and loading chip drivers with names consistent with the model of the variable resistance chip from the preset hardware monitoring frame based on the model of the variable resistance chip.
In one embodiment, the computer program when executed by the processor further performs the steps of:
acquiring the I2C bus channel and the register address based on the data model and the model of the variable resistance chip; based on the I2C bus channel, the register address and the chip driver, loading and configuring the chip driver to the source code of the equipment tree according to a configuration code generation rule
In one embodiment, the computer program when executed by the processor further performs the steps of:
obtaining the model of a variable resistance chip in the data model; judging whether a chip driver with the name consistent with the model of the variable resistance chip exists in the preset hardware monitoring frame or not based on the model of the variable resistance chip; and if the chip driver with the name consistent with the model of the variable resistance chip does not exist, generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip.
In one embodiment, the computer program when executed by the processor further performs the steps of:
presetting a standard format of the model of the variable resistor chip, wherein the standard format of the model of the variable resistor chip comprises the total number of characters, the number of English characters and the number of Chinese characters; and if the model of the variable resistance chip written into the variable resistance chip does not conform to the standard format of the model of the variable resistance chip, judging that the writing into the model of the variable resistance chip to the variable resistance chip fails, and giving an alarm.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database or other medium used in the embodiments provided herein can include non-volatile and/or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically Programmable ROM (EPROM), electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double Data Rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous Link DRAM (SLDRAM), rambus (Rambus) direct RAM (RDRAM), direct Rambus Dynamic RAM (DRDRAM), and Rambus Dynamic RAM (RDRAM), among others.
All possible combinations of the technical features in the above embodiments may not be described for the sake of brevity, but should be considered as being within the scope of the present disclosure as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A chip driver load configuration method, wherein the chip comprises a variable resistance chip, the method comprising:
writing the type of the variable resistor chip into the variable resistor in advance;
generating a data model according to a preset data model generation rule based on voltage data to be monitored, wherein the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
and acquiring a chip driver from a preset hardware monitoring frame according to a preset chip driver loading configuration rule based on the model of the variable resistor chip so as to realize the loading configuration of the chip driver.
2. The chip driver loading configuration method according to claim 1, wherein the preset data model generation rule includes:
acquiring a variable resistance chip for monitoring the voltage data based on the voltage data to be monitored;
reading the model of the variable resistance chip based on the variable resistance chip;
acquiring an I2C bus channel and a register address for realizing monitoring of the voltage data based on the variable resistance chip and the voltage data to be monitored;
and generating a data model based on the model of the variable resistance chip, the I2C bus channel and the register address.
3. The chip driver loading configuration method according to claim 2, wherein generating the preset hardware monitoring framework comprises:
monitoring whether the generation state of the data model is generated or not;
if the generation state of the data model is in generation, acquiring the model of the variable resistance chip in the data model after the data model is generated;
generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip;
and generating the preset hardware monitoring framework based on the chip driver.
4. The chip driver loading configuration method according to claim 3, wherein the preset chip driver loading configuration rule comprises: chip driver loading rules and chip driver configuration rules;
the chip driver acquisition rule includes: and loading chip drivers with names consistent with the model of the variable resistance chip from the preset hardware monitoring frame based on the model of the variable resistance chip.
5. The chip driver loading configuration method according to claim 4, wherein the chip driver configuration rule comprises:
acquiring the I2C bus channel and the register address based on the data model and the model of the variable resistance chip;
and loading and configuring the chip driver to the equipment tree source code according to a configuration code generation rule based on the I2C bus channel, the register address and the chip driver.
6. The chip driver load configuration method according to any one of claims 1 to 5, wherein when the preset hardware monitoring framework is generated, the method further comprises:
obtaining the model of the variable resistance chip in the data model;
judging whether a chip driver with the name consistent with the model of the variable resistance chip exists in the preset hardware monitoring frame or not based on the model of the variable resistance chip;
and if the chip driver with the name consistent with the model of the variable resistance chip does not exist, generating the chip driver based on the model of the variable resistance chip, and naming the chip driver according to the model of the variable resistance chip.
7. The chip driver loading configuration method according to claim 1, wherein writing the variable resistor chip model to the variable resistor in advance comprises:
presetting a standard format of the model of the variable resistor chip, wherein the standard format of the model of the variable resistor chip comprises the total number of characters, the number of English characters and the number of Chinese characters;
and if the model of the variable resistance chip written into the variable resistance chip does not conform to the standard format of the model of the variable resistance chip, judging that the writing into the model of the variable resistance chip to the variable resistance chip fails, and giving an alarm.
8. A chip driver loading configuration apparatus, wherein the chip comprises a variable resistance chip, the apparatus comprising:
the writing unit is used for writing the type of the variable resistor chip into the variable resistor in advance;
the data model generating unit is used for generating a data model according to a preset data model generating rule based on voltage data to be monitored, and the data model comprises a variable resistor chip model, an I2C bus channel and a register address;
and the loading configuration unit is used for acquiring the chip driver from a preset hardware monitoring frame according to a preset chip driver loading configuration rule based on the model of the variable resistor chip so as to realize the loading configuration of the chip driver.
9. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 7 are implemented when the computer program is executed by the processor.
10. A computer storage medium on which a computer program is stored, characterized in that the computer program, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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| CN202210982111.1A CN115454512A (en) | 2022-08-16 | 2022-08-16 | Chip drive loading configuration method, device, equipment and storage medium |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116185528A (en) * | 2023-04-27 | 2023-05-30 | 深圳艾为电气技术有限公司 | Flexible configuration method and device for driver software of electric compressor |
| CN117407033A (en) * | 2023-12-15 | 2024-01-16 | 深圳市天龙世纪科技发展有限公司 | Method, system and storage medium for switching product types based on resistor |
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2022
- 2022-08-16 CN CN202210982111.1A patent/CN115454512A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116185528A (en) * | 2023-04-27 | 2023-05-30 | 深圳艾为电气技术有限公司 | Flexible configuration method and device for driver software of electric compressor |
| CN116185528B (en) * | 2023-04-27 | 2023-07-21 | 深圳艾为电气技术有限公司 | Flexible configuration method and device for driver software of electric compressor |
| CN117407033A (en) * | 2023-12-15 | 2024-01-16 | 深圳市天龙世纪科技发展有限公司 | Method, system and storage medium for switching product types based on resistor |
| CN117407033B (en) * | 2023-12-15 | 2024-03-22 | 深圳市天龙世纪科技发展有限公司 | Method, system and storage medium for switching product types based on resistor |
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