CN115454358A - Data storage control method and device and image processing system - Google Patents
Data storage control method and device and image processing system Download PDFInfo
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- CN115454358A CN115454358A CN202211400359.9A CN202211400359A CN115454358A CN 115454358 A CN115454358 A CN 115454358A CN 202211400359 A CN202211400359 A CN 202211400359A CN 115454358 A CN115454358 A CN 115454358A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
- G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0662—Virtualisation aspects
- G06F3/0665—Virtualisation aspects at area level, e.g. provisioning of virtual or logical volumes
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/20—Processor architectures; Processor configuration, e.g. pipelining
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/60—Memory management
Abstract
The application relates to the technical field of data processing and provides a data storage control method and device and an image processing system. The data storage control method can be applied to a host, and comprises the following steps: determining a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first storage of a host; and mapping a second virtual address of a second storage space in a virtual memory of the image processing device to the physical address of the physical page, wherein the data processed by the image processing device is written into the physical page indicated by the physical address mapped by the second virtual address. The processed data can be directly transmitted to the application program by using a simple method, and the transmission efficiency of the data is improved.
Description
Technical Field
The present invention relates to the field of data processing technologies, and in particular, to a data storage control method, a data storage control device, and an image processing system.
Background
An application program (APP) in a host (host) often needs to start an image processing apparatus to perform image processing such as rendering, and data after the image processing needs to be returned to the application program.
The image processing apparatus is, for example, a Graphics Processing Unit (GPU). The image processing apparatus is generally in the form of a computer expansion card that exchanges data with a host through an interface, such as a Peripheral Component Interconnect Express (PCIE) interface.
FIG. 1 is a diagram illustrating the prior art of passing image processed data back to an application. As shown in fig. 1, the data processed by the image processing apparatus 11 is output to the video memory 12 through the path (1), the data in the video memory 12 is copied to the storage area 14 allocated by the host 13 through the interface 16 through the path (2), and finally the data is copied to the storage area 15 allocated by the application program through the path (3). The video memory 12 is, for example, an onboard DDR (double data rate synchronous dynamic random access memory).
It should be noted that the above background description is only for the convenience of clear and complete description of the technical solutions of the present application and for the understanding of those skilled in the art. Such solutions are not considered to be known to the person skilled in the art merely because they have been set forth in the background section of the present application.
Disclosure of Invention
The inventor of the present application finds that there are some limitations to the above process of passing back image-processed data to an application, such as: the data is copied twice, the operation is complex, and the copying of the data via the interface 16 is inefficient.
In order to solve at least the above technical problems or similar technical problems, embodiments of the present application provide a data storage control method, a data storage control apparatus, and an image processing system. In the data storage control method, a first virtual address allocated to a first storage space of an application program and a second virtual address of a second storage space in a virtual memory of an image processing apparatus are mapped to the same physical address, so that when the image processing apparatus writes processed data into a storage space corresponding to the second virtual address, the data is actually written into a physical page indicated by a physical address mapped by the second virtual address, and the application program can read the data from the physical page based on a mapping relation between the first virtual address and the physical address. Therefore, the application program can transmit the processed data to the application program by using a simple method, and the transmission efficiency of the data is improved.
The embodiment of the application provides a data storage control method, which is applied to a host, and comprises the following steps:
determining a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first storage of a host; and
mapping a second virtual address of a second storage space in a virtual memory of the image processing device to the physical address of the physical page, wherein the data processed by the image processing device is written into the physical page indicated by the physical address mapped by the second virtual address.
The embodiment of the application also provides a data storage control method, which is applied to an image processing device, and the method comprises the following steps:
mapping a second virtual address (VirtAddress) of a second storage space in a virtual memory of the image processing device to a physical address of a physical page; and
the image processing device writes the processed data into a physical page indicated by the physical address mapped by the second virtual address (VirtAddress),
wherein the physical address of the physical page corresponds to a first virtual address (uservirtdress) in a first memory of a host.
The embodiment of the present application further provides a data storage control method, which is applied to a host, and the method includes:
an application program (APP) obtains a first virtual address (userVirtAddress) corresponding to a first storage space in a first storage of a host; and
the application program reads data based on the first virtual address, wherein the first virtual address and a second virtual address (VirtAddress) in a virtual memory of an image processing device (GPU) are mapped to the same physical address, and the image processing device is used for writing data obtained by executing the application program task into a physical page indicated by the physical address mapped by the second virtual address.
An embodiment of the present application further provides a data storage control method, which is applied to an image processing system, where the image processing system includes an image processing apparatus and a host, and the method includes:
the host determines a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first memory;
mapping a second virtual address of a second storage space in a virtual memory of the image processing apparatus to the physical address of the physical page; and
the image processing device writes the processed data into the physical page indicated by the physical address of the second virtual address mapping.
An embodiment of the present application further provides a data storage control apparatus, which is applied to a host, where the data storage control apparatus includes a first control unit, and the first control unit is configured to:
determining a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first storage of a host; and
mapping a second virtual address of a second storage space in a virtual memory of the image processing device to the physical address of the physical page, wherein the data processed by the image processing device is written into the physical page indicated by the physical address mapped by the second virtual address.
An embodiment of the present application further provides a data storage control apparatus, which is applied to an image processing apparatus, and includes a second control unit configured to:
mapping a second virtual address (VirtAddress) of a second storage space in a virtual memory of the image processing device to a physical address of a physical page; and
and the image processing device writes the processed data into a physical page indicated by the physical address mapped by the second virtual address (VirtAddress), wherein the physical address of the physical page corresponds to a first virtual address (userVirtAddress) in a first memory of the host.
An embodiment of the present application further provides a data storage control device, which is applied to a host, where the data storage control device includes a third control unit, and the third control unit is configured to:
obtaining a first virtual address (userVirtAddress) corresponding to a first storage space in a first storage of a host; and
and reading data based on the first virtual address, wherein the first virtual address and a second virtual address (VirtAddress) in a virtual memory of an image processing device (GPU) are mapped to the same physical address, and the image processing device is used for writing data obtained by executing the application program task into a physical page indicated by the physical address mapped by the second virtual address.
The embodiment of the application has the beneficial effects that: the processed data can be transmitted to the application program by using a simple method, and the transmission efficiency of the data is improved.
Specific embodiments of the present application are disclosed in detail with reference to the following description and drawings, indicating the manner in which the principles of the application may be employed. It should be understood that the embodiments of the present application are not so limited in scope. The embodiments of the application include many variations, modifications and equivalents within the scope of the terms of the appended claims.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments, in combination with or instead of the features of the other embodiments.
It should be emphasized that the term "comprises/comprising" when used herein, is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts. In the drawings:
FIG. 1 is a diagram illustrating the prior art of transferring image processed data back to an application;
FIG. 2 is a schematic diagram of an image processing system of the present application;
FIG. 3 is a schematic diagram of a data storage control method according to an embodiment of the first aspect;
FIG. 4 is a schematic illustration of the results of operations 301, 302, 303;
FIG. 5 is a schematic diagram of a storage control method of data in the embodiment of the second aspect;
FIG. 6 is a diagram showing a storage control method of data in the embodiment of the third aspect;
FIG. 7 is a diagram showing a storage control method of data in the embodiment of the fourth aspect;
FIG. 8 is a schematic view of a data storage control apparatus according to an embodiment of a fifth aspect;
FIG. 9 is another schematic diagram of a data storage control apparatus according to an embodiment of a fifth aspect;
FIG. 10 is yet another schematic diagram of a data storage control apparatus according to an embodiment of the fifth aspect;
FIG. 11 is a schematic diagram of a host.
Detailed Description
The foregoing and other features of the present application will become apparent from the following description, taken in conjunction with the accompanying drawings. In the description and drawings, particular embodiments of the application are disclosed in detail as being indicative of some of the embodiments in which the principles of the application may be employed, it being understood that the application is not limited to the described embodiments, but, on the contrary, is intended to cover all modifications, variations, and equivalents falling within the scope of the appended claims. Various embodiments of the present application will be described below with reference to the drawings. These embodiments are merely exemplary and are not intended to limit the present application.
In the embodiments of the present application, the terms "first", "second", "upper", "lower", and the like are used to distinguish different elements by name, but do not indicate a spatial arrangement, a temporal order, and the like of the elements, and the elements should not be limited by the terms. The term "and/or" includes any and all combinations of one or more of the associated listed terms. The terms "comprising," "including," "having," and the like, refer to the presence of stated features, elements, components, and do not preclude the presence or addition of one or more other features, elements, components, and elements.
In the embodiments of the present application, the singular forms "a", "an", and the like include the plural forms and are to be construed broadly as "a" or "an" and not limited to the meaning of "a" or "an"; furthermore, the term "comprising" should be understood to include both the singular and the plural, unless the context clearly dictates otherwise. Furthermore, the term "according to" should be understood as "according at least in part to \8230;" based on "should be understood as" based at least in part on \8230; "unless the context clearly indicates otherwise.
Embodiments of the first aspect
An embodiment of a first aspect of the present application provides a data storage control method capable of transmitting data processed by an image processing apparatus in an image processing system to an Application (APP) of a host.
Fig. 2 is a schematic diagram of an image processing system of the present application. As shown in fig. 2, the image processing system 2 includes: an image processing apparatus 21 and a host 22.
The image processing device 21 is, for example, a Graphics Processing Unit (GPU), and the image processing device 21 may be mounted on a board. The image processing apparatus 21 may perform processing on the data, for example, processing such as rendering the image data, or other types of processing on the data.
The host 22 is, for example, a host of a Personal Computer (PC), a host of a server, or the like. An operating system, such as a Linux operating system, runs in the host 22. An Application program (APP) 221 may also run in the host 22, and the Application program 221 runs in the environment of an operating system. The application 221 may be a user mode APP.
In fig. 2, 2A indicates the host computer 22 side, and 2B indicates the board side on which the image processing apparatus 21 is mounted. Data exchange between the board and the host 22 can be performed through an interface 23. The interface 23 is, for example, a Peripheral Component Interconnect Express (PCIE) interface, and the application is not limited thereto, and the interface 23 may be of another type.
The storage control method of data according to the embodiment of the first aspect of the present application may be applied to the host 22.
Fig. 3 is a schematic diagram of a data storage control method according to an embodiment of the first aspect, and as shown in fig. 3, the data storage control method according to the embodiment of the first aspect includes:
In operation 301, the first storage is, for example, a memory of the host 22. The first memory space in the first memory may be a memory space allocated to the application 221. The physical page corresponding to the first virtual address may be allocated by the application 221.
In operation 302, the second virtual address (virtadress) is a target virtual address to which the data processed by the image processing apparatus 21 is written, that is, the data processed by the image processing apparatus 21 is written in the second storage space indicated by the second virtual address (virtadress).
According to the embodiment of the first aspect of the present application, the first virtual address allocated to the first storage space of the application 221 and the second virtual address of the second storage space in the virtual memory of the image processing apparatus 21 are mapped to the same physical address, so that when the image processing apparatus 21 writes the processed data into the storage space corresponding to the second virtual address, the data will be actually written into the physical page indicated by the physical address mapped by the second virtual address, and therefore the application 221 may read the data from the physical page based on the mapping relationship between the first virtual address and the physical address. Therefore, the embodiment of the first aspect of the present application can use a simple method to transfer the processed data to the application program, and improve the data transmission efficiency, for example, reduce the number of data transmission and copying.
In operation 301, the first storage space may be obtained by the application 221 using a dynamic memory allocation (malloc) function. The size of the first storage space may be determined according to data to be stored, for example, data processed by the image processing apparatus 21. The first memory space has a first virtual address, denoted userVirtAddress.
In operation 301, when obtaining the first virtual address uservirtdress sent by the application program 221, the os kernel driver of the host 22 may obtain at least one physical page corresponding to the first virtual address uservirtdress according to the first virtual address uservirtdress (for example, a physical page corresponding to the first virtual address may be allocated by the application program 221), and obtain a physical address physadress of each physical page, for example, a physical address of each of two or more physical pages may be written as physadress [0], physadress [1], physadress [2], \ 8230, where physadress [2], \\ 8230, physadress [ n ], where n is a natural number greater than or equal to 2, and n represents the number of physical pages corresponding to the first virtual address uservirtdress. The operating system Kernel Driver of the host 22 is, for example, a Kernel Mode Driver (KMD) program.
In operation 302, the second storage space in the virtual memory of the image processing apparatus 21 may be requested by the application 221 or the KMD program of the host 21. The method for the application 221 or the KMD program of the host 21 to apply for obtaining the second storage space may refer to the related art.
The second memory space may have at least one second virtual address, denoted virtadress. Each second virtual address points to a segment of virtual storage space. For example, in the case where the second storage space has more than two second virtual addresses, each second virtual address may be represented as virtadress [0], virtadress [1], virtadress [2], \8230 \ 8230;, virtadress [ n ], where n represents the number of second virtual addresses virtadress.
In operation 302, the host 22 (e.g., a KMD program of the host 22) may configure a Memory Management Unit (MMU) in the image processing apparatus 21 such that each of the second virtual addresses virtadress [0 to n ] is mapped to a physical address physdaddress [0 to n ] of a corresponding physical page.
As shown in fig. 3, the data storage control method further includes:
In operation 303, the KMD program of the host 22 may configure a first window of the interface 23 (e.g., PCIe interface), where the first window may convert a physical address of a first memory in the host 22 into a bus address of the interface 23, so that the image processing apparatus 21 may access a physical page pointed to by the physical address physdaddress [0 to n ] through the first window, that is, the image processing apparatus 21 performs a data read and/or write operation on the physical page. Wherein the first window is, for example, an outbend window, i.e., an outward window.
For example, the KMD program of the host 22 may configure a register in the outband window, so as to configure the address range of the outband window, so that the range of the physical address corresponding to the address range of the outband window includes the physical address physiaddress [ 0-/"so that the image processing apparatus 21 (e.g., GPU) can access the physical page through the interface 23 (e.g., PCIe interface) as long as it accesses the address range of the outband window, that is, the image processing apparatus 21 can access the physical page pointed to by the physical address physiaddress [ 0-/" through the configured outband window. For a particular method of configuring the first window by the KMD program, reference may be made to the related art.
Fig. 4 is a schematic diagram of the results of operations 301, 302, 303.
As shown in fig. 4, a first storage space 222 in the first memory of the host 22 has a first virtual address uservirtdress, n physical pages 2221 are provided in the storage space 222, and each physical page 2221 has a corresponding physical address physdaddress [0 to n ]. The virtual memory 211 of the image processing apparatus 21 has a plurality of virtual storage spaces 2111, and each virtual storage space 2111 has a corresponding second virtual address virtadress [0 to n ]. Each second virtual address virtadress [0 to n ] is mapped to a corresponding physical address physdaddress [0 to n ]. The image processing apparatus 21 can access the physical page 2221 in the first memory 222 of the host 22 through the first window 231.
In at least one embodiment, as shown in fig. 4, through operations 301 and 302, the first virtual address uservirtdress and the second virtual address virtdress are both mapped to the same physical address physdaddress; through operation 303, the image processing apparatus 21 can write data to the physical page 2221 pointed to by the physical address physdaddress through the first window 231 in the interface 23.
For example, when the processing unit 212 in the image processing apparatus 21 writes the processed data into the second virtual address virtadress of the virtual memory 211, the processed data is sent to a network device, such as a Network On Chip (NOC), and requests to access the outband window configured in operation 303, and when the network device recognizes that the image processing apparatus 21 requests to access the address range of the outband window configured in operation 303, the processed data is submitted to a bus (e.g., PCIe bus) and is written into the physical page 2221 in the first memory 222 of the host 22 through the bus.
Thus, when the processing unit 212 in the image processing apparatus 21 writes the processed data into the second virtual address VirtAddress of the virtual memory 211, the processed data is actually written into the physical page 2221 indicated by the physical address physdadress mapped by the second virtual address VirtAddress through the first window 231, so that when the application program 221 reads the data based on the first virtual address userviedress, the application program 221 actually reads the data from the physical page 2221 indicated by the physical address physdadress corresponding to the first virtual address uservietaddress. Accordingly, the data processed by the image processing apparatus 21 can be transferred to the application 221 in a simple manner without copying the data through an interface and requiring multiple copies of the data as in the technique shown in fig. 1.
As shown in fig. 3, the method for controlling storage of data according to the embodiment of the first aspect further includes:
In at least one embodiment, as shown in fig. 4, in operation 304, the KMD program of the host 22 may clear data in a cache line (cache line) corresponding to each physical page 2221, i.e., invalidate the cache line (invalid). Thus, when the application 221 reads the processed data from the physical page 2221 via the cache line, it is possible to avoid reading the previous data stored in the cache line and to avoid reading the error data.
Embodiments of the second aspect
An embodiment of a second aspect of the present application provides a data storage control method. This data storage control method can be applied to the image processing apparatus 21 in fig. 2.
Fig. 5 is a schematic diagram of a data storage control method in an embodiment of the second aspect. As shown in fig. 5, the data storage control method includes:
in operation 502, the image processing apparatus writes the processed data into a physical page indicated by the physical address mapped by the second virtual address (virtadress).
In at least one embodiment, the physical address of the physical page corresponds to a first virtual address uservirtdessay in a first memory of the host 22. The first virtual address uservirtdress may be a virtual address of the first memory space allocated to the application 221.
In operation 501, a Memory Management Unit (MMU) of the image processing apparatus 21 may be configured to: so that the second virtual address VirtAddress maps to the physical address physdaress of the physical page.
In operation 502, when the processing unit 212 in the image processing apparatus 21 writes the processed data into the second virtual address virtddress of the virtual memory 211, the processed data is actually written into the physical page 2221 indicated by the physical address physdadress mapped by the second virtual address virtddress through the first window 231 (for example, the first window is an outbout window) in the interface 23.
Therefore, when the application 221 reads data based on the first virtual address uservirtdress, the application actually reads data from the physical page 2221 indicated by the physical address physdaddress corresponding to the first virtual address uservirtdress.
Thus, the data processed by the image processing apparatus 21 can be transferred to the application 221 in a simple manner without copying the data through an interface and requiring multiple copies of the data as in the technique shown in fig. 1.
Moreover, for the corresponding content of the embodiment of the second aspect and the embodiment of the first aspect, reference may be made to the description of the embodiment of the first aspect, and the description is not repeated here.
Embodiments of the third aspect
Embodiments of a third aspect of the present application provide a method for controlling storage of data. This data storage control method can be applied to the host computer 22 in fig. 2.
Fig. 6 is a schematic diagram of a data storage control method in the embodiment of the third aspect. As shown in fig. 6, the data storage control method includes:
at operation 602, the Application (APP) reads data based on the first virtual address.
In at least one embodiment, an Application (APP) 221 may run in a user mode of the host 22. The first storage may be the memory of the host 22.
In operation 601, the application 221 may obtain the first storage space in the first storage by using a dynamic memory allocation (malloc) function. The size of the first storage space may be determined according to data to be stored, for example, data processed by the image processing apparatus 21. The first memory space has a first virtual address, denoted uservirtddress.
In at least one embodiment, the first virtual address uservirtdress and the second virtual address virtdress in the virtual memory of the image processing apparatus 21 may map to the same physical address physdaddress.
Therefore, when the processing unit 212 in the image processing apparatus 21 writes the processed data into the second virtual address virtddress of the virtual memory 211, the processed data is actually written into the physical page 2221 indicated by the physical address physdadress mapped by the second virtual address virtddress.
When the application 221 reads data based on the first virtual address uservirtdress, the application actually reads data from the physical page 2221 indicated by the physical address physdaddress corresponding to the first virtual address uservirtdress.
Thus, the application 221 can obtain the data processed by the image processing apparatus 21 in a simple manner without copying the data through an interface and requiring multiple copies of the data as in the technique shown in fig. 1.
Moreover, for the corresponding content of the embodiment of the third aspect and the embodiment of the first aspect, reference may be made to the description of the embodiment of the first aspect, and the description is not repeated here.
Embodiments of the fourth aspect
An embodiment of a fourth aspect of the present application provides a data storage control method. This data storage control method can be applied to the image processing system 2 in fig. 2.
Fig. 7 is a schematic diagram of a data storage control method in an embodiment of the fourth aspect. As shown in fig. 7, the data storage control method includes:
at operation 706, an application program (APP) reads the processed data from the physical page indicated by the physical address based on the first virtual address.
In at least one embodiment, in operation 701, the user mode application program (APP) 221 of the host 22 may use a malloc function to allocate a segment of memory (i.e., a first storage space) for storing data processed by the image processing apparatus 21, where the first storage space has a first virtual address uservirtadress. The application program 221 transmits the first virtual address userVirtAddress to a Kernel Mode Driver (KMD) program of the host 22.
In operation 702, the KMD of the host 22 may obtain the specific physical pages of the first storage space according to the first virtual address, and obtain a physical address of each physical page, which is denoted as physa address [0], physa address [1], physa address [2], and then physa address [ n ].
In addition, the KMD of the host 22 may perform invalidation (invalid) processing on the cache lines (cache lines) corresponding to these physical pages.
Furthermore, a second storage space in the virtual memory of the image processing apparatus 21 may be requested by the application program (APP) 221, where the second storage space has a second virtual address denoted as virtadress [0 to n ].
In operation 703, a first window (e.g., the first window is an outbout window) of the first interface 23 (e.g., the first interface is a PCIe interface) may be configured by the KMD of the host 22, so that the image processing apparatus 21 may access physdaddress [0 to n ].
In operation 704, a Memory Management Unit (MMU) inside the image processing apparatus 21 may be configured by the KMD of the host 22 such that virtadress [0] to n ] is mapped to phytadress [0] to n ].
In operation 705, the image processing apparatus 21, when writing the processed data (e.g., the result of rendering) to the second virtual address VirtAddress, actually writes the data to the physical page indicated by the physical address physdadress;
in operation 706, when the application program (APP) 221 reads data from the first storage space based on the first virtual address uservirtdress, since the first virtual address uservirtdress maps to the above physical address physiaddress, the application program (APP) 221 may directly read the processed data from the physical page indicated by the above physical address physiaddress mapped to the first virtual address uservirtdress.
Thus, the application 221 can obtain the data processed by the image processing apparatus 21 in a simple manner without copying the data through an interface and requiring multiple copies of the data as in the technique shown in fig. 1.
Embodiments of the fifth aspect
An embodiment of the fifth aspect provides a data storage control device, which is applied to a host 22. This data storage control apparatus corresponds to the data storage control method of the embodiment of the first aspect.
Fig. 8 is a schematic diagram of a data storage control apparatus according to an embodiment of the fifth aspect. As shown in fig. 8, the data storage control apparatus 800 includes a first control unit 801. The first control unit 801 is configured to perform the following operations:
determining a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first storage of a host; and
mapping a second virtual address of a second storage space in a virtual memory of the image processing device to the physical address of the physical page, wherein the data processed by the image processing device is written into the physical page indicated by the physical address mapped by the second virtual address.
In at least one embodiment, the first control unit 801 may have the functionality of an operating system kernel driver (e.g., a KMD program).
The embodiment of the fifth aspect further provides a data storage control device, which is applied to the image processing device 21. This data storage control device corresponds to the data storage control method of the embodiment of the second aspect.
Fig. 9 is another schematic diagram of a data storage control apparatus according to an embodiment of the fifth aspect. As shown in fig. 9, the storage control apparatus 900 of data includes a second control unit 901, the second control unit 901 is configured to:
mapping a second virtual address (VirtAddress) of a second storage space in a virtual memory of the image processing device to a physical address of a physical page; and
and the image processing device writes the processed data into a physical page indicated by the physical address mapped by the second virtual address (VirtAddress), wherein the physical address of the physical page corresponds to a first virtual address (userVirtAddress) in a first memory of the host.
The embodiment of the fifth aspect further provides a data storage control device, which is applied to the host 22. This data storage control device corresponds to the data storage control method of the embodiment of the third aspect.
Fig. 10 is still another schematic diagram of a data storage control apparatus according to an embodiment of the fifth aspect. As shown in fig. 10, the storage control device 1000 of data includes a third control unit 1001, and the third control unit 1001 is configured to:
obtaining a first virtual address (userVirtAddress) corresponding to a first storage space in a first storage of a host; and
reading data based on the first virtual address, wherein the first virtual address and a second virtual address (VirtAddress) in a virtual memory of the image processing device (GPU) are mapped to the same physical address.
In at least one embodiment, the third control unit 1001 may have the function of an application program (APP).
Examples of the sixth aspect
An embodiment of a sixth aspect provides an image processing system, for example the image processing system 2 shown in fig. 2.
The image processing system 2 includes an image processing apparatus 21 and a host computer 22. The image processing apparatus 21 may have a data storage control apparatus 900, and the host 22 may have a data storage control apparatus 800 and a data storage control apparatus 1000.
The host 22 may be, for example, a computer, server, workstation, laptop, smartphone, or the like; the embodiments of the present application are not limited thereto.
FIG. 11 is a schematic diagram of a host. As shown in fig. 1, the host 1100 may include: a processor (e.g., central processing unit, CPU) 1110 and a memory 1120; the memory 1120 is coupled to the central processor 1110. Wherein the memory 1120 can store various data; further, a program 1121 for information processing is stored, and the program 1121 is executed under the control of the processor 1110.
In some embodiments, the functions of the data storage control device 800 and the data storage control device 1000 are implemented integrated into the processor 1110. Wherein the processor 1110 is configured to implement the method as described in the embodiments of the first and third aspects.
In some embodiments, the data storage control apparatus 800 and the data storage control apparatus 1000 are configured separately from the processor 1110, for example, the data storage control apparatus 800 and the data storage control apparatus 1000 may be configured as a chip connected to the processor 1110, and the functions of the data storage control apparatus 800 and the data storage control apparatus 1000 are realized by the control of the processor 1110.
Further, as shown in fig. 11, the host 1100 may further include: input/output (I/O) devices 1130 and a display 1140; the functions of the above components are similar to those of the prior art, and are not described herein again. It is noted that host 1100 also does not necessarily include all of the components shown in FIG. 11; in addition, the host 1100 may further include components not shown in fig. 11, which can be referred to in the related art.
Embodiments of the present application also provide a computer device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing any of the methods in the embodiments of the first to third aspects when executing the computer program.
Embodiments of the present application also provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements any of the methods in the embodiments of the first to third aspects.
Embodiments of the present application also provide a computer program product comprising a computer program that, when executed by a processor, implements any of the methods in the embodiments of the first to third aspects.
In the technical scheme of each embodiment of the application, the data acquisition, storage, use, processing and the like all conform to relevant regulations of national laws and regulations.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and so forth) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above-mentioned embodiments are further described in detail for the purpose of illustrating the invention, and it should be understood that the above-mentioned embodiments are only illustrative of the present invention and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (18)
1. A data storage control method is applied to a host, and is characterized by comprising the following steps:
determining a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first storage of a host; and
mapping a second virtual address of a second storage space in a virtual memory of the image processing apparatus to the physical address of the physical page,
wherein the data processed by the image processing apparatus is written into the physical page indicated by the physical address of the second virtual address map.
2. The method of claim 1, wherein the method further comprises:
configuring a first window in an interface between the image processing device and the host for the image processing device to access the at least one physical page.
3. The method of claim 1 or 2, wherein the method further comprises:
and setting the cache line corresponding to each of the at least one physical page as invalid.
4. The method of claim 1,
the first storage space is a storage space in the first storage obtained by an application program based on a dynamic memory allocation function.
5. The method of claim 1,
configuring a memory management unit of the image processing apparatus such that the second virtual address maps to the physical address of the physical page.
6. A data storage control method applied to an image processing device is characterized by comprising the following steps:
mapping a second virtual address of a second storage space in a virtual memory of the image processing device to a physical address of a physical page; and
the image processing apparatus writes the processed data to the physical page indicated by the physical address of the second virtual address map,
wherein the physical address of the physical page corresponds to a first virtual address in a first memory of a host.
7. The method of claim 6,
mapping the second virtual address to the physical address, comprising:
the memory management unit of the image processing apparatus is configured such that the second virtual address maps to the physical address of the physical page.
8. The method of claim 6,
and the image processing device writes the processed data into the physical page through a first window in an interface between the image processing device and the host.
9. A data storage control method applied to a host is characterized by comprising the following steps:
an application program obtains a first virtual address corresponding to a first storage space in a first storage of a host; and
the application reads data based on the first virtual address,
wherein the content of the first and second substances,
the first virtual address and a second virtual address in a virtual memory of the image processing device are mapped to the same physical address, and the image processing device is used for writing data obtained by executing the application program task into a physical page indicated by the physical address mapped by the second virtual address.
10. A data storage control method applied to an image processing system including an image processing apparatus and a host, the method comprising:
the host determines a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first memory;
mapping a second virtual address of a second storage space in a virtual memory of the image processing apparatus to the physical address of the physical page; and
the image processing device writes the processed data into the physical page indicated by the physical address of the second virtual address mapping.
11. The method for controlling storage of data according to claim 10, further comprising:
an application program obtains the first virtual address and sends the first virtual address to an operating system kernel driver of the host; and
after the image processing device writes the processed data into the physical page, the application program reads the processed data from the physical page indicated by the physical address based on the first virtual address.
12. A data storage control device applied to a host computer is characterized by comprising a first control unit, wherein the first control unit is configured to:
determining a physical address of at least one physical page corresponding to a first virtual address of a first storage space in a first storage of a host; and
mapping a second virtual address of a second storage space in a virtual memory of the image processing apparatus to the physical address of the physical page,
wherein the data processed by the image processing apparatus is written into the physical page indicated by the physical address of the second virtual address map.
13. A storage control apparatus of data applied to an image processing apparatus, characterized in that the storage control apparatus of data includes a second control unit configured to:
mapping a second virtual address of a second storage space in a virtual memory of the image processing device to a physical address of a physical page; and
the image processing apparatus writes the processed data to the physical page indicated by the physical address of the second virtual address map,
wherein the physical address of the physical page corresponds to a first virtual address in a first memory of a host.
14. The data storage control device is applied to a host, and is characterized by comprising a third control unit, wherein the third control unit is configured to:
obtaining a first virtual address corresponding to a first storage space in a first storage of a host; and
reading data based on the first virtual address,
wherein, the first and the second end of the pipe are connected with each other,
the first virtual address and a second virtual address in a virtual memory of the image processing device are mapped to the same physical address, and the image processing device is used for writing data obtained by executing application program tasks into a physical page indicated by the physical address mapped by the second virtual address.
15. An image processing system characterized by comprising:
an image processing apparatus having the data storage control apparatus according to claim 13; and
a host having the data storage control device according to claim 12 and the data storage control device according to claim 14.
16. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the method of any of claims 1 to 11 when executing the computer program.
17. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program which, when executed by a processor, implements the method of any one of claims 1 to 11.
18. A computer program product, characterized in that the computer program product comprises a computer program which, when being executed by a processor, carries out the method of any one of claims 1 to 11.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104090849A (en) * | 2013-03-15 | 2014-10-08 | 英特尔公司 | Memory mapping for graphics processing unit |
CN106294214A (en) * | 2012-08-17 | 2017-01-04 | 英特尔公司 | By the Memory Sharing of Unified Memory Architecture |
US20180024938A1 (en) * | 2016-07-21 | 2018-01-25 | Advanced Micro Devices, Inc. | Allocating physical pages to sparse data sets in virtual memory without page faulting |
CN113168322A (en) * | 2019-05-27 | 2021-07-23 | 华为技术有限公司 | Graph processing method and device |
-
2022
- 2022-11-09 CN CN202211400359.9A patent/CN115454358B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106294214A (en) * | 2012-08-17 | 2017-01-04 | 英特尔公司 | By the Memory Sharing of Unified Memory Architecture |
CN104090849A (en) * | 2013-03-15 | 2014-10-08 | 英特尔公司 | Memory mapping for graphics processing unit |
US20180024938A1 (en) * | 2016-07-21 | 2018-01-25 | Advanced Micro Devices, Inc. | Allocating physical pages to sparse data sets in virtual memory without page faulting |
CN109564551A (en) * | 2016-07-21 | 2019-04-02 | 超威半导体公司 | Sparse data set of the physical page into virtual memory is distributed in the case where no page fault |
CN113168322A (en) * | 2019-05-27 | 2021-07-23 | 华为技术有限公司 | Graph processing method and device |
Non-Patent Citations (2)
Title |
---|
SIDDHARTH GUPTA ET AL.: "Rebooting Virtual Memory with Midgard", 《IEEE XPLORE》 * |
凌震莹等: "一种嵌入式系统虚拟内存管理机制的实现方法", 《科学技术与工程》 * |
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