CN115437675A - Method, device, equipment and medium for online upgrading application program - Google Patents

Method, device, equipment and medium for online upgrading application program Download PDF

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Publication number
CN115437675A
CN115437675A CN202211272584.9A CN202211272584A CN115437675A CN 115437675 A CN115437675 A CN 115437675A CN 202211272584 A CN202211272584 A CN 202211272584A CN 115437675 A CN115437675 A CN 115437675A
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address value
program
data
flash memory
upgrading
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温家辉
曹乃锋
薄丽丽
赵宇
兰芬
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China Aviation Lithium Battery Co Ltd
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China Aviation Lithium Battery Co Ltd
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Priority to CN202211272584.9A priority Critical patent/CN115437675A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates
    • G06F8/654Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories

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  • Computer Security & Cryptography (AREA)
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Abstract

The application provides an application program online upgrading method, device, equipment and medium. The method comprises the following steps: after receiving the upgrade data of the target application, acquiring a storage address value of a starting program of the chip and a first address value of a flash memory, which is requested to be written by the upgrade data. The storage address value of the starting program comprises a head end address value and a tail end address value of the starting program in the flash memory, and the flash memory data of the starting program is determined whether to be erased when the upgrade data is written or not by comparing the storage address value with the address value of the upgrade data request written in the flash memory. And then upgrading the target application according to the upgrading data after determining that the flash memory data of the starting program cannot be erased so as to relieve the problem that the flash memory data of the starting program is erased and damaged in the upgrading process of the application program.

Description

Method, device, equipment and medium for online upgrading application program
Technical Field
The embodiment of the application relates to the technical field of battery management systems, in particular to an application program online upgrading method, device, equipment and medium.
Background
Currently, a distributed Battery Management System (BMS) architecture is generally adopted in mainstream mass-produced electric vehicle models. The distributed BMS architecture can better realize hierarchical management of module level and system level. When hardware is produced by BMS hardware manufacturers, a boot startup program is burned on a chip through program burning equipment when the chip is not mounted.
Because the program downloading interface of the chip is mostly hidden in the box body and can not be led out, the application program in the chip is mostly upgraded through the communication interface and the boot program. Due to the influence of factors such as information transfer deviation, bit error rate and the like, the boot data written into the FLASH FLASH memory is erased and damaged in the upgrading process, and therefore the BMS cannot run. At the moment, BMS hardware can only be returned to the factory, and then the shell is detached and the boot program is re-burned through the program downloading interface, so that extra labor cost is caused.
Disclosure of Invention
The embodiment of the application provides an online upgrading method, device, equipment and medium for an application program, and is used for solving the problem that starting data written into a flash memory is erased and damaged in the upgrading process of the application program.
In a first aspect, an embodiment of the present application provides an online application program upgrading method, where the method includes:
receiving upgrade data of a target application in response to an application upgrade indication;
acquiring a storage address value of a starting program of a chip and a first address value written into a flash memory by the upgrading data request; wherein the storage address value comprises a head end address value and a tail end address value of the start-up program;
determining whether the flash memory data of the starting program can be erased or not when the upgrade data is written according to the storage address value and the first address value; and after determining that the flash memory data of the starting program cannot be erased, upgrading the target application according to the upgrading data.
In some possible embodiments, the obtaining the memory address value of the start program of the chip includes:
determining a head end address value of the starting program according to the starting file of the chip;
creating a target function at the end of the main function cycle of the starting program; wherein the target function is to indicate to read a value of a program counter register;
and determining the terminal address value of the starting program according to the read value of the program counter register by enabling the main function of the starting program to call the target function.
In some possible embodiments, the method further comprises:
reading the address value currently indicated by the stack when the target function is called;
and taking the sum of the address value and a preset address value as the terminal address value of the starting program.
In some possible embodiments, the obtaining the storage address value of the chip start program includes:
performing software compilation on the starting program to obtain a mapping file of the starting program;
and determining the storage address value of the starting program according to the mapping file.
In some possible embodiments, the determining whether the flash data of the boot program will be erased when the upgrade data is written according to the storage address value and the first address value includes:
determining a second address value according to the data length of the upgrading data and the first address value, wherein the second address value is a tail end address value of the upgrading data after being written into a flash memory;
and if the first address value is larger than the tail end address value of the starting program or the second address value is smaller than the head end address value of the starting program, determining that the flash memory data of the starting program cannot be erased when the upgrading data is written.
In some possible embodiments, the upgrading the target application according to the upgrade data includes:
determining a corresponding target area of the upgrading data in the flash memory according to the first address value and the second address value;
and erasing the data in the target area, and writing the upgrading data from the first address value.
In a second aspect, an embodiment of the present application provides an apparatus for online upgrading an application, where the apparatus includes:
a data acquisition module configured to perform receiving upgrade data of a target application in response to an application upgrade indication;
the address acquisition module is configured to execute the storage address value of the starting program of the acquisition chip and the first address value written into the flash memory by the upgrading data request; wherein the storage address value comprises a head end address value and a tail end address value of the boot program;
the address checking module is configured to determine whether the flash memory data of the starting program is erased or not when the upgrade data is written according to the storage address value and the first address value; and after determining that the flash memory data of the starting program cannot be erased, upgrading the target application according to the upgrading data.
In some possible embodiments, the obtaining of the memory address value of the start-up program of the chip is performed, and the address obtaining module is configured to:
determining a head end address value of the starting program according to the starting file of the chip;
creating a target function at the end of the main function cycle of the starting program; wherein the objective function is to indicate to read a value of a program counter register;
and determining the terminal address value of the starting program according to the read value of the program counter register by enabling the main function of the starting program to call the target function.
In some possible embodiments, the address acquisition module is further configured to:
reading the address value currently indicated by the stack when the target function is called;
and taking the sum of the address value and a preset address value as the terminal address value of the starting program.
In some possible embodiments, the obtaining the memory address value of the chip boot program is performed, and the address obtaining module is configured to:
performing software compilation on the starting program to obtain a mapping file of the starting program;
and determining the storage address value of the starting program according to the mapping file.
In some possible embodiments, the determining whether the flash data of the boot program will be erased when the upgrade data is written is performed according to the storage address value and the first address value, and the address verification module is configured to:
determining a second address value according to the data length of the upgrading data and the first address value, wherein the second address value is a terminal address value of the upgrading data after the upgrading data is written into a flash memory;
and if the first address value is larger than the tail end address value of the starting program or the second address value is smaller than the head end address value of the starting program, determining that the flash memory data of the starting program cannot be erased when the upgrading data is written.
In some possible embodiments, performing the upgrade of the target application according to the upgrade data, the address verification module is configured to:
determining a corresponding target area of the upgrading data in the flash memory according to the first address value and the second address value;
and erasing the data in the target area, and writing the upgrading data from the first address value.
In a third aspect, an embodiment of the present application provides an electronic device, including:
a memory for storing program instructions;
a processor for calling the program instructions stored in the memory and executing the steps comprised in the method of any one of the first aspect according to the obtained program instructions.
In a fourth aspect, embodiments of the present application provide a computer-readable storage medium having stored thereon a computer program comprising program instructions which, when executed by a computer, cause the computer to perform the method of any one of the first aspects.
In a fifth aspect, an embodiment of the present application provides a computer program product, where the computer program product includes: computer program code for causing a computer to perform the method of any of the first aspect when the computer program code runs on a computer.
After receiving the upgrade data of the target application, the embodiment of the application acquires the storage address value of the starting program of the chip and the first address value of the flash memory, which is requested to be written by the upgrade data. The storage address value of the starting program comprises a head end address value and a tail end address value of the starting program in the flash memory, and the flash memory data of the starting program is determined whether to be erased when the upgrade data is written or not by comparing the storage address value with the address value of the upgrade data request written in the flash memory. And then upgrading the target application according to the upgrading data after determining that the flash memory data of the starting program cannot be erased so as to relieve the problem that the flash memory data of the starting program is erased and damaged in the upgrading process of the application program.
Additional features and advantages of the present application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the present disclosure. The objectives and other advantages of the application may be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
Fig. 1 is a schematic diagram of a FLASH memory according to an embodiment of the present disclosure;
FIG. 2 is a schematic diagram of an existing upgrade method provided in an embodiment of the present application;
fig. 3 is an overall flowchart of an application online upgrade method according to an embodiment of the present application;
FIG. 4 is a schematic diagram of a boot program and a location of an application partition according to an embodiment of the present application;
fig. 5 is a schematic diagram of address verification provided in the embodiment of the present application;
fig. 6 is a schematic diagram of another address verification provided in the embodiment of the present application;
fig. 7 is a schematic flowchart of application program upgrade provided in an embodiment of the present application;
fig. 8 is a block diagram of an application online upgrade apparatus 800 according to an embodiment of the present disclosure;
fig. 9 is a schematic view of an electronic device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application. In the present application, the embodiments and features of the embodiments may be arbitrarily combined with each other without conflict. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.
The terms "first" and "second" in the description and claims of the present application and the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the term "comprises" and any variations thereof are intended to cover non-exclusive protection. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements but may alternatively include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus. The term "a plurality" in the present application may mean at least two, for example, two, three or more, and the embodiments of the present application are not limited.
The chip of the current BMS is mainly an MCU (Microcontroller Unit) chip, i.e., a micro control Unit chip. The MCU chip is a chip-level computer that appropriately reduces the frequency and specification of a Central Processing Unit (CPU) and integrates peripheral interfaces such as a counter, USB, a/D conversion, UART, and the like, and a driving circuit into a single chip.
Programs in the MCU chip are usually stored in the FLASH, the FLASH is usually provided with a plurality of storage areas, and different areas are used for storing different program data. For example, fig. 1 shows a FLASH memory in which a "Bootloader area", a "running area", and a "backup area" are allocated. The Bootloader area is used for verifying the backup program, and if a preset verification condition is met, the backup program is replaced by the original application program, so that the application program is upgraded. The operation area is used for operating the application program, and the backup area is used for receiving the upgrading data of the application program.
In the related art, the upgrading mode of the application program is generally as shown in fig. 2, and the chip obtains the upgrading data of the application program after receiving the upgrading instruction. The address of the upgrade data request written into the flash memory is obtained by analyzing the upgrade data. And then erasing the data in the area indicated by the address in the flash memory, writing the upgrading data into the area, and finishing the upgrading of the application program after checking the integrity of the written data. If the address written by the upgrade data request is intersected with the storage address of the start program in the flash memory, the boot data written in the flash memory can be erased and damaged, and the BMS cannot run.
In order to solve the above problems, the inventive concept of the present application is: after receiving the upgrade data of the target application, acquiring a storage address value of a starting program of the chip and a first address value of the flash memory, which is requested to be written by the upgrade data. The storage address value of the starting program comprises a head end address value and a tail end address value of the starting program in the flash memory, and the flash memory data of the starting program is determined whether to be erased when the upgrade data is written or not according to the comparison between the storage address value and the address value written into the flash memory by the upgrade data request. And then upgrading the target application according to the upgrading data after the flash memory data of the starting program is determined not to be erased so as to relieve the problem that the flash memory data of the starting program is erased and damaged in the upgrading process of the application program.
Referring to fig. 3, fig. 3 is an overall flowchart of an application online upgrade method provided in an embodiment of the present application, including:
step 301: receiving upgrade data of a target application in response to an application upgrade indication;
step 302: acquiring a storage address value of a starting program of a chip and a first address value written into a flash memory by the upgrading data request; wherein the storage address value comprises a head end address value and a tail end address value of the start-up program;
the first address value is a head end address value of the flash memory requested to be written in by the upgrade data, and is usually set by a provider of the upgrade data, and the first address value can be obtained by analyzing the upgrade data after receiving the upgrade data.
The storage address value of the start-up Program includes a head address value and a tail address value, and is obtained by reading a pointer of a Program Counter register (Program Counter). When the method is implemented, the address value of the head end of the starting program is determined according to the starting file of the chip. An objective function is created at the end of the main function loop of the start-up program, the objective function indicating the value of the read program counter register. And enabling the application program to determine the end address value of the starting program according to the read value of the program counter register when the target function is called.
Specifically, an objective function is created at the end of the logical loop of the main function (i.e., main function) of the startup program. In order to reduce the memory resources occupied by the objective function as much as possible, in the embodiment of the present application, the objective function is set to indicate only one instruction, and the instruction is used for indicating to read the value of the program counter register. When the starting program is started, the value of the PC register is read by triggering the instruction when the main function calls the target function, and the value of the PC register is used as the terminal address value of the starting program. And reading the value of the PC register before jumping to the main function in the starting file of the chip, and taking the value as the address value of the head end of the starting program. Thus, the head address value and the tail address value of the starting program can be obtained.
In addition, it is considered that some MCU chips do not have the capability of directly accessing the PC pointer, that is, when the target function is called through the above procedure, the storage address values (i.e. the head address value and the tail address value) of the boot program cannot be obtained directly by reading the value of the PC pointer pointing to the PC register. In practical applications, when the main program runs to the calling target function, the PC pointer of the MCU chip is pushed into the stack. Based on this, the storage address value of the initiator can be determined by reading the address value currently indicated by the stack and according to the address value when the target function is called.
The address value of the stack indication read when the target function is called is only an address very close to the end of the program and is not exactly the same as the value of the PC pointer pointing to the PC register. Simulation observations have shown that there are several instructions behind this address value. Therefore, the address value is not an accurate program end address, so that the preset address value can be set according to actual requirements, and after the address value currently indicated by the stack is read, the sum of the address value and the preset address value is used as the end address value of the starting program. Accordingly, the address value of the stack pointer read by the main function during operation is only an address value very close to the address of the head end of the program, and the address value is not exactly the same as the value of the PC pointer pointing to the PC register.
In some possible embodiments, a first preset address value for obtaining the head address value and a second preset address value for obtaining the tail address value may be set for the start-up procedure according to actual requirements. And when the main function runs, the sum of the address value currently indicated by the stack and the first preset address value is used as the initial address value of the starting program, and when the target function is called, the sum of the address value currently indicated by the stack and the second preset address value is used as the terminal address value of the starting program.
In addition, the storage address value of the starting program can be obtained by compiling a boot software project to generate a mapping file (. MAP). During implementation, the starting program can be compiled by software to obtain the mapping file of the starting program, and then the head end address value and the tail end address value of the starting program are inquired in the MAP file and input in the program.
Step 303: determining whether the flash memory data of the starting program can be erased or not when the upgrade data is written according to the storage address value and the first address value; and after determining that the flash memory data of the starting program cannot be erased, upgrading the target application according to the upgrading data.
As mentioned in fig. 2, if there is an intersection between the address requested to be written by the upgrade data and the storage address of the boot program in the flash memory, the boot data written in the flash memory will be erased and destroyed. In the FLASH memory, the locations of the partition where the boot program is located and the partition where the application program is located are preset, and there are two cases where the partition of the boot program in the FLASH memory is located above the partition of the application program as shown on the left side of fig. 4, and the partition of the boot program in the FLASH memory is located below the partition of the application program as shown on the right side of fig. 4.
After the first address value of the upgrade data and the storage address value of the boot program are obtained in step 302, it is necessary to locally check the two sets of address values to determine whether there is a conflict between the address values of the boot program and the upgrade data. When the method is implemented, a second address value is determined according to the data length of the upgrading data and the first address value, and the second address value is the tail end address value of the upgrading data after the upgrading data is written into the flash memory. And if the first address value is larger than the tail end address value of the starting program or the second address value is smaller than the head end address value of the starting program, determining that the flash memory data of the starting program cannot be erased when the upgrading data is written.
Specifically, the data length of the upgrade data can be obtained by analyzing the upgrade data, and the terminal address value of the upgrade data after being written into the flash memory, that is, the second address value, can be obtained by adding the first address value (that is, the head address value of the request to be written into the flash memory) of the upgrade data and the data length. Specifically, as shown in fig. 5, since the larger the address value is, the more backward the partition is, when the partition where the boot program is located in the flash memory is located on the partition of the application program, it is necessary to ensure that the first address value is larger than the end address value of the boot program. That is, the address of the head end to which the upgrade data request is written is located below the address of the tail end of the boot program, so that no matter how long the upgrade data is written from the first address value, there is no intersection with the boot program. Accordingly, as shown in fig. 6, when the partition in which the boot program is located in the flash memory is located below the application program, it is required to ensure that the second address value is smaller than the first address value of the boot program. Namely, the tail end address of the upgrade data request is located above the head end address of the start program, so that the upgrade data can be ensured not to erase and damage the data of the start program even if the upgrade data is completely written into the flash memory.
Further, if it is determined that the flash memory data of the boot program cannot be erased through the verification process, determining a corresponding target area of the upgrade data in the flash memory according to the first address value and the second address value, then erasing the data in the target area, and writing the upgrade data from the first address value.
Correspondingly, if the verification process representation can erase the flash memory data of the starting program, the operation of upgrading the target application through the upgrading data needs to be cancelled. The method can specifically set a corresponding instruction, and after verifying that the flash memory data of the starting program can be erased in the upgrade, the related information of the upgrade data address is requested to be modified by a user.
For facilitating understanding of a specific upgrading process of a target application in the above steps of the present application, as shown in fig. 7, the method specifically includes:
step 701: monitoring whether an upgrade indication is received;
step 702: if the upgrading indication is not received, whether the flag bit of the target application indicates to be started is inquired;
step 703: if the flag bit indicates the enabling, the target application is enabled; otherwise, return to step 701.
Step 704: and if the upgrading instruction is received, acquiring the storage address value of the starting program.
Step 705: skipping to a receiving program and receiving a section of upgrading data; it should be noted here that, when an application program is upgraded, a complete upgrade package is usually not directly issued, but issued in the form of a segment of upgrade data.
Step 706: the upgrade data is parsed to determine a first address value and a second address value for the upgrade data requesting writing to the flash memory.
Step 707: detecting whether the first address value is larger than the terminal address value of the starting program;
step 708: if the number of the target areas is larger than the number of the target areas, the flash memory data of the starting program cannot be erased when the upgrading data are written, the target areas indicated by the first address value and the second address value in the flash memory can be erased, and the upgrading data are written into the target areas;
step 709: if not, detecting whether the second address value is smaller than the address value of the head end of the starting program or not;
step 710: if the number of the upgrade data is less than the number of the upgrade data, the flash memory data of the startup program is erased when the upgrade data is written, and at the moment, the upgrade process needs to be ended, so that the flash memory data of the startup program is prevented from being erased due to the upgrade application. Accordingly, if not, it indicates that the flash data of the boot program is not erased when the upgrade data is written, and the above step 708 may be performed.
Step 711: detecting whether the upgrade data is completely written:
step 712: and if all the writing is performed, finishing upgrading the target application. After the code integrity of the target application is checked, the target application partition in the flash memory is jumped to, and the target application is waited to be started. Accordingly, if not all writes, then return to step 705 to continue receiving the remaining upgrade data.
The above-mentioned procedure compares the storage address value of the starting program with the address value of the upgrading data request written into the flash memory, so as to determine whether the flash memory data of the starting program will be erased when the upgrading data is written. And then upgrading the target application according to the upgrading data after the flash memory data of the starting program is determined not to be erased so as to relieve the problem that the flash memory data of the starting program is erased and damaged in the upgrading process of the application program.
Based on the same inventive concept, an embodiment of the present application provides an online application program upgrade apparatus 800, specifically as shown in fig. 8, including:
a data acquisition module 801 configured to perform receiving upgrade data of a target application in response to an application upgrade instruction;
an address obtaining module 802 configured to execute obtaining a storage address value of a start program of a chip and a first address value of the upgrade data request written into the flash memory; wherein the storage address value comprises a head end address value and a tail end address value of the start-up program;
an address verification module 803, configured to determine whether the flash memory data of the boot program will be erased when the upgrade data is written according to the storage address value and the first address value; and after determining that the flash memory data of the starting program cannot be erased, upgrading the target application according to the upgrading data.
In some possible embodiments, the address obtaining module 802 is configured to perform the obtaining of the memory address value of the boot program of the chip:
determining a head end address value of the starting program according to the starting file of the chip;
creating a target function at the end of the main function cycle of the starting program; wherein the objective function is to indicate to read a value of a program counter register;
determining an end address value of the start-up program from the read value of the program counter register by enabling a main function of the start-up program to call the target function.
In some possible embodiments, the address acquisition module 802 is further configured to:
reading the address value currently indicated by the stack when the target function is called;
and taking the sum of the address value and a preset address value as the terminal address value of the starting program.
In some possible embodiments, executing the obtaining of the memory address value of the chip start-up program, the address obtaining module 802 is configured to:
performing software compiling on the starting program to obtain a mapping file of the starting program;
and determining the storage address value of the starting program according to the mapping file.
In some possible embodiments, the determining whether the flash data of the boot program will be erased when the upgrade data is written according to the storage address value and the first address value is performed, and the address verification module 803 is configured to:
determining a second address value according to the data length of the upgrading data and the first address value, wherein the second address value is a tail end address value of the upgrading data after being written into a flash memory;
and if the first address value is larger than the tail end address value of the starting program or the second address value is smaller than the head end address value of the starting program, determining that the flash memory data of the starting program cannot be erased when the upgrading data is written.
In some possible embodiments, performing the upgrade of the target application according to the upgrade data, the address verification module 803 is configured to:
determining a corresponding target area of the upgrading data in the flash memory according to the first address value and the second address value;
and erasing the data in the target area, and writing the upgrading data from the first address value.
The electronic device 130 according to this embodiment of the present application is described below with reference to fig. 9. The electronic device 130 shown in fig. 9 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present application.
As shown in fig. 9, the electronic device 130 is represented in the form of a general electronic device. The components of the electronic device 130 may include, but are not limited to: the at least one processor 131, the at least one memory 132, and a bus 133 that couples various system components including the memory 132 and the processor 131.
Bus 133 represents one or more of any of several types of bus structures, including a memory bus or memory controller, a peripheral bus, a processor, or a local bus using any of a variety of bus architectures.
The memory 132 may include readable media in the form of volatile memory, such as Random Access Memory (RAM) 1321 and/or cache memory 1322, and may further include Read Only Memory (ROM) 1323.
Memory 132 may also include programs/utilities 1325 having a set (at least one) of program modules 1324, such program modules 1324 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.
The electronic device 130 may also communicate with one or more external devices 134 (e.g., keyboard, pointing device, etc.), with one or more devices that enable a user to interact with the electronic device 130, and/or with any devices (e.g., router, modem, etc.) that enable the electronic device 130 to communicate with one or more other electronic devices. Such communication may occur through input/output (I/O) interfaces 135. Also, the electronic device 130 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network, such as the internet) via the network adapter 136. As shown, the network adapter 136 communicates with other modules for the electronic device 130 over the bus 133. It should be understood that although not shown in the figures, other hardware and/or software modules may be used in conjunction with the electronic device 130, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, to name a few.
In an exemplary embodiment, a computer-readable storage medium comprising instructions, such as the memory 132 comprising instructions, executable by the processor 131 of the apparatus to perform the method described above is also provided. Alternatively, the computer readable storage medium may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.
In an exemplary embodiment, there is also provided a computer program product comprising computer programs/instructions which, when executed by the processor 131, implement any of the application online upgrade methods as provided herein.
In an exemplary embodiment, aspects of an application online upgrade method provided by the present application may also be implemented in the form of a program product including program code for causing a computer device to perform the steps of an application online upgrade method according to various exemplary embodiments of the present application described above in this specification when the program product is run on the computer device.
The program product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The program product for online application upgrade of the embodiments of the present application may employ a portable compact disc read only memory (CD-ROM) and include program code, and may be run on an electronic device. However, the program product of the present application is not limited thereto, and in this document, a readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A readable signal medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable signal medium may be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the PowerLogic (R) language or similar programming languages. The program code may execute entirely on the consumer electronic device, partly on the consumer electronic device, as a stand-alone software package, partly on the consumer electronic device and partly on a remote electronic device, or entirely on the remote electronic device or server. In the case of remote electronic devices, the remote electronic devices may be connected to the consumer electronic device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to external electronic devices (e.g., through the internet using an internet service provider).
It should be noted that although in the above detailed description several units or sub-units of the apparatus are mentioned, such a division is merely exemplary and not mandatory. Indeed, the features and functions of two or more units described above may be embodied in one unit, according to embodiments of the application. Conversely, the features and functions of one unit described above may be further divided into embodiments by a plurality of units.
Further, while the operations of the methods of the present application are depicted in the drawings in a particular order, this does not require or imply that these operations must be performed in this particular order, or that all of the illustrated operations must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and so forth) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable image scaling apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable image scaling apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable image scaling apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable image scaling device to cause a series of operational steps to be performed on the computer or other programmable device to produce a computer implemented process such that the instructions which execute on the computer or other programmable device provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims (10)

1. An online application program upgrading method, characterized in that the method comprises:
receiving upgrade data of a target application in response to an application upgrade indication;
acquiring a storage address value of a starting program of a chip and a first address value written into a flash memory by the upgrading data request; wherein the storage address value comprises a head end address value and a tail end address value of the start-up program;
determining whether the flash memory data of the starting program can be erased or not when the upgrade data is written according to the storage address value and the first address value; and after determining that the flash memory data of the starting program cannot be erased, upgrading the target application according to the upgrading data.
2. The method of claim 1, wherein the obtaining the memory address value of the start-up program of the chip comprises:
determining a head end address value of the starting program according to the starting file of the chip;
creating a target function at the end of the main function cycle of the starting program; wherein the target function is to indicate to read a value of a program counter register;
determining an end address value of the start-up program from the read value of the program counter register by enabling a main function of the start-up program to call the target function.
3. The method of claim 2, further comprising:
reading the address value currently indicated by the stack when the target function is called;
and taking the sum of the address value and a preset address value as the terminal address value of the starting program.
4. The method of claim 1, wherein obtaining the memory address value of the chip boot program comprises:
performing software compilation on the starting program to obtain a mapping file of the starting program;
and determining the storage address value of the starting program according to the mapping file.
5. The method of claim 1, wherein determining whether the flash data of the boot program will be erased when the upgrade data is written according to the storage address value and the first address value comprises:
determining a second address value according to the data length of the upgrading data and the first address value, wherein the second address value is a tail end address value of the upgrading data after being written into a flash memory;
and if the first address value is larger than the tail end address value of the starting program or the second address value is smaller than the head end address value of the starting program, determining that the flash memory data of the starting program cannot be erased when the upgrading data is written.
6. The method of claim 5, wherein upgrading the target application according to the upgrade data comprises:
determining a corresponding target area of the upgrading data in the flash memory according to the first address value and the second address value;
and erasing the data in the target area, and writing the upgrading data from the first address value.
7. An apparatus for online upgrade of an application, the apparatus comprising:
a data acquisition module configured to perform receiving upgrade data of a target application in response to an application upgrade indication;
the address acquisition module is configured to execute the storage address value of the starting program of the acquisition chip and the first address value of the upgrading data request written into the flash memory; wherein the storage address value comprises a head end address value and a tail end address value of the start-up program;
the address checking module is configured to determine whether the flash memory data of the starting program is erased or not when the upgrade data is written according to the storage address value and the first address value; and after determining that the flash memory data of the starting program cannot be erased, upgrading the target application according to the upgrading data.
8. An electronic device, comprising:
a memory for storing program instructions;
a processor for calling program instructions stored in said memory and for executing the steps comprised by the method of any one of claims 1 to 6 in accordance with the obtained program instructions.
9. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program comprising program instructions that, when executed by a computer, cause the computer to perform the method according to any one of claims 1-6.
10. A computer program product, the computer program product comprising: computer program code which, when run on a computer, causes the computer to perform the method according to any of the preceding claims 1-6.
CN202211272584.9A 2022-10-18 2022-10-18 Method, device, equipment and medium for online upgrading application program Pending CN115437675A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116360831A (en) * 2023-05-31 2023-06-30 中国第一汽车股份有限公司 Application program upgrading method and device, electronic equipment and storage medium

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116360831A (en) * 2023-05-31 2023-06-30 中国第一汽车股份有限公司 Application program upgrading method and device, electronic equipment and storage medium

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