CN115426565A - Phase adjustment type earphone audio amplifier - Google Patents

Abstract

The invention relates to a phase adjustment type earphone audio amplifier. The cache module is arranged, so that the audio file can be obtained and prestored in advance to provide guarantee for subsequent delay processing; the delay calculation module is arranged to acquire the delay from the cache module to the output interface in real time, feed the delay back to the cache module in real time, and adjust the lead of the cache module according to the acquired delay, so that the audio and video tracks are ensured to be played without delay, and the delay generated in the processes of phase processing, amplification processing and the like is ensured to be eliminated; the audio file or the video file can be identified by further arranging an interface identification module, so that only the video file is delayed and eliminated, the audio file does not need to be processed, and the processing burden of the system is reduced.

Description

Phase adjustment type earphone audio amplifier

Technical Field

The present invention relates to an audio amplifier, and more particularly, to a phase-adjustable audio amplifier for a headphone.

Background

The power amplifier is called power amplifier for short, and is generally referred to as a basic device in a sound system, commonly called loudspeaker, and is used for amplifying weak electric signals from a signal source (from a sound console in a professional sound system) to drive a loudspeaker to make sound. But may also refer to other devices that perform power amplification. The power amplifier in turn includes a digital audio amplifier and an analog audio amplifier. In the process of transmitting the digital audio signal, the clock signal and the relative phase position caused by the synthesis of factors such as a circuit board and the like are in a critical state or generate bit errors. The higher the sampling rate of the data, the greater the influence of the transmission path.

Application number CN201110103993.1 discloses a stereo audio signal separation circuit and audio equipment include: the device comprises a stereo clock generation module, a clock delay module and an audio power amplification module. The stereo audio signal separation circuit delays the received stereo clock signal output by the stereo clock generation module through the clock delay module to output a clock delay signal, and the audio power amplification module modulates the received stereo audio signal output by the audio signal generator according to the clock delay signal, so that the stereo audio signal separation degree is improved. However, the processing mode is not suitable for video files, the current stream media popularity leads people to have higher and higher requirements on audio and video track delay, and an amplifier capable of eliminating audio and video track delay is needed.

Disclosure of Invention

Aiming at the content, the phase adjustment type earphone audio amplifier is provided for solving the problems, and comprises an input interface, a cache module, a phase processing module, a digital-to-analog conversion amplifying module, an output interface, a delay calculating module, a delay feedback module and an input detection module;

the input module is used for connecting a digital output interface of the decoder, acquiring digital audio data and sending the data to the cache module; the buffer module is connected with the input interface, acquires digital audio DATA from the input interface and buffers the digital audio DATA, the buffered digital audio DATA are sent to the phase processing module, and the phase processing module performs phase processing on the digital audio DATA sent by the audio source interface and performs relative phase locking on a BCK input signal and a DATA input signal; then Data, WCK and BCK signals are output to a digital-to-analog conversion amplification module;

the digital-to-analog conversion amplification module performs audio analog-to-digital conversion, amplifies the signal and outputs the amplified signal;

the delay calculation module is connected with the input interface and the output interface and is used for acquiring a delay t generated between the input interface and the output interface;

the delay feedback module obtains delay from the delay calculation module and sends the delay t to the cache module.

The phase processing module comprises a relative phase measurer, a phase discriminator, a loop filter, a high-frequency VCO (voltage controlled oscillator), a synchronous frequency divider and an I2S clock and data phase rearrangement module;

data is input into an I2S clock and Data phase rearrangement module; the I2S clock and Data phase rearrangement module outputs three paths of rearranged BCK, WCK and Data;

the BCK and the WCK of the audio frequency are input into a relative phase measurer and an I2S clock and data phase rearrangement module, meanwhile, one branch of the WCK is input into a phase discriminator, the phase discriminator outputs to a loop filter, the loop filter outputs to a high-frequency VCO, the high-frequency VCO outputs to a synchronous frequency divider and the relative phase measurer, and the synchronous frequency divider outputs to the phase discriminator; therefore, the phase discriminator, the loop filter, the high-frequency VCO and the synchronous frequency divider form a loop phase-locked frequency synthesizer to generate a high-frequency multiplication clock signal for phase quantization measurement, and the clock is synchronous with the WCK;

the relative phase measurer tests the relative phase of the WCK and the BCK by taking the rising edge of the WCK as a standard, and sends a quantized phase error value to the I2S clock and data phase rearrangement module to realize the relative rearrangement of the clock and data phases.

Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, and aligning the BCK clock signal to the centers of the rising edge and the falling edge of the Data signal when arranging the phase; the effective edge of the latch clock is established after the data is stable, and the data is not influenced by jitter and circuit delay dispersion.

The high frequency VCO is set to 16 times the BCK frequency.

After the cache module acquires the digital audio data, a marking code is superposed on the digital audio data, wherein the marking code comprises a timestamp, and the marking code corresponds to a characteristic frequency after being subjected to digital-to-analog conversion; the marking code can be identified and analyzed by the delay calculation module, so that a timestamp of the marking code is obtained;

the mark code is sent to the phase processing module and then output to the digital-to-analog conversion amplification module, and is converted into an analog signal to be sent to the output interface;

the time delay calculation module acquires the characteristic frequency corresponding to the mark code from the output interface and calculates the time thereof, thereby calculating the time delay t of the mark code which is output to the digital-to-analog conversion amplification module and then transmitted to the output interface after passing through the phase processing module ₁ ；

The delay calculating module has processing delay t ₂ ；

The delay calculating module calculates t = t ₁ +t ₂ 。

The input detection module is connected with the input interface and acquires the file type of the data source of the input interface; the file types of the data sources are divided into a video file type and an audio file type;

when the file type of the data source is a video file type, the input detection module sends a control signal to the delay feedback module, so that the delay feedback module is started, and the delay t obtained by the delay calculation module is fed back to the cache module in real time; the cache module ensures that an audio track is ahead of a video track by time t when the video file is played so as to ensure that no appreciable time delay exists after the video track and the audio track are played; t is a variable, and the delay calculation module obtains t at fixed intervals;

when the file type of the data source is an audio file type, the audio source detection module sends a control signal to the delay feedback module, so that the delay feedback module is closed, the delay t obtained by the delay calculation module is not fed back, and the cache module does not adjust the time of the audio track when the delay module does not have feedback.

The caching duration of the audio track file cached by the caching module is fixed as T, and the caching duration T is greater than T, namely T is the advance time of the digital audio track sent by the decoder acquired by the caching module in real time compared with the video track; t is the required audio track ahead of the video track; when the audio track at the T-T moment in the cache file is played during actual playing, no appreciable delay exists after the video track and the audio track are played.

The characteristic frequency corresponding to the mark code is more than 200kHz, so that the mark code cannot be felt by human ears and cannot influence the auditory sensation of the human ears.

The invention has the beneficial effects that:

the method comprises the steps that firstly, a cache module is arranged, so that the audio file can be obtained and prestored in advance, and guarantee is provided for subsequent time delay processing; the delay calculation module is arranged to obtain the delay from the cache module to the output interface in real time, feed the delay back to the cache module in real time, and adjust the lead of the cache module according to the obtained delay, so that no delay is generated in the process of playing audio and video tracks, and the delay generated in the processes of phase processing, amplification processing and the like is eliminated; the audio file or the video file can be identified by further arranging an interface identification module, so that only the video file is delayed and eliminated, the audio file does not need to be processed, and the processing burden of the system is reduced.

The invention is provided with a phase processing module, which processes digital audio Data sent by an audio source interface, aligns the phases of a Data input signal and a WCK input signal, and locks the relative phases of a BCK input signal and the Data input signal; the effective edge of the latch clock is established after the data is stable, and the data is not influenced by jitter and circuit delay dispersion.

Drawings

The accompanying drawings, which are included to provide further understanding of the disclosed subject matter, are incorporated in and constitute a part of this specification. The drawings illustrate the implementations of the disclosed subject matter and, together with the detailed description, serve to explain the principles of implementations of the disclosed subject matter. No attempt is made to show structural details of the disclosed subject matter in more detail than is necessary for a fundamental understanding of the disclosed subject matter and various modes of practicing the same.

FIG. 1 is an overall architecture diagram of the present invention;

FIG. 2 is a schematic diagram of a phase processing module according to the present invention;

FIG. 3 is an input/output diagram of a phase processing module according to the present invention.

Detailed Description

The advantages, features and methods of accomplishing the same will become apparent from the drawings and the detailed description that follows.

Introduction of abbreviations:

the BCK is a serial clock, also called bit-always, and corresponds to each bit of data of digital audio, and the SCLK has a pulse. WCK is a frame clock used for switching Data of left and right channels, data: as a serial data stream.

The VCO refers to a voltage controlled oscillator. A voltage controlled oscillator refers to an oscillating circuit in which an output frequency and an input control voltage have a corresponding relationship.

Example 1:

with reference to fig. 1-3, a phase-adjusting type headphone audio amplifier includes an input interface, a buffer module, a phase processing module, a digital-to-analog conversion and amplification module, an output interface, a delay calculating module, a delay feedback module, and an input detecting module;

the input module is used for connecting a digital output interface of the decoder, acquiring digital audio data and sending the data to the cache module; the buffer module is connected with the input interface, acquires digital audio DATA from the input interface and buffers the digital audio DATA, the buffered digital audio DATA are sent to the phase processing module, and the phase processing module performs phase processing on the digital audio DATA sent by the audio source interface and performs relative phase locking on a BCK input signal and a DATA input signal; then Data, WCK and BCK signals are output to a digital-to-analog conversion amplification module;

the digital-to-analog conversion amplifying module performs audio analog-to-digital conversion, amplifies the signal and outputs the amplified signal;

the delay calculation module is connected with the input interface and the output interface and is used for acquiring a delay t generated between the input interface and the output interface;

and the delay feedback module acquires delay from the delay calculation module and sends the delay t to the cache module.

The phase processing module comprises a relative phase measurer 5, a phase discriminator 1, a loop filter 2, a high-frequency VCO3, a synchronous frequency divider 4 and an I2S clock and data phase rearrangement module 6;

data is input into an I2S clock and Data phase rearrangement module 6; the I2S clock and Data phase rearrangement module 6 outputs three paths of rearranged Data of BCK, WCK and Data;

the BCK and the WCK of the audio source are input to a relative phase measurer 5 and an I2S clock and data phase rearrangement module 6, meanwhile, one branch of the WCK is input to a phase discriminator 1, the phase discriminator 1 outputs to a loop filter 2, the loop filter 2 outputs to a high-frequency VCO3, the high-frequency VCO3 outputs to a synchronous frequency divider 4 and the relative phase measurer 5, and the synchronous frequency divider 4 outputs to the phase discriminator 1; therefore, the phase discriminator 1, the loop filter 2, the high-frequency VCO3 and the synchronous frequency divider 4 form a loop phase-locked frequency synthesizer to generate a high-frequency-multiplication clock signal for phase quantization measurement, and the clock is synchronous with the WCK;

the relative phase measurer 5 tests the relative phase of the WCK and the BCK with the rising edge of the WCK as a standard, and sends the quantized phase error value to the I2S clock and data phase rearrangement module 6 to realize the relative rearrangement of the clock and data phases.

Taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, and aligning the BCK clock signal to the centers of the rising edge and the falling edge of the Data signal when arranging the phase; the effective edge of the latch clock is established after the data is stable, and the data is not influenced by jitter and circuit delay dispersion.

The high frequency VCO3 is set to 16 times the BCK frequency.

After the cache module acquires the digital audio data, a mark code is superposed on the digital audio data, wherein the mark code comprises a timestamp, and the mark code corresponds to a characteristic frequency after being subjected to digital-to-analog conversion; the marking code can be identified and analyzed by the delay calculation module, so that a timestamp of the marking code is obtained;

the mark code is sent to the phase processing module and then output to the digital-to-analog conversion amplification module, and the mark code is converted into an analog signal and sent to the output interface;

the time delay calculation module acquires the characteristic frequency corresponding to the mark code from the output interface and calculates the time thereof, thereby calculating the time delay t of the mark code which is output to the digital-to-analog conversion amplification module and then transmitted to the output interface after passing through the phase processing module ₁ ；

The delay calculating module has processing delay t ₂ ；

The delay calculating module calculates t = t ₁ +t ₂ 。

The input detection module is connected with the input interface and acquires the file type of the data source of the input interface; the file types of the data sources are divided into a video file type and an audio file type;

when the file type of the data source is a video file type, the input detection module sends a control signal to the delay feedback module, so that the delay feedback module is started, and the delay t obtained by the delay calculation module is fed back to the cache module in real time; the cache module ensures that an audio track is ahead of a video track by time t when the video file is played so as to ensure that no appreciable delay exists after the video track and the audio track are played; t is a variable, and the delay calculation module obtains t at fixed time intervals;

when the file type of the data source is an audio file type, the audio source detection module sends a control signal to the delay feedback module, so that the delay feedback module is closed, the delay t obtained by the delay calculation module is not fed back, and the cache module does not adjust the time of the audio track when the delay module does not have feedback.

The caching time length of the audio track file cached by the caching module is fixed as T, and the caching time length T is greater than T, namely T is the time ahead of the digital audio track sent by the decoder, which is acquired by the caching module in real time, than the video track; t is the required audio track ahead of the video track; when the audio track at the T-T moment in the cache file is played during actual playing, no appreciable delay exists after the video track and the audio track are played.

The characteristic frequency corresponding to the mark code is more than 200kHz, so that the mark code can not be felt by human ears, and the auditory sensation of the human ears is not influenced.

Example 2: the present embodiment will be described in detail with respect to the operation of the above-described apparatus.

When the earphone is used, the input interface is connected with the decoder, and the output interface module is connected with the earphone or the loudspeaker;

the buffer module is connected with the input interface, acquires digital audio DATA from the input interface and buffers the digital audio DATA, the buffered digital audio DATA are sent to the phase processing module, and the phase processing module performs phase processing on the digital audio DATA sent by the audio source interface and performs relative phase locking on a BCK input signal and a DATA input signal; then Data, WCK and BCK signals are output to a digital-to-analog conversion amplification module;

the BCK and the WCK of the input audio frequency in the phase processing module are input to a relative phase measurer 5 and an I2S clock and data phase rearrangement module 6, meanwhile, one branch of the WCK is input to a phase detector 1, the phase detector 1 is output to a loop filter 2, the loop filter 2 is output to a high-frequency VCO3, the high-frequency VCO3 is output to a synchronous frequency divider 4 and the relative phase measurer 5, and the synchronous frequency divider 4 is output to the phase detector 1; therefore, the phase discriminator 1, the loop filter 2, the high-frequency VCO3 and the synchronous frequency divider 4 form a loop phase-locked frequency synthesizer to generate a high frequency multiplication clock signal for phase quantization measurement, and the clock is synchronous with the WCK;

the relative phase measurer 5 tests the relative phase of the WCK and the BCK with the rising edge of the WCK as a standard, and sends the quantized phase error value to the I2S clock and data phase rearrangement module 6 to realize the relative rearrangement of the clock and data phases.

The other path of the buffer module acquires the digital audio data and then superimposes a mark code on the digital audio data, wherein the mark code comprises a timestamp, and the mark code corresponds to a characteristic frequency after being subjected to digital-to-analog conversion; the marking code can be identified and analyzed by the delay calculation module, so that a timestamp of the marking code is obtained;

the mark code is sent to the phase processing module and then output to the digital-to-analog conversion amplification module, and the mark code is converted into an analog signal and sent to the output interface;

the time delay calculation module acquires the characteristic frequency corresponding to the mark code from the output interface and calculates the time thereof, thereby calculating the time delay t of the mark code which is output to the digital-to-analog conversion amplification module and then transmitted to the output interface after passing through the phase processing module ₁ ；

The delay calculating module has processing delay t ₂ ；

The delay calculating module calculates t = t ₁ +t ₂ 。

When the file type of the data source is a video file type, the input detection module sends a control signal to the delay feedback module, so that the delay feedback module is started, and the delay t obtained by the delay calculation module is fed back to the cache module in real time; the cache module ensures that the audio track is ahead of the video track by time t when the video file is played so as to ensure that no appreciable time delay exists after the video track and the audio track are played.

Wherein t is a variable, and the delay calculation module obtains t at fixed intervals.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (8)

1. A phase adjustment type earphone audio amplifier comprises an input interface, a cache module, a phase processing module, a digital-to-analog conversion amplification module, an output interface, a delay calculation module, a delay feedback module and an input detection module; the method is characterized in that:

the input module is used for connecting a digital output interface of the decoder, acquiring digital audio data and sending the data to the cache module; the buffer module is connected with the input interface, acquires digital audio DATA from the input interface and buffers the digital audio DATA, the buffered digital audio DATA is sent to the phase processing module, the phase processing module performs phase processing on the digital audio DATA sent by the audio source interface and performs relative phase locking on a BCK input signal and a DATA input signal; then Data, WCK and BCK signals are output to a digital-to-analog conversion amplification module;

the digital-to-analog conversion amplifying module performs audio analog-to-digital conversion, amplifies the signal and outputs the amplified signal;

the delay calculation module is connected with the input interface and the output interface and is used for acquiring a delay t generated between the input interface and the output interface; the delay feedback module obtains delay from the delay calculation module and sends the delay t to the cache module.

2. The phase adjustment type headphone audio amplifier according to claim 1, characterized in that:

the phase processing module comprises a relative phase measurer (5), a phase discriminator (1), a loop filter (2), a high-frequency VCO (3), a synchronous frequency divider (4) and an I2S clock and data phase rearrangement module (6);

a Data input I2S clock and Data phase rearrangement module (6); the I2S clock and Data phase rearrangement module (6) outputs three paths of rearranged Data of BCK, WCK and Data;

the BCK and the WCK of the audio frequency are input into a relative phase measurer (5) and an I2S clock and data phase rearrangement module (6), meanwhile, one branch of the WCK is input into a phase detector (1), the phase detector (1) outputs to a loop filter (2), the loop filter (2) outputs to a high-frequency VCO (3), the high-frequency VCO (3) outputs to a synchronous frequency divider (4) and the relative phase measurer (5), and the synchronous frequency divider (4) outputs to the phase detector (1); therefore, the phase discriminator (1), the loop filter (2), the high-frequency VCO (3) and the synchronous frequency divider (4) form a loop phase-locked frequency synthesizer to generate a high-frequency multiplication clock signal for phase quantization measurement, and the clock is synchronous with the WCK;

the relative phase measurer (5) tests the relative phase of the WCK and the BCK by taking the rising edge of the WCK as a standard, and sends a quantized phase error value to the I2S clock and data phase rearrangement module (6) to realize the relative rearrangement of the clock and data phases.

3. The phase adjustment type headphone audio amplifier according to claim 2, characterized in that:

taking the rising edge of the BCK clock signal as the establishment reference of the latch signal, and aligning the BCK clock signal to the centers of the rising edge and the falling edge of the Data signal when arranging the phase; the effective edge of the latch clock is established after the data are stable, and the data are not influenced by jitter and circuit delay dispersion.

4. The phase-adjusting headphone audio amplifier according to claim 2, characterized in that:

the high frequency VCO (3) is set to 16 times the BCK frequency.

5. The phase-adjusting headphone audio amplifier according to claim 1, characterized in that:

after the cache module acquires the digital audio data, a marking code is superposed on the digital audio data, wherein the marking code comprises a timestamp, and the marking code corresponds to a characteristic frequency after being subjected to digital-to-analog conversion; the marking code can be identified and analyzed by the delay calculation module, so that a timestamp of the marking code is obtained;

the mark code is sent to the phase processing module and then output to the digital-to-analog conversion amplification module, and is converted into an analog signal to be sent to the output interface; the time delay calculation module acquires the characteristic frequency corresponding to the mark code from the output interface and calculates the time thereof, thereby calculating the time delay t of the mark code which is output to the digital-to-analog conversion amplification module and then transmitted to the output interface after passing through the phase processing module ₁ ；

The delay calculating module has processing delay t ₂ ；

The delay calculating module calculates t = t ₁ +t ₂ 。

6. The phase adjustment type headphone audio amplifier according to claim 5, characterized in that:

the input detection module is connected with the input interface and acquires the file type of the data source of the input interface; the file types of the data sources are divided into a video file type and an audio file type;

when the file type of the data source is a video file type, the input detection module sends a control signal to the delay feedback module, so that the delay feedback module is started, and the delay t obtained by the delay calculation module is fed back to the cache module in real time; the cache module ensures that an audio track is ahead of a video track by time t when the video file is played so as to ensure that no appreciable delay exists after the video track and the audio track are played; t is a variable, and the delay calculation module obtains t at fixed intervals;

when the file type of the data source is an audio file type, the audio source detection module sends a control signal to the delay feedback module, so that the delay feedback module is closed, the delay t obtained by the delay calculation module is not fed back, and the cache module does not adjust the time of the audio track when the delay module does not have feedback.

7. The phase-adjusting headphone audio amplifier of claim 6, wherein:

the caching time length of the audio track file cached by the caching module is fixed as T, and the caching time length T is greater than T, namely T is the time ahead of the digital audio track sent by the decoder, which is acquired by the caching module in real time, than the video track; t is the required audio track ahead of the video track; when the audio track at the T-T moment in the cache file is played during actual playing, no appreciable delay exists after the video track and the audio track are played.

8. The phase-adjusting headphone audio amplifier of claim 5, wherein:

the characteristic frequency corresponding to the mark code is more than 200kHz, so that the mark code cannot be felt by human ears and cannot influence the auditory sensation of the human ears.

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