CN115421869A - Hardware-in-loop simulation method and device based on data interaction event driving - Google Patents

Hardware-in-loop simulation method and device based on data interaction event driving Download PDF

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CN115421869A
CN115421869A CN202211168110.XA CN202211168110A CN115421869A CN 115421869 A CN115421869 A CN 115421869A CN 202211168110 A CN202211168110 A CN 202211168110A CN 115421869 A CN115421869 A CN 115421869A
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simulation
hardware
data interaction
software simulator
time
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赵争鸣
曾洋斌
郑嘉霖
姬世奇
施博辰
虞竹珺
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Tsinghua University
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Tsinghua University
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    • G06FELECTRIC DIGITAL DATA PROCESSING
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    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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Abstract

The application discloses a hardware-in-loop simulation method and device based on data interaction event driving, wherein the time interval between data interaction events is set based on adjusting the data interaction period, and the relative time flow rate ratio in a software simulator is set according to the time interval; triggering a recording action of virtual time in the software simulator by a data interaction event; the actual time consumption of the simulation circuit in the software simulator in the calculation process forms a software simulation actual time axis, and after the simulation circuit in a control period finishes the calculation, the simulation circuit waits for a virtual time recording point to occur and then transmits a simulation result to the hardware controller so as to finish the software and hardware data interaction of the hardware-in-the-loop simulation system. By adjusting the relative time flow rate ratio of the virtual time axis to the actual time axis in the simulation space, the problem of overflow of calculation time caused by high complexity of a simulation circuit system is prevented, and accurate hardware-in-loop simulation of a simulation circuit with a large system scale is realized under the condition that high-performance calculation hardware is not available.

Description

Hardware-in-the-loop simulation method and device based on data interaction event driving
Technical Field
The present application relates to the field of hardware-in-loop simulation technologies for power electronic systems, and in particular, to a hardware-in-loop simulation method and apparatus based on data interaction event driving.
Background
In the energy strategic planning of 'carbon neutralization and carbon peak reaching', electric energy conversion is a key technology for green energy conservation, new energy utilization and electric energy safety construction. The electric energy conversion technology is realized by a power electronic system consisting of a signal control unit and a power conversion unit. Fast, accurate, low-cost power electronic system development is a key step to improve construction efficiency and reduce construction cost, and hardware-in-the-loop simulation provides an effective tool for designing, debugging and verifying power electronic system transformation function, dynamic performance and fault response. The hardware-in-loop simulation technology is characterized in that an actual hardware controller is embedded into a numerical model simulation closed loop to run, and a software simulator is used for calculating the running process of a numerical model of a power circuit, so that the multi-time scale dynamic representation of a power electronic system in continuous and discrete states is realized. However, with the construction requirements of a novel power system and a microgrid which are accessed by large-scale new energy, the system scale of a power electronic system is larger and larger, the topological architecture of the system is more and more complex, and more power electronic conversion units are provided, so that the hardware in the loop simulation system is difficult to complete the calculation of the numerical model of the power circuit with complex system in a fixed control period, and the hardware in the loop simulation requirement of the power electronic system in the novel power system and the microgrid can not be met. Therefore, how to realize accurate hardware-in-loop simulation of a large-scale power electronic system is a key problem which needs to be solved urgently, and is a difficult problem of development of a key tool for designing, analyzing and verifying the operation characteristics of the power electronic system in a novel power system.
In the related technology, in order to solve the key problem of how to realize the in-loop simulation of the hardware of the large-scale power electronic system, researches are mainly made on aspects of modeling simplification, simulation method acceleration, calculation hardware parallelization, system structure decoupling and the like. In the aspect of modeling simplification, the external characteristics of a half-bridge/full-bridge module are modeled in a large-system-scale power electronic system, and the switching elements in the module are not modeled any more, so that the mathematical expression of modeling is simplified, and the simplified simulation calculation process is realized. However, the actions of the switch elements in the module cannot be represented, the representation time scale range of the hardware of the power electronic system in the ring simulation is reduced, and the precision of the representation is reduced. In the aspect of acceleration of the simulation method, the calculation step length with discrete time is set to be one step and two steps, namely, the requirement of high-precision representation on the simulation step length is reduced, the step length of updating simulation state data is also reduced to realize high precision, and the calculation step length is kept unchanged to realize the reduction of the calculation amount. However, this is a palliative but not a fundamental solution, and it is difficult to continue to play a critical role in the context of the increasing scale of the system. In the aspect of parallelization of computing hardware, when the software simulator is constructed, computing hardware with multiple Central Processing Units (CPUs) and multiple Field Programmable Gate Arrays (FPGAs) with parallel functions and CPU + FPGAs is adopted, and computing tasks can be distributed to different CPUs or FPGAs to be executed in parallel, so that the capability and the speed of the software simulator for computing the numerical model of the power circuit are improved, however, the cost of the software simulator is greatly increased, and particularly, the price of the FPGA is not favorable for low-cost construction of hardware-in-the-loop simulation. In the aspect of system structure decoupling, a large-scale power electronic system is decoupled into a plurality of subsystems for simulation calculation, the complexity of the power electronic system in a software simulator can be reduced, the matrix dimension of a system model is further simplified, the simulation calculation process of a power circuit is simplified, and the hardware-in-loop simulation speed is increased. However, decoupling of the large-scale power electronic system divides the system with strong coupling characteristics, so that the data interaction process between subsystems is simplified and delayed, and the accuracy of in-loop simulation of the hardware of the power electronic system is reduced.
Therefore, in order to realize accurate hardware-in-loop simulation of a large-scale power electronic system and solve the problem that hardware-in-loop simulation cannot be accurately completed due to the fact that the calculation speed of a software simulator in a complex system is greatly slower than the actual time flow rate, further research and development of a hardware-in-loop simulation method of the large-scale power electronic system are required to meet the requirement of hardware-in-loop simulation of the power electronic system in a novel power system and a microgrid.
Disclosure of Invention
The application provides a simulation method, a simulation device, electronic equipment and a storage medium of a hardware-in-the-loop simulation system based on data interaction event driving, solves the problem that hardware-in-the-loop simulation cannot be accurately finished due to the fact that the calculation speed of a software simulator in a complex system is greatly slower than the actual time flow rate, and achieves accurate hardware-in-the-loop simulation under a large-scale power electronic system simulation example.
An embodiment of a first aspect of the present application provides a simulation method for a hardware-in-the-loop simulation system based on data interaction event driving, where the hardware-in-the-loop simulation system includes a hardware controller and a software simulator, and the method includes the following steps: setting time intervals among data interaction events based on the adjustment of the data interaction period, and setting a relative time flow rate ratio of a virtual time axis and an actual time axis in the software simulator according to the time intervals; recording a virtual time point in the software simulator according to the data interaction event of the hardware controller to obtain a virtual time axis of the software simulator; recording the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator, and after the simulation circuit is calculated in a single control period, transmitting the simulation result to the hardware controller when the virtual time axis virtual time recording point is reached so as to complete the software and hardware data interaction of the hardware-in-the-loop simulation system.
Optionally, in an embodiment of the present application, the method further includes: and the hardware-in-loop simulation system interacts with a control signal obtained by closed-loop calculation in the hardware controller and a simulation result obtained by resolving by the simulation circuit in the software simulator in a fixed period.
Optionally, in an embodiment of the present application, the actual time consumption of the computation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method, and the computation capability of the software simulator.
Optionally, in an embodiment of the present application, the recording actual consumed time in a calculation process of a simulation circuit in the software simulator to obtain an actual time axis of the software simulator includes: the time flow rate of the actual time axis of the software simulator is consistent with the running time of the hardware controller.
An embodiment of a second aspect of the present application provides a simulation apparatus for a hardware-in-the-loop simulation system based on data interaction event driving, where the hardware-in-the-loop simulation system includes a hardware controller and a software simulator, and includes: the setting module is used for setting the time interval between data interaction events based on the adjustment of the data interaction period and setting the relative time flow rate ratio of a virtual time axis and an actual time axis in the software simulator according to the time interval; the recording module is used for recording a virtual time point in the software simulator according to the data interaction event of the hardware controller to obtain a virtual time axis of the software simulator; and the simulation module is used for recording the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator, and after the simulation circuit is calculated in a single control period, transmitting the simulation result to the hardware controller when the virtual time axis virtual time recording point is reached so as to complete the software and hardware data interaction of the hardware-in-the-loop simulation system.
Optionally, in an embodiment of the present application, the method further includes: and the calculation module is used for interacting a control signal obtained by closed-loop calculation in the hardware controller and a simulation result obtained by resolving by the simulation circuit in the software simulator by the hardware-in-loop simulation system in a fixed period.
Optionally, in an embodiment of the present application, the actual time consumption of the computation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method, and the computation capability of the software simulator.
Optionally, in an embodiment of the present application, the recording actual consumed time in a calculation process of a simulation circuit in the software simulator to obtain an actual time axis of the software simulator includes: the time flow rate of the actual time axis of the software simulator is consistent with the running time of the hardware controller.
An embodiment of a third aspect of the present application provides an electronic device, including: a memory, a processor and a computer program stored in the memory and operable on the processor, the processor executing the program to perform the simulation method based on the data interaction event driven hardware-in-loop simulation system according to the above embodiments.
A fourth aspect of the present application provides a computer-readable storage medium, on which a computer program is stored, where the computer program is executed by a processor to execute the simulation method of the hardware-in-loop simulation system based on data interaction event driving according to the foregoing embodiments.
The hardware-in-loop simulation method, the hardware-in-loop simulation device, the electronic equipment and the storage medium based on the data interaction event driving in the embodiment of the application realize accurate hardware-in-loop simulation of a large-scale power electronic system, and transfer from a time control simulation process mode of a traditional hardware controller to a data interaction event control simulation process to realize a virtual time axis self-defining function in a software simulator. Therefore, the data interaction synchronization process of the power circuit numerical model resolving result in the software simulator is controlled by adjusting the virtual-real time flow ratio. By using the hardware-in-loop simulation method based on data interaction event driving, the problem that hardware-in-loop simulation cannot be accurately completed due to the fact that the calculation speed of a software simulator in a complex system is greatly slower than the actual time flow rate can be thoroughly solved. Therefore, the working efficiency of scientific research personnel in designing, debugging and verifying large-scale power electronic systems is improved, and the development and construction efficiency of electric energy conversion equipment in novel power systems and micro-grids is improved.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The foregoing and/or additional aspects and advantages of the present application will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 is a flowchart of a simulation method of a hardware-in-the-loop simulation system based on data interaction event driving according to an embodiment of the present application;
FIG. 2 is a schematic diagram illustrating a timing configuration of a hardware controller and a software emulator in a hardware-in-loop simulation method based on data interaction event driving according to an embodiment of the present application;
fig. 3 is a schematic diagram of a hardware-in-loop simulation architecture of a power electronic system constructed based on a data interaction event-driven hardware-in-loop simulation method according to an embodiment of the present application;
fig. 4 is a schematic diagram of a relationship between a data interaction period and a virtual control period provided in an embodiment of the present application, and actual simulation operation time consumption;
FIG. 5 is a comparison between a data interaction event-driven-based hardware-in-the-loop simulation timing diagram provided in an embodiment of the present application and a real-time hardware-in-the-loop simulation timing diagram and a timing diagram of simulation computation overflow;
fig. 6 is a physical diagram of a hardware-in-loop simulation architecture of a power electronic system used for verifying a hardware-in-loop simulation method based on data interaction event driving according to an embodiment of the present application;
FIG. 7 is a diagram of an experimental prototype with a simple system scale and its topology structure required for verification by a hardware-in-the-loop simulation method based on data interaction event driving according to an embodiment of the present application;
fig. 8 is a comparison between a hardware-in-loop simulation result with a simple system scale required for verification by the hardware-in-loop simulation method based on data interaction event driving according to the embodiment of the present application and an experimental result;
FIG. 9 is a comparison of simulation results of a hardware-in-the-loop simulation method based on data interaction event driving, which is provided by an embodiment of the present application, for verifying that hardware-in-the-loop simulation with a simple system scale is required under different virtual-real time flow ratios;
FIG. 10 is a simulation result comparison and an FFT analysis result comparison of hardware-in-the-loop simulation with simple system scale required for verification of the hardware-in-the-loop simulation method based on data interaction event driving according to the embodiment of the present application under the control parameter of generating oscillation and under the condition of different virtual-real time flow rate ratios;
fig. 11 is a physical diagram of an experimental prototype with a complex system scale and a topology structure thereof required for verifying the hardware-in-the-loop simulation method based on data interaction event driving according to the embodiment of the present application;
fig. 12 is a comparison between an in-loop simulation result of hardware with a complex system scale required for verification by the hardware-in-loop simulation method based on data interaction event driving according to the embodiment of the present application and an experimental result;
FIG. 13 is a diagram of an example of a simulation apparatus of a hardware-in-the-loop simulation system based on data interaction event driving according to an embodiment of the present application;
fig. 14 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative and intended to explain the present application and should not be construed as limiting the present application.
The following describes a simulation method, a simulation device, an electronic device, and a storage medium of a hardware-in-the-loop simulation system based on data interaction event driving according to an embodiment of the present application with reference to the drawings. Aiming at the problems that the modeling simplification, the simulation method acceleration, the calculation hardware parallelization and the system structure decoupling mentioned in the background technology are difficult to solve and the problem that the hardware-in-loop simulation cannot be accurately completed due to the fact that the calculation speed of a software simulator in a complex system is greatly slower than the actual time flow rate is solved. Therefore, the problem that hardware-in-loop simulation cannot be accurately finished due to the fact that the calculation speed of a software simulator in a complex system is greatly slower than the actual time flow rate is solved.
Specifically, fig. 1 is a flowchart of a simulation method of a hardware-in-the-loop simulation system based on data interaction event driving according to an embodiment of the present application.
As shown in fig. 1, the simulation method of the hardware-in-the-loop simulation system based on data interaction event driving includes the following steps:
in step S101, based on adjusting the data interaction period, the time interval between the data interaction events is set, and the relative time flow ratio of the virtual time axis to the actual time axis in the software simulator is set according to the time interval.
Referring to fig. 2, the hardware controller is first configured to set a data interaction event axis, and a relative time flow rate ratio between a virtual time axis and an actual time axis in the software simulator is set by adjusting a data interaction period to set a time interval between data interaction events.
The data interaction event axis is composed of data interaction events in a hardware-in-loop simulation system, and the time interval between the events can be adjusted according to simulation requirements on the premise that the data logic between the events is correct.
In step S102, a virtual time axis of the software simulator is obtained according to the data interaction event of the hardware controller to record a virtual time point in the software simulator.
The recording action of the virtual time in the software simulator is configured to be triggered by the data interaction event of the hardware controller, namely, a data interaction event is received to record one virtual time point, the distance between the virtual time points is a virtual control period, and the virtual time point is determined by the control period of the simulated circuit in the simulation space and does not change along with the adjustment of the data interaction period of the hardware controller.
The virtual time axis in the software simulator refers to the simulation time of a simulated circuit, but not the actual running time of the software simulator, and the virtual time point is driven by the data interaction event of the hardware controller and marked in a unit increasing mode, so that the virtual control period is ensured to be kept unchanged in the data interaction period adjusting process.
In step S103, recording the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator, and after the simulation circuit is calculated in a single control cycle, transmitting the simulation result to the hardware controller when the virtual time axis virtual time recording point is reached to complete the software and hardware data interaction of the hardware-in-the-loop simulation system.
Optionally, in an embodiment of the present application, the hardware-in-loop simulation system interacts, at a fixed period, a control signal obtained by closed-loop calculation in the hardware controller and a simulation result obtained by simulation circuit calculation in the software simulator.
The actual time consumption of the calculation process of the simulation circuit in the software simulator forms the actual time axis of the software simulation, which is determined by the system complexity of the simulation circuit, the simulation driving method and the calculation capacity of the software simulator, after the simulation circuit in a control period finishes the calculation, the simulation circuit waits for the virtual time recording point to occur and then transmits the simulation result to the hardware controller, so as to finish the software and hardware data interaction of the hardware-in-the-loop simulation system.
The time consumed by the software simulator in the power circuit simulation process forms an actual time axis, the time flow rate of the actual time axis is consistent with the running time of the hardware controller, when the system complexity of the simulation circuit is high, a simulation method adopted by the software simulator needs repeated iteration or high-density equation solution, and the performance of computing hardware carrying the software simulator is not high enough, the data result in the simulation time needs to spend several times of time, so that enough time is used for simulation computation under the condition that the virtual control period is not changed by adjusting the data interaction period, and the method is suitable for the power electronic hardware in-loop simulation with large system scale.
The time sequence configuration of the hardware controller and the software simulator forms the hardware-in-the-loop simulation method based on the data interaction event driving, which is provided by the embodiment of the application, and can enlarge the system scale of the hardware-in-the-loop simulation and reduce the performance requirement and cost of the computing hardware.
In bookIn the embodiment of the application, as shown in fig. 3, a hardware-in-loop simulation architecture of a power electronic system constructed by a hardware-in-loop simulation method based on data interaction event driving is provided
Figure BDA0003862233600000061
The SoC series control board is used as a hardware controller, and a CPU in a computer loaded with a Linux operating system is used as a software simulator.
The hardware controller realizes data interaction with the software simulator through a PCIe interface, obtains a voltage and current sampling signal from the software simulator to calculate a control strategy, further obtains a control output signal, and sends the control output signal and a time sequence signal I of a data interaction event in the hardware controller to the software simulator.
And after receiving a time sequence signal of a data interaction event, carrying out time sequence configuration on the software simulator, namely recording a virtual time point, and driving the simulator to execute a simulation algorithm of a power circuit numerical model according to the virtual time so as to obtain a simulation calculation result, namely state variables of each voltage and current in the power electronic system.
An operation host is provided for controlling program writing and downloading, converting and adjusting a power circuit numerical model in the software simulator and the connection relation thereof, and outputting and displaying the result of hardware-in-loop simulation.
In the embodiment of the present application, as shown in fig. 4, a schematic diagram of a relationship between a data interaction period of a hardware controller, a virtual control period of a software simulator, and actual time consumed for software simulation operation is shown, specifically, a time interval between data interaction events constitutes the data interaction period, a virtual time length in a control period that needs to be simulated by power circuit simulation in the software simulator constitutes the virtual control period, and actual time consumed in a power circuit simulation calculation process constitutes the actual time consumed for software simulation operation.
Further, the actual running time of software simulation is related to the system complexity of the simulated power circuit, the performance quality of the computing hardware of the software simulator and the high efficiency of the simulation method, and the running time of software simulation is different in different lengths when running results in the same virtual time are simulated under different conditions.
Further, as shown in FIG. 4, the virtual time Δ T is set at the same simulated circuit C Time-consuming T for software simulation operation R The method comprises the following steps that three situations are adopted, wherein the situation #1 is that the software simulation operation time exceeds the virtual time simulated by a simulation circuit, namely the simulation calculation speed is slower than the flow rate of the virtual time of a simulated system; case #2 is that the running time of the software simulator is equal to the virtual time simulated by the simulation circuit, namely the simulation calculation speed is synchronous with the virtual time flow rate of the simulated system in real time; and the situation #3 is that the software simulation operation consumes less time than the virtual time simulated by the simulation circuit, namely the simulation calculation speed realizes the super real-time simulation relative to the virtual time flow rate of the simulated system.
Further, a virtual time flow rate is defined as v VT The virtual time flow rate can be calculated from equation (1) for virtual time to actual time, where T C Is the virtual time of the software emulator,
Figure BDA0003862233600000071
further, when the software simulator virtual time flow rate is synchronized with the actual time flow rate, a synchronization flow rate ratio σ is defined, i.e., v in case #2 VT And = σ. Further defining lambda as a virtual time flow rate coefficient, wherein the virtual time flow rate under different conditions can be calculated according to formula (2), and lambda>Case #1 at 1, case #2 at λ =1, λ<Case #3 is case 1.
v VT =λσ,λ>0 (2)
Further, by adjusting the data interaction period Δ T D The adjustment of the actual time interval of the virtual time recording points in the software simulator is realized, namely the virtual time flow velocity v can be adjusted VT And obtaining different virtual time flow velocity coefficients lambda.
In the embodiment of the present application, as shown in fig. 5 (a), a schematic timing diagram of a hardware controller and a software simulator for real-time hardware-in-the-loop simulation is shown, as shown in fig. 5 (b), a schematic timing diagram when overflow is calculated by simulation under a timing configuration of the hardware controller and the software simulator for traditional real-time hardware-in-the-loop simulation is shown, as shown in fig. 5 (c), a schematic timing diagram of the hardware controller and the software simulator in hardware-in-the-loop simulation based on data interaction event driving is shown.
Specifically, in fig. 5 (a), the virtual time axis of the software simulator and the time of the data interaction event axis of the hardware controller in the loop simulation system are synchronized, and the software simulator can complete the actual running process of the software simulation in the data interaction period of the hardware controller.
In fig. 5 (b), when the computing capability of the software simulator is insufficient or the complexity of the simulated power circuit system is high, the software simulation calculation cannot be completed within the data interaction period of the hardware controller, so that the data interaction is disturbed due to the overflow of the simulation calculation, and further the logical relationship between the control event and the simulation data is wrong, and finally the hardware-in-loop simulation result is incorrect.
In fig. 5 (c), the data interaction period of the hardware controller is adjusted to 2 times that of the original hardware controller, the virtual time stamp of the software simulator is triggered by the data interaction event, and when the data interaction event occurs, a control period unit is added to the virtual time, so that the virtual time flow rate is 2 times slower than the actual time flow rate, that is, λ =0.5, thereby reserving enough actual time for the software simulation calculation process, and ensuring that the logic between the control event and the simulation data is correct, thereby obtaining a correct hardware-in-the-loop simulation result.
In the embodiment of the application, as shown in fig. 6, in order to verify the hardware-in-loop simulation method based on data interaction event driving, a hardware-in-loop simulation system based on a CPU software simulator is set up, and a real object of a hardware controller, a software simulator and an operation host is displayed.
The hardware-in-loop simulation method based on data interaction event driving according to the embodiment of the present application is verified with reference to the drawings and a specific embodiment.
Fig. 7 shows an experimental prototype physical diagram of a power electronic transformer in a hardware-in-loop simulation system and a circuit topology structure thereof, which includes 24 active switching tubes, wherein a front-end converter is a three-level three-phase rectifier, a double-active-bridge converter is adopted for intermediate electrical isolation, a rear-end converter is a single-phase inverter, the switching frequency of the double-active-bridge converter is 20kHz, a high-frequency converter is adopted in a power electronic system with 50kVA rated power, a virtual control period is 50 μ s, and basic electrical parameters are shown in table 1. The system complexity of the power electronic system is not high, so that the method can be used for verifying the correctness of the hardware-in-the-loop simulation method based on the data interaction event driving in the embodiment of the application.
TABLE 1 Electrical parameters of Power electronic transformers
Figure BDA0003862233600000081
Fig. 8 shows simulation and experimental result comparison for verifying the hardware-in-the-loop simulation method based on data interaction event driving provided in the embodiment of the present application, and the comparison between the hardware-in-the-loop simulation result obtained under the condition that λ =1 and the experimental result obtained by the experimental prototype shown in fig. 7 provides a dynamic process waveform of the output voltage of the front-end rectifier and a dynamic process waveform of the output voltage of the isolated dual-active-bridge converter, and the comparison result provided verifies the correctness of the hardware-in-the-loop simulation method based on data interaction event driving provided in the embodiment of the present application.
Further, fig. 9 shows that different virtual time flow rates are set under the hardware-in-the-loop simulation method based on data interaction event driving according to the embodiment of the present application, and simulation results are compared, that is, the simulation results of the hardware-in-the-loop under different λ are compared. It can be seen that in the dynamic process of the front-end rectifier output voltage from 700V to 600V, λ =1, 0.5, 0.33, and 0.25 are respectively set, the hardware-in-loop simulation results obtained under 4 conditions are almost consistent, and the accuracy of the hardware-in-loop simulation results is not affected by different virtual time flow rates.
Further, fig. 10 shows that the hardware driven based on the data interaction event according to the embodiment of the present application sets different virtual time flow rates under a loop simulation method, that is, λ =1, 0.5, 0.33, and 0.25 are respectively set, and under a control parameter for generating oscillation on the output voltage of the power electronic transformer, the hardware-in-loop simulation result of the output voltage is obtained and compared. Meanwhile, in order to analyze the oscillation frequency difference of the output voltage at different virtual time flow rates, fig. 10 also shows that the FFT analysis is performed on the obtained output voltage waveforms in 4 cases. Therefore, the control parameters provided by the hardware controller basically accord with the high-frequency oscillation frequency caused by the control parameters under different virtual time flow rates in the process of generating oscillation by a simulated circuit in the software simulator, the logic between the control event and the simulation data under different virtual time flow rates is verified to keep consistent, and the correctness of the hardware-in-loop simulation method based on the data interaction event driving provided by the embodiment of the application is further verified.
Fig. 11 shows an experimental prototype physical diagram of a multi-port electric energy router in a hardware-in-loop simulation system and a circuit topology structure thereof, in which 32 switching tubes, 4 high-frequency transformers, 4 input/output ports are included, and the ports are coupled with each other to form a common high-frequency link multi-port electric energy router, and circuit parameters of the common high-frequency link multi-port electric energy router are shown in table 2. The power electronic system is provided with the four port transformation modules, and more voltage and current state variables are coupled and calculated through the high-frequency transformer, so that a complex power electronic system is formed, the time consumption of a software calculation process is greatly increased, and the method is suitable for verifying the effectiveness of hardware-in-loop simulation of the power electronic system with high system complexity based on the hardware-in-loop simulation method driven by the data interaction event.
Meter 2 Electrical parameters of Multi-Port Power Router
Figure BDA0003862233600000091
Figure BDA0003862233600000101
Fig. 12 shows an experimental result of the multi-port electric energy router required for verifying the validity period and a hardware-in-loop simulation result when λ =0.167 are provided based on the hardware-in-loop simulation method driven by the data interaction event provided by the embodiment of the present application, in contrast, the high-frequency bus voltage and current of the multi-port electric energy router are shown, it can be seen that except that the high-frequency oscillation caused by the switching process is not simulated, the switching characteristics of the high-frequency voltage and current are simulated more accurately, it is verified that a more accurate hardware-in-loop simulation result can be obtained when the flow rate is very slow in the setting of the virtual time of the software simulator, and the problem that the power electronic system with high system complexity cannot perform hardware-in-loop simulation is solved.
In summary, through the verification of the specific embodiment, it is proved that the hardware-in-loop simulation method based on data interaction event driving provided by the application can keep almost the same simulation results at different virtual time flow rates, can simulate a power electronic system with higher system complexity, can solve the problem that hardware-in-loop simulation cannot be accurately completed due to the fact that the calculation speed of a software simulator in the complex system is greatly slower than the actual time flow rate, and verifies the correctness and the effectiveness by using a power electronic transformer and a multi-port electric energy router hardware-in-loop simulation example.
According to the simulation method of the hardware-in-the-loop simulation system based on the data interaction event driving, which is provided by the embodiment of the application, the relative time flow rate ratio of the virtual time axis and the actual time axis in the simulation space can be flexibly adjusted, so that the problem of overflow of calculation time caused by high complexity of a simulation circuit system is prevented, and accurate hardware-in-the-loop simulation of a simulation circuit with a large system scale is realized under the condition of no high-performance calculation hardware.
Next, a simulation apparatus of a hardware-in-the-loop simulation system based on data interaction event driving according to an embodiment of the present application is described with reference to the accompanying drawings.
FIG. 13 is a diagram of an example of a simulation apparatus of a hardware-in-the-loop simulation system based on data interaction event driving according to an embodiment of the present application.
As shown in fig. 13, the hardware-in-loop simulation system includes a hardware controller and a software simulator, and the simulation apparatus 10 based on the data interaction event-driven hardware-in-loop simulation system includes: a setup module 100, a recording module 200 and a simulation module 300.
The setting module 100 is configured to set a time interval between data interaction events based on adjusting a data interaction period, and set a relative time flow rate ratio between a virtual time axis and an actual time axis in the software simulator according to the time interval. The recording module 200 is configured to record a virtual time point in the software simulator according to a data interaction event of the hardware controller, so as to obtain a virtual time axis of the software simulator. The simulation module 300 is configured to record actual time consumed in a calculation process of a simulation circuit in the software simulator to obtain an actual time axis of the software simulator, and transmit a simulation result to the hardware controller after the simulation circuit is calculated in a single control period and waits for a virtual time axis virtual time recording point to be reached, so as to complete software and hardware data interaction of the hardware-in-the-loop simulation system.
Optionally, in an embodiment of the present application, the method further includes: and the calculation module is used for controlling signals obtained by closed-loop calculation in the hardware-in-loop simulation system by interacting with the hardware controller in a fixed period and simulating results obtained by simulation circuit calculation in the software simulator.
Optionally, in the embodiment of the present application, the actual time consumption of the computation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method, and the computation capability of the software simulator.
Optionally, in an embodiment of the present application, recording actual time consumed in a calculation process of a simulation circuit in a software simulator to obtain an actual time axis of the software simulator includes: the time flow rate of the actual time axis of the software simulator is consistent with the running time of the hardware controller.
It should be noted that the foregoing explanation of the embodiment of the simulation method based on the data interaction event-driven hardware-in-loop simulation system is also applicable to the simulation apparatus based on the data interaction event-driven hardware-in-loop simulation system of this embodiment, and details are not described here.
According to the simulation device of the hardware-in-the-loop simulation system based on the data interaction event driving, which is provided by the embodiment of the application, the relative time flow rate ratio of a virtual time axis and an actual time axis in a simulation space can be flexibly adjusted, so that the problem of overflow of calculation time caused by high complexity of a simulation circuit system is prevented, and accurate hardware-in-the-loop simulation of a simulation circuit with a large system scale is realized under the condition that high-performance calculation hardware is not provided.
Fig. 14 is a schematic structural diagram of an electronic device according to an embodiment of the present application. The electronic device may include:
a memory 1401, a processor 1402, and a computer program stored on the memory 1401 and executable on the processor 1402.
The processor 1402, when executing the program, implements the simulation method of the hardware-in-the-loop simulation system based on data interaction event driving provided in the above embodiments.
Further, the electronic device further includes:
a communication interface 1403 for communication between the memory 1401 and the processor 1402.
A memory 1401 for storing computer programs operable on the processor 1402.
The memory 1401 may comprise high-speed RAM memory, and may also include non-volatile memory (non-volatile memory), such as at least one disk memory.
If the memory 1401, the processor 1402, and the communication interface 1403 are implemented independently, the communication interface 1403, the memory 1401, and the processor 1402 can be connected to each other via a bus and communication therebetween can be accomplished. The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (EISA) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 14, but this is not intended to represent only one bus or type of bus.
Optionally, in a specific implementation, if the memory 1401, the processor 1402 and the communication interface 1403 are integrated into a chip, the memory 1401, the processor 1402 and the communication interface 1403 may complete communication with each other through an internal interface.
Processor 1402 may be a Central Processing Unit (CPU), an Application Specific Integrated Circuit (ASIC), or one or more Integrated circuits configured to implement embodiments of the present Application.
The present embodiment also provides a computer-readable storage medium, on which a computer program is stored, wherein the computer program is used for implementing the above simulation method based on the hardware-in-the-loop simulation system driven by the data interaction event when being executed by the processor.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or N embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or to implicitly indicate the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "N" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more N executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present application in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present application.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the N steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.

Claims (10)

1. A simulation method of a hardware-in-the-loop simulation system based on data interaction event driving is characterized in that the hardware-in-the-loop simulation system comprises a hardware controller and a software simulator, and the method comprises the following steps:
setting time intervals among data interaction events based on the adjustment of the data interaction period, and setting a relative time flow rate ratio of a virtual time axis and an actual time axis in the software simulator according to the time intervals;
recording a virtual time point in the software simulator according to the data interaction event of the hardware controller to obtain a virtual time axis of the software simulator;
recording the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator, and after the simulation circuit is calculated in a single control period, transmitting the simulation result to the hardware controller when the virtual time axis virtual time recording point is reached so as to complete the software and hardware data interaction of the hardware-in-the-loop simulation system.
2. The method of claim 1, further comprising:
and the hardware-in-loop simulation system interacts with a control signal obtained by closed-loop calculation in the hardware controller and a simulation result obtained by resolving by the simulation circuit in the software simulator in a fixed period.
3. The method of claim 1,
the actual time consumption of the calculation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method and the calculation capacity of the software simulator.
4. The method of claim 1, wherein the recording of the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator comprises:
the time flow rate of the actual time axis of the software simulator is consistent with the running time of the hardware controller.
5. A simulation device of a hardware-in-the-loop simulation system based on data interaction event driving is characterized in that the hardware-in-the-loop simulation system comprises a hardware controller and a software simulator, and the simulation device comprises:
the setting module is used for setting the time interval between data interaction events based on the adjustment of the data interaction period and setting the relative time flow rate ratio of a virtual time axis and an actual time axis in the software simulator according to the time interval;
the recording module is used for recording a virtual time point in the software simulator according to the data interaction event of the hardware controller to obtain a virtual time axis of the software simulator;
and the simulation module is used for recording the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator, and after the simulation circuit is calculated in a single control period, transmitting the simulation result to the hardware controller when the virtual time axis virtual time recording point is reached so as to complete the software and hardware data interaction of the hardware-in-the-loop simulation system.
6. The apparatus of claim 5, further comprising:
and the calculation module is used for interacting a control signal obtained by closed-loop calculation in the hardware controller and a simulation result obtained by resolving by the simulation circuit in the software simulator by the hardware-in-loop simulation system in a fixed period.
7. The apparatus of claim 5,
the actual time consumption of the calculation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method and the calculation capacity of the software simulator.
8. The apparatus of claim 5, wherein the recording of the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator comprises:
the time flow rate of the actual time axis of the software simulator is consistent with the running time of the hardware controller.
9. An electronic device, comprising: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the program to implement the simulation method of the hardware-in-loop simulation system based on data interaction event driving according to any one of claims 1 to 4.
10. A computer-readable storage medium, on which a computer program is stored, the program being executable by a processor for implementing a simulation method of a hardware-in-the-loop simulation system based on data interaction event driving according to any of claims 1 to 4.
CN202211168110.XA 2022-09-23 2022-09-23 Hardware-in-loop simulation method and device based on data interaction event driving Pending CN115421869A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117094174A (en) * 2023-10-16 2023-11-21 成都赢瑞科技有限公司 Method for recording simulation data and analyzing data stream and resource occupation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117094174A (en) * 2023-10-16 2023-11-21 成都赢瑞科技有限公司 Method for recording simulation data and analyzing data stream and resource occupation
CN117094174B (en) * 2023-10-16 2024-01-26 成都赢瑞科技有限公司 Method for recording simulation data and analyzing data stream and resource occupation

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