CN115421869A - Hardware-in-the-loop simulation method and device based on data interaction event-driven - Google Patents

Abstract

The application discloses a hardware-in-loop simulation method and device based on data interaction event driving, wherein the time interval between data interaction events is set based on adjusting the data interaction period, and the relative time flow rate ratio in a software simulator is set according to the time interval; triggering a recording action of virtual time in the software simulator by a data interaction event; the actual time consumption of the simulation circuit in the software simulator in the calculation process forms a software simulation actual time axis, and after the simulation circuit in a control period finishes the calculation, the simulation circuit waits for a virtual time recording point to occur and then transmits a simulation result to the hardware controller so as to finish the software and hardware data interaction of the hardware-in-the-loop simulation system. By adjusting the relative time flow rate ratio of the virtual time axis to the actual time axis in the simulation space, the problem of overflow of calculation time caused by high complexity of a simulation circuit system is prevented, and accurate hardware-in-loop simulation of a simulation circuit with a large system scale is realized under the condition that high-performance calculation hardware is not available.

Description

Hardware-in-the-loop simulation method and device based on data interaction event-driven

technical field

The present application relates to the technical field of hardware-in-the-loop simulation of power electronic systems, in particular to a hardware-in-the-loop simulation method and device driven by data interaction events.

Background technique

In the "carbon neutral, carbon peak" energy strategic plan, electric energy conversion is a key technology for green energy conservation, new energy utilization, and electric energy safety construction. Power conversion technology is realized by a power electronic system composed of a signal control unit and a power conversion unit. Rapid, accurate and low-cost development of power electronic systems is a key step to improve construction efficiency and reduce construction costs, and hardware-in-the-loop simulation provides an effective way to design, debug and verify power electronic system conversion functions, dynamic performance and fault response. tool. The hardware-in-the-loop simulation technology is to embed the actual hardware controller into the closed-loop operation of the numerical model simulation, and use the software simulator to calculate the operation process of the numerical model of the power circuit, so as to realize the multi-time scale dynamic characterization of the continuous and discrete states of the power electronic system. However, with the new power system connected with large-scale new energy and the construction demand of micro-grid, the system scale of the power electronic system is getting larger and larger, the system topology is becoming more and more complex, and there are more and more power electronic conversion units, resulting in It is difficult for the hardware-in-the-loop simulation system to solve the numerical model of the complex power circuit within a fixed control cycle, so it cannot meet the hardware-in-the-loop simulation requirements of the new power system and the power electronic system in the microgrid. Therefore, how to realize accurate hardware-in-the-loop simulation of large-scale power electronic systems is a key problem that needs to be solved urgently, and it is a difficult problem in the development of key tools for designing, analyzing and verifying the operating characteristics of power electronic systems in new power systems.

In related technologies, in order to solve the key problems of how to realize hardware-in-the-loop simulation of large-scale power electronic systems, the research mainly focuses on modeling simplification, simulation method acceleration, computing hardware parallelization, and system structure decoupling. In terms of modeling simplification, in a large-scale power electronic system, the external characteristics of the half-bridge/full-bridge module are modeled, and the switching elements in the module are no longer modeled, so as to simplify the mathematical expression of the modeling, and then achieve simplification Simulation solution process. However, the switching element action in the module cannot be characterized, and the characterization time scale range of power electronic system hardware-in-the-loop simulation is reduced, and the characterization accuracy is reduced. In terms of acceleration of the simulation method, the time-discrete calculation step size is set to one step and two steps, which reduces the requirement for high-precision characterization on the simulation step size, and also reduces the step size of the simulation state data update to achieve high precision. The method of reducing the amount of computation by keeping the step size constant is an effort to reduce the amount of computation and improve the simulation speed in hardware-in-the-loop simulation. However, this is a solution to the symptoms rather than the root cause, and it is difficult to continue to play a key role in the context of the gradually increasing system scale. In terms of computing hardware parallelization, when constructing a software emulator, multi-central processing units (CPUs), multi-field programmable gate arrays (FPGAs) and CPU+FPGA computing hardware with parallel functions can be used to distribute computing tasks to different However, this will greatly increase the cost of the software simulator, especially the price of FPGA is very unfavorable for the low-cost construction of hardware-in-the-loop simulation. In terms of system structure decoupling, decoupling a large-scale power electronic system into multiple subsystems for simulation calculation can reduce the complexity of the power electronic system in the software simulator, thereby simplifying the matrix dimension of the system model and simplifying the layout of the power circuit. Simulate the solution process to improve the speed of hardware-in-the-loop simulation. However, the decoupling of large-scale power electronic systems will divide the systems with strong coupling characteristics, resulting in the simplification and delay of the data interaction process between subsystems, which will lead to the reduction of the accuracy of hardware-in-the-loop simulation of power electronic systems.

Therefore, in order to achieve accurate hardware-in-the-loop simulation of large-scale power electronic systems, solve the problem that hardware-in-the-loop simulation cannot be completed accurately due to the fact that the calculation speed of the software simulator in complex systems is much slower than the actual time flow rate, in order to deal with new power The hardware-in-the-loop simulation requirements of power electronic systems in the system and microgrid require further research and development of hardware-in-the-loop simulation methods for large-scale power electronic systems.

Contents of the invention

The present application provides a simulation method, device, electronic equipment and storage medium based on a hardware-in-the-loop simulation system driven by data interaction events, which solves the hardware-in-the-loop simulation problem caused by the calculation speed of the software simulator in a complex system is much slower than the actual time flow rate. For the problem that the simulation cannot be completed accurately, accurate hardware-in-the-loop simulation is realized under the large-scale power electronic system simulation example.

The embodiment of the first aspect of the present application provides a simulation method of a hardware-in-the-loop simulation system driven by data interaction events. The hardware-in-the-loop simulation system includes a hardware controller and a software simulator, including the following steps: , setting the time interval between data interaction events, and setting the relative time flow rate ratio of the virtual time axis and the actual time axis in the software emulator according to the time interval; according to the data interaction event record of the hardware controller In the virtual time point in the software emulator, obtain the virtual time axis of the software emulator; record the actual time-consuming in the calculation process of the simulation circuit in the software emulator, obtain the actual time axis of the software emulator, in a single After the calculation of the simulation circuit in the control cycle is completed, the simulation result is transmitted to the hardware controller when the virtual time recording point of the virtual time axis is reached, so as to complete the hardware-software data interaction of the hardware-in-the-loop simulation system.

Optionally, in one embodiment of the present application, it further includes: the hardware-in-the-loop simulation system interacts with the control signal obtained by the closed-loop calculation in the hardware controller and the simulation circuit in the software simulator at a fixed cycle Solve the obtained simulation results.

Optionally, in an embodiment of the present application, the actual time consumption of the calculation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method, and the calculation capability of the software simulator.

Optionally, in an embodiment of the present application, the recording the actual time spent in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator includes: the software simulator The time flow rate of the actual time axis is consistent with the running time of the hardware controller.

The embodiment of the second aspect of the present application provides a simulation device based on a hardware-in-the-loop simulation system driven by data interaction events. The hardware-in-the-loop simulation system includes a hardware controller and a software simulator, including: a setting module for adjusting Data interaction cycle, setting the time interval between data interaction events, and setting the relative time flow rate ratio of the virtual time axis and the actual time axis in the software emulator according to the time interval; the recording module is used for according to the hardware The data interaction event of the controller records the virtual time point in the software simulator to obtain the virtual time axis of the software simulator; the simulation module is used to record the actual time consumption in the calculation process of the simulation circuit in the software simulator, Obtain the actual time axis of the software emulator, after the calculation of the simulation circuit in a single control cycle is completed, when the virtual time recording point of the virtual time axis is reached, the simulation result is transferred to the hardware controller to complete the hardware-in-the-loop The software and hardware data interaction of the simulation system.

Optionally, in one embodiment of the present application, it further includes: a calculation module, used for the hardware-in-the-loop simulation system to interact with the control signal obtained by the closed-loop calculation in the hardware controller and the software simulator at a fixed cycle The simulation results obtained by solving the simulation circuit described in .

Optionally, in an embodiment of the present application, the actual time consumption of the calculation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method, and the calculation capability of the software simulator.

Optionally, in an embodiment of the present application, the recording the actual time spent in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator includes: the software simulator The time flow rate of the actual time axis is consistent with the running time of the hardware controller.

The embodiment of the third aspect of the present application provides an electronic device, including: a memory, a processor, and a computer program stored on the memory and operable on the processor, and the processor executes the program to perform The simulation method based on the hardware-in-the-loop simulation system driven by data interaction events as described in the above-mentioned embodiments.

The embodiment of the fourth aspect of the present application provides a computer-readable storage medium on which a computer program is stored, and the program is executed by a processor to execute the hardware-in-the-loop simulation system driven by data interaction events as described in the above-mentioned embodiments. simulation method.

The hardware-in-the-loop simulation method, device, electronic equipment, and storage medium based on data interaction event-driven in the embodiments of the present application realize accurate hardware-in-the-loop simulation of large-scale power electronic systems, and control the simulation process from the time of traditional hardware controllers In this way, the simulation process is controlled by data interaction events, and the virtual time axis customization function in the software simulator is realized. Therefore, the data interaction and synchronization process of the solution results of the power circuit numerical model in the software simulator can be controlled by adjusting the ratio of virtual and real time to flow velocity. Using the hardware-in-the-loop simulation method driven by data interaction events in the embodiment of the present application can completely solve the problem that the hardware-in-the-loop simulation cannot be completed accurately because the calculation speed of the software simulator in a complex system is much slower than the actual time flow rate. In this way, the work efficiency of scientific research personnel in large-scale power electronic system design, debugging and verification can be improved, and the efficiency of development and construction of power conversion equipment in new power systems and microgrids can be improved.

Additional aspects and advantages of the application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the application.

Description of drawings

The above and/or additional aspects and advantages of the present application will become apparent and easy to understand from the following description of the embodiments in conjunction with the accompanying drawings, wherein:

FIG. 1 is a flow chart of a simulation method based on a data interaction event-driven hardware-in-the-loop simulation system provided according to an embodiment of the present application;

FIG. 2 is a schematic diagram of timing configuration of a hardware controller and a software emulator in a hardware-in-the-loop simulation method driven by data interaction events according to an embodiment of the present application;

FIG. 3 is a schematic diagram of a hardware-in-the-loop simulation architecture of a power electronic system constructed based on a data interaction event-driven hardware-in-the-loop simulation method provided by an embodiment of the present application;

FIG. 4 is a schematic diagram of the relationship between the data interaction cycle, the virtual control cycle, and the actual time-consuming simulation operation provided according to an embodiment of the present application;

FIG. 5 is a comparison of a timing diagram of a hardware-in-the-loop simulation driven by a data interaction event, a timing diagram of a real-time hardware-in-the-loop simulation, and a timing diagram of simulation calculation overflow provided according to an embodiment of the present application;

FIG. 6 is a physical diagram of the hardware-in-the-loop simulation architecture of the power electronic system used in the verification of the hardware-in-the-loop simulation method driven by data interaction events according to the embodiment of the present application;

FIG. 7 is a physical diagram of an experimental prototype with a simple system scale and its topology structure required for the verification of the hardware-in-the-loop simulation method driven by data interaction events according to the embodiment of the present application;

Fig. 8 is a comparison of the hardware-in-the-loop simulation results with a simple system scale required for the verification of the hardware-in-the-loop simulation method driven by data interaction events and the experimental results according to the embodiment of the present application;

FIG. 9 is a comparison of simulation results of hardware-in-the-loop simulation with a simple system scale required for verification of the hardware-in-the-loop simulation method driven by data interaction events according to an embodiment of the present application under different virtual-to-real time flow rate ratios;

Fig. 10 is a simulation of the hardware-in-the-loop simulation with a simple system scale required for the verification of the hardware-in-the-loop simulation method based on the data interaction event driven by the embodiment of the present application under the control parameters that generate oscillations and the simulation of different virtual-to-real time flow-velocity ratios Result comparison and FFT analysis result comparison;

FIG. 11 is a physical diagram of an experimental prototype with a complex system scale and its topology structure required for the verification of the hardware-in-the-loop simulation method driven by data interaction events according to the embodiment of the present application;

FIG. 12 is a comparison between the hardware-in-the-loop simulation results and the experimental results with a complex system scale required for the verification of the hardware-in-the-loop simulation method driven by data interaction events according to the embodiment of the present application;

FIG. 13 is an example diagram of a simulation device of a hardware-in-the-loop simulation system driven by data interaction events according to an embodiment of the present application;

FIG. 14 is a schematic structural diagram of an electronic device provided in an embodiment of the application.

detailed description

Embodiments of the present application are described in detail below, examples of which are shown in the drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the figures are exemplary, and are intended to explain the present application, and should not be construed as limiting the present application.

The simulation method, device, electronic equipment, and storage medium of the hardware-in-the-loop simulation system driven by data interaction events according to the embodiments of the present application are described below with reference to the accompanying drawings. Research on modeling simplification, simulation method acceleration, computing hardware parallelization, and system structure decoupling mentioned in the above-mentioned background technology is difficult to solve the hardware-in-the-loop problem caused by the fact that the calculation speed of the software simulator in a complex system is much slower than the actual time flow rate. For the problem that the simulation cannot be completed accurately, this application provides a simulation method based on a hardware-in-the-loop simulation system driven by data interaction events. The hardware-in-the-loop simulation system includes a hardware controller and a software simulator. In this method, a relatively The accurate hardware-in-the-loop simulation of large-scale power electronic systems is transferred from the time-controlled simulation process of traditional hardware controllers to the simulation process controlled by data interaction events, and realizes the virtual time axis customization function in the software simulator. Thus, the problem that the hardware-in-the-loop simulation cannot be completed accurately due to the fact that the calculation speed of the software simulator in the complex system is much slower than the actual time flow rate is solved.

Specifically, FIG. 1 is a flowchart of a simulation method based on a hardware-in-the-loop simulation system driven by data interaction events according to an embodiment of the present application.

As shown in Figure 1, the simulation method based on the data interaction event-driven hardware-in-the-loop simulation system includes the following steps:

In step S101, based on adjusting the data interaction cycle, set the time interval between data interaction events, and set the relative time flow rate ratio between the virtual time axis and the actual time axis in the software simulator according to the time interval.

As shown in Figure 2, first configure the hardware controller to set the data interaction event axis, and adjust the data interaction cycle to set the time interval between data interaction events, thereby setting the relative time between the virtual time axis and the actual time axis in the software emulator flow rate ratio.

The data interaction event axis is composed of data interaction events in the hardware-in-the-loop simulation system. On the premise of ensuring the correct data logic between events, the time interval between events can be adjusted according to the simulation requirements.

In step S102, the virtual time point in the software simulator is recorded according to the data interaction event of the hardware controller, and the virtual time axis of the software simulator is obtained.

The virtual time recording action in the configuration software emulator is triggered by the data interaction event of the hardware controller, that is, a virtual time point is recorded once a data interaction event is received, and the distance between virtual time points is the virtual control cycle. In the simulation space, it is determined by The control cycle of the simulated circuit is determined and does not change with the adjustment of the data interaction cycle of the hardware controller.

The virtual time axis in the software simulator refers to the simulation time of the simulated circuit, not the actual running time of the software simulator. The virtual time point is driven by the data interaction event of the hardware controller and marked in increments of units, thereby ensuring The virtual control period remains unchanged during the adjustment of the data interaction period.

In step S103, record the actual time-consuming during the calculation of the simulation circuit in the software simulator, and obtain the actual time axis of the software simulator. After the calculation of the simulation circuit in a single control cycle is completed, wait for the time when the virtual time recording point of the virtual time axis is reached. The simulation results are transmitted to the hardware controller to complete the hardware-software data interaction of the hardware-in-the-loop simulation system.

Optionally, in the embodiment of the present application, the hardware-in-the-loop simulation system interacts with the control signal obtained by the closed-loop calculation in the hardware controller and the simulation result obtained by the simulation circuit solution in the software simulator in a fixed cycle.

The actual time consumption of the calculation process of the simulation circuit in the software simulator constitutes the actual time axis of the software simulation, which is determined by the system complexity of the simulation circuit, the simulation driving method, and the calculation capability of the software simulator. After the calculation of the simulation circuit in a control cycle is completed, wait for After the virtual time recording point occurs, the simulation results are transmitted to the hardware controller to complete the hardware-software data interaction of the hardware-in-the-loop simulation system.

The time consumed by the software simulator in the power circuit simulation process constitutes the actual time axis, and its time flow rate is consistent with the running time of the hardware controller. When the system complexity of the simulation circuit is high, the simulation method used by the software simulator needs repeated iterations or When solving high-density equations and the performance of the computing hardware equipped with a software simulator is not high enough, the data results within the simulation time will take several times longer. Therefore, by adjusting the data interaction cycle, there is enough time under the condition that the virtual control cycle remains unchanged. It is used for simulation calculation to adapt to power electronics hardware-in-the-loop simulation with large system scale.

The timing configuration of the hardware controller and the software emulator constitutes the hardware-in-the-loop simulation method based on the data interaction event driven in the embodiment of the present application, which can expand the system scale of the hardware-in-the-loop simulation and reduce the performance requirements and costs of the computing hardware.

的SoC系列控制板作为硬件控制器，由搭载Linux操作系统的计算机中的CPU作为软件仿真器。In the embodiment of the present application, as shown in FIG. 3 , the hardware-in-the-loop simulation architecture of the power electronic system constructed by using the hardware-in-the-loop simulation method driven by data interaction events is composed of

The SoC series control board is used as the hardware controller, and the CPU in the computer equipped with the Linux operating system is used as the software emulator.

The hardware controller realizes data interaction with the software emulator through the PCIe interface, obtains the voltage and current sampling signals from the software emulator to calculate the control strategy, and then obtains the control output signal, which is consistent with the timing signal of the data interaction event in the hardware controller. and sent to the software emulator.

After receiving the timing signal of the data interaction event, the timing configuration of the software simulator is performed, that is, the virtual time point is recorded, and the simulator is driven to execute the simulation algorithm of the power circuit numerical model according to the virtual time, so as to obtain the simulation calculation result, that is, each in the power electronic system State variables for voltage and current.

An operating host is provided for writing and downloading control programs, as well as for transforming and adjusting the power circuit numerical model and its connection relationship in the software simulator, and for outputting and displaying the results of hardware-in-the-loop simulation.

In the embodiment of the present application, as shown in Figure 4, a schematic diagram of the relationship between the data interaction cycle of the hardware controller, the virtual control cycle of the software simulator, and the actual time-consuming software simulation operation, specifically, the relationship between data interaction events The time interval constitutes the data interaction cycle, the virtual time length in the control cycle that needs to be simulated in the power circuit simulation in the software simulator constitutes the virtual control cycle, and the actual time consumed by the power circuit simulation calculation process constitutes the actual time-consuming of the software simulation operation.

Furthermore, the actual time-consuming software simulation operation is related to the system complexity of the simulated power circuit, the performance of the computing hardware of the software simulator, and the efficiency of the simulation method. The simulation results in the same virtual time under different circumstances The length of the software simulation operation time is different.

Further, as shown in Figure 4, within the same virtual time ΔT _C of the simulated circuit, the running time T _R of the software simulation is divided into three situations, among which, the case #1 is that the running time of the software simulation exceeds the simulation time of the simulated circuit , that is, the simulation calculation speed is slower than the virtual time flow rate of the simulated system; case #2 is that the running time of the software simulator is equal to the virtual time simulated by the simulated circuit, that is, the simulation calculation speed is synchronized with the virtual time flow rate of the simulated system in real time; Case #3 is that the running time of the software simulation is less than the virtual time of the simulated circuit simulation, that is, the simulation calculation speed achieves super real-time simulation relative to the virtual time flow rate of the simulated system.

Further, defining the virtual time velocity as v _VT is the ratio of virtual time to actual time, the virtual time velocity can be calculated according to formula (1), where T _C is the virtual time of the software simulator,

Further, when the virtual time flow rate of the software simulator is synchronized with the actual time flow rate, the synchronous flow rate ratio σ is defined, that is, in case #2, v _VT =σ. Furthermore, λ is defined as the virtual time flow velocity coefficient, and the virtual time flow velocity in different situations can be calculated according to formula (2), where λ>1 is situation #1, λ=1 is situation #2, and λ<1 is Situation #3.

v _VT =λσ,λ>0 (2)

Further, by adjusting the data interaction period ΔT _D , the actual time interval adjustment of the virtual time recording points in the software simulator can be adjusted, and the virtual time flow velocity v _VT can be adjusted to obtain different virtual time flow velocity coefficients λ.

In the embodiment of the present application, as shown in (a) of Figure 5, it is a timing diagram of a hardware controller and a software emulator for real-time hardware-in-the-loop simulation, and (b) of Figure 5 is a schematic diagram of a traditional real-time hardware-in-the-loop simulation The schematic diagram of the simulation calculation overflow under the timing configuration of the hardware controller and the software simulator in the loop simulation, as shown in (c) of Figure 5, is the hardware controller and the software simulator in the hardware-in-the-loop simulation driven by data interaction events timing diagram.

Specifically, in (a) of Figure 5, the virtual time axis of the software simulator in the real-time hardware-in-the-loop simulation system is synchronized with the time of the data interaction event axis of the hardware controller, and the data interaction of the software simulator in the hardware controller The actual running process of software simulation can be completed within the cycle.

In (b) of Figure 5, when the computing power of the software simulator is insufficient, or the power circuit system being simulated is highly complex, the software simulation calculation cannot be completed within the data interaction cycle of the hardware controller, resulting in simulation calculation overflow and The data interaction is disordered, which leads to the wrong logical relationship between control events and simulation data, and finally leads to incorrect hardware-in-the-loop simulation results.

In (c) of Figure 5, the data interaction period of the hardware controller is adjusted to double the original value, and the virtual time stamp of the software emulator is triggered by the data interaction event. When the data interaction event occurs, the virtual time adds a control period unit, thus Realizing the virtual time flow rate is equivalent to 2 times slower than the actual time flow rate, that is, λ=0.5, so as to reserve enough actual time for the software simulation calculation process, and ensure the correct logic between the control event and the simulation data, and then get the correct hardware in Ring simulation results.

In the embodiment of the present application, as shown in Figure 6, in order to verify the hardware-in-the-loop simulation method driven by data interaction events, a hardware-in-the-loop simulation system based on a CPU software emulator is built, and a hardware controller and a software emulator are shown. And the physical object of the operating host.

The hardware-in-the-loop simulation method based on the data interaction event driven in the embodiment of the present application will be verified below with reference to the accompanying drawings and a specific embodiment.

Fig. 7 shows the physical diagram and the circuit topology of the experimental prototype of the power electronic transformer in the hardware-in-the-loop simulation system of a specific embodiment, including 24 active switching tubes in total, wherein the front-end converter is a three-level three-phase rectifier, The intermediate electrical isolation adopts dual active bridge converters, and the back-end converter is a single-phase inverter. The switching frequency of the dual active bridge converters is 20kHz. It is a high-frequency converter in a power electronic system with a rated power of 50kVA. The virtual control cycle is 50μs, and its basic electrical parameters are shown in Table 1. The system complexity of this power electronic system is not high, so it can be used to verify the correctness of the hardware-in-the-loop simulation method driven by data interaction events in the embodiment of the present application.

Table 1 Electrical parameters of power electronic transformers

Fig. 8 shows the comparison of simulation and experimental results for verifying the hardware-in-the-loop simulation method based on data interaction event-driven proposed by the embodiment of the present application. The comparison of the experimental results obtained by the experimental prototype provides the dynamic process waveform of the output voltage of the front-end rectifier and the dynamic process waveform of the output voltage of the isolated dual active bridge converter. The correctness of the hardware-in-the-loop simulation method.

Further, Fig. 9 shows the hardware-in-the-loop simulation method based on the data interaction event driven by the embodiment of the present application, setting different virtual time flow rates and comparing the simulation results, that is, comparing the hardware-in-the-loop simulation results under different λ. It can be seen that in the dynamic process of the output voltage of the front-end rectifier from 700V to 600V, λ=1, 0.5, 0.33, and 0.25 are set respectively, and the hardware-in-the-loop simulation results of the four cases are almost consistent, which verifies the influence of different virtual time flow rates on The accuracy of the hardware-in-the-loop simulation results is not affected.

Further, Fig. 10 shows that different virtual time flow rates are set under the hardware-in-the-loop simulation method based on the data interaction event driven by the embodiment of the present application, that is, λ=1, 0.5, 0.33, and 0.25 are respectively set, and the power electronics Under the control parameters of the transformer output voltage oscillation, the hardware-in-the-loop simulation results of the output voltage are obtained and compared. At the same time, in order to analyze the difference in the output voltage oscillation frequency under different virtual time flow rates, Fig. 10 also shows the FFT analysis of the obtained output voltage waveforms in the four cases. It can be seen that the control parameters provided by the hardware controller oscillate to the simulated circuit in the software simulator, and the high-frequency oscillation frequency caused by the control parameters is basically the same under different virtual time flow rates. The logic among the simulation data can be kept consistent, which further verifies the correctness of the hardware-in-the-loop simulation method based on data interaction event-driven proposed in the embodiment of the present application.

Fig. 11 shows the physical diagram and circuit topology of the experimental prototype of the multi-port power router in the hardware-in-the-loop simulation system of a specific embodiment, which includes 32 switch tubes, 4 high-frequency transformers, 4 input/output ports, And each port is coupled and connected with each other to form a multi-port power router with a common high-frequency link, and its circuit parameters are shown in Table 2. The power electronic system has four port conversion modules, and is highly coupled through high-frequency transformers. More voltage and current state variables are coupled and calculated, forming a complex power electronic system, which greatly increases the time-consuming software calculation process, so it is suitable for use in To verify the effectiveness of hardware-in-the-loop simulation based on data interaction event-driven hardware-in-the-loop simulation method proposed in this application for power electronic systems with high system complexity.

Table 2 Electrical parameters of the multi-port power router

Figure 12 shows the experimental results of the multi-port power router required for validating the hardware-in-the-loop simulation method based on the data interaction event driven by the embodiment of the present application and the hardware-in-the-loop simulation results when λ=0.167 is set, compared with the multi-port The high-frequency bus voltage and current of the power router, it can be seen that except for the high-frequency oscillation caused by the switching process, the switching characteristics of its high-frequency voltage and current have been simulated more accurately, which verifies that when the virtual time flow rate of the software simulator is very slow It can still get more accurate hardware-in-the-loop simulation results, which is close to the problem that power electronic systems with high system complexity cannot be simulated by hardware-in-the-loop.

In summary, through the verification of this specific embodiment, it is proved that the hardware-in-the-loop simulation method driven by data interaction events provided by this application can maintain almost the same simulation results at different virtual time flow rates, and can simulate complex systems with high complexity. The power electronic system can solve the problem that the hardware-in-the-loop simulation cannot be completed accurately because the calculation speed of the software simulator in the complex system is much slower than the actual time flow rate. its correctness and effectiveness.

The simulation method based on the hardware-in-the-loop simulation system driven by data interaction events proposed in the embodiment of the present application can flexibly adjust the relative time flow ratio between the virtual time axis and the actual time axis in the simulation space, thereby preventing the occurrence of problems due to the complexity of the simulation circuit system. High and lead to the problem of calculation time overflow, and then realize the accurate hardware-in-the-loop simulation of large-scale system-scale simulation circuits without high-performance computing hardware.

Next, a simulation device of a hardware-in-the-loop simulation system driven by data interaction events based on an embodiment of the present application is described with reference to the accompanying drawings.

FIG. 13 is an example diagram of a simulation device of a hardware-in-the-loop simulation system driven based on data interaction events according to an embodiment of the present application.

As shown in FIG. 13 , the hardware-in-the-loop simulation system includes a hardware controller and a software simulator, and the simulation device 10 of the hardware-in-the-loop simulation system driven by data interaction events includes: a setting module 100 , a recording module 200 and a simulation module 300 .

Wherein, the setting module 100 is configured to set the time interval between data interaction events based on adjusting the data interaction cycle, and set the relative time flow rate ratio between the virtual time axis and the actual time axis in the software simulator according to the time interval. The recording module 200 is configured to record virtual time points in the software simulator according to data interaction events of the hardware controller, and obtain a virtual time axis of the software simulator. The simulation module 300 is used to record the actual time spent in the calculation process of the simulation circuit in the software simulator, and obtain the actual time axis of the software simulator. After the calculation of the simulation circuit in a single control cycle is completed, wait for the virtual time axis to reach the virtual time recording point The simulation results are transmitted to the hardware controller to complete the hardware-software data interaction of the hardware-in-the-loop simulation system.

Optionally, in the embodiment of the present application, it also includes: a calculation module, which is used for the hardware-in-the-loop simulation system to interact with the control signal obtained by the closed-loop calculation in the hardware controller in a fixed cycle and the simulation circuit solution obtained in the software simulator. Simulation results.

Optionally, in the embodiment of the present application, the actual time consumption of the calculation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method, and the calculation capability of the software simulator.

Optionally, in the embodiments of the present application, the actual time spent in the calculation process of the simulation circuit in the software simulator is recorded to obtain the actual time axis of the software simulator, including: the time flow rate of the actual time axis of the software simulator and the hardware The runtime of the controllers is consistent.

It should be noted that the foregoing explanations for the embodiment of the simulation method for the hardware-in-the-loop simulation system driven by data interaction events are also applicable to the simulation device for the hardware-in-the-loop simulation system driven by data interaction events in this embodiment. No longer.

The simulation device based on the data interaction event-driven hardware-in-the-loop simulation system proposed according to the embodiment of the present application can flexibly adjust the relative time flow rate ratio between the virtual time axis and the actual time axis in the simulation space, thereby preventing the occurrence of problems due to the complexity of the simulation circuit system. High and lead to the problem of calculation time overflow, and then realize the accurate hardware-in-the-loop simulation of large-scale system-scale simulation circuits without high-performance computing hardware.

FIG. 14 is a schematic structural diagram of an electronic device provided by an embodiment of the present application. This electronic equipment can include:

A memory 1401 , a processor 1402 , and a computer program stored in the memory 1401 and executable on the processor 1402 .

When the processor 1402 executes the program, the simulation method based on the data interaction event-driven hardware-in-the-loop simulation system provided in the above-mentioned embodiments is implemented.

Further, the electronic equipment also includes:

The communication interface 1403 is used for communication between the memory 1401 and the processor 1402 .

The memory 1401 is used to store computer programs that can run on the processor 1402 .

The memory 1401 may include a high-speed RAM memory, and may also include a non-volatile memory (non-volatile memory), such as at least one magnetic disk memory.

If the memory 1401, the processor 1402, and the communication interface 1403 are implemented independently, the communication interface 1403, the memory 1401, and the processor 1402 may be connected to each other through a bus to complete mutual communication. The bus may be an Industry Standard Architecture (Industry Standard Architecture, ISA for short) bus, a Peripheral Component Interconnect (PCI for short) bus, or an Extended Industry Standard Architecture (EISA for short) bus. The bus can be divided into address bus, data bus, control bus and so on. For ease of representation, only one thick line is used in FIG. 14 , but it does not mean that there is only one bus or one type of bus.

Optionally, in specific implementation, if the memory 1401, processor 1402, and communication interface 1403 are integrated on one chip, then the memory 1401, processor 1402, and communication interface 1403 can communicate with each other through the internal interface.

The processor 1402 may be a central processing unit (Central Processing Unit, referred to as CPU), or a specific integrated circuit (Application Specific Integrated Circuit, referred to as ASIC), or configured to implement one or more of the embodiments of the present application integrated circuit.

This embodiment also provides a computer-readable storage medium, on which a computer program is stored, wherein, when the program is executed by a processor, the above simulation method based on the data interaction event-driven hardware-in-the-loop simulation system is implemented.

In the description of this specification, descriptions with reference to the terms "one embodiment", "some embodiments", "example", "specific examples", or "some examples" mean that specific features described in connection with the embodiment or example , structure, material or characteristic is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the described specific features, structures, materials or characteristics may be combined in any one or N embodiments or examples in an appropriate manner. In addition, those skilled in the art can combine and combine different embodiments or examples and features of different embodiments or examples described in this specification without conflicting with each other.

In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly specifying the quantity of indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include at least one of these features. In the description of the present application, "N" means at least two, such as two, three, etc., unless otherwise specifically defined.

Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code comprising one or more executable instructions for implementing a custom logical function or step of a process , and the scope of preferred embodiments of the present application includes additional implementations in which functions may be performed out of the order shown or discussed, including in substantially simultaneous fashion or in reverse order depending on the functions involved, which shall It should be understood by those skilled in the art to which the embodiments of the present application belong.

It should be understood that each part of the present application may be realized by hardware, software, firmware or a combination thereof. In the above embodiments, the N steps or methods may be implemented by software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented by any one or combination of the following techniques known in the art: a discrete Logic circuits, ASICs with suitable combinational logic gates, Programmable Gate Arrays (PGA), Field Programmable Gate Arrays (FPGA), etc.

Those of ordinary skill in the art can understand that all or part of the steps carried by the methods of the above embodiments can be completed by instructing related hardware through a program, and the program can be stored in a computer-readable storage medium. During execution, one or a combination of the steps of the method embodiments is included.

Claims (10)

1. A simulation method of a hardware-in-the-loop simulation system based on data interaction event driving is characterized in that the hardware-in-the-loop simulation system comprises a hardware controller and a software simulator, and the method comprises the following steps:

setting time intervals among data interaction events based on the adjustment of the data interaction period, and setting a relative time flow rate ratio of a virtual time axis and an actual time axis in the software simulator according to the time intervals;

recording a virtual time point in the software simulator according to the data interaction event of the hardware controller to obtain a virtual time axis of the software simulator;

recording the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator, and after the simulation circuit is calculated in a single control period, transmitting the simulation result to the hardware controller when the virtual time axis virtual time recording point is reached so as to complete the software and hardware data interaction of the hardware-in-the-loop simulation system.

2. The method of claim 1, further comprising:

and the hardware-in-loop simulation system interacts with a control signal obtained by closed-loop calculation in the hardware controller and a simulation result obtained by resolving by the simulation circuit in the software simulator in a fixed period.

3. The method of claim 1,

the actual time consumption of the calculation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method and the calculation capacity of the software simulator.

4. The method of claim 1, wherein the recording of the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator comprises:

the time flow rate of the actual time axis of the software simulator is consistent with the running time of the hardware controller.

5. A simulation device of a hardware-in-the-loop simulation system based on data interaction event driving is characterized in that the hardware-in-the-loop simulation system comprises a hardware controller and a software simulator, and the simulation device comprises:

the setting module is used for setting the time interval between data interaction events based on the adjustment of the data interaction period and setting the relative time flow rate ratio of a virtual time axis and an actual time axis in the software simulator according to the time interval;

the recording module is used for recording a virtual time point in the software simulator according to the data interaction event of the hardware controller to obtain a virtual time axis of the software simulator;

and the simulation module is used for recording the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator, and after the simulation circuit is calculated in a single control period, transmitting the simulation result to the hardware controller when the virtual time axis virtual time recording point is reached so as to complete the software and hardware data interaction of the hardware-in-the-loop simulation system.

6. The apparatus of claim 5, further comprising:

and the calculation module is used for interacting a control signal obtained by closed-loop calculation in the hardware controller and a simulation result obtained by resolving by the simulation circuit in the software simulator by the hardware-in-loop simulation system in a fixed period.

7. The apparatus of claim 5,

the actual time consumption of the calculation process of the simulation circuit in the software simulator is determined by the system complexity of the simulation circuit, the simulation driving method and the calculation capacity of the software simulator.

8. The apparatus of claim 5, wherein the recording of the actual consumed time in the calculation process of the simulation circuit in the software simulator to obtain the actual time axis of the software simulator comprises:

the time flow rate of the actual time axis of the software simulator is consistent with the running time of the hardware controller.

9. An electronic device, comprising: a memory, a processor and a computer program stored on the memory and executable on the processor, the processor executing the program to implement the simulation method of the hardware-in-loop simulation system based on data interaction event driving according to any one of claims 1 to 4.

10. A computer-readable storage medium, on which a computer program is stored, the program being executable by a processor for implementing a simulation method of a hardware-in-the-loop simulation system based on data interaction event driving according to any of claims 1 to 4.

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