CN115414971A - Micro-control flow chip and preparation method thereof - Google Patents
Micro-control flow chip and preparation method thereof Download PDFInfo
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- CN115414971A CN115414971A CN202210930277.9A CN202210930277A CN115414971A CN 115414971 A CN115414971 A CN 115414971A CN 202210930277 A CN202210930277 A CN 202210930277A CN 115414971 A CN115414971 A CN 115414971A
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 185
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 185
- 239000010703 silicon Substances 0.000 claims abstract description 185
- 238000004528 spin coating Methods 0.000 claims abstract description 69
- 239000004205 dimethyl polysiloxane Substances 0.000 claims abstract description 60
- 235000013870 dimethyl polysiloxane Nutrition 0.000 claims abstract description 60
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims abstract description 60
- CXQXSVUQTKDNFP-UHFFFAOYSA-N octamethyltrisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)O[Si](C)(C)C CXQXSVUQTKDNFP-UHFFFAOYSA-N 0.000 claims abstract description 50
- 238000004987 plasma desorption mass spectroscopy Methods 0.000 claims abstract description 50
- 238000000034 method Methods 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 239000011521 glass Substances 0.000 claims abstract description 28
- 238000004140 cleaning Methods 0.000 claims abstract description 21
- 239000007788 liquid Substances 0.000 claims abstract description 20
- 239000012452 mother liquor Substances 0.000 claims abstract description 13
- 238000010438 heat treatment Methods 0.000 claims abstract description 12
- -1 polydimethylsiloxane Polymers 0.000 claims abstract description 11
- 239000010413 mother solution Substances 0.000 claims abstract description 7
- 239000003795 chemical substances by application Substances 0.000 claims abstract description 6
- 239000000178 monomer Substances 0.000 claims abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 67
- 238000004519 manufacturing process Methods 0.000 claims description 20
- 238000003860 storage Methods 0.000 claims description 17
- 238000001816 cooling Methods 0.000 claims description 14
- 230000001133 acceleration Effects 0.000 claims description 12
- 239000000243 solution Substances 0.000 claims description 12
- 238000000861 blow drying Methods 0.000 claims description 9
- 238000011068 loading method Methods 0.000 claims description 9
- 238000001259 photo etching Methods 0.000 claims description 9
- 238000001035 drying Methods 0.000 claims description 7
- 238000002156 mixing Methods 0.000 claims description 5
- 238000002791 soaking Methods 0.000 claims description 4
- 238000005406 washing Methods 0.000 claims description 4
- 238000003754 machining Methods 0.000 abstract description 4
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 239000003814 drug Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000009987 spinning Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B01—PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
- B01L—CHEMICAL OR PHYSICAL LABORATORY APPARATUS FOR GENERAL USE
- B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
- B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
- B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
- B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
- B01L3/502707—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by the manufacture of the container or its components
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
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Abstract
The application discloses a preparation method of a micro-current control chip and the micro-current control chip, wherein a polydimethylsiloxane PDMS monomer is mixed with a curing agent to obtain PDMS mother liquor; respectively pouring PDMS mother liquor into the first silicon mold, and heating and curing to obtain first cured PDMS; pouring the PDMS mother solution into a second silicon mold, performing spin coating, and performing heating curing to obtain second cured PDMS; separating the first cured PDMS from the first silicon mold to obtain a gas circuit layer; separating the second cured PDMS from the second silicon mold to obtain a liquid path layer; attaching the liquid path layer to the gas path layer to obtain a chip substrate; placing a chip substrate on glass, and processing the chip substrate and the glass by a plasma cleaning machine; and (3) attaching the chip substrate to glass, and baking the chip substrate and the glass to obtain the micro-current control chip. Compared with laser processing and mechanical finish machining methods, the method is higher in precision and simpler.
Description
Technical Field
The present disclosure relates to the field of chip technologies, and in particular, to a method for manufacturing a micro-fluidic chip and a micro-fluidic chip.
Background
The microfluidic chip technology integrates basic operation units of sample preparation, reaction, separation, detection and the like in biological, chemical and medical analysis processes into a micron-scale chip, and automatically completes the whole analysis process. Due to its great potential in the fields of biology, chemistry, medicine and the like, the method has been developed into a new research field crossing the disciplines of biology, chemistry, medicine, fluid, electronics, materials, machinery and the like.
In the related art, the micro-fluidic chip is usually prepared by methods such as laser processing and mechanical finish machining, and the processing equipment is expensive and the method is complex.
Disclosure of Invention
The present application is directed to solving at least one of the problems in the prior art. Therefore, the application provides a preparation method of a micro-control flow chip and the micro-control flow chip, which can manufacture the micro-control flow chip and has a simple method.
The method for preparing the microfluidic chip according to the embodiment of the first aspect of the application comprises the following steps:
manufacturing a first silicon die according to a first mask plate, wherein the first silicon die is provided with a plurality of gas path channels, each gas path channel is provided with a telescopic area, and the cross sectional area of each telescopic area is larger than that of each gas path channel;
manufacturing a second silicon die according to a second mask plate and a third mask plate, wherein the second silicon die is provided with at least two input channels, at least two output channels and at least two storage cavities, and each storage cavity is respectively communicated with one input channel and one output channel;
mixing a polydimethylsiloxane PDMS monomer with a curing agent to obtain PDMS mother liquor;
pouring the PDMS mother liquor into the first silicon mold respectively, and heating and curing to obtain first cured PDMS;
pouring the PDMS mother solution into the second silicon mold, performing spin coating, and performing heating curing to obtain second cured PDMS;
separating the first cured PDMS from the first silicon mold to obtain a gas path layer;
separating the second cured PDMS from the second silicon mold to obtain a liquid path layer;
the liquid path layer is attached to the gas path layer to obtain a chip substrate;
placing the chip substrate on glass, and processing the chip substrate and the glass by a plasma cleaning machine;
and adhering the chip substrate to the glass, and baking the chip substrate and the glass to obtain the micro-current control chip.
The method according to the embodiment of the application has at least the following beneficial effects: according to the method, a first silicon die is manufactured according to a first mask plate; then manufacturing a second silicon mold according to a second mask plate and a third mask plate; mixing a polydimethylsiloxane PDMS monomer with a curing agent to obtain PDMS mother liquor; respectively pouring the PDMS mother liquor into a first silicon mold, and heating and curing to obtain first cured PDMS; pouring the PDMS mother solution into a second silicon mold, performing spin coating, and performing heating curing to obtain second cured PDMS; separating the first cured PDMS from the first silicon mold to obtain a gas path layer; separating the second cured PDMS from the second silicon mold to obtain a liquid path layer; attaching the liquid path layer to the gas path layer to obtain a chip substrate; placing a chip substrate on glass, and processing the chip substrate and the glass by a plasma cleaning machine; and adhering the chip substrate to the glass, and baking the chip substrate and the glass to obtain the micro-current control chip. Compared with laser processing and mechanical finish machining methods, the method is higher in precision and simpler.
According to some embodiments of the present application, the manufacturing of the first silicon mold according to the first mask plate includes:
providing a first silicon wafer;
spin-coating a photoresist on the first silicon wafer;
baking the first silicon wafer subjected to spin-coating of the photoresist for the first time;
loading the first mask plate and the first silicon wafer subjected to primary baking by using a photoetching machine, and carrying out ultraviolet exposure; the first mask plate is provided with patterns corresponding to the plurality of gas path channels;
baking the first silicon wafer subjected to ultraviolet exposure for the second time;
cooling the first silicon wafer after the second baking to normal temperature and then developing;
washing and drying the developed first silicon wafer;
and baking the first silicon wafer subjected to washing and drying for the third time to obtain the first silicon die.
According to some embodiments of the present application, the spin-coating the first silicon wafer with photoresist comprises:
carrying out first spin coating of photoresist on the first silicon wafer through a spin coater, wherein the rotation speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 to 15 seconds;
and carrying out secondary spin coating on the photoresist on the first silicon wafer subjected to the primary spin coating by the spin coater, wherein the rotating speed of the spin coater is 3000 r/min, the acceleration is 500 r/min, and the spin coating time lasts for 20-50 seconds.
According to some embodiments of the present application, the developing the first silicon wafer after the second baking after cooling to normal temperature includes:
cooling the first silicon wafer subjected to the second baking to normal temperature;
and soaking the first silicon wafer cooled to the normal temperature in a developing solution for 10 to 40 seconds.
According to some embodiments of the present application, in the first baking of the first silicon wafer after spin-coating the photoresist, the baking temperature is 95 ℃, and the baking time is 3 minutes;
in the second baking of the first silicon wafer subjected to ultraviolet exposure, the baking temperature is 95 ℃, and the baking time is 2-5 minutes;
and in the third baking of the first silicon wafer after the rinsing and drying, the baking temperature is 150 ℃, and the baking time is 20-40 minutes.
According to some embodiments of the present application, the manufacturing of the second silicon mold according to the second mask plate and the third mask plate includes:
providing a second silicon wafer;
spin-coating a photoresist on the second silicon wafer;
baking the second silicon wafer subjected to the first spin-coating of the photoresist for the first time;
loading the second mask plate and the first silicon wafer after the first baking by using a photoetching machine, and carrying out first ultraviolet exposure; the second mask plate is provided with patterns corresponding to the at least two storage cavities;
cooling the second silicon wafer subjected to the first ultraviolet exposure to normal temperature and then carrying out first development;
carrying out first cleaning and blow-drying on the second silicon wafer after the first development;
spin-coating photoresist on the second silicon wafer after cleaning and blow-drying;
baking the second silicon wafer subjected to the second photoresist spin-coating;
loading the third mask plate and the first silicon wafer subjected to secondary baking by using a photoetching machine, and carrying out secondary ultraviolet exposure; the third mask plate is provided with patterns corresponding to at least two input channels and at least two output channels;
carrying out third baking on the second silicon wafer subjected to the second ultraviolet exposure;
cooling the second silicon wafer baked for the third time to normal temperature and then carrying out second development;
carrying out secondary cleaning and blow-drying on the second silicon wafer after the secondary development;
and baking the second silicon wafer subjected to the second cleaning and rinsing to obtain a second silicon die for the fourth time.
According to some embodiments of the present application, the spin-coating a photoresist on the second silicon wafer after being cleaned and dried includes:
carrying out primary spin coating of photoresist on the cleaned and dried second silicon wafer through a spin coater, wherein the rotation speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 to 15 seconds;
and carrying out secondary spin coating on the photoresist on the second silicon wafer after the photoresist is subjected to the primary spin coating through the spin coater, wherein the rotating speed of the spin coater is 3000 r/min, the acceleration is 500 r/min, and the spin coating time lasts for 20-50 seconds.
According to some embodiments of the present application, in the first baking of the second silicon wafer after the first spin-coating of the photoresist, the baking temperature is 110 ℃, and the baking time is 3 minutes;
in the second baking of the second silicon wafer after the second photoresist spin-coating, the baking temperature is 95 ℃, and the baking time is 45 minutes;
in the third baking of the second silicon wafer after the second ultraviolet exposure, the baking temperature is 95 ℃, and the baking time is 30 minutes;
and in the fourth baking of the second silicon wafer after the second cleaning and rinsing, the baking temperature is 150 ℃, and the baking time is 20-40 minutes.
According to some embodiments of the present application, in the baking the chip substrate and the glass, a baking time is 60 minutes.
In a second aspect, an embodiment of the present application provides a micro fluidic chip, which is manufactured by using the manufacturing method according to any one of the embodiments of the first aspect.
Additional aspects and advantages of the present application will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the present application.
Drawings
The present application is further described with reference to the following figures and examples, in which:
FIG. 1 is a schematic flow chart illustrating a method for manufacturing a microfluidic chip according to an embodiment of the present disclosure;
FIG. 2 is a schematic structural diagram of a micro-fluidic chip manufactured by a manufacturing method according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of a micro-fluidic chip manufactured by a manufacturing method according to an embodiment of the present application;
FIG. 4 is a schematic flow chart illustrating a method for fabricating a microfluidic chip according to another embodiment of the present disclosure;
FIG. 5 is a schematic flow chart illustrating a method for fabricating a microfluidic chip according to another embodiment of the present disclosure;
FIG. 6 is a schematic flow chart illustrating a method for fabricating a microfluidic chip according to another embodiment of the present disclosure;
FIG. 7 is a schematic flow chart illustrating a method for fabricating a microfluidic chip according to another embodiment of the present disclosure;
FIG. 8 is a schematic flow chart illustrating a method for fabricating a microfluidic chip according to another embodiment of the present application;
FIG. 9 is a simplified flow chart for preparing a first silicon mold and a second silicon mold as provided by one embodiment of the present application;
FIG. 10 is a simplified flow chart for preparing a microfluidic chip according to another embodiment of the present disclosure.
Detailed Description
Reference will now be made in detail to embodiments of the present application, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative and are only for the purpose of explaining the present application and are not to be construed as limiting the present application.
In the description of the present application, it is to be understood that the positional descriptions, such as the directions of up, down, front, rear, left, right, etc., referred to herein are based on the directions or positional relationships shown in the drawings, and are only for convenience of description and simplification of description, and do not indicate or imply that the referred device or element must have a specific direction, be constructed and operated in a specific direction, and thus, should not be construed as limiting the present application.
In the description of the present application, the meaning of a plurality is one or more, the meaning of a plurality is two or more, and the above, below, exceeding, etc. are understood as excluding the present number, and the above, below, within, etc. are understood as including the present number. If there is a description of first and second for the purpose of distinguishing technical features only, this is not to be understood as indicating or implying a relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of technical features indicated.
In the description of the present application, unless otherwise specifically limited, terms such as set, installed, connected and the like should be understood broadly, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present application in combination with the specific contents of the technical solutions.
In the description of the present application, reference to the description of the terms "one embodiment," "some embodiments," "an illustrative embodiment," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Referring to fig. 1, an embodiment of the first aspect of the present application provides a method for preparing a microfluidic chip, which may include, but is not limited to, the following steps:
step S100, manufacturing a first silicon die according to a first mask plate, wherein the first silicon die is provided with a plurality of gas path channels, each gas path channel is provided with a telescopic area, and the cross section area of each telescopic area is larger than that of each gas path channel;
step S200, manufacturing a second silicon die according to a second mask plate and a third mask plate, wherein the second silicon die is provided with at least two input channels, at least two output channels and at least two storage cavities, and each storage cavity is respectively communicated with one input channel and one output channel;
step S300, mixing a polydimethylsiloxane PDMS monomer with a curing agent to obtain PDMS mother liquor;
step S400, pouring PDMS mother liquor into first silicon molds respectively, and heating and curing to obtain first cured PDMS;
step S500, pouring the PDMS mother solution into a second silicon mold, performing spin coating, and performing heating curing to obtain second cured PDMS;
step S600, separating the first cured PDMS from the first silicon mold to obtain a gas path layer;
step S700, separating the second cured PDMS from the second silicon mold to obtain a liquid path layer;
step S800, attaching the liquid path layer to the gas path layer to obtain a chip substrate;
step S900, placing the chip substrate on glass, and processing the chip substrate and the glass through a plasma cleaning machine;
and S1000, attaching the chip substrate to glass, and baking the chip substrate and the glass to obtain the micro-current control chip.
According to the method, a first silicon die is manufactured according to a first mask plate; then manufacturing a second silicon mold according to a second mask plate and a third mask plate; mixing a polydimethylsiloxane PDMS monomer with a curing agent to obtain PDMS mother liquor; respectively pouring PDMS mother liquor into the first silicon mold, and heating and curing to obtain first cured PDMS; pouring the PDMS mother solution into a second silicon mold, performing spin coating, and performing heating curing to obtain second cured PDMS; separating the first cured PDMS from the first silicon mold to obtain a gas path layer; separating the second cured PDMS from the second silicon mold to obtain a liquid path layer; attaching the liquid path layer to the gas path layer to obtain a chip substrate; placing a chip substrate on glass, and processing the chip substrate and the glass by a plasma cleaning machine; and adhering the chip substrate to the glass, and baking the chip substrate and the glass to obtain the micro-current control chip. Compared with laser processing and mechanical finish machining methods, the method is higher in precision and simpler.
It should be noted that fig. 2 and fig. 3 are schematic structural diagrams of the micro-fluidic chip prepared by the above steps, and referring to fig. 2 and fig. 3, the micro-fluidic chip prepared by the above steps includes a liquid path layer 100 and a gas path layer 200, the liquid path layer 100 is provided with at least two input channels 120, at least two output channels 130 and at least two storage cavities 110, and each storage cavity 110 is respectively communicated with one input channel 120 and one output channel 130; the air circuit layer 200 is arranged below the liquid circuit layer 100, the air circuit layer 200 is provided with a plurality of air circuit channels 210, each air circuit channel 210 is provided with a telescopic area 211, each telescopic area 211 corresponds to at least one input channel 120 or at least one output channel 130, the telescopic area 211 is used for extruding the corresponding input channel 120 or output channel 130 when expanding, so that the corresponding input channel 120 or output channel 130 is blocked, and the telescopic area 211 is also used for conducting the corresponding input channel 120 or output channel 130 when recovering. When the DNA solution is stored, the gas channel 210 is inflated, the expansion region 211 expands after the gas channel 210 is inflated to extrude the corresponding input channel 120, so that the input channel 120 corresponding to the inflated expansion region 211 is blocked, and the expansion region 211 of the gas channel 210 which is not inflated does not expand, so that the corresponding input channel 120 is not extruded, and the input channel 120 corresponding to the expansion region 211 which is not inflated is conducted, so that part of the input channel 120 is conducted and part of the input channel 120 is blocked by inflating the gas channel 210, and the DNA solution can be stored in the corresponding storage cavity 110 through the conducted input channel 120. When the DNA solution is taken out, the storage chamber 110 where the DNA solution to be extracted is located is selected, the output channel 130 connected with the storage chamber 110 except the storage chamber 110 and the air channel 210 corresponding to the input channel 120 are inflated to expand the corresponding expansion region 211 to block the rest of the output channel 130 and the input channel 120, so that only the output channel 130 and the input channel 120 connected with the storage chamber 110 where the DNA solution is to be taken out are conducted, and the DNA solution in the storage chamber 110 can be discharged through the conducted output channel 130 when the input channel 120 is inflated.
It can be understood that the third mask is further provided with a pattern matching with the total output channels 150, so that the liquid path layer 100 is further provided with the total output channels 150, and the total output channels 150 are respectively communicated with each output channel 130.
It will be appreciated that the third mask is further provided with a pattern matching the total input channels 140, such that the liquid path layer 100 is further provided with total input channels 140, the total input channels 140 being respectively communicated with each of the input channels 120.
In step S500, the PDMS mother solution is poured into the second silicon mold, spin-coated for one minute at 1500 rpm using a spin coater to form a 10-20 μm air channel film, and heated and cured to obtain a second cured PDMS.
In step S800, the liquid path layer is attached to the gas path layer, and the liquid path layer corresponds to the pattern of the gas path layer, specifically, each flexible region 211 in the gas path layer corresponds to at least one input channel 120 or at least one output channel 130 of the liquid path layer.
It is understood that, referring to fig. 4, the step S100 of fabricating the first silicon mold according to the first mask may include the following steps:
step S110, providing a first silicon wafer;
step S120, spin-coating a photoresist on the first silicon wafer;
step S130, baking the first silicon wafer after the photoresist is coated in a spinning mode for the first time;
step S140, loading a first mask plate and a first silicon wafer which is baked for the first time by using a photoetching machine, and carrying out ultraviolet exposure; the first mask plate is provided with patterns corresponding to the plurality of gas path channels;
step S150, carrying out secondary baking on the first silicon wafer subjected to ultraviolet exposure;
step S160, cooling the first silicon wafer baked for the second time to normal temperature and developing;
step S170, washing and drying the developed first silicon wafer;
and S180, baking the washed and dried first silicon wafer for the third time to obtain a first silicon die.
It can be understood that, in step S140, a SUSS MA6 lithography machine is used to load the first mask and the first silicon wafer after the first baking, and ultraviolet exposure is performed; the first mask plate is provided with patterns corresponding to the plurality of air channel channels. The time of the ultraviolet exposure is 10 to 20 seconds, and may be, for example, 10 seconds, 15 seconds, or 20 seconds.
It is understood that, referring to fig. 5, in step S120, the following steps are further included:
step S121, performing first spin coating of photoresist on a first silicon wafer through a spin coater, wherein the rotation speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 seconds to 15 seconds; for example, the spin coating time may last 5 seconds, 10 seconds, or 15 seconds.
Step S122, performing secondary spin coating of the photoresist on the first silicon wafer subjected to the primary spin coating of the photoresist by a spin coater, wherein the rotation speed of the spin coater is 3000 revolutions per minute, the acceleration is 500 revolutions per minute, and the spin coating time lasts for 20 seconds to 50 seconds; for example, the spin coating time may last 20 seconds, 25 seconds, or 50 seconds.
Specifically, SU8-2015 photoresist is adopted in the process of spin-coating photoresist.
It is understood that, referring to fig. 6, step S160 includes the following steps:
step S161, cooling the first silicon wafer baked for the second time to normal temperature;
and step S162, soaking the first silicon wafer cooled to the normal temperature in the developing solution for 10 to 40 seconds.
Specifically, the first silicon wafer after the second baking is naturally cooled to room temperature, then is soaked in the SU-8 developing page for 10 seconds to 40 seconds, for example, 10 seconds, 20 seconds or 40 seconds, and then is washed with isopropyl alcohol and dried with an air gun.
It can be understood that, in step S130, the first silicon wafer after spin-coating the photoresist is baked for 3 minutes at 95 ℃;
in step S150, performing a second baking on the first silicon wafer subjected to the ultraviolet exposure, wherein the baking temperature is 95 ℃ and the baking time is 2 to 5 minutes; for example, the baking time may be 2 minutes, 3 minutes, or 5 minutes.
In step S180, the first silicon wafer after being washed and dried is baked for the third time, wherein the baking temperature is 150 ℃, and the baking time is 20-40 minutes; for example, the baking time may be 20 minutes, 30 minutes, or 40 minutes.
It is understood that, referring to fig. 7, step S200 may include, but is not limited to, the following steps:
step S2100, providing a second silicon wafer;
step S2120, baking the second silicon wafer after the first photoresist spin-coating;
step S2140, cooling the second silicon wafer after the first ultraviolet exposure to normal temperature, and then carrying out first development;
step S2150, carrying out first cleaning and blow-drying on the second silicon wafer after the first development;
s2170, baking the second silicon wafer after the photoresist is coated for the second time;
step S2180, loading a third mask plate and the first silicon wafer after the second baking by using a photoetching machine, and carrying out second ultraviolet exposure; the third mask plate is provided with patterns corresponding to the at least two input channels and the at least two output channels;
step S2200, cooling the second silicon slice baked for the third time to normal temperature, and then carrying out second development;
step S2210, carrying out secondary cleaning and blow-drying on the second silicon slice after the secondary development;
step S2220, the second silicon wafer which is washed and rinsed for the second time is baked for the fourth time, and a second silicon die is obtained.
It is understood that, referring to fig. 8, step S2160 may include the following steps:
step S2161, the spin coating of the photoresist is carried out on the cleaned and dried second silicon wafer for the first time through a spin coater, the rotating speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 seconds to 15 seconds. For example, the spin coating time may be 5 seconds, 10 seconds, or 15 seconds in duration.
And step S2162, performing second spin coating of the photoresist on the second silicon wafer after the first spin coating of the photoresist by a spin coater, wherein the rotation speed of the spin coater is 3000 r/min, the acceleration is 500 r/min, and the spin coating time lasts for 20-50 seconds. For example, the spin coating time may be 20 seconds, 25 seconds, or 50 seconds in duration.
Specifically, in the spin coating process, AZ4620 photoresist was used.
It is understood that, in step S2120, the baking temperature is 110 degrees celsius, and the baking time is 3 minutes;
in step S2170, performing a second baking on the second silicon wafer after the second spin-coating of the photoresist, at a baking temperature of 95 ℃ for 45 minutes;
in step S2190, the second silicon wafer after the second ultraviolet exposure is subjected to third baking at a baking temperature of 95 ℃ for 30 minutes;
in step S2220, the second silicon wafer after the second cleaning and rinsing is baked for the fourth time, where the baking temperature is 150 degrees celsius and the baking time is 20 to 40 minutes. For example, the baking time may be 20 minutes, 30 minutes, or 40 minutes.
It is understood that, in step S2130, a SUSS MA6 lithography machine is used to load the second mask and the first silicon wafer after the first baking, and a first uv exposure is performed for 60 to 70 seconds, for example, 60 seconds, 65 seconds, or 70 seconds.
It is understood that, in step S2140, after the second silicon wafer is cooled to room temperature, the second silicon wafer is immersed in the AZ462 developing solution for a first development, and the immersion time is 300 to 500 seconds, for example, 300 seconds, 400 seconds, or 500 seconds.
It is understood that, in step S2180, a SUSS MA6 lithography machine is used to load a third mask and the second baked first silicon wafer, and a second uv exposure is performed, and the exposure time may be 40 to 50 seconds, for example, 45 seconds, 48 seconds, or 50 seconds.
It is understood that, in step S2200, after the second silicon wafer after the third baking is cooled to normal temperature, the second developing is performed, and the second silicon wafer is soaked in the SU-8 developing solution for 100 seconds to 300 seconds, for example, the soaking time may be 100 seconds, 200 seconds or 300 seconds.
It is understood that, in the step S1000, the chip substrate and the glass are baked for 60 minutes. In this step, the baking time is not limited, and may be, for example, 100 degrees celsius, which is set by a person skilled in the art according to practical situations.
It should be noted that the first mask plate, the second mask plate, and the third mask plate are all chromium mask plates.
It is to be appreciated that, with reference to fig. 9, fig. 9 is a simplified flow chart for preparing a first silicon mold and a second silicon mold according to an embodiment of the present application. A first silicon mold is prepared through steps S110 to S180, and a second silicon mold is prepared through steps S2100 to S2220. In fig. 9, the first silicon mold comprises photoresist 410 and a first silicon wafer 400, the photoresist 410 being SU8-2015 and having a height of 15 microns. In fig. 9, the second silicon mold includes a photoresist 310 and a photoresist 320, and a second silicon wafer 300, the photoresist 310 is AZ4620 with a height of 13 micrometers, and the photoresist 320 is SU8-2100 with a height of 100 micrometers.
It is to be understood that, with reference to FIG. 10, FIG. 10 is a simplified flow chart for preparing a microfluidic chip according to another embodiment of the present application. In fig. 10, a micro fluidic chip is prepared by a first silicon mold, a second silicon mold and polydimethylsiloxane 600, wherein the first silicon mold comprises a first silicon wafer 400 and photoresist 510, and the photoresist 510 is photoresist SU8-2015 with a height of 15 μm; the second silicon die comprises a second silicon wafer 300, photoresist 510, photoresist 520 and photoresist 530, wherein the photoresist 510 is photoresist SU8-2015 with the height of 15 microns; the photoresist 520 is the photoresist SU8-2100, and the height is 100 microns; photoresist 530 was photoresist AZ4680 with a height of 13 microns. And pouring the polydimethylsiloxane 600 mother liquor into the first silicon mold and the second silicon mold respectively to obtain cured polydimethylsiloxane 600, and putting the cured polydimethylsiloxane 600 and the first glass 700 into a plasma cleaning machine for treatment to obtain the final micro-control chip.
In a second aspect, an embodiment of the present application provides a micro fluidic chip, which is manufactured by using the manufacturing method according to any one of the embodiments of the first aspect.
The embodiments of the present application have been described in detail with reference to the drawings, but the present application is not limited to the embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present application. Furthermore, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
Claims (10)
1. A method for preparing a micro-current control chip is characterized by comprising the following steps:
manufacturing a first silicon die according to a first mask plate, wherein the first silicon die is provided with a plurality of gas path channels, each gas path channel is provided with a telescopic area, and the cross sectional area of each telescopic area is larger than that of each gas path channel;
manufacturing a second silicon die according to a second mask plate and a third mask plate, wherein the second silicon die is provided with at least two input channels, at least two output channels and at least two storage cavities, and each storage cavity is respectively communicated with one input channel and one output channel;
mixing a polydimethylsiloxane PDMS monomer with a curing agent to obtain PDMS mother liquor;
pouring the PDMS mother liquor into the first silicon mold respectively, and heating and curing to obtain first cured PDMS;
pouring the PDMS mother solution into the second silicon mold, performing spin coating, and performing heating curing to obtain second cured PDMS;
separating the first cured PDMS from the first silicon mold to obtain a gas path layer;
separating the second cured PDMS from the second silicon mold to obtain a liquid path layer;
the liquid path layer is attached to the gas path layer to obtain a chip substrate;
placing the chip substrate on glass, and processing the chip substrate and the glass through a plasma cleaning machine;
and adhering the chip substrate to the glass, and baking the chip substrate and the glass to obtain the micro-current control chip.
2. The method for preparing the micro-fluidic chip according to claim 1, wherein the step of manufacturing the first silicon die according to the first mask comprises:
providing a first silicon wafer;
spin-coating a photoresist on the first silicon wafer;
baking the first silicon wafer subjected to spin-coating of the photoresist for the first time;
loading the first mask plate and the first silicon wafer after the first baking by using a photoetching machine, and carrying out ultraviolet exposure; the first mask plate is provided with patterns corresponding to the plurality of gas path channels;
baking the first silicon wafer subjected to ultraviolet exposure for the second time;
cooling the first silicon wafer subjected to the secondary baking to normal temperature and then developing;
washing and drying the developed first silicon wafer;
and baking the first silicon wafer subjected to rinsing and blow-drying for the third time to obtain the first silicon die.
3. The method for preparing the micro-fluidic chip according to claim 2, wherein the spin-coating the first silicon wafer with photoresist comprises:
carrying out first spin coating of photoresist on the first silicon wafer through a spin coater, wherein the rotation speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 to 15 seconds;
and carrying out secondary spin coating on the photoresist on the first silicon wafer subjected to the primary spin coating by the spin coater, wherein the rotation speed of the spin coater is 3000 r/min, the acceleration is 500 r/min, and the spin coating time lasts for 20-50 seconds.
4. The method for preparing the micro-fluidic chip according to claim 2, wherein the step of developing the first silicon wafer after the second baking after cooling to normal temperature comprises:
cooling the first silicon wafer subjected to the second baking to normal temperature;
and soaking the first silicon wafer cooled to the normal temperature in a developing solution for 10 to 40 seconds.
5. The method for preparing a micro-fluidic chip according to claim 2,
in the first baking of the first silicon wafer after the photoresist is spin-coated, the baking temperature is 95 ℃, and the baking time is 3 minutes;
in the second baking of the first silicon wafer subjected to ultraviolet exposure, the baking temperature is 95 ℃, and the baking time is 2-5 minutes;
and in the third baking of the first silicon wafer after the rinsing and drying, the baking temperature is 150 ℃, and the baking time is 20-40 minutes.
6. The method for preparing the micro-fluidic chip according to claim 1, wherein the step of manufacturing the second silicon die according to the second mask plate and the third mask plate comprises the steps of:
providing a second silicon wafer;
spin-coating a photoresist on the second silicon wafer;
baking the second silicon wafer subjected to the first spin-coating of the photoresist for the first time;
loading the second mask plate and the first silicon wafer after the first baking by using a photoetching machine, and carrying out first ultraviolet exposure; the second mask plate is provided with patterns corresponding to the at least two storage cavities;
cooling the second silicon wafer subjected to the first ultraviolet exposure to normal temperature and then carrying out first development;
carrying out primary cleaning and blow-drying on the second silicon wafer after primary development;
spin-coating photoresist on the second silicon wafer after cleaning and blow-drying;
baking the second silicon wafer subjected to the second spin coating of the photoresist for the second time;
loading the third mask plate and the first silicon wafer after the second baking by using a photoetching machine, and carrying out second ultraviolet exposure; the third mask plate is provided with patterns corresponding to at least two input channels and at least two output channels;
carrying out third baking on the second silicon wafer subjected to the second ultraviolet exposure;
cooling the second silicon wafer baked for the third time to normal temperature and then carrying out second development;
carrying out secondary cleaning and blow-drying on the second silicon wafer after the secondary development;
and baking the second silicon wafer subjected to the second cleaning and rinsing for the fourth time to obtain a second silicon die.
7. The method for preparing the micro-current control chip according to claim 6, wherein the spin-coating the photoresist on the second silicon wafer after cleaning and drying comprises:
carrying out primary spin coating of photoresist on the cleaned and dried second silicon wafer through a spin coater, wherein the rotation speed of the spin coater is 500 revolutions per minute, the acceleration is 100 revolutions per minute, and the spin coating time lasts for 5 to 15 seconds;
and carrying out secondary spin coating on the photoresist on the second silicon wafer after the photoresist is subjected to the primary spin coating through the spin coater, wherein the rotating speed of the spin coater is 3000 r/min, the acceleration is 500 r/min, and the spin coating time lasts for 20-50 seconds.
8. The method for preparing a micro flow control chip according to claim 6,
in the first baking of the second silicon wafer after the first photoresist spin-coating, the baking temperature is 110 ℃, and the baking time is 3 minutes;
in the second baking of the second silicon wafer after the second spin coating of the photoresist, the baking temperature is 95 ℃ and the baking time is 45 minutes;
in the third baking of the second silicon wafer subjected to the second ultraviolet exposure, the baking temperature is 95 ℃, and the baking time is 30 minutes;
and in the fourth baking of the second silicon wafer after the second cleaning and rinsing, the baking temperature is 150 ℃, and the baking time is 20-40 minutes.
9. The method for preparing a micro flow control chip according to claim 1,
and in the step of baking the chip substrate and the glass, the baking time is 60 minutes.
10. A micro flow control chip produced by the production method according to any one of claims 1 to 9.
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