CN115411213A - Display panel and display device - Google Patents
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- CN115411213A CN115411213A CN202211208637.0A CN202211208637A CN115411213A CN 115411213 A CN115411213 A CN 115411213A CN 202211208637 A CN202211208637 A CN 202211208637A CN 115411213 A CN115411213 A CN 115411213A
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Abstract
The invention discloses a display panel and a display device, which relate to the technical field of display and comprise: a substrate base plate; an array layer on the substrate base plate, the array layer comprising a plurality of transistors; the light-emitting layer is positioned on one side of the array layer, which is far away from the substrate base plate, and comprises an anode, a pixel defining layer, a light-emitting material layer and a cathode; the pixel defining layer comprises a plurality of pixel openings, and the light-emitting material layer is positioned in the pixel openings; the packaging layer is positioned on one side of the light-emitting layer, which is far away from the substrate base plate, and comprises a first inorganic layer; the pixel defining layer includes a plurality of first openings extending in a direction perpendicular to the substrate base, and the first inorganic layer includes a portion filled in the first openings. Therefore, the impact resistance of the display panel and the display device is improved.
Description
The present application is filed as a divisional application of application No. 202011169956.6, application date 2020, 10/28, and title "display panel and display device".
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel and a display device.
Background
From the CRT (Cathode Ray Tube) era to the liquid crystal era and now to the OLED (Organic Light-Emitting Diode) era, the display industry has been developing over decades. The display industry is closely related to our life, and display technologies cannot be separated from traditional mobile phones, flat panels, televisions and PCs to current intelligent wearable devices and VR and other electronic devices.
With the development of display technology, foldable display devices are also favored by users due to their foldable capabilities. In a foldable display device, a typical film structure of a display panel includes an inorganic layer with a relatively high hardness and an organic layer with a relatively low hardness, for example, an inorganic layer and an organic layer structure may be disposed in an encapsulation layer of the display panel. During the folding process, the impact force applied to the inorganic layer with greater hardness will be conducted downwards, and there is a high possibility of damaging the transistor structure in the display panel. Therefore, how to improve the impact resistance of the display panel becomes one of the technical problems to be solved urgently at the present stage.
Disclosure of Invention
In view of this, the present invention provides a display panel and a display device, which are beneficial to improving the shock resistance and reducing the risk of transistor failure.
In a first aspect, the present application provides a display panel comprising:
a substrate base plate;
an array layer on the substrate base plate, the array layer including a plurality of transistors;
the light-emitting layer is positioned on one side, far away from the substrate, of the array layer and comprises an anode, a pixel defining layer, a light-emitting material layer and a cathode; the pixel defining layer defines a plurality of pixel openings, the light-emitting material layer is positioned in the pixel openings, the anode is positioned on one side of the light-emitting material layer close to the array layer, and the cathode is positioned on one side of the light-emitting material layer far away from the array layer along a direction perpendicular to the substrate;
the packaging layer is positioned on one side of the cathode, which is far away from the substrate base plate, and comprises a first inorganic layer;
the pixel defining layer includes a plurality of first openings extending in a direction perpendicular to the substrate base, and the first inorganic layer includes a portion filled in the first openings.
In a second aspect, the present application provides a display device including the display panel provided in the present application.
Compared with the prior art, the display panel and the display device provided by the invention at least realize the following beneficial effects:
in the display panel and the display device provided by the invention, the light-emitting layer is arranged on one side of the array layer, which is far away from the substrate, and the array layer is usually used for driving the light-emitting material layer in the light-emitting layer to emit light; the light emitting layer includes a pixel defining layer defining a plurality of pixel openings, and a light emitting material layer in the pixel openings. The packaging layer is arranged on one side, far away from the substrate base plate, of the light-emitting layer and comprises a first inorganic layer, and the effect of better blocking water and oxygen is considered to be achieved on the inorganic layer, so that the light-emitting layer is packaged by the packaging layer, and the influence of external water and oxygen on the light-emitting layer can be effectively blocked. When the light emitting material layer is encapsulated by the first inorganic layer, the first inorganic layer covers each pixel opening to realize reliable encapsulation of the light emitting material layer. In particular, in addition to the pixel opening, the present invention introduces a plurality of first openings in the pixel defining layer, the first openings extending in a direction perpendicular to the substrate base, and the first inorganic layer including a portion filled in the first openings. When receiving the impact of external force, first inorganic layer still will form a plurality of stress points in a plurality of first trompils except forming a plurality of stress points in the pixel opening to increased display panel and formed the multiple spot atress when receiving external force impact, avoided the impact force to take place to assemble in certain position, made the impact force release from many places, therefore effectively promoted display panel's shock resistance.
Of course, it is not necessary for any product in which the present invention is practiced to achieve all of the above-described technical effects simultaneously.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
Fig. 1 is a cross-sectional structural view of a display panel in the related art;
fig. 2 is a schematic structural diagram of a display panel according to the present invention;
FIG. 3 is an AA cross-sectional view of the display panel of FIG. 2;
FIG. 4 is a schematic diagram illustrating a stress of the display panel shown in FIG. 3;
FIG. 5 is a diagram illustrating a relative position of a first opening and a channel region of a transistor according to the present invention;
FIG. 6 is another cross-sectional view AA of the display panel of FIG. 2;
FIG. 7 is another cross-sectional view AA of the display panel of FIG. 2;
FIG. 8 is another cross-sectional view AA of the display panel of FIG. 2;
FIG. 9 is another cross-sectional view AA of the display panel of FIG. 2;
fig. 10 is a schematic plan view illustrating a display device according to an embodiment of the present invention.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
Fig. 1 is a cross-sectional structural view of a display panel in the related art, where the display panel 100' includes a substrate 10', an array layer 20', a light-emitting layer 30', and an encapsulation layer 40', a pixel opening in the light-emitting layer 30' is filled with a light-emitting material, an inorganic layer 41' in the encapsulation layer 40' covers a side of the light-emitting layer 30' away from the substrate 10' and is filled in the pixel opening, and when an external force impacts the inorganic layer, the inorganic layer forms a plurality of stress points S ' near the pixel opening and a support post PS, so that stress is concentrated and conducted downward at the stress points S ', and is easily conducted to the inorganic layer corresponding to the array layer 20' to cause the inorganic layer in the array layer 20' to break, thereby increasing the risk of the inorganic layer in the array layer 20' to break and cause the transistor to fail. Therefore, it is highly desirable to improve the impact resistance of the display panel.
In view of this, the present invention provides a display panel and a display device, which are beneficial to improving the shock resistance and reducing the risk of the failure of the transistor.
The following detailed description is to be read in connection with the drawings and the detailed description.
Fig. 2 is a schematic structural diagram of a display panel provided by the present invention, fig. 3 is an AA cross-sectional diagram of the display panel in fig. 2, fig. 4 is a schematic force-bearing diagram of the display panel in fig. 3, and referring to fig. 1 to 4, a display panel 100 provided by the present invention includes:
a base substrate 10;
an array layer 20 on the substrate base plate 10, the array layer 20 including a plurality of transistors T;
a light-emitting layer 30 positioned on the side of the array layer 20 away from the substrate 10, the light-emitting layer 30 including an anode 31, a pixel defining layer 32, a light-emitting material layer 33, and a cathode 34; the pixel defining layer 32 defines a plurality of pixel openings K0, and the light emitting material layer 33 is located in the pixel openings K0;
an encapsulation layer 40 located on a side of the cathode 34 away from the substrate base plate 10, the encapsulation layer 40 including a first inorganic layer 41;
the pixel defining layer 32 includes a plurality of first openings K1, the first openings K1 extend along a direction F perpendicular to the substrate base 10, and the first inorganic layer 41 includes a portion filled in the first openings K1.
It should be noted that fig. 2 only illustrates the display panel 100 provided by the present invention by taking a rectangle as an example, and does not represent the actual shape of the display panel 100, and in some other embodiments of the present invention, the display panel 100 may also be embodied as a rounded rectangle, a circle, or an irregular shape, which is not specifically limited in this application. In addition, fig. 3 only illustrates the film layer structure on the display panel 100, and does not represent the actual number and size of the film layers. Optionally, in order to improve the packaging reliability of the encapsulation layer 40, in the display panel 100 provided by the present invention, the encapsulation layer 40 may further include an organic layer and a second inorganic layer 42 in addition to the first inorganic layer 41, wherein the organic layer 43 is disposed between the first inorganic layer 41 and the second inorganic layer 42, and the first inorganic layer 41 is located on a side of the organic layer 43 close to the substrate 10.
Specifically, with continued reference to fig. 2 to fig. 4, in the display panel 100 provided by the present invention, the display panel 100 includes a substrate 10 and an array layer 20 disposed on a side of the substrate 10, wherein a light emitting layer 30 is disposed on a side of the array layer 20 away from the substrate 10, and the array layer 20 is generally used for driving a light emitting material layer 33 in the light emitting layer 30 to emit light; the light emitting layer 30 includes a pixel defining layer 32, the pixel defining layer 32 defining a plurality of pixel openings K0, and a light emitting material layer 33 in the pixel openings K0. The light emitting layer 30 includes an anode 31, a light emitting material layer 33 and a cathode 34, wherein the anode 31 is used for electrically connecting with the transistor T in the driving layer, and optionally, the anode 31 is located on a side of the light emitting material layer 33 close to the substrate 10, and the cathode 34 is located on a side of the light emitting material layer 33 far from the substrate 10. The encapsulation layer 40 is disposed on a side of the light emitting layer 30 away from the substrate 10, and specifically, the encapsulation layer 40 is disposed on a side of the cathode 34 of the light emitting layer 30 away from the substrate 10, and the encapsulation layer 40 includes the first inorganic layer 41, which is considered to have a better water and oxygen blocking effect, so that the encapsulation layer 40 is used to encapsulate the light emitting layer 30, and thus, the influence of external moisture and oxygen on the light emitting layer 30 can be effectively blocked.
When the light emitting material layer 33 is encapsulated by the first inorganic layer 41, the first inorganic layer 41 covers each pixel opening K0, and optionally, the first inorganic layer 41 fills the pixel opening K0, so as to achieve reliable encapsulation of the light emitting material layer 33. In particular, in addition to the pixel opening K0, the present invention introduces a plurality of first openings K1 on the pixel defining layer 32, the first openings K1 extend along a direction perpendicular to the substrate base 10, and the first inorganic layer 41 further includes a portion filled in the first openings K1. When the display panel 100 is impacted by an external force, the first inorganic layer 41 not only forms a plurality of stress points S in the pixel opening K0, but also forms a plurality of stress points S in the first openings K1, so that the inorganic layer forms a multi-point stress when the display panel 100 is impacted by the external force, for example, referring to fig. 4, the impact force is prevented from being converged at a certain position, and the impact force is released from multiple positions, thereby preventing the inorganic layer in the array layer 20 from being broken due to the impact force in the first inorganic layer 41, and being beneficial to preventing the inorganic layer in the array layer 20 from being broken to cause the failure of the transistor T, and thus effectively improving the impact resistance of the display panel 100.
Optionally, the orthographic projection of the first opening K1 on the plane of the substrate base plate 10 is not overlapped with at least the orthographic projection of the pixel opening K0 and the orthographic projection of the channel region G of the transistor T on the plane of the substrate base plate 10, so that the possibility that an impact force is downwardly transmitted to the transistor T and the inorganic layer at the corresponding position of the transistor T when the inorganic layer forms the stress point S in the first opening K1 is effectively reduced, on one hand, the possibility that the transistor T is damaged or even fails by the impact force is favorably reduced, on the other hand, the possibility that the inorganic layer in the array layer 20 is broken by the impact force transmitted by the first inorganic layer 41 is favorably reduced, and the phenomenon that the transistor T is damaged or fails due to the breakage of the inorganic layer is avoided, so that the display reliability of the display panel 100 when the impact force is favorably improved, and the impact resistance of the display panel 100 is further favorably improved. It should be noted that, the pixel opening K0 and the first opening K1 on the pixel defining layer 32 can be fabricated in the same process in the present invention, so as to facilitate the fabrication process of the display panel 100.
Furthermore, in the present invention, an orthographic projection of the first opening K1 on the plane of the substrate base plate 10 and an orthographic projection of the gate of the transistor T on the plane of the substrate base plate 10 are not overlapped, so that when the display panel 100 is impacted by an external force, a possibility that an impact force is downwardly transmitted to the gate of the transistor T when a stress point S is formed in the first opening K1 can be effectively reduced, thereby being beneficial to reducing a possibility that the impact force damages the gate of the transistor T, further reducing a possibility that the impact force damages or even fails the transistor T, and further being beneficial to improving an impact resistance of the display panel 100.
Optionally, an orthographic projection of the anode 31 on the plane of the substrate base plate 10 does not overlap with an orthographic projection of the first opening K1 on the plane of the substrate base plate 10. It can be understood that, if the anode 31 is used to electrically connect with the transistor T in the driving layer, and the first opening K1 overlaps with the anode 31 in a direction perpendicular to the plane of the substrate base plate 10, when the display panel 100 is impacted by an external force, the impact force is conducted downward to the anode 31 when the stress point S is formed in the first opening K1, which may damage the anode 31, and thus affect the display of the display panel 100. In the present invention, the first opening K1 is not overlapped with the anode 31 along the direction perpendicular to the plane of the substrate base plate 10, so that the possibility of damage to the anode 31 caused by impact force can be reduced, and the impact resistance of the display panel 100 can be improved.
Fig. 5 is a diagram illustrating a relative position relationship between the first opening K1 and the channel region G of the transistor provided by the present invention, please refer to fig. 3, when a plurality of first openings K1 are formed on the pixel definition layer 32, the positions of the first openings K1 are disposed to avoid the pixel opening K0, that is, the orthographic projection of the first openings K1 on the substrate 10 and the orthographic projection of the pixel opening K0 on the substrate 10 do not overlap, and the number and size of the first openings K1 can be flexibly set according to the size of the non-opening region in the display panel 100. Alternatively, the plurality of first openings K1 are disposed around the channel region G of the transistor T. Since the channel region G of the transistor T is a core component in which the transistor T functions, it is a region where the gate of the transistor overlaps with the active layer. Optionally, in the present invention, the first opening K1 is disposed while avoiding the channel region G of the transistor T, that is, the orthographic projection of the first opening K1 on the substrate 10 is disposed not to overlap the channel region G of the transistor T, so as to avoid the impact force from affecting the transistor T. When avoiding pixel opening K0 and transistor T's channel region G setting with first trompil K1, can arrange first trompil K1 in display panel 100 as far as possible evenly, perhaps first trompil K1's setting makes first inorganic layer 41 at first trompil K1, the sharp-pointed structure that pixel opening K0 and other positions formed evenly distributed on display panel 100 as far as possible, therefore make display panel 100 when receiving external force impact, the sharp-pointed structure that first inorganic layer 41 formed can evenly release the impact force, be favorable to avoiding appearing the too big problem of single-point atress in display panel 100 more.
In an alternative embodiment of the present invention, with continued reference to fig. 3, the height h1 of each first opening K1 is the same along the direction F perpendicular to the substrate base plate 10.
It is to be understood that, when the first opening K1 is formed on the pixel defining layer 32, the first opening K1 includes a first end face K11 and a second end face K12 opposite to each other along a direction F perpendicular to the substrate base plate 10, and the height h1 of the first opening K1 mentioned in the present invention refers to a distance between the first end face K11 and the second end face K12 of the first opening K1 along the direction perpendicular to the substrate base plate 10, that is, a grooving depth of the first opening K1.
In the present invention, when the plurality of first openings K1 are formed on the pixel definition layer 32, the heights of the first openings K1 along the direction perpendicular to the substrate 10 are set to be the same, so that the first openings K1 can be formed by using the same process size when the first openings K1 are formed, and thus, the arrangement manner of the same heights of the first openings K1 is favorable for simplifying the manufacturing process of forming the first openings K1 on the pixel definition layer 32, and is favorable for improving the production efficiency of the display panel 100.
In an alternative embodiment of the present invention, with reference to fig. 3, the height h1 of the first opening K1 is smaller than the height h2 of the pixel defining layer 32 along the direction perpendicular to the substrate 10.
Specifically, since the first opening K1 is formed by forming a groove in the pixel defining layer 32, when the height h1 of the first opening K1 is smaller than the height h2 of the pixel defining layer 32 in the direction perpendicular to the base substrate 10, that is, in the direction perpendicular to the base substrate 10, the first opening K1 does not penetrate through the pixel defining layer 32. When the first inorganic layer 41 in the encapsulation layer 40 is filled in each first opening K1, a plurality of sharp structures can be formed in the first opening K1, and when the display panel 100 is subjected to an external impact force, the sharp structures in the first inorganic layer 41 can form a plurality of stress points S, which is equivalent to increasing the number of stress points S on the first inorganic layer 41 in the display panel 100, so that the impact force can be released from a plurality of places, thereby being also beneficial to improving the impact resistance of the display panel 100.
In an alternative embodiment of the invention, fig. 6 is another AA cross-sectional view of the display panel 100 in fig. 2, please refer to fig. 6, wherein a height h1 of the first opening K1 is equal to a height h2 of the pixel defining layer 32 along a direction perpendicular to the substrate 10.
Specifically, fig. 6 shows another form of the first hole K1 in the present invention, and the structure of the display panel 100 in fig. 6 is the same as that of fig. 3 except that the height of the first hole K1 is different. In the embodiment shown in fig. 6, the height h1 of the first opening K1 is equal to the height h2 of the pixel defining layer 32 in the direction perpendicular to the substrate base plate 10, that is, the first opening K1 in this embodiment is disposed through the pixel defining layer 32 in the direction perpendicular to the substrate base plate 10. When the height of first trompil K1 becomes great, fill the first inorganic layer 41 in first trompil K1 and will form sharp-pointed structure more easily, when display panel 100 receives outside impact force, fill in the first inorganic layer 41 of first trompil K1 and form a plurality of stress points S more easily, thereby more be favorable to realizing the multiple spot release to the impact force, and then be favorable to promoting display panel 100' S shock resistance more, avoid the too big inorganic layer emergence fracture and the phenomenon that leads to transistor T to become invalid in the array layer 20 that leads to the single-point impact force.
In an alternative embodiment of the invention, fig. 7 is another AA cross-sectional view of the display panel 100 shown in fig. 2, the display panel 100 further includes an auxiliary layer 50, the auxiliary layer 50 is located on a side of the pixel defining layer 32 close to the substrate base 10, and the first opening K1 exposes the auxiliary layer 50; in the first opening K1, the cathode 34 is in direct contact with the auxiliary layer 50.
Specifically, fig. 7 shows another form of the first opening K1 in the present invention, and the structure of the display panel 100 in fig. 7 is the same as that in fig. 6, except that the auxiliary layer 50 is introduced into the display panel 100 in the embodiment shown in fig. 7, the auxiliary layer 50 is located on the side where the pixel definition layer is close to the substrate 10, and when the first opening K1 is formed on the pixel definition layer 32, the height h1 of the first opening K1 is the same as the height h2 of the pixel definition layer 32, that is, the first opening K1 penetrates through the pixel definition layer 32 in the direction perpendicular to the substrate 10, so that the auxiliary layer 50 is exposed. Since the cathode 34 in the light-emitting layer 30 covers the entire surface of the light-emitting material layer 33 away from the substrate 10, when the first opening K1 is formed on the pixel defining layer 32, the cathode 34 will be formed in the first opening K1, and since the auxiliary layer 50 is exposed by the first opening K1, the cathode 34 in the first opening K1 will be in direct contact with the auxiliary layer 50 to form an electrical connection. Optionally, the auxiliary layer 50 in the present invention is made of a conductive material, and the auxiliary layer 50 corresponds to the first openings K1 one to one. In the first opening K1, when the cathode 34 is electrically connected to the auxiliary layer 50, it is equivalent to parallel connection of a resistance structure to the cathode 34, thereby being beneficial to reduce the overall resistance of the cathode 34. Because the cathode 34 covers the side of the light-emitting material 33 far from the substrate base plate 10, when the resistance of the cathode 34 is large, a large impedance is formed in the process of transmitting signals by the cathode 34, and therefore, the voltage drop at different positions is large, and the phenomenon that the electric signals transmitted by the cathode 34 are different is large, the resistance of the cathode 34 is effectively reduced by connecting the auxiliary layer 50 with the cathode 34, so that the voltage drop of the cathode 34 in the signal transmission process is favorably reduced, the uniformity of the signals transmitted by the cathode 34 is favorably improved, the display uniformity of the display panel 100 is favorably improved, and the display effect of the display panel 100 is favorably improved.
In an alternative embodiment of the present invention, with continued reference to fig. 7, along a direction F perpendicular to the substrate 10, the anode 31 is located on a side of the light emitting material layer 33 close to the array layer 20, and the cathode 34 is located on a side of the light emitting material layer 33 away from the array layer 20; the auxiliary layer 50 is disposed in the same layer as the anode 31. When the auxiliary layer 50 and the anode 31 are disposed on the same layer, the auxiliary layer 50 and the anode 31 can be fabricated in the same process, and the auxiliary layer 50 can be formed simultaneously when the anode 31 is formed, so that a separate fabrication process for the auxiliary layer 50 is not required, which is beneficial to simplifying the fabrication process for the display panel 100 in which the auxiliary layer 50 is introduced, and improving the production efficiency of the display panel 100. It can be understood that, because the anode 31 and the cathode 34 in the light emitting layer 30 transmit different electrical signals, when the auxiliary layer 50 and the anode 31 are disposed on the same layer, the auxiliary layer 50 is insulated from the anode 31, which is beneficial to the occurrence of signal disorder and the improvement of display reliability of the display panel 100.
In an alternative embodiment of the present invention, fig. 8 is another AA cross-sectional view of the display panel 100 shown in fig. 2. Referring to fig. 8, the display panel 100 further includes a first organic layer 60, the first organic layer 60 is located between the array layer 20 and the light-emitting layer 30 along a direction perpendicular to the substrate 10; the display panel 100 further includes a plurality of second openings K2, wherein the second openings K2 penetrate at least a portion of the first organic layer 60 in a direction perpendicular to the substrate base plate 10; the second opening K2 and the first opening K1 are arranged in a one-to-one correspondence mode, and the first opening K1 is communicated with the second opening K2.
It is understood that the first organic layer 60 disposed between the array layer 20 and the light emitting layer 30 according to the present invention may be, for example, a planarization layer. In the embodiment shown in fig. 8, in addition to the first opening K1 provided on the pixel defining layer 32, a second opening K2 is provided on the first organic layer 60. It should be noted that the pixel defining layer 32 and the first organic layer 60 are two film structures, and the anode 31 is disposed between the two film structures, so that the processes of forming the via holes on the pixel defining layer 32 and the first organic layer 60 are usually separated, for example, first forming the second opening K2 on the first organic layer 60, then forming the anode 31 on the first side of the first organic layer 60 away from the substrate 10, then forming the pixel defining layer 32 on the side of the anode 31 away from the substrate 10, and finally forming the first opening K1 on the pixel defining layer 32.
Specifically, referring to fig. 8, a plurality of second openings K2 are formed in the first organic layer 60, the second openings K2 are disposed in a one-to-one correspondence with the first openings K1, where the one-to-one correspondence refers to a direction perpendicular to the substrate 10, one first opening K1 corresponds to one second opening K2, and one first opening K1 is communicated with one second opening K2. When the second opening K2 corresponding to the first opening K1 is disposed on the first organic layer 60, the first inorganic layer 41 can extend downward from the first opening K1, so that the first inorganic layer 41 forms a sharp structure, and the sharp structure has a greater height in a direction perpendicular to the substrate 10, and when the height of the sharp structure becomes greater, it is more favorable for forming the stress points S, that is, when the display panel 100 is subjected to an external impact force, the sharp structure formed by the first inorganic layer 41 forms a plurality of stress points S in the display panel 100, so that the impact force after the impact on the display panel 100 is released from multiple places, and the problem that the inorganic layer in the array layer 20 is broken due to an excessive single-point impact force, and then the transistor T is damaged is effectively prevented, thereby being more favorable for improving the impact resistance of the display panel 100.
In an alternative embodiment of the present invention, with continued reference to fig. 8, the height of the second opening K2 is smaller than the height of the first organic layer 60 along the direction perpendicular to the substrate 10.
Specifically, in the display panel 100 provided by the present invention, when the second opening K2 is formed in the first organic layer 60, the height h3 of the second opening K2 in the direction perpendicular to the substrate 10 is smaller than the height h4 of the first organic layer 60, that is, the second opening K2 does not penetrate through the first organic layer 60, so that the sharp structure formed by the first inorganic layer 41 will not contact with the other inorganic layer of the first organic layer 60 on the side close to the substrate 10. In the present invention, when the first inorganic layer 41 is used to form a sharp structure in the first opening K1, and the side of the sharp structure facing the substrate 10 is an organic layer structure, because the organic layer has a smaller hardness than the inorganic layer, when the display panel 100 receives an external impact force to form a plurality of stress points S in the first inorganic layer 41 having a larger hardness, and the impact force is transmitted to the first organic layer 60 having a smaller hardness from the side facing the substrate 10, the first organic layer 60 can buffer and release the impact force to a certain extent, so that the impact force on the sharp structure formed by the first inorganic layer 41 is prevented from being directly applied to the inorganic layer in the array layer 20, and therefore, the height of the second opening K2 in the direction perpendicular to the substrate 10 is smaller than that of the first organic layer 60, the impact force can be buffered by the first organic layer 60, the impact force applied to the inorganic layer in the array layer 20 is prevented from being broken when the inorganic layer in the direction perpendicular to the substrate 10, and the phenomenon that the inorganic layer is broken, thereby greatly improving the display performance of the transistor 100.
Optionally, the first organic layer 60 includes a first via hole, and the anode 31 is electrically connected to the transistor T through the first via hole, wherein an orthographic projection area of the first opening K1 on the plane of the substrate 10 is larger than an orthographic projection area of the first via hole on the plane of the substrate 10. It can be understood that, setting the first opening K1 larger than the first via is beneficial to avoid stress concentration at the first via, so as to ensure the connection between the anode 31 and the transistor T, and thus ensure the normal display of the display panel 100.
Optionally, with reference to fig. 6 and fig. 8, the first inorganic layer 41 includes a first portion and a second portion, and the first portion overlaps the first opening K1 and the second portion overlaps the pixel opening K0 along a direction perpendicular to the plane of the underlying substrate 10; in a direction perpendicular to the plane of the base substrate 10, the distance between the surface of the first portion on the side close to the base substrate 10 and the surface of the first organic layer 60 on the side far from the base substrate 10 is smaller than the distance between the surface of the second portion on the side close to the base substrate 10 and the surface of the first organic layer 60 on the side far from the base substrate 10. It is understood that the light emitting material layer 33 is located in the pixel opening K0, and at least a part of the anode 31 is located in the pixel opening K0, so that the distance between the surface of the second portion on the side close to the substrate base 10 and the surface of the first organic layer 60 on the side far from the substrate base 10 is larger.
Optionally, in a direction perpendicular to the plane of the base substrate 10, the minimum distance between the surface of the first portion far from the base substrate 10 and the surface of the first organic layer 60 far from the base substrate 10 is different from the minimum distance between the surface of the second portion far from the base substrate 10 and the surface of the first organic layer 60 far from the base substrate 10.
Optionally, in a direction perpendicular to the plane of the base substrate 10, the minimum distance between the surface of the first portion on the side far from the base substrate 10 and the surface of the first organic layer 60 on the side far from the base substrate 10 is greater than the minimum distance between the surface of the second portion on the side far from the base substrate 10 and the surface of the first organic layer 60 on the side far from the base substrate 10.
In an alternative embodiment of the present invention, please continue to refer to fig. 3, the first opening K1 includes a first end face K11 and a second end face K12 disposed oppositely, the first end face K11 is located on a side of the second end face K12 close to the substrate base plate 10; the area of the orthographic projection of the first end face K11 on the base substrate 10 is smaller than the area of the orthographic projection of the pixel opening K0 on the base substrate 10.
It is understood that, when the first opening K1 is formed on the pixel electrode layer, the aperture of the first opening K1 tends to decrease from the side away from the substrate base plate 10 to the side close to the substrate base plate 10 due to the limitation of the production process, that is, the area of the first end face K11 of the first opening K1 disposed close to the substrate base plate 10 will be smaller than the area of the second end face K12 disposed away from the substrate base plate 10. In the embodiment shown in fig. 5, the top view of the first opening K1 and the pixel opening K0 shows the position relationship between the second end face K12 of the first opening K1 and the pixel opening K0, and this embodiment is described by taking an example that the area of the second end face K12 of the first opening K1 is smaller than the area of the orthographic projection of the pixel opening K0 on the substrate 10, and at this time, the area of the first end face K11 of the first opening K1 is inevitably smaller than the area of the orthographic projection of the pixel opening K0 on the substrate 10. In the invention, when the area of the first end face K11 with the smaller area of the first opening K1 is set smaller than the area of the orthographic projection of the pixel opening K0 on the substrate base plate 10, more first openings K1 can be formed in the non-opening area of the display panel 100, when the area of the first opening K1 is smaller, the first inorganic layer 41 is more favorable for forming a sharp structure in the first opening K1, on one hand, the sharp degree of the sharp structure is favorable for improving a better stress point S, on the other hand, the number of the sharp structures is also favorable for increasing, when the number of the sharp structures formed by the first inorganic layer 41 on the display panel 100 is larger, when the display panel 100 is subjected to external impact force, more stress points S release the impact force, thereby being more favorable for improving the impact resistance of the display panel 100.
Further referring to fig. 3 and 8, optionally, an orthographic projection area of the first end face K11 on the plane of the substrate base plate 10 is larger than an orthographic projection area of the first via hole on the plane of the substrate base plate 10. It can be understood that, setting the area of the first end face K11 to be larger than the area of the orthogonal projection of the first via on the plane of the substrate base plate 10 is beneficial to avoid the stress from being concentrated at the first via, so as to ensure the connection between the anode 31 and the transistor T, and thus ensure the normal display of the display panel 100.
In an alternative embodiment of the present invention, with continued reference to fig. 3, in each first opening K1, the orthographic projection area of each first end face K11 on the substrate base 10 is equal.
Specifically, the area of the orthographic projection of the first end face K11 of each first opening K1 on the substrate base plate 10 is set to be equal, which is beneficial to ensuring that the sharpness degree of each sharp structure is the same when the first inorganic layer 41 forms the sharp structure in the first opening K1, so that the impact force of each sharp structure formed by the first inorganic layer 41 in the first opening K1 is the same or similar when the sharp structure is subjected to the impact force, and thus, the stress uniformity of each sharp structure formed by the first inorganic layer 41 when the sharp structure is subjected to the impact force is promoted, so that the stress of the whole display panel 100 is more uniform, the phenomenon that a single point is subjected to too large stress in the display panel 100 is avoided, and the impact resistance of the display panel 100 is also promoted.
In an alternative embodiment of the present invention, in the first cross section of the same first opening K1, the sidewall of the first opening K1 is in a straight line or an arc line structure, and the first cross section is perpendicular to the substrate base plate 10.
Specifically, in the embodiment shown in fig. 3 and 6, in the first cross section of the first opening K1, the sidewall of the first opening K1 is a straight line, and considering the difference of the manufacturing process, the sidewall of the first opening K1 may also be embodied as an arc structure. When the sidewall of the first opening K1 is in a linear or arc structure, the first opening K1 can be formed by one process, for example, the first opening K1 structure can be formed on the pixel defining layer 32 by one mask process, and this manufacturing method is favorable for simplifying the production process of the first opening K1, thereby improving the impact resistance of the display panel 100 and the manufacturing process of the display panel 100, and improving the manufacturing efficiency of the display panel 100.
In an alternative embodiment of the invention, fig. 9 is another AA cross-sectional view of the display panel 100 in fig. 2, and in the first cross-section of the same first opening K1, the sidewall of the first opening K1 has a step-like structure; along the direction that the packaging layer 40 points to the substrate base plate 10, the sectional area of the first opening K1 along the second section is in a decreasing trend; wherein the first cross section is perpendicular to the substrate base 10 and the second cross section is parallel to the substrate base 10.
Specifically, with continued reference to fig. 9, the structure of the display panel 100 shown in fig. 9 is the same as that shown in fig. 6, except that the structure of the first opening K1 is different. In the embodiment shown in fig. 9, the sidewall of the first opening K1 has a step-like structure, and the cross-sectional area of the first opening K1 along the second cross-section decreases along the direction from the encapsulation layer 40 to the substrate 10. When the first inorganic layer 41 is filled in the first opening K1, the first inorganic layer 41 forms the stress points S at the bottom of the first opening K1, and also forms the stress points S at the corners of the step shape, that is, when the sidewall of the first opening K1 is set to be the step shape structure, the first inorganic layer can form a plurality of stress points S in the same first opening K1, which is equivalent to increasing the number of the stress points S when the display panel 100 is impacted by an external force, so that the impact force can be released through the plurality of stress points S, thereby effectively preventing the phenomenon of too large single-point impact force in the display panel 100, and being more beneficial to improving the impact resistance of the display panel 100. When the sidewall of the first opening K1 is formed into the stepped structure, the sidewall may be manufactured by a 2-mask or multi-mask process, which is not specifically limited in this application.
Based on the same inventive concept, the invention also provides a display device comprising the display panel in any one of the above embodiments. Fig. 10 is a schematic plan view illustrating a display device 200 according to an embodiment of the present invention, where the display device 200 according to the embodiment includes the display panel 100 according to the embodiment of the present invention.
The embodiment shown in fig. 10 is only described as an example of a mobile phone, and it should be understood that the display device provided in the embodiment of the present invention may be other display devices with a display function, such as a computer, a television, and a vehicle-mounted display device, and the present invention is not limited thereto. The display device provided in the embodiment of the present invention has the beneficial effects of the display panel provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel in each embodiment above, and this embodiment is not described herein again.
It should be noted that the display device provided by the present invention is particularly suitable for a flexible display device or a foldable display device.
In summary, the display panel and the display device provided by the invention at least achieve the following beneficial effects:
in the display panel and the display device provided by the invention, the light-emitting layer is arranged on one side of the array layer away from the substrate, and the array layer is usually used for driving the light-emitting material layer in the light-emitting layer to emit light; the light emitting layer includes a pixel defining layer defining a plurality of pixel openings, and a light emitting material layer in the pixel openings. The packaging layer is arranged on one side, away from the substrate, of the cathode in the light-emitting layer and comprises a first inorganic layer, and the packaging layer is used for packaging the light-emitting layer in consideration of the fact that the inorganic layer has a good water and oxygen blocking effect, so that the light-emitting layer can be effectively blocked from being affected by external water and oxygen. When the light emitting material layer is encapsulated by the first inorganic layer, the first inorganic layer covers each pixel opening, and the first inorganic layer is filled into the pixel opening, so that reliable encapsulation of the light emitting material layer is realized. In particular, besides the pixel opening, the invention introduces a plurality of first openings on the pixel defining layer, the first openings extend along the direction vertical to the substrate base plate, and the first inorganic layer is also filled in the first openings. When receiving the impact of external force, first inorganic layer forms a plurality of stress points in a plurality of first trompils except that forming a plurality of stress points in the pixel opening to increased display panel and formed the multiple spot atress when receiving external force to the inorganic layer, avoided the impact force to take place to assemble in certain position, made the impact force release from many places, therefore effectively promoted display panel's shock resistance.
In addition, because the orthographic projection of the first opening hole on the plane of the substrate base plate at least does not overlap with the orthographic projection of the pixel opening and the orthographic projection of the channel region of the transistor on the plane of the substrate base plate, the possibility that impact force is conducted downwards to the transistor when the inorganic layer forms a stress point in the first opening hole is effectively reduced, the possibility that the transistor is damaged or even failed by the impact force is reduced, the display reliability of the display panel when the display panel is impacted is improved, and the impact resistance of the display panel is further improved.
Although some specific embodiments of the present invention have been described in detail by way of example, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.
Claims (20)
1. A display panel, comprising:
a substrate base plate;
an array layer on the substrate base plate, the array layer including a plurality of transistors;
the light-emitting layer is positioned on one side of the array layer, which is far away from the substrate base plate, and comprises an anode, a pixel defining layer, a light-emitting material layer and a cathode; the pixel defining layer comprises a plurality of pixel openings, and the light-emitting material layer is positioned in the pixel openings;
the packaging layer is positioned on one side of the light-emitting layer, which is far away from the substrate base plate, and comprises a first inorganic layer;
the pixel defining layer includes a plurality of first openings extending in a direction perpendicular to the substrate base, and the first inorganic layer includes a portion filled in the first openings.
2. The display panel according to claim 1, wherein the first openings have the same height in a direction perpendicular to the substrate base plate.
3. The display panel according to claim 1, wherein a height of the first opening is smaller than a height of the pixel defining layer in a direction perpendicular to the substrate base plate.
4. The display panel according to claim 3, wherein the first inorganic layer includes a first portion overlapping the first opening and a second portion overlapping the pixel opening in a direction perpendicular to a plane of the substrate base plate;
the display panel further comprises a first organic layer, wherein the first organic layer is positioned between the array layer and the light-emitting layer along a direction vertical to the substrate base plate;
in a direction perpendicular to the plane of the base substrate, the distance between the surface of the first portion close to the base substrate and the surface of the first organic layer far away from the base substrate is smaller than the distance between the surface of the second portion close to the base substrate and the surface of the first organic layer far away from the base substrate.
5. The display panel according to claim 1, wherein a height of the first opening is equal to the pixel definition layer height in a direction perpendicular to the substrate base plate.
6. The display panel according to claim 5, further comprising an auxiliary layer on a side of the pixel defining layer adjacent to the substrate base, wherein the first opening exposes the auxiliary layer; in the first opening, the cathode is in direct contact with the auxiliary layer.
7. The display panel according to claim 6, wherein the anode is located on a side of the light emitting material layer close to the array layer and the cathode is located on a side of the light emitting material layer away from the array layer in a direction perpendicular to the substrate base plate;
the auxiliary layer and the anode are arranged on the same layer.
8. The display panel according to claim 5, further comprising a first organic layer between the array layer and the light emitting layer in a direction perpendicular to the substrate base plate;
the display panel further comprises a plurality of second openings, and the second openings penetrate through at least part of the first organic layer along the direction perpendicular to the substrate base plate; the second opening is in one-to-one correspondence with the first opening, and the first opening is communicated with the second opening.
9. The display panel according to claim 8, wherein a height of the second opening is smaller than a height of the first organic layer in a direction perpendicular to the substrate base plate.
10. The display panel according to claim 1, wherein the first opening comprises a first end face and a second end face which are oppositely arranged, and the first end face is located on one side of the second end face close to the substrate base plate;
the area of the orthographic projection of the first end face on the substrate base plate is smaller than the area of the orthographic projection of the pixel opening on the substrate base plate.
11. The display panel according to claim 10, wherein in the first opening, an area of an orthogonal projection of the first end face on the substrate base plate is equal.
12. The display panel according to claim 1, wherein the sidewall of the first opening has a linear or arc structure.
13. The display panel of claim 1, wherein an orthographic projection of the anode on the plane of the substrate base plate does not overlap with an orthographic projection of the first opening on the substrate base plate.
14. The display panel according to claim 1, wherein at least a portion of the cathode is located within the first opening.
15. The display panel according to claim 1, wherein an orthographic projection of the first opening on a plane of a substrate does not overlap with an orthographic projection of the gate of the transistor on the plane of the substrate.
16. The display panel according to claim 1, wherein a plurality of the first openings are provided around a channel region of the transistor.
17. The display panel according to claim 1, further comprising a first organic layer between the array layer and the light emitting layer in a direction perpendicular to a plane of the substrate base plate;
the first organic layer includes a first via through which the anode is electrically connected to the transistor;
the orthographic projection area of the first opening hole on the plane of the substrate base plate is larger than that of the first through hole on the plane of the substrate base plate.
18. The display panel according to claim 1, wherein an orthogonal projection of the first opening on the plane of the substrate base plate is at least not overlapped with an orthogonal projection of the pixel opening and the channel region of the transistor on the plane of the substrate base plate.
19. The display panel according to claim 1, wherein the first inorganic layer includes a first portion overlapping the first opening and a second portion overlapping the pixel opening in a direction perpendicular to a plane of the substrate base;
the display panel further comprises a first organic layer, wherein the first organic layer is positioned between the array layer and the light-emitting layer along a direction vertical to the substrate base plate;
in a direction perpendicular to the plane of the substrate base plate, the minimum distance between the surface of the first portion on the side far away from the substrate base plate and the surface of the first organic layer on the side far away from the substrate base plate is different from the minimum distance between the surface of the second portion on the side far away from the substrate base plate and the surface of the first organic layer on the side far away from the substrate base plate.
20. A display device comprising the display panel according to any one of claims 1 to 19.
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| CN113380867B (en) * | 2021-06-08 | 2024-03-08 | 安徽熙泰智能科技有限公司 | Display structure capable of deflecting independent pixels and preparation method thereof |
| CN113903781B (en) * | 2021-09-28 | 2022-12-06 | 北海惠科光电技术有限公司 | Display panel, display device and manufacturing method of display panel |
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| WO2016098758A1 (en) * | 2014-12-19 | 2016-06-23 | Jsr株式会社 | Light emitting device and manufacturing method for same, manufacturing method for barrier, and radiation-sensitive material |
| KR102611500B1 (en) * | 2016-08-31 | 2023-12-06 | 엘지디스플레이 주식회사 | Organic light emitting display device and method for manufacturing the same |
| CN106449702B (en) * | 2016-09-20 | 2019-07-19 | 上海天马微电子有限公司 | Organic light-emitting display panel and manufacturing method thereof |
| KR102693312B1 (en) * | 2016-09-30 | 2024-08-07 | 엘지디스플레이 주식회사 | Organic light emitting display device and method of manufacturing the same |
| CN109216407B (en) * | 2017-06-30 | 2022-08-26 | 昆山国显光电有限公司 | OLED display panel and preparation method thereof |
| CN108364987B (en) * | 2018-02-24 | 2021-01-26 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
| CN108538892B (en) * | 2018-04-23 | 2020-11-24 | 深圳市华星光电技术有限公司 | Manufacturing method of OLED display device |
| CN109004005B (en) * | 2018-07-24 | 2020-12-11 | 云谷（固安）科技有限公司 | Display panel, manufacturing method thereof and display device |
| CN109148518B (en) * | 2018-08-03 | 2021-03-30 | 云谷（固安）科技有限公司 | Display panel and display device |
| CN109300956B (en) * | 2018-09-30 | 2021-05-14 | 武汉天马微电子有限公司 | Organic light-emitting display panel and display device |
| CN109638054B (en) * | 2018-12-18 | 2020-11-24 | 武汉华星光电半导体显示技术有限公司 | Display panel and manufacturing method |
| CN212725311U (en) * | 2020-07-08 | 2021-03-16 | 武汉华星光电半导体显示技术有限公司 | OLED display panel and display device |
| CN112002736B (en) * | 2020-08-07 | 2022-06-10 | 武汉华星光电半导体显示技术有限公司 | Organic light emitting diode display panel and display device |
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