CN115409184A - Quantum chip testing method, system and device and quantum computer - Google Patents
Quantum chip testing method, system and device and quantum computer Download PDFInfo
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Abstract
The application discloses a quantum chip testing method, a quantum chip testing system, a storage medium, a quantum chip testing device and a quantum computer, which belong to the field of quantum information, in particular to the technical field of quantum computing. The method comprises the following steps: receiving a parameter scanning configuration instruction of a quantum chip test experiment; responding to a test execution instruction, executing parameter scanning and generating a test signal applied to the quantum chip according to a scanning result; and generating a test result according to a feedback signal of the quantum chip based on the test signal. Compared with the prior art, the method and the device have the advantages that the test signals can be generated to realize the corresponding test experiment after the parameter scanning configuration instructions of the experiment parameters are received, and the results corresponding to the test signals are generated, so that the test efficiency and the operability of the quantum chip are improved.
Description
Technical Field
The present application relates to the field of quantum information, and in particular, to a quantum chip testing method, system, storage medium, device, and quantum computer.
Background
Quantum computers are physical devices that perform high-speed mathematical and logical operations, store, and process quantum information following quantum mechanics laws.
Computation on a quantum computer is typically accomplished by manipulating quantum bits (qubits) located on a quantum chip. In order to implement quantum computing, various performance parameters of a quantum chip need to meet certain standards so as to be able to perform extremely high-fidelity quantum logic gate operation and reading for qubits. However, the relevant performance parameters of the quantum chip, such as the operating frequency of the qubit, the frequency of the read cavity, etc., can fluctuate, and if such fluctuations are ignored, the fidelity of the operation of the quantum logic gate, the accuracy of the reading, etc., can be affected. Therefore, it is often necessary to test the quantum chip to determine whether various performance parameters of the quantum chip are normal
Due to the limitation of the existing quantum chip testing technology, in the current quantum chip testing work, testers often need to determine experimental parameters aiming at performance parameters to be tested, carry out multiple testing experiments around the experimental parameters, and then analyze and compare results of the multiple testing experiments, so that the process has high requirements on the professional technology of the testers and large workload, and the replaceability of the quantum chip testing work is seriously influenced. Therefore, a quantum chip testing scheme with high efficiency and easy operation is needed.
Summary of the invention
The application aims to provide a quantum chip testing method, a quantum chip testing system, a quantum chip testing storage medium, a quantum chip testing device and a quantum computer, so as to solve the defects in the prior art.
One aspect of the present application provides a quantum chip testing method, including:
receiving a parameter scanning configuration instruction of a quantum chip test experiment;
responding to a test execution instruction, executing parameter scanning and generating a test signal applied to the quantum chip according to a scanning result;
and generating a test result according to a feedback signal of the quantum chip based on the test signal.
The method as described above, the quantum chip test experiment comprising at least one of: an energy spectrum test experiment aiming at the reading resonant cavity; energy spectrum test experiments for qubits; energy relaxation time test experiments for qubits.
The method as described above, the parameter scan configuration instruction comprising a threshold and a step size; the step of performing a parameter scan comprises: determining a parameter range according to the threshold value; scanning the parameter range according to the step length.
The method as described above, the parameter scan configuration instruction comprising a threshold and a sample size; the step of performing a parameter scan comprises: determining a parameter range according to the threshold value; scanning the parameter range according to the sample size.
As described above, the step of generating the test signal applied to the quantum chip according to the scanning result includes:
determining experimental parameter values and corresponding scanning sequences according to the scanning results;
and sequentially generating test signals corresponding to the experimental parameter values according to the scanning sequence and outputting the test signals to the quantum chip.
The method as described above, the step of generating the test result according to the feedback signal of the quantum chip based on the test signal includes:
according to feedback signals of the quantum chip based on the test signals, determining experiment results and experiment parameter values corresponding to the feedback signals;
fitting each experimental result and the corresponding experimental parameter value to obtain a fitting curve;
generating a test result comprising the fitted curve.
The method as described above, the step of generating the test result according to the feedback signal of the quantum chip based on the test signal further includes:
and updating the fitting curve in real time by using the experimental result corresponding to the currently acquired feedback signal and the experimental parameter value.
A second aspect of the present application provides a quantum chip test system, including:
the instruction configuration module is used for receiving a parameter scanning configuration instruction of a quantum chip test experiment;
the scanning test module is used for responding to a test execution instruction, executing parameter scanning and generating a test signal applied to the quantum chip according to a scanning result;
and the result generation module is used for generating a test result according to the feedback signal of the quantum chip based on the test signal.
A third aspect of the application provides a computer-readable storage medium comprising a stored computer program, wherein the computer program, when executed by a processor, controls an apparatus in which the storage medium is located to perform the method.
A fourth aspect of the present application provides a quantum chip testing device, including:
a memory for storing a computer program;
a processor for implementing the method when executing the computer program.
A fifth aspect of the present application provides a quantum computer comprising the quantum chip testing apparatus or the quantum chip testing system, or the quantum computer implementing quantum chip testing according to the method.
Compared with the prior art, this application is through receiving the parameter scanning configuration instruction of quantum chip test experiment earlier, then respond to the test execution instruction, carry out the parameter scanning and generate the test signal who applies to the quantum chip according to the scanning result, again according to the quantum chip is based on the feedback signal of test signal generates the test result to can generate the test signal after the parameter scanning configuration instruction of receipt experiment parameter and realize corresponding test experiment, generate the result that corresponds with each test signal, consequently, this application has improved quantum chip test efficiency and easy operability.
Drawings
FIG. 1 is a block diagram of a quantum chip testing device according to an embodiment of the present application;
FIG. 2 is a schematic flow chart of a quantum chip testing method according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of a quantum chip test system according to an embodiment of the present application.
Detailed Description
The embodiments described below with reference to the drawings are exemplary only for the purpose of explaining the present application and are not to be construed as limiting the present application.
Quantum computing is a novel computing mode for regulating and controlling a quantum information unit to compute according to a quantum mechanical rule, wherein the most basic principle on which quantum computing is based is a quantum mechanical state superposition principle, and the quantum mechanical state superposition principle enables the state of the quantum information unit to be in a superposition state with multiple possibilities, so that quantum information processing has greater potential in efficiency compared with classical information processing.
A quantum chip is a processor in a quantum computer that performs quantum computation, and the qubit structure contained in the quantum chip is a processing unit of the processor. The quantum chip is integrated with a plurality of quantum bits and reading resonant cavities which are in one-to-one correspondence and mutually coupled, one end of each reading resonant cavity, which is far away from the corresponding quantum bit, is connected to a reading signal transmission line which is integrated on the quantum chip, and the reading signal transmission line is used for receiving a detection signal and transmitting a feedback signal of the quantum bit detection signal; and each quantum bit is coupled with an XY signal transmission line and a Z signal transmission line.
For a quantum chip, performance parameters thereof need to meet certain requirements to support quantum computation execution, for example, whether a read signal transmission line, a read resonant cavity, a qubit, an XY signal transmission line and a Z signal transmission line are on, whether a qubit operating frequency drifts, and the like. Due to constraint limits of quantum chip hardware manufacturing technology, influence of working environment factors and the like, performance parameters of a quantum chip are easy to fluctuate, so that operation and reading of a quantum logic gate are influenced, for example, the fidelity of operation of the quantum logic gate is reduced, and the accuracy and efficiency of reading are also influenced. Therefore, the quantum chip is often required to be tested to determine whether various performance parameters of the quantum chip are normal.
Due to the limitation of the existing quantum chip testing technology, in the current quantum chip testing work, after the experimental parameters of the testing experiment to be performed on the quantum chip are determined, a tester often needs to perform a plurality of testing experiments around the experimental parameters, and can judge whether the performance parameters of the quantum chip are normal or not according to the analysis and comparison of the results of the plurality of testing experiments, and the process has high technical requirements on the tester and large workload, and the testing work of the quantum chip is seriously influenced.
The method provided by the embodiment of the invention is used for testing the quantum chip, so that after a tester inputs a parameter scanning configuration instruction of the quantum chip testing experiment through an interface, parameter scanning can be executed and the corresponding quantum chip testing experiment can be carried out, and whether the performance parameter of the quantum chip is normal can be further determined based on the testing result, thereby reducing the professional technical requirements on the tester to a certain extent and reducing the workload of the tester.
A quantum chip testing method and apparatus according to embodiments of the invention is described below with reference to fig. 1-3.
Quantum chip test equipment
In an embodiment, the quantum chip testing apparatus may be a computer device, and the computer device is loaded with quantum chip testing software. Fig. 1 is a block diagram of a quantum chip testing device according to an embodiment of the present invention, and as shown in fig. 1, the quantum chip testing device 1 includes an interaction module 11, at least one processor 12, and a memory 13.
The interaction module 11 may include an input/output device of the device, such as a display screen, a mouse, a keyboard, a touch screen, and the like, the interaction module 11 is configured to receive an input instruction and provide a configuration interface, for example, a user triggers a quantum chip test software icon on the computer device, the display screen may provide the configuration interface for the quantum chip test, and the user may select different types of quantum chip test experiments and input a parameter sweep configuration instruction for the quantum chip test experiments on the configuration interface through the keyboard, the mouse, or the touch screen, so as to generate experiment parameter configurations for the quantum chip test.
The memory 13 is in communication connection with the at least one processor 12, the memory 13 stores instructions executable by the at least one memory 12, and when the instructions are executed by the at least one processor 12, the at least one processor 12 executes the quantum chip testing method, so that the quantum chip testing is realized, and the operation is simple and easy to realize.
A quantum chip testing method according to an embodiment of the present invention is described below with reference to the accompanying drawings.
In an embodiment of the present invention, the quantum chip test experiment is an experiment for performing test characterization on a performance parameter of the quantum chip, and includes, for example, an energy spectrum test experiment for a read resonant cavity, an energy spectrum test experiment for a qubit, an energy relaxation time test experiment for the qubit, and the like. The value of the corresponding performance parameter can be obtained through a quantum chip test experiment, and whether the performance parameter is normal or meets the requirement is further determined.
Fig. 2 is a flow diagram of a quantum chip testing method according to one embodiment of the present application.
As shown in fig. 2, the quantum chip testing method of the embodiment of the invention at least includes steps S2100 to S2300, which are as follows.
S2100, receiving a parameter scanning configuration instruction of the quantum chip test experiment.
In an embodiment, the quantum chip test experiment comprises at least one of: the method comprises an energy spectrum test experiment aiming at a reading resonant cavity, an energy spectrum test experiment aiming at a quantum bit, and an energy relaxation time test experiment aiming at the quantum bit. It will be appreciated that different quantum chip test experiments are selected, i.e. corresponding parameter scan configuration instructions need to be configured. It is to be understood that the above test experiments are only exemplary, and the specific implementation is not limited thereto, and for example, the test experiments may also include a spectrum test experiment for the read signal line, a coherence time test experiment for the qubit, and the like.
In order to facilitate understanding of the embodiments of the present application, the following will be further described in conjunction with some examples of test experiments:
and receiving a scanning configuration instruction of a detection signal frequency parameter aiming at an energy spectrum test experiment of the reading resonant cavity, wherein the detection signal is applied to a reading signal transmission line on the quantum chip. A variation curve of the ratio S21 of the feedback signal to the detection signal along with a frequency parameter of the detection signal is an energy spectrum curve of the reading resonant cavity, and it can be understood that the S21 parameter includes information such as frequency, amplitude, phase, and the like. And determining the working frequency of the reading resonant cavity according to the energy spectrum curve of the reading resonant cavity.
And aiming at the energy spectrum test experiment of the qubit, receiving a scanning configuration instruction of a driving voltage parameter, wherein the driving voltage is applied to a Z signal transmission line on the quantum chip, and a detection signal is simultaneously applied to a reading signal transmission line when the energy spectrum test experiment of the qubit is carried out. The change curve of the ratio S21 of the feedback signal of the quantum bit through the read signal transmission line to the detection signal is the energy spectrum curve of the quantum bit, and the working frequency of the quantum bit can be determined according to the energy spectrum curve of the quantum bit.
And aiming at the energy relaxation time test experiment of the qubit, receiving a scanning configuration instruction of a detection signal delay parameter, wherein the detection signal is applied to a read signal transmission line, and an XY signal is simultaneously applied to an XY signal transmission line on the quantum chip and a Z signal transmission line on the quantum chip for driving voltage when the energy relaxation time test experiment of the qubit is carried out. The change curve of the feedback signal of the qubit based on the detection signal along with the trigger delay parameter of the detection signal is the energy relaxation time curve of the qubit, and the energy relaxation time of the qubit can be determined according to the energy relaxation time curve of the qubit.
It should be noted that the applications of the energy spectrum test experiment for the read resonant cavity, the energy spectrum test experiment for the qubit, and the energy relaxation time test experiment for the qubit are not limited to the above test experiment examples.
In the embodiment of the invention, different parameter scanning configuration instructions are received, and different parameter scanning modes are executed.
In some embodiments of the invention, the parameter scan configuration instruction comprises a threshold and a step size; the step of performing a parameter scan comprises:
determining a parameter range according to the threshold value; scanning the parameter range according to the step length. Illustratively, the threshold configuration in the parameter scan configuration instruction includes a lower threshold limit and an upper threshold limit, the lower threshold limit is 6421, the upper threshold limit is 6422, and when the step size is configured to be 0.1, this step is to take a value every 0.1 from 6421 in the parameter range [6421,6422], for example, 6421.0,6421.1, 6421.2, \ 8230; \8230;, 6422.0.
In other embodiments of the present invention, the parameter scan configuration instructions include a threshold and a sample size; the step of performing a parameter scan comprises:
determining a parameter range according to the threshold value; scanning the parameter range according to the sample size. Illustratively, the threshold configuration in the parameter scan configuration instruction includes a lower threshold limit and an upper threshold limit, where the lower threshold limit is 8421, the upper threshold limit is 8422, and when the sample size is 5, this step takes 5 values in the parameter range [8421,8422 ].
And S2200, responding to the test execution instruction, executing parameter scanning and generating a test signal applied to the quantum chip according to a scanning result.
Specifically, after receiving a parameter scan configuration instruction of the experiment parameter, the parameter scan can be executed, and a test signal is generated to implement a corresponding test experiment.
In some embodiments, the step of generating the test signal applied to the quantum chip according to the scanning result includes:
determining experimental parameter values and corresponding scanning sequences according to the scanning results;
and sequentially generating test signals corresponding to the experimental parameter values according to the scanning sequence and outputting the test signals to the quantum chip.
Illustratively, the determined experimental parameter values are 6421.0,6421.1, 6421.2, \ 8230; \ 8230;, 6422.0 when scanning in step size 0.1 in the parameter range [6421,6422], and the scanning order of the determined experimental parameter values corresponds to 1,2,3, \8230;, 11. Then test signals corresponding to 6421.0,6421.1, 6421.2, 8230, 8230and 6422.0 are generated in sequence according to the scanning sequence 1,2,3, 8230, 8230and 6422.0 and are output to the quantum chip for testing.
And S2300, generating a test result according to a feedback signal of the quantum chip based on the test signal.
Specifically, the step determines the test result of the quantum chip test experiment according to the feedback signal of the quantum chip after the test signal is applied.
In an embodiment, in order to summarize and fit experimental results corresponding to scanned experimental parameter values and display the experimental results to form visual contrast, the step of generating the test result according to the feedback signal of the quantum chip based on the test signal includes:
determining an experimental result and an experimental parameter value corresponding to each feedback signal according to the feedback signal of the quantum chip based on the test signal;
fitting each experimental result and the corresponding experimental parameter value to obtain a fitting curve;
generating a test result comprising the fitted curve.
In another embodiment, the step of generating the test result according to the feedback signal of the quantum chip based on the test signal further includes: and updating the fitting curve in real time by using the experimental result corresponding to the currently acquired feedback signal and the experimental parameter value. Thereby the fitting curve is dynamically updated, namely the fitting curve is immediately updated every time a feedback signal is received, all current experimental results are displayed,
aiming at the problems that in the current quantum chip test work, a tester usually needs to perform a plurality of test experiments around experiment parameters, and analyzes and compares results of the plurality of test experiments, and the whole process has high requirements on the professional skills of the tester and large workload, the quantum chip test method provided by the embodiment of the invention receives a parameter scanning configuration instruction of the quantum chip test experiment, then responds to a test execution instruction, executes parameter scanning, generates a test signal applied to the quantum chip according to the scanning result, and generates a test result according to a feedback signal of the quantum chip based on the test signal, so that the test signal can be generated after the parameter scanning configuration instruction of the experiment parameters is received to realize the corresponding test experiment, and the result corresponding to each test signal is generated, thereby improving the test efficiency and the operability of the quantum chip.
The present invention provides a quantum chip test system, which is further described with reference to the accompanying drawings.
Fig. 3 is a schematic structural diagram of a quantum chip test system according to an embodiment of the present invention.
Referring to fig. 3, an embodiment of the present invention provides a quantum chip testing system corresponding to the above quantum chip testing method, including:
the instruction configuration module 301 is configured to receive a parameter scanning configuration instruction of a quantum chip test experiment;
a scan test module 302, configured to execute parameter scanning in response to a test execution instruction and generate a test signal applied to the quantum chip according to a scanning result;
and the result generating module 303 is configured to generate a test result according to a feedback signal of the quantum chip based on the test signal.
The quantum chip test system provided by the embodiment of the invention can select different quantum chip test experiments through the instruction configuration module 301, configure corresponding parameter scanning configuration instructions, execute parameter scanning based on the scanning test module 302, generate test signals applied to the quantum chip according to the scanning results, and generate test results corresponding to feedback signals based on the test signals through the result generation module 303. Corresponding to the quantum chip testing method provided by the embodiment of the invention, based on the quantum chip testing system provided by the embodiment of the invention, the problems that in the existing quantum chip testing work, testers often need to perform a plurality of testing experiments around experimental parameters, and the results of the plurality of testing experiments are analyzed and compared, the whole process has higher requirements on the professional technology of the testers and has large workload can be solved.
Illustratively, the quantum chip test system according to the embodiment of the present invention can sequentially perform an energy spectrum test experiment for a read resonant cavity, an energy spectrum test experiment for a qubit, and an energy relaxation time test experiment for the qubit, so as to determine the operating frequency of the read resonant cavity, the operating frequency of the qubit, and the energy relaxation time of the qubit.
When an energy spectrum test experiment aiming at the reading resonant cavity is carried out, a scanning configuration instruction of frequency parameters of detection signals is received, the detection signals with different frequency values are determined according to parameter scanning, and then the detection signals with different frequency values are applied to a reading signal transmission line on a quantum chip. The variation curve of the ratio S21 of the feedback signal output by the quantum chip based on the detection signal to the detection signal along with the frequency parameter of the detection signal is the energy spectrum curve of the reading resonant cavity, and the working frequency of the reading resonant cavity can be determined according to the energy spectrum curve of the reading resonant cavity.
And receiving a scanning configuration instruction of a driving voltage parameter when the energy spectrum test experiment aiming at the quantum bit is carried out, wherein the driving voltage is applied to a Z signal transmission line on the quantum chip, and simultaneously applying a detection signal to a reading signal transmission line when the energy spectrum test experiment aiming at the quantum bit is carried out. The change curve of the ratio S21 of the feedback signal of the quantum bit through the read signal transmission line to the detection signal is the energy spectrum curve of the quantum bit, and the working frequency of the quantum bit can be determined according to the energy spectrum curve of the quantum bit.
And aiming at the energy relaxation time test experiment of the qubit, receiving a scanning configuration instruction of a detection signal delay parameter, wherein the detection signal is applied to a read signal transmission line, and an XY signal is simultaneously applied to an XY signal transmission line on the quantum chip and a Z signal transmission line on the quantum chip for driving voltage when the energy relaxation time test experiment of the qubit is carried out. The change curve of the feedback signal of the qubit based on the detection signal along with the trigger delay parameter of the detection signal is the energy relaxation time curve of the qubit, and the energy relaxation time of the qubit can be determined according to the energy relaxation time curve of the qubit.
An embodiment of the present invention further provides a storage medium, where a computer program is stored in the storage medium, where the computer program is configured to execute the steps in any of the above method embodiments when running.
Specifically, in the present embodiment, the storage medium may be configured to store a computer program for executing steps S2100 to S2300 in which:
s2100, receiving a parameter scanning configuration instruction of a quantum chip test experiment;
s2200, responding to the test execution instruction, executing parameter scanning and generating a test signal applied to the quantum chip according to a scanning result;
and S2300, generating a test result according to a feedback signal of the quantum chip based on the test signal.
Specifically, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing computer programs, such as a usb disk, a Read-only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.
The embodiment of the invention also provides a quantum computer, which comprises the quantum chip testing device or the quantum chip testing system, or the quantum computer realizes the quantum chip testing according to the method.
Compared with the prior art, aiming at the problems that in the existing quantum chip test work, testers often need to perform multiple test experiments around experimental parameters, and the results of the multiple test experiments are analyzed and compared, so that the whole process has high requirements on the professional technology of the testers and the workload is large.
It should be appreciated that reference throughout this specification to "some embodiments," "an embodiment," or "an implementation" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present application. Thus, the appearances of the phrases "in some embodiments," "in one embodiment," or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a component of' 8230; \8230;" does not exclude the presence of another like element in a process, method, article, or apparatus that comprises the element.
In the several embodiments provided in the present application, it should be understood that the disclosed method, apparatus and system may be implemented in other ways. The above-described embodiments are merely illustrative, and for example, the division of the modules and units is only one logical function division, and other division manners may be available in actual implementation, such as: multiple units or components may be combined, or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the coupling, direct coupling or connection between the components shown or discussed may be through some interfaces, indirect coupling or communication connection between devices or units, and may be electrical, mechanical or in other forms.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units; can be located in one place or distributed on a plurality of network units; some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be separately regarded as one unit, or two or more units may be integrated into one unit; the integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
Those of ordinary skill in the art will understand that: all or part of the steps for realizing the method embodiments can be completed by hardware related to program instructions, the program can be stored in a computer readable storage medium, and the program executes the steps comprising the method embodiments when executed; and the aforementioned storage medium includes: various media that can store program codes, such as a removable storage device, a Read On y Memory (ROM), a magnetic disk, or an optical disk.
Alternatively, the integrated units described above in the present application may be stored in a computer-readable storage medium if they are implemented in the form of software functional modules and sold or used as independent products. Based on such understanding, the technical solutions of the embodiments of the present application or portions thereof that contribute to the prior art may be embodied in the form of a software product, where the computer software product is stored in a storage medium and includes several instructions to enable a device (which may be a computer, a server, etc.) that implements resource change to execute all or part of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a removable storage device, a ROM, a magnetic or optical disk, or other various media that can store program code.
The above description is only for the embodiment of the present application, but the scope of the present application is not limited thereto, and all the equivalent embodiments changed or modified according to the idea of the present invention are within the scope of the present invention without departing from the spirit covered by the description and the drawings.
Claims (11)
1. A quantum chip testing method is characterized by comprising the following steps:
receiving a parameter scanning configuration instruction of a quantum chip test experiment;
responding to a test execution instruction, executing parameter scanning and generating a test signal applied to the quantum chip according to a scanning result;
and generating a test result according to a feedback signal of the quantum chip based on the test signal.
2. The method of claim 1, wherein the quantum chip test experiment comprises at least one of:
an energy spectrum test experiment aiming at the reading resonant cavity;
energy spectrum test experiments for qubits;
energy relaxation time test experiments for qubits.
3. The method of claim 1, wherein the parameter scan configuration instruction comprises a threshold and a step size; the step of performing a parameter scan comprises:
determining a parameter range according to the threshold value;
and scanning the parameter range according to the step length.
4. The method of claim 1, wherein the parameter scan configuration instructions comprise a threshold and a sample size; the step of performing a parameter scan comprises:
determining a parameter range according to the threshold value;
scanning the parameter range according to the sample size.
5. The method of claims 1-4, wherein the step of generating the test signal applied to the quantum chip according to the scanning result comprises:
determining experimental parameter values and corresponding scanning sequences according to the scanning results;
and according to the scanning sequence, sequentially generating test signals corresponding to the experimental parameter values and outputting the test signals to a quantum chip.
6. The method of claim 5, wherein the step of generating the test result based on the feedback signal of the test signal from the quantum chip comprises:
determining an experimental result and an experimental parameter value corresponding to each feedback signal according to the feedback signal of the quantum chip based on the test signal;
fitting each experimental result and the corresponding experimental parameter value to obtain a fitting curve;
generating a test result comprising the fitted curve.
7. The method of claim 6, wherein the step of generating the test result based on the feedback signal of the test signal from the quantum chip further comprises:
and updating the fitting curve in real time by using the experimental result corresponding to the currently acquired feedback signal and the experimental parameter value.
8. A quantum chip test system, comprising:
the instruction configuration module is used for receiving a parameter scanning configuration instruction of a quantum chip test experiment;
the scanning test module is used for responding to a test execution instruction, executing parameter scanning and generating a test signal applied to the quantum chip according to a scanning result;
and the result generation module is used for generating a test result according to a feedback signal of the quantum chip based on the test signal.
9. A computer-readable storage medium, comprising a stored computer program, wherein the computer program, when executed by a processor, controls an apparatus in which the storage medium is located to perform the method of any of claims 1 to 7.
10. A quantum chip testing device, comprising:
a memory for storing a computer program;
a processor for implementing the method of any one of claims 1 to 7 when executing the computer program.
11. A quantum computer comprising the quantum chip testing apparatus of claim 10 or the quantum chip testing system of claim 8, or the quantum computer implementing quantum chip testing according to the method of any one of claims 1 to 7.
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| CN202110590899.7A Pending CN115409184A (en) | 2021-05-28 | 2021-05-28 | Quantum chip testing method, system and device and quantum computer |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108761310A (en) * | 2018-05-25 | 2018-11-06 | 合肥本源量子计算科技有限责任公司 | A kind of test method of quantum chip |
| CN111289873A (en) * | 2019-05-10 | 2020-06-16 | 展讯通信（上海）有限公司 | Chip testing method, chip parameter setting method and chip |
| CN112444714A (en) * | 2019-08-28 | 2021-03-05 | 合肥本源量子计算科技有限责任公司 | Quantum bit working parameter detection method |
| CN112444713A (en) * | 2019-08-28 | 2021-03-05 | 合肥本源量子计算科技有限责任公司 | Quantum chip detection method |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN108761310A (en) * | 2018-05-25 | 2018-11-06 | 合肥本源量子计算科技有限责任公司 | A kind of test method of quantum chip |
| CN111289873A (en) * | 2019-05-10 | 2020-06-16 | 展讯通信（上海）有限公司 | Chip testing method, chip parameter setting method and chip |
| CN112444714A (en) * | 2019-08-28 | 2021-03-05 | 合肥本源量子计算科技有限责任公司 | Quantum bit working parameter detection method |
| CN112444713A (en) * | 2019-08-28 | 2021-03-05 | 合肥本源量子计算科技有限责任公司 | Quantum chip detection method |
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Address after: 230088 6th floor, E2 building, phase II, innovation industrial park, 2800 innovation Avenue, high tech Zone, Hefei City, Anhui Province Applicant after: Benyuan Quantum Computing Technology (Hefei) Co.,Ltd. Address before: 230088 6th floor, E2 building, phase II, innovation industrial park, 2800 innovation Avenue, high tech Zone, Hefei City, Anhui Province Applicant before: ORIGIN QUANTUM COMPUTING COMPANY, LIMITED, HEFEI |