CN115396333A - Visual chip, method and switch for communication network delay test - Google Patents
Visual chip, method and switch for communication network delay test Download PDFInfo
- Publication number
- CN115396333A CN115396333A CN202211018430.7A CN202211018430A CN115396333A CN 115396333 A CN115396333 A CN 115396333A CN 202211018430 A CN202211018430 A CN 202211018430A CN 115396333 A CN115396333 A CN 115396333A
- Authority
- CN
- China
- Prior art keywords
- data stream
- delay
- data
- time stamp
- target data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004891 communication Methods 0.000 title claims abstract description 56
- 238000012360 testing method Methods 0.000 title claims abstract description 51
- 230000000007 visual effect Effects 0.000 title claims abstract description 22
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000012545 processing Methods 0.000 claims abstract description 36
- 238000000605 extraction Methods 0.000 claims abstract description 5
- 238000012800 visualization Methods 0.000 claims description 35
- 238000007794 visualization technique Methods 0.000 claims description 21
- 238000003860 storage Methods 0.000 claims description 11
- 230000010354 integration Effects 0.000 claims 1
- 238000012544 monitoring process Methods 0.000 abstract description 14
- 238000005111 flow chemistry technique Methods 0.000 abstract description 2
- 230000005540 biological transmission Effects 0.000 description 14
- 238000010586 diagram Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 3
- 239000000284 extract Substances 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 238000006467 substitution reaction Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000006855 networking Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 230000010076 replication Effects 0.000 description 1
- 238000007619 statistical method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0852—Delays
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/04—Processing captured monitoring data, e.g. for logfile generation
- H04L43/045—Processing captured monitoring data, e.g. for logfile generation for graphical visualisation of monitoring data
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/10—Active monitoring, e.g. heartbeat, ping or trace-route
- H04L43/106—Active monitoring, e.g. heartbeat, ping or trace-route using time related information in packets, e.g. by adding timestamps
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Data Mining & Analysis (AREA)
- Environmental & Geological Engineering (AREA)
- Health & Medical Sciences (AREA)
- Cardiology (AREA)
- General Health & Medical Sciences (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The invention discloses a visual chip, a method and a switch for communication network delay test, wherein the visual chip is integrated on the switch and comprises: the receiving timestamp latching module is used for latching the receiving timestamp of the data stream when the data stream is received; the data flow processing module is used for processing the data flow; the sending timestamp extraction module is used for extracting the sending timestamp of the data stream when the data stream is sent by the switch; and the data stream delay statistical module is used for acquiring the target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring the delay statistical data according to the delay data so as to enable the management system to directly display the delay statistical data of the target data stream. The chip of the invention is integrated on the switch, can complete the delay monitoring of the data flow in the network without using special equipment, can reflect the real running state of the network, and saves the implementation cost.
Description
Technical Field
The present invention relates to the field of communications network technologies, and in particular, to a visualization chip for a communications network delay test, a switch, a visualization method for a communications network delay test, and a computer-readable storage medium.
Background
With the deep application of the ethernet communication technology in the fields of audio and video and industrial control, the network delay of the ethernet communication technology is more and more the focus of attention of people. The requirement of instant transmission service on transmission delay is very strict, and when the delay reaches a certain degree, the service quality is reduced or the service is interrupted; the large transmission delay and jitter can cause disorder of industrial control messages or the control device refuses to operate and malfunction, and cause serious production accidents.
In the related art, delay monitoring is performed on a data stream in an ethernet network, the data stream in the network is usually bypassed through a data replication device (such as an optical splitter) arranged outside a switch, delay of the data stream is analyzed through an analysis device, and the analyzed data stream is sent to the switch and then forwarded by the switch. However, in the above-mentioned delay monitoring process, special devices such as data copying devices and analyzing devices are required to be used, which may affect the original network topology and service flow, and the monitoring result may not reflect the actual operation state of the network, and increases the implementation cost.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, a first objective of the present invention is to provide a visualization chip for a communication network delay test, which is integrated on a switch, and can directly complete statistics of data flow delay data in a network in the switch, and send the delay statistical data to a management system to realize visual display of the data flow delay statistical data, and can complete delay monitoring of data flow in the network without using a special device, and can reflect a real operation state of the network, thereby saving implementation cost.
A second object of the invention is to propose a switch.
A third object of the present invention is to provide a visualization method for a communication network delay test.
A fourth object of the invention is to propose a computer-readable storage medium.
In order to achieve the above object, an embodiment of a first aspect of the present invention provides a visualization chip for a communication network delay test, where the visualization chip is integrally disposed on a switch, and the visualization chip includes: the receiving timestamp latching module is used for latching the receiving timestamp of the data stream when the data stream is received; the data flow processing module is used for processing the data flow; the sending timestamp extraction module is used for extracting the sending timestamp of the data stream when the data stream is sent by the switch; and the data stream delay statistical module is used for acquiring the target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring the delay statistical data according to the delay data so as to enable the management system to directly display the delay statistical data of the target data stream.
According to the visual chip for the communication network delay test, when a data stream is received, the receiving timestamp latching module latches the receiving timestamp of the data stream, and the data stream processing module processes the data stream; the sending time stamp extracting module extracts the sending time stamp of the data stream when the data stream is sent by the switch; the data stream delay statistical module obtains the target data stream, calculates delay data according to the receiving time stamp and the sending time stamp of the target data stream, and obtains the delay statistical data according to the delay data, so that the management system can directly display the delay statistical data of the target data stream. Therefore, the chip is integrated on the switch, statistics of data flow delay data in a network can be directly completed in the switch, the delay statistical data are sent to the management system to realize visual display of the data flow delay statistical data, delay monitoring of the data flow in the network can be completed without using special equipment, the real running state of the network can be reflected, and implementation cost is saved.
In addition, the visualization chip for the communication network delay test according to the above embodiment of the present invention may further have the following additional technical features:
according to an embodiment of the invention, the delay statistic data comprises at least one of a minimum delay, a maximum delay, an average delay, a statistical number, and a delay variance of the target data stream.
According to an embodiment of the present invention, the data stream delay statistic module obtains the delay statistic data according to the delay data, and is specifically configured to: taking the time difference between a sending time stamp and a receiving time stamp when the target data stream appears for the first time as the maximum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the maximum delay; and if the current time difference is larger than the maximum delay, assigning the current time difference to the maximum delay.
According to another embodiment of the present invention, the data stream delay statistic module obtains the delay statistic data according to the delay data, and is specifically configured to: taking the time difference between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the minimum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the minimum delay; and if the current time difference is smaller than the minimum delay, assigning the current time difference to the minimum delay.
According to one embodiment of the invention, a data stream processing module comprises: the network processing submodule is used for carrying out standard network processing on the data stream; the data flow classification submodule is used for classifying the data flow according to a preset rule, wherein the data flow comprises an input data flow and an output data flow; and the storage and forwarding sub-module is used for storing and forwarding the data stream.
According to an embodiment of the present invention, the store-and-forward sub-module is further configured to: and storing the delay statistical data of the target data stream, and forwarding the delay statistical data to a management system.
In order to achieve the above object, a second aspect of the present invention provides a switch, which includes the above visualization chip for latency testing of a communication network.
According to the switch provided by the embodiment of the invention, through the visual chip for the communication network delay test, the statistics of the data stream delay data in the network can be directly completed in the switch, and the delay statistical data is sent to the management system to realize the visual display of the data stream delay statistical data, so that the delay monitoring of the data stream in the network can be completed without using special equipment, the real running state of the network can be reflected, and the implementation cost is saved.
In order to achieve the above object, an embodiment of a third aspect of the present invention provides a visualization method for a communication network delay test, which is applied to the above visualization chip, and the method includes: when receiving a data stream, latching a receiving time stamp of the data stream; processing the data stream; when the data stream is sent by the switch, extracting the sending time stamp of the data stream; and acquiring the target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring delay statistical data according to the delay data so that the management system can directly display the delay statistical data of the target data stream.
According to the visualization method for the communication network delay test, provided by the embodiment of the invention, when a data stream is received, a receiving timestamp of the data stream is latched and processed, and when a data stream is sent by a switch, a sending timestamp of the data stream is extracted; and acquiring a target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring delay statistical data according to the delay data so that the management system can directly display the delay statistical data of the target data stream. Therefore, the method is applied to a visual chip integrated on a switch, can directly complete the statistics of the data flow delay data in the network in the switch, and sends the delay statistical data to a management system to realize the visual display of the data flow delay statistical data, can complete the delay monitoring of the data flow in the network without using special equipment, can reflect the real running state of the network, and saves the implementation cost.
In addition, the visualization method for the communication network delay test according to the above embodiment of the present invention may further have the following additional technical features:
according to an embodiment of the invention, the delay statistics comprise at least one of a minimum delay, a maximum delay, an average delay, a statistical number, a delay variance of the target data stream.
According to an embodiment of the present invention, the data stream delay statistics module obtains the delay statistics data according to the delay data, and is specifically configured to: taking the time difference between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the maximum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the maximum delay; and if the current time difference is larger than the maximum delay, assigning the current time difference to the maximum delay.
According to another embodiment of the present invention, obtaining delay statistics from the delay data comprises: taking the time difference between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the minimum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the minimum delay; and if the current time difference is smaller than the minimum delay, assigning the current time difference to the minimum delay.
According to one embodiment of the invention, processing a data stream includes: carrying out standard network processing on the data stream; classifying data streams according to a preset rule, wherein the data streams comprise input data streams and output data streams; and storing and forwarding the data stream.
According to one embodiment of the invention, storing and forwarding data streams comprises: and storing the delay statistical data of the target data stream, and forwarding the delay statistical data to a management system.
In order to achieve the above object, a fourth aspect of the present invention provides a computer-readable storage medium, on which a visualization program for a communication network latency test is stored, and when the visualization program for the communication network latency test is executed by a processor, the visualization program for the communication network latency test implements the visualization method for the communication network latency test.
According to the computer-readable storage medium of the embodiment of the invention, by executing the visualization method for the communication network delay test, the delay monitoring of the data flow in the network can be completed without using special equipment, the real running state of the network can be reflected, and the implementation cost is saved.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a block diagram illustrating a visualization chip for latency testing of a communication network according to an embodiment of the present invention;
FIG. 2 is a system block diagram of a communication network networking according to one embodiment of the invention;
FIG. 3 is a block diagram of a data stream processing module according to one embodiment of the invention;
FIG. 4 is a block schematic diagram of a switch according to an embodiment of the invention;
fig. 5 is a flowchart of a visualization method for a latency test of a communication network according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
The following describes a visualization chip, a switch, a visualization method for a communication network delay test, and a computer-readable storage medium for a communication network delay test according to embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic block diagram of a visualization chip for latency testing of a communication network according to an embodiment of the present invention.
As shown in fig. 1, in a visualization chip 100 for testing latency of a communication network according to an embodiment of the present invention, the visualization chip 100 is integrally disposed on a switch, and the visualization chip 100 may include: a receiving timestamp latch module 110, a data stream processing module 120, a sending timestamp extraction module 130, and a data stream delay statistics module 140.
The receiving timestamp latching module 110 is configured to latch a receiving timestamp of a data stream when the data stream is received. A data stream processing module 120, configured to process the data stream. A sending timestamp extracting module 130, configured to extract a sending timestamp of the data stream when the switch sends the data stream. And the data stream delay statistical module 140 is configured to acquire the target data stream, calculate delay data according to the receiving timestamp and the sending timestamp of the target data stream, and acquire delay statistical data according to the delay data, so that the management system directly displays the delay statistical data of the target data stream.
It should be noted that the delay statistic data includes at least one of a minimum delay, a maximum delay, an average delay, a statistical number, and a delay variance of the target data stream.
Specifically, as shown in fig. 2, in the illustrated communication network, the end device continuously transmits a data stream to the switch, and the data stream is forwarded by the switch. When the visualization chip 100 integrated in the switch receives the data stream, after the frame preamble of the data stream is received, the receiving timestamp latch module 110 latches the receiving time value (i.e. receiving timestamp) of the data stream, and records the receiving timestamp of the data stream entering the chip as T igr Wherein a time stamp T is received igr The additional information of the data stream may be inserted into the data stream, or registered in an internal register of the visualization chip 100, so as to be used in a subsequent forwarding process. In the same manner, the receive timestamp latch module 110 may latch the receive timestamp of each data stream entering the chip.
The data stream processing module 120 processes the data stream entering the visualization chip 100, and the processing manner of the data stream may include standard network processing, data stream classification, and the like. Through the data stream processing module 120, all data streams in the visualization chip 100 can be classified, and the target data stream is marked as S id . When the switch transmits a data stream, the transmission timestamp extraction module 130 extracts a time value of the data stream transmitted from the visualization chip 100, that is, a transmission timestamp of the data stream, which is denoted as T egr 。
The data stream delay statistics module 140 obtains a target data stream according to the marked data stream, and can obtain a receiving timestamp T of the target data stream igr And sending a timestamp T egr Time stamping T the transmission of the target data stream egr And receiving a time stamp T igr Performing difference making to obtain the delay time delta T of the target data stream, wherein delta T = T egr -T igr 。
When the target data stream appears again, the data stream delay statistical module 140 obtains delay data such as delay time and the like through calculation again, and by analogy, performs statistical analysis on the delay data appearing many times of the target data stream, and can obtain the minimum delay delta T under the condition that the target data stream appears many times min Maximum time delay delta T max Average delay time Δ T avg The number of statistics n (the number of occurrences of the target data stream), and the delay variance Δ T var The visualization chip 100 may upload these delay statistics to the management system. After receiving the delay statistical data of the target data stream, the management system can perform minimum delay delta T on the forwarding path of the target data stream according to the delay statistical data min Maximum time delay delta T max Average delay time Δ T avg、 Delay variance Δ T var And real-time visual presentation is carried out, and a user can directly observe the delay condition of the target data stream through the management system.
In an embodiment of the present invention, when the delay statistical data of the target data stream is updated, the visualization chip 100 actively uploads the delay statistical data to the Management system, and the uploading form of the delay statistical data includes, but is not limited to, SNMP (Simple Network Management Protocol), IEC61850, NETCONF, and the like. In another embodiment of the present invention, the management system actively queries the visualization chip 100 to obtain the latency statistics of the target data stream.
Therefore, the visualization chip of the embodiment is integrated on the switch, statistics of data stream delay data in the network can be directly completed in the switch, the delay statistical data is sent to the management system to realize visual display of the data stream delay statistical data, delay monitoring of the data stream in the network can be completed without using special equipment, the real running state of the network can be reflected, and the implementation cost is saved.
According to an embodiment of the present invention, the data stream delay statistics module 140 obtains delay statistics data according to the delay data, and is specifically configured to: taking the time difference between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the maximum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the maximum delay; and if the current time difference is larger than the maximum delay, assigning the current time difference to the maximum delay.
That is, during data transmission, the maximum delay statistical formula of the target data stream is Δ T max ＝max(T egr -T igr ) The target data stream, when it first appears, is sent with a time stamp T egr And receiving a time stamp T igr Time difference value T between egr -T igr As maximum delay DeltaT max At the initial value of (2) as the target data stream S id The index is stored in a statistical table. When the data stream delay statistic module 140 receives the target data stream again, the timestamp T is sent egr And receiving a time stamp T igr Time difference value T between egr -T igr Comparing with the previous maximum delay time, if the current time difference T egr -T igr Maximum delay Δ T greater than before max Then use this time T egr -T igr Maximum delay Δ T before value replacement max Value, and so on. Therefore, the maximum delay of the target data stream can be accurately obtained in real time in the data transmission process.
According to another embodiment of the present invention, the data stream delay statistic module 140 obtains the delay statistic data according to the delay data, and is specifically configured to: taking the time difference between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the minimum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the minimum delay; and if the current time difference is smaller than the minimum delay, assigning the current time difference to the minimum delay.
That is, during data transmission, the minimum delay statistical formula of the target data stream is Δ T min ＝max(T egr -T igr ) When the target data stream first appears, it is sent with a timestamp T egr And receiving a time stamp T igr Time difference value T between egr -T igr As a minimum delay deltat min At the initial value of (2) as the target data stream S id The index is stored in a statistical table. When the data stream delay statistic module 140 receives the target data stream again, the timestamp T is sent egr And receiving a time stamp T igr Time difference value T between egr -T igr Comparing with the previous minimum delay time if the current time difference T egr -T igr Less than the previous minimum delay DeltaT min Then use this time T egr -T igr Minimum delay Δ T before value replacement min Value, and so on. Therefore, the minimum delay of the target data stream can be accurately obtained in real time in the data transmission process.
In one embodiment of the present invention, during data transmission, the statistical formula of the average delay of the target data stream is Δ T avg ＝avg(T egr -T igr ) When the target data stream first appears, it is sent with a timestamp T egr And receiving a time stamp T igr Time difference value T between egr -T igr As the mean time delay DeltaT avg At the initial value of (2) as the target data stream S id The index is stored in a statistical table. When the data stream delay statistic module 140 receives the target data stream the nth time, the transmission timestamp T of the target data stream at this time is used egr And receiving a time stamp T igr Difference value T between egr -T igr Substitution into the formula: (Delta T) avg ) n ＝[(ΔT avg ) n-1 ×(n-1)+(T egr -T igr )]N, wherein (Δ T) avg ) n And n is equal to or more than 2 and is the average delay of the nth target data stream.
In one embodiment of the present invention, during data transmission, the statistical formula of the delay variance of the target data stream is Δ T var ＝var(T egr -T igr ) When the target data stream first appears, it is sent with a timestamp T egr And receiving a time stamp T igr Time difference value T between egr -T igr As the delay variance Δ T var At the initial value of (2) as the target data stream S id The index is stored in a statistical table. When the data stream delay statistic module 140 receives the target data stream for the nth time, the transmission time stamp T of the target data stream at the moment is sent egr And receiving a time stamp T igr Difference value T between egr -T igr Substitution into the formula: (Delta T) var ) n ＝{[(T egr -T igr )-(ΔT avg ) n-1 ] 2 +(ΔT var ) n-1 X (n-1) } ÷ n, wherein (Δ T) var ) n The delay variance of the nth target data stream is n ≧ 2.
Note that the minimum delay Δ T described above min Maximum time delay delta T max Average delay time Δ T avg The occurrence statistics number n of the target data stream and the delay variance delta T var Storing and data iteration are carried out in a mode including but not limited to a hardware table, a register and the like, and the index is used as a target data stream S id 。
According to an embodiment of the present invention, as shown in fig. 3, the data stream processing module 120 may include: a network processing sub-module 121, a data flow classification sub-module 122 and a store-and-forward sub-module 123. The network processing sub-module 121 is configured to perform standard network processing on the data stream. The data stream classification sub-module 122 is configured to classify the data streams according to preset rules, where the data streams include input data streams and output data streams. And the store-and-forward sub-module 123 is configured to store and forward the data stream.
Further, the store-and-forward sub-module 123 is further configured to: and storing the delay statistical data of the target data stream, and forwarding the delay statistical data to a management system.
Specifically, after the data stream enters the visualization chip 100, the data stream processing module 120 processes the data stream. The network processing sub-module 121 performs standard network processing on the data stream entering the chip, including but not limited to L2 Switching (two-layer Switching), L3 routing (three-layer routing), MPLS (Multi-Protocol Label Switching) Label processing, and the like.
The data stream classification sub-module 122 classifies the input data stream and the output data stream, respectively. The data stream classification submodule 122 classifies the input data stream specifically as follows: using ACL (Access Control Lists) to mark target data stream, making message editing for target data stream in input data stream and making receiving time stamp T of target data stream igr Inserting into the data stream, or time-stamping T the receipt of the target data stream igr And into the store-and-forward sub-module 123. The data stream classification sub-module 122 classifies the output data streams as follows: classifying the data flow in the output direction, marking the target data flow by using ACL, and marking the target data flow as S id 。
The store-and-forward sub-module 123 caches all data streams in the visualization chip 100, checks whether the data streams are correct, discards the data streams if errors occur in the data streams, otherwise, takes out the destination addresses of the data streams, obtains the output ports by looking up the MAC address table, and forwards the data streams.
Further, the store-and-forward sub-module 123 may further store the delay statistical data of the target data stream acquired by the data stream delay statistical module 140, and forward the delay statistical data of the target data stream to the management system.
In summary, according to the visual chip for the communication network delay test of the embodiment of the present invention, when receiving a data stream, the receiving timestamp latching module latches a receiving timestamp of the data stream, and the data stream processing module processes the data stream; the sending time stamp extracting module extracts the sending time stamp of the data stream when the data stream is sent by the switch; the data stream delay statistical module obtains the target data stream, calculates delay data according to the receiving time stamp and the sending time stamp of the target data stream, and obtains the delay statistical data according to the delay data, so that the management system can directly display the delay statistical data of the target data stream. Therefore, the chip is integrated on the switch, statistics of data flow delay data in a network can be directly completed in the switch, the delay statistical data are sent to the management system to realize visual display of the data flow delay statistical data, delay monitoring of the data flow in the network can be completed without using special equipment, the real running state of the network can be reflected, and implementation cost is saved.
Corresponding to the above embodiment, the invention also provides a switch.
Fig. 4 is a block schematic diagram of a switch according to an embodiment of the invention.
As shown in fig. 4, a switch 200 according to an embodiment of the present invention includes the above visualization chip 100 for latency testing of a communication network.
According to the switch provided by the embodiment of the invention, through the visual chip for the communication network delay test, the statistics of the data stream delay data in the network can be directly completed in the switch, and the delay statistical data is sent to the management system to realize the visual display of the data stream delay statistical data, so that the delay monitoring of the data stream in the network can be completed without using special equipment, the real running state of the network can be reflected, and the implementation cost is saved.
Corresponding to the embodiment, the invention further provides a visualization method for the communication network delay test.
Fig. 5 is a flowchart of a visualization method for a latency test of a communication network according to an embodiment of the present invention.
As shown in fig. 5, the visualization method for testing the communication network delay according to the embodiment of the present invention is applied to the visualization chip, and the method may include the following steps:
s101, when receiving a data stream, latches a reception timestamp of the data stream.
And S102, processing the data stream.
S103, when the data stream is sent by the switch, the sending time stamp of the data stream is extracted.
And S104, acquiring the target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring delay statistical data according to the delay data so that the management system can directly display the delay statistical data of the target data stream.
According to an embodiment of the invention, the delay statistics comprise at least one of a minimum delay, a maximum delay, an average delay, a statistical number, a delay variance of the target data stream.
According to an embodiment of the present invention, the data stream delay statistic module obtains the delay statistic data according to the delay data, and is specifically configured to: taking the time difference between a sending time stamp and a receiving time stamp when the target data stream appears for the first time as the maximum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the maximum delay; and if the current time difference is larger than the maximum delay, assigning the current time difference to the maximum delay.
According to another embodiment of the present invention, obtaining delay statistics from the delay data comprises: taking the time difference between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the minimum delay; when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the minimum delay; and if the current time difference is smaller than the minimum delay, assigning the current time difference to the minimum delay.
According to one embodiment of the invention, processing a data stream includes: carrying out standard network processing on the data stream; classifying data streams according to a preset rule, wherein the data streams comprise input data streams and output data streams; and storing and forwarding the data stream.
According to one embodiment of the invention, storing and forwarding data streams comprises: and storing the delay statistical data of the target data stream, and forwarding the delay statistical data to a management system.
It should be noted that details that are not disclosed in the visualization method for the communication network delay test according to the embodiment of the present invention are referred to details that are disclosed in the visualization chip for the communication network delay test according to the embodiment of the present invention, and details are not described herein again.
According to the visualization method for the communication network delay test, provided by the embodiment of the invention, when a data stream is received, a receiving timestamp of the data stream is latched and processed, and when a data stream is sent by a switch, a sending timestamp of the data stream is extracted; and acquiring the target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring delay statistical data according to the delay data so that the management system can directly display the delay statistical data of the target data stream. Therefore, the method is applied to a visual chip integrated on a switch, can directly complete the statistics of the data flow delay data in the network in the switch, and sends the delay statistical data to a management system to realize the visual display of the data flow delay statistical data, can complete the delay monitoring of the data flow in the network without using special equipment, can reflect the real running state of the network, and saves the implementation cost.
The invention further provides a computer readable storage medium corresponding to the above embodiment.
The computer readable storage medium of the embodiment of the present invention stores thereon a visualization program for a communication network delay test, which when executed by a processor implements the visualization method for a communication network delay test described above.
According to the computer readable storage medium of the embodiment of the invention, by executing the visualization method for the communication network delay test, the delay monitoring of the data flow in the network can be completed without using special equipment, the real running state of the network can be reflected, and the implementation cost is saved.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be interconnected within two elements or in a relationship where two elements interact with each other unless otherwise specifically limited. The specific meanings of the above terms in the present invention can be understood according to specific situations by those of ordinary skill in the art.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (14)
1. A visual chip for communication network delay test, characterized in that, visual chip integration sets up on the switch, visual chip includes:
the receiving timestamp latching module is used for latching the receiving timestamp of the data stream when the data stream is received;
the data stream processing module is used for processing the data stream;
a sending timestamp extraction module, configured to extract a sending timestamp of the data stream when the switch sends the data stream;
and the data stream delay statistical module is used for acquiring a target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring delay statistical data according to the delay data so as to enable a management system to directly display the delay statistical data of the target data stream.
2. The visualization chip for latency testing of communication networks according to claim 1, wherein the latency statistic data comprises at least one of a minimum latency, a maximum latency, an average latency, a statistical number, and a latency variance of the target data stream.
3. The visualization chip for the communication network delay test according to claim 2, wherein the data flow delay statistical module obtains delay statistical data according to the delay data, and is specifically configured to:
taking the time difference value between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the maximum delay;
when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the maximum delay;
and if the current time difference is larger than the maximum delay, assigning the current time difference to the maximum delay.
4. The visualization chip for the communication network delay test according to claim 2, wherein the data flow delay statistical module obtains delay statistical data according to the delay data, and is specifically configured to:
taking a time difference value between a sending time stamp and a receiving time stamp when the target data stream appears for the first time as minimum delay;
when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the minimum delay;
and if the current time difference value is smaller than the minimum delay, assigning the current time difference value to the minimum delay.
5. The visualization chip for the latency test of the communication network according to claim 1, wherein the data stream processing module comprises:
the network processing submodule is used for carrying out standard network processing on the data stream;
the data flow classification submodule is used for classifying the data flow according to a preset rule, wherein the data flow comprises an input data flow and an output data flow;
and the storage and forwarding sub-module is used for storing and forwarding the data stream.
6. The visualization chip for the latency test of the communication network according to claim 5, wherein the store-and-forward sub-module is further configured to: and storing the delay statistical data of the target data stream, and forwarding the delay statistical data to the management system.
7. A switch, characterized in that it comprises a visualization chip for latency testing of a communication network according to any one of claims 1 to 6.
8. A visualization method for a delay test of a communication network, wherein the visualization method is applied to the visualization chip of any one of claims 1 to 6, and the method comprises the following steps:
when a data stream is received, latching a receiving timestamp of the data stream;
processing the data stream;
when the data stream is sent by the switch, extracting the sending time stamp of the data stream;
and acquiring a target data stream, calculating delay data according to the receiving time stamp and the sending time stamp of the target data stream, and acquiring delay statistical data according to the delay data so that a management system can directly display the delay statistical data of the target data stream.
9. A visualization method as recited in claim 8, wherein the latency statistics comprise at least one of a minimum latency, a maximum latency, an average latency, a number of statistics, and a latency variance of the target data stream.
10. The visualization method for the communication network delay test according to claim 9, wherein the data flow delay statistical module obtains delay statistical data according to the delay data, and is specifically configured to:
taking the time difference value between the sending time stamp and the receiving time stamp when the target data stream appears for the first time as the maximum delay;
when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the maximum delay;
and if the current time difference is larger than the maximum delay, assigning the current time difference to the maximum delay.
11. The method of claim 9, wherein obtaining latency statistics based on the latency data comprises:
taking a time difference value between a sending time stamp and a receiving time stamp when the target data stream appears for the first time as minimum delay;
when the target data stream is received again, comparing the time difference value between the sending time stamp and the receiving time stamp of the current target data stream with the minimum delay;
and if the current time difference value is smaller than the minimum delay, assigning the current time difference value to the minimum delay.
12. The method for visualizing a latency test in a communication network of claim 8, wherein processing the data stream comprises:
performing standard network processing on the data stream;
classifying the data stream according to a preset rule, wherein the data stream comprises an input data stream and an output data stream;
and storing and forwarding the data stream.
13. The method for visualizing a latency test in a communication network of claim 12, wherein storing and forwarding the data stream comprises:
and storing the delay statistical data of the target data stream, and forwarding the delay statistical data to the management system.
14. A computer-readable storage medium, on which a visualization program for a communication network latency test is stored, which when executed by a processor implements the visualization method for a communication network latency test according to any one of claims 8 to 13.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211018430.7A CN115396333B (en) | 2022-08-24 | 2022-08-24 | Visual chip, method and switch for communication network delay test |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202211018430.7A CN115396333B (en) | 2022-08-24 | 2022-08-24 | Visual chip, method and switch for communication network delay test |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN115396333A true CN115396333A (en) | 2022-11-25 |
| CN115396333B CN115396333B (en) | 2024-01-16 |
Family
ID=84120249
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202211018430.7A Active CN115396333B (en) | 2022-08-24 | 2022-08-24 | Visual chip, method and switch for communication network delay test |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN115396333B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117150994A (en) * | 2023-10-30 | 2023-12-01 | 北京云枢创新软件技术有限公司 | Analysis method of signal assignment delay, electronic equipment and storage medium |
Citations (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101114947A (en) * | 2006-07-27 | 2008-01-30 | 华为技术有限公司 | Method for measuring performance of cooperative communication system |
| CN101938414A (en) * | 2010-08-27 | 2011-01-05 | 北京星网锐捷网络技术有限公司 | Method and device for transmitting messages |
| CN103607267A (en) * | 2013-07-23 | 2014-02-26 | 王健 | End-to-end transmission delay carrying measurement method of data network message |
| CN103777104A (en) * | 2014-02-24 | 2014-05-07 | 国家电网公司 | Time-delay characteristic testing device and method of digital substation secondary signal transmission system |
| CN103826117A (en) * | 2014-01-17 | 2014-05-28 | 浙江大学 | Method of measuring end-to-end delay of mobile phone video communication application |
| US9094307B1 (en) * | 2012-09-18 | 2015-07-28 | Cisco Technology, Inc. | Measuring latency within a networking device |
| WO2017042689A1 (en) * | 2015-09-11 | 2017-03-16 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and system for delay measurement of a traffic flow in a software-defined networking (sdn) system |
| CN108259106A (en) * | 2016-12-29 | 2018-07-06 | 深圳市中兴微电子技术有限公司 | A kind of time stamp treating method and apparatus in Ethernet passive optical network |
| CN108616420A (en) * | 2018-04-11 | 2018-10-02 | 武汉大学 | Method based on network equipment cache information transmission delay sequential extraction procedures average delay |
| CN108833215A (en) * | 2018-09-13 | 2018-11-16 | 北京东土科技股份有限公司 | Calculate method, the network equipment and the computer storage medium of aggregation network delay |
| CN111327478A (en) * | 2020-02-28 | 2020-06-23 | 北京天维信通科技有限公司 | Network measurement method and device, equipment and storage medium |
| WO2021057756A1 (en) * | 2019-09-27 | 2021-04-01 | 深圳市中兴微电子技术有限公司 | Delay measurement method, system and storage medium |
| WO2021063303A1 (en) * | 2019-09-30 | 2021-04-08 | 深圳市中兴微电子技术有限公司 | Method and apparatus for acquiring timestamp of data stream, storage medium, and electronic device |
| CN112702231A (en) * | 2020-12-21 | 2021-04-23 | 交控科技股份有限公司 | Network delay measuring method and system |
| CN112954311A (en) * | 2021-02-08 | 2021-06-11 | 福建天晴数码有限公司 | Performance test method and system for live broadcast streaming media |
| WO2022100411A1 (en) * | 2020-11-12 | 2022-05-19 | 鹏城实验室 | Method for measuring forwarding time characteristics of tsn, and terminal |
| CN114553667A (en) * | 2022-01-19 | 2022-05-27 | 北京智芯微电子科技有限公司 | Communication method and system based on classified time slices |
-
2022
- 2022-08-24 CN CN202211018430.7A patent/CN115396333B/en active Active
Patent Citations (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101114947A (en) * | 2006-07-27 | 2008-01-30 | 华为技术有限公司 | Method for measuring performance of cooperative communication system |
| CN101938414A (en) * | 2010-08-27 | 2011-01-05 | 北京星网锐捷网络技术有限公司 | Method and device for transmitting messages |
| US9094307B1 (en) * | 2012-09-18 | 2015-07-28 | Cisco Technology, Inc. | Measuring latency within a networking device |
| CN103607267A (en) * | 2013-07-23 | 2014-02-26 | 王健 | End-to-end transmission delay carrying measurement method of data network message |
| CN103826117A (en) * | 2014-01-17 | 2014-05-28 | 浙江大学 | Method of measuring end-to-end delay of mobile phone video communication application |
| CN103777104A (en) * | 2014-02-24 | 2014-05-07 | 国家电网公司 | Time-delay characteristic testing device and method of digital substation secondary signal transmission system |
| WO2017042689A1 (en) * | 2015-09-11 | 2017-03-16 | Telefonaktiebolaget Lm Ericsson (Publ) | Method and system for delay measurement of a traffic flow in a software-defined networking (sdn) system |
| CN108259106A (en) * | 2016-12-29 | 2018-07-06 | 深圳市中兴微电子技术有限公司 | A kind of time stamp treating method and apparatus in Ethernet passive optical network |
| CN108616420A (en) * | 2018-04-11 | 2018-10-02 | 武汉大学 | Method based on network equipment cache information transmission delay sequential extraction procedures average delay |
| CN108833215A (en) * | 2018-09-13 | 2018-11-16 | 北京东土科技股份有限公司 | Calculate method, the network equipment and the computer storage medium of aggregation network delay |
| WO2021057756A1 (en) * | 2019-09-27 | 2021-04-01 | 深圳市中兴微电子技术有限公司 | Delay measurement method, system and storage medium |
| WO2021063303A1 (en) * | 2019-09-30 | 2021-04-08 | 深圳市中兴微电子技术有限公司 | Method and apparatus for acquiring timestamp of data stream, storage medium, and electronic device |
| CN111327478A (en) * | 2020-02-28 | 2020-06-23 | 北京天维信通科技有限公司 | Network measurement method and device, equipment and storage medium |
| WO2022100411A1 (en) * | 2020-11-12 | 2022-05-19 | 鹏城实验室 | Method for measuring forwarding time characteristics of tsn, and terminal |
| CN112702231A (en) * | 2020-12-21 | 2021-04-23 | 交控科技股份有限公司 | Network delay measuring method and system |
| CN112954311A (en) * | 2021-02-08 | 2021-06-11 | 福建天晴数码有限公司 | Performance test method and system for live broadcast streaming media |
| CN114553667A (en) * | 2022-01-19 | 2022-05-27 | 北京智芯微电子科技有限公司 | Communication method and system based on classified time slices |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117150994A (en) * | 2023-10-30 | 2023-12-01 | 北京云枢创新软件技术有限公司 | Analysis method of signal assignment delay, electronic equipment and storage medium |
| CN117150994B (en) * | 2023-10-30 | 2024-01-23 | 北京云枢创新软件技术有限公司 | Analysis method of signal assignment delay, electronic equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN115396333B (en) | 2024-01-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101911579B1 (en) | Controller driven oam for openflow | |
| US10129115B2 (en) | Method and system for network monitoring using signature packets | |
| US20080232269A1 (en) | Data collection system and method for ip networks | |
| US8830841B1 (en) | Operations, administration, and maintenance (OAM) processing engine | |
| US12021741B2 (en) | Packet measurement method, device, and system | |
| CN108429625B (en) | Method and device for realizing fault diagnosis | |
| CN115695248A (en) | Method and device for processing multicast message | |
| EP2506506A1 (en) | Method, apparatus and system for controlling network traffic switch | |
| CN115396333B (en) | Visual chip, method and switch for communication network delay test | |
| WO2020088683A1 (en) | Method for processing routing event record entry, network device and control device | |
| CN101668025A (en) | Method and device for discovering link layer network topology | |
| US20220150135A1 (en) | Information processing apparatus, information processing method, and program | |
| US20040215781A1 (en) | Techniques for determining device connectivity in a network using protocol-specific connectivity information | |
| CN115277510A (en) | Method for automatically identifying equipment, equipment interface and equipment path in network session | |
| US8614958B2 (en) | Systems and methods of snooping connectivity fault messages to configure maintenance end point for alarm suppression messages | |
| CN114095383B (en) | Network flow sampling method and system and electronic equipment | |
| CN116260726A (en) | Topology discovery method, device, terminal and storage medium | |
| CN116248479A (en) | Network path detection method, device, equipment and storage medium | |
| CN115348273A (en) | Service message processing method, device and storage medium | |
| CN117201397A (en) | Intelligent gateway | |
| CN110932975B (en) | Flow table issuing method, data forwarding method and device and electronic equipment | |
| US20120307833A1 (en) | Domain gateway control system and method thereof | |
| CN111355927A (en) | Monitoring equipment determining method, device, equipment and storage medium based on video network | |
| WO2024119935A1 (en) | Data collection methods, and electronic device and computer-readable storage medium | |
| CN114070828B (en) | Program stream fault detection method and device, computer equipment and readable storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |