CN115391031A

CN115391031A - Load balancing scheduling method and computing equipment

Info

Publication number: CN115391031A
Application number: CN202210952461.3A
Authority: CN
Inventors: 王利民
Original assignee: XFusion Digital Technologies Co Ltd
Current assignee: XFusion Digital Technologies Co Ltd
Priority date: 2022-08-09
Filing date: 2022-08-09
Publication date: 2022-11-25

Abstract

The application discloses a load balancing scheduling method and computing equipment, relates to the technical field of computing, and realizes energy conservation of the computing equipment by controlling the power consumption of a processor core when a processor is in a low-load state. In the method, a processor responds to a preset condition for calling a load balancing scheduling algorithm to obtain a current load; wherein the processor comprises a plurality of processor cores; the plurality of processor cores are respectively provided with a respective task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that the task queue of the processor core has the task to be executed; the idle state indicates that the tasks to be executed in the task queue of the processor core are processed; the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to a preset condition; so that the processor core in the idle state is kept in the idle state; the preset conditions correspond to load balancing scheduling algorithms one to one.

Description

Load balancing scheduling method and computing equipment

Technical Field

The present application relates to the field of computing technologies, and in particular, to a load balancing scheduling method and a computing device.

Background

In the era of rapid development of cloud computing technology, the power consumption problem of a data center becomes an important consideration in the operation cost of the data center. The data center comprises a plurality of servers, the average core utilization rate of a Central Processing Unit (CPU) of each server is about 30%, and the data indicate that the CPU core in the server generally works with low load.

When the CPU is in a low load state, the CPU is generally a background task, an accidental task (such as a background polling task) and the like. At this time, the current CPU follows the load balancing logic when performing task scheduling, and when there is an occasional task, the CPU uniformly distributes the task on each CPU core as much as possible, which results in that the traditional load balancing task distribution method cannot deeply save energy for the server.

Disclosure of Invention

The application provides a load balancing scheduling method and computing equipment, and when a processor is in a low-load state, energy conservation of the computing equipment is achieved by controlling power consumption of a processor core.

In order to achieve the technical purpose, the following technical scheme is adopted in the application:

in a first aspect, the present application provides a load balancing scheduling method, in which a processor obtains a current load amount in response to a preset condition for invoking a load balancing scheduling algorithm; wherein the processor comprises a plurality of processor cores; the plurality of processor cores are respectively provided with a respective task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that the task queue of the processor core has the task to be executed; the idle state indicates that the task to be executed in the task queue of the processor core is processed; the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to a preset condition; so that the processor core in the idle state is kept in the idle state; the preset conditions correspond to load balancing scheduling algorithms one to one.

It can be understood that, when the load balancing scheduling algorithm is invoked, if the current load capacity of the processor is less than or equal to the preset value, and if the current load capacity of the processor is less than or equal to the preset value, the load balancing scheduling algorithm corresponding to the preset condition is executed based on the limited condition for invoking the load balancing scheduling algorithm, so that the core in the idle state is kept in the idle state. Subsequently, after the core is kept in the idle state for the second preset time, the processor can close the clock and the power supply to the core, so that the power consumption of the core is further controlled, and the energy is saved for the computing equipment deeply.

In a possible implementation manner, the preset condition for invoking the load balancing scheduling algorithm includes: newly adding a task; the newly added task comprises a new task or a blocked task which is awakened; or the last task to be executed in the task queue of any processor core is executed; or at preset intervals.

It can be understood that when any one of the three preset conditions occurs, the processor is triggered to invoke the load balancing scheduling algorithm, so that the processor enters the task scheduling process.

In another possible implementation manner, when the preset condition is a newly added task, the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to the preset condition, including: and determining that the current load is less than or equal to a preset value, and carrying out load balancing between the processor cores in the busy state by the processor.

It can be understood that, when a new task in the operating system triggers the load balancing scheduling algorithm, the method provided by the embodiment of the present application performs load balancing only in the cores in the busy state, so that the tasks can be uniformly concentrated in the cores in the busy state, and the cores in the idle state are kept in the idle state, thereby saving power consumption.

In another possible implementation manner, the load balancing between the processor cores in the busy state by the processor includes: the processor schedules the newly added task to the task queue of the processor core in the busy state.

It is understood that the processor uniformly allocates the newly added tasks to at least one of the cores in the busy state, so that the cores in the idle state are kept in the idle state, thereby saving power consumption.

In another possible implementation manner, when the preset condition is that the last task to be executed in the task queue of any processor core is completely executed, the processor determines that the current load is less than or equal to the preset value, and executes the load balancing scheduling algorithm corresponding to the preset condition, including: and determining that the current load is less than or equal to a preset value, and not executing load balancing scheduling by the processor.

It can be understood that, at this time, the processor is in a low-load state, and the load amount of the core in the busy state is relatively low, and when the last task to be executed in the task queue of any core is completely executed, the processor does not schedule the task in the core in the busy state to the core in the idle state, so that the core in the task queue, on which the last task to be executed is completely executed, can enter the idle state, thereby saving power consumption for the computing device.

In another possible implementation manner, when the preset condition is a preset time interval, the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to the preset condition, including: and when the current load is determined to be less than or equal to the preset value, the processor performs load balancing among the processor cores in the busy state.

It can be understood that, since the processor is in the low load state at this time, the load amount of the core in the busy state is relatively low, the processor may not need to wake the core in the idle state to share the tasks in the core in the busy state together, as long as the load balance of the core in the busy state is maintained. At this point, the cores in the idle state may continue to remain in the idle state, thereby saving power consumption for the computing device.

In another possible implementation manner, if the current load is greater than a preset value, load balancing is performed among all processor cores of the processor.

It can be understood that, if the current load is greater than the preset value, it indicates that the processor is in a high load state at this time, and at this time, the processor performs load balancing scheduling on all the processor cores when allocating tasks, so as to ensure that the load of each processor core is kept balanced, and the problem that some cores affect the processing speed and other performances due to excessive load does not occur.

In another possible implementation manner, obtaining the current load amount includes: and calculating the weighted average load quantity of the plurality of processor cores in the first preset time.

It can be understood that the load condition of the processor has a plurality of conditions such as a time period load and a real-time load, and in order to accurately judge the load condition of the processor, the weighted average load capacity of the plurality of processor cores in the first predetermined time is selected to judge whether the processor is in a high load state or a low load state. According to the method, the weighted average load of the processors in the first preset time is used for judging, so that the current load result obtained by the processors is more accurate, and the result cannot be influenced by instantaneous high load or low load.

In another possible implementation manner, the method further includes: and after the processor core is kept in the idle state for the second preset time, the processor turns off the power supply and/or the clock of the processor core.

It can be understood that after the processor core is kept in the idle state for the second predetermined time, the processor turns off the power supply and/or the clock of the processor core, and the power consumption of the core can be further controlled, so that the deep energy conservation of the computing device is realized.

In a second aspect, the present application provides a computing device. The computing device includes various modules that apply to the method of the first aspect or any one of the possible designs of the first aspect.

In a third aspect, the present application provides a computing device comprising a memory and a processor. A memory coupled to the processor; the memory is used to store computer program code, which includes computer instructions. The computer instructions, when executed by a processor, cause the computing device to perform a method of load balancing scheduling as in the first aspect and any possible implementation thereof.

In a fourth aspect, the present application provides a computing device comprising a processor, wherein the processor executes the load balancing scheduling method according to the first aspect and any possible implementation manner thereof.

Illustratively, the computing device may be, for example, a server, a tablet, a desktop, a laptop, a notebook, a netbook, and the like.

In a fifth aspect, the present application provides a computer-readable storage medium comprising computer instructions. Wherein the computer instructions, when executed on the computing device, cause the computing device to perform the load balancing scheduling method of the first aspect and any possible implementation thereof.

In a sixth aspect, the present application provides a computer program product comprising computer instructions. Wherein the computer instructions, when executed on a computing device, cause the computing device to perform a load balancing scheduling method as described in the first aspect and any one of its possible implementations.

Reference may be made in detail to the second to sixth aspects and various implementations of the first aspect in this application; in addition, for the beneficial effects of the second aspect to the sixth aspect and the various implementation manners thereof, reference may be made to beneficial effect analysis in the first aspect and the various implementation manners thereof, which is not described herein again.

These and other aspects of the present application will be more readily apparent from the following description.

Drawings

Fig. 1 is a schematic diagram of two load balancing scenarios in a conventional method according to an embodiment of the present application;

fig. 2 is a schematic diagram of two load balancing scheduling results in a conventional method according to an embodiment of the present application;

fig. 3 is a schematic diagram of a load balancing scheduling result according to an embodiment of the present application;

fig. 4 is a schematic diagram of an implementation environment related to a load balancing scheduling method according to an embodiment of the present application;

FIG. 5 is a block diagram of a computing device provided by an embodiment of the present application;

fig. 6 is a flowchart of a load balancing scheduling method according to an embodiment of the present application;

fig. 7 is a flowchart of another load balancing scheduling method according to an embodiment of the present application;

fig. 8 is a flowchart of another load balancing scheduling method according to an embodiment of the present application;

fig. 9 is a flowchart of another load balancing scheduling method according to an embodiment of the present application;

fig. 10 is a block diagram of a processor according to an embodiment of the present disclosure.

Detailed Description

For convenience of understanding, related terms referred to in the embodiments of the present application will be briefly described below:

(1) Load balancing: the processor adjusts the distribution of tasks in different processor cores by running a load balancing program, and aims to distribute the tasks to different processor cores as much as possible, so that the load on each processor core is relatively balanced as much as possible.

(2) Busy state, idle state, low power state, deep low power state:

the state of a processor core may be divided into a busy state and an idle state based on whether there is a task to be executed in the task queue of the core.

When there is a task to be executed in the task queue of the processor core, the state of the core is a busy state, and at this time, the core may be referred to as a core in the busy state or a processor core in the busy state.

When there is no task to be executed in the task queue of the processor core, the state of the core is an idle state, and at this time, the core may be referred to as a core in an idle state or a processor core in an idle state.

When the processor core is in an idle state, the processor may power the core at a low voltage/low frequency, at which time the core is in a low power consumption state. Here, the low voltage/low frequency is relative to the supply voltage/supply frequency when the core is in a busy state.

After the processor core is in the idle state for a period of time, the processor may turn off the clock and power to the core, which is now in a deep power down state.

(3) The terms "first", "second" and "third", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first," "second," or "third," etc., may explicitly or implicitly include one or more of that feature.

In the conventional technology, when the processor is in a low load state, the processor distributes tasks to a plurality of cores as uniformly as possible, thereby realizing load balancing. However, in this way, multiple cores cannot enter an idle state, resulting in an inability to deeply save power for the computing device.

In one example, as shown in fig. 1, fig. 1 is a schematic diagram illustrating two load balancing scenarios in a conventional method. In fig. 1, cores may be divided into a busy state core (e.g., busy CPU core) and an idle state core (e.g., idle CPU core) based on the load conditions of multiple cores.

The unit in the processor that executes the load balancing scheduling algorithm may be referred to as a scheduler. The load balancing scheduler for load balancing the cores in the busy state is a busy state load balancing scheduler and comprises a periodic balance. The load balancing scheduler works among the cores in the busy state, periodically detects the load condition of the cores in the busy state, and performs task scheduling among the cores in the busy state when the load of the cores in the busy state is unbalanced, so that the load among the cores in the busy state is balanced.

The load balancing scheduler for performing load balancing on the idle-state core is an idle-state load balancing scheduler and comprises a nohz idle balancer and a new idle balancer.

And the nohz idle balance scheduler is used for carrying out load balancing scheduling on the cores in the idle state under the driving of the cores in the busy state. nohz is an operation mode of Linux, and comprises on and off. When nohz is set to be on, other cores already enter an idle state, and too many tasks on the cores in the busy state exceed a task threshold, the cores in the busy state drive an interrupt controller (GIC) through a clock interrupt scheduled softirq, and an Internal Processor Interrupt (IPI) is sent to the cores in the idle state by the GIC, so that the cores in the idle state are awakened, and the nohz idle balancers are triggered. When the task of the core in the busy state exceeds a certain threshold value, the interrupt requests the core in the idle state to share the task, and after the nohz idle balancer is triggered, the task which can be partially migrated on the core in the busy state is migrated to the core in the idle state. When nohz = off, a timer interrupt is set on the core, and the execution flow of the core is periodically interrupted.

The new idle balance is used for checking whether other cores in busy states need to share tasks or not when tasks to be executed in any core task queue are all executed, if so, migrating part of tasks which can be migrated on the cores in busy states to the cores in idle states, and if not, enabling the cores in the task queue to be executed to enter idle states.

In one example, as shown in fig. 2, a diagram in fig. 2 is a schematic diagram of loads of cores in busy states and idle states, a diagram B in fig. 2 is a schematic diagram of loads of the cores in busy states in a diagram after being scheduled by a busy state load balancing scheduler, and a diagram C in fig. 2 is a schematic diagram of loads of the cores in busy states and the cores in idle states in a diagram after being scheduled by an idle state load balancing scheduler. As can be seen in the B diagram, the busy state load balancing scheduler only performs load balancing between busy state cores. As can be seen from the diagram C, the idle state load balancing scheduler shares the load in the busy state core to the idle state core, so that the cores maintain load balancing.

Based on this, the application provides a load balancing scheduling method, when a load balancing scheduling algorithm is called, if the current load capacity of a processor is less than or equal to a preset value, the load balancing scheduling algorithm corresponding to the preset condition is executed based on the limited condition for calling the load balancing scheduling algorithm, so that the idle-state core is kept in an idle state. The method enables the processor to supply power to the idle-state core at a low voltage/low frequency to control the power consumption of the core and save energy for the computing device. Subsequently, after the core is kept in the idle state for the second preset time, the processor can turn off the clock and the power supply to the core, so as to further control the power consumption of the core and save energy for the computing device deeply.

In an example, when the load of a processor is lower than 25%, the processor is in a low load state, and task scheduling is performed on a plurality of processor cores in a computing device by using the load balancing scheduling method provided in an embodiment of the present application, as shown in fig. 3, a diagram a in fig. 3 is a schematic diagram of a situation of load of a plurality of cores included in the computing device, where each core shown in the diagram a is uniformly distributed with some tasks, and an average load of each core is lower than 25%. As shown in a diagram B in fig. 3, the diagram B is a load condition of each core after each core in the diagram a is scheduled by the load balancing scheduling method provided by the present application. As can be seen from the diagram B in fig. 3, after the load balancing scheduling method provided by the embodiment of the present application schedules the tasks of the multiple cores, the tasks are centrally distributed on the leftmost core in the diagram B.

Embodiments of the present application will be described in detail below with reference to the accompanying drawings.

Referring to fig. 4, it is shown an implementation environment schematic diagram related to a load balancing scheduling method provided in the embodiment of the present application, as shown in fig. 4, the implementation environment may include: front-end applications 110 and data center 120.

Data center 120 includes at least one computing device 130. Among other things, computing device 130 includes an operating system 140 and a processor 150, processor 150 including a plurality of cores 151.

Illustratively, the computing device 130 may be, for example, a server, a tablet, a desktop, a laptop, a notebook, a netbook, and the like.

The operating system 140 may be, for example, a Linux operating system.

The front-end application 110 interacts with the operating system 140, for example, the front-end application 110 issues tasks to the operating system 140.

The processor 150 is configured to allocate a task issued by the front-end application 110 to the operating system 140 to an appropriate core 151, and schedule the task in the task queue of the core 151, for example, allocate a task to be executed in the task queue of one core 151 to another core 151 for processing.

The core 151 is used for processing various tasks issued by the front-end application 110 under the scheduling of the processor 150. Core 151 may be a CPU core. The number of the computing devices 130, the processors 150, and the cores 151 is not limited in the embodiment of the present application, and the number of the computing devices 130, the processors 150, and the cores 151 in fig. 4 is only an example.

Optionally, please refer to fig. 5, where fig. 5 is a schematic structural diagram of another computing device 200 according to an embodiment of the present application. The computing device 200 includes a processor 201, memory 202, and a network interface 203.

Wherein the processor 201 comprises one or more CPUs. The CPU may be a single-core CPU or a multi-core CPU.

The memory 202 includes, but is not limited to, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, or an optical memory.

Optionally, the processor 201 reads the instruction stored in the memory 202 to implement the load balancing scheduling method provided in the embodiment of the present application, or the processor 201 implements the load balancing scheduling method provided in the embodiment of the present application through an instruction stored inside. In the case that the processor 201 implements the method in the foregoing embodiment by reading the instruction stored in the memory 202, the memory 202 stores an instruction for implementing the load balancing scheduling method provided in the embodiment of the present application.

The network interface 203 is a wired interface (port), such as a Fiber Distributed Data Interface (FDDI) interface or a Gigabit Ethernet (GE) interface. Alternatively, the network interface 203 is a wireless interface. It should be understood that the network interface 203 includes a plurality of physical ports, and the network interface 203 is used to access a network. Optionally, the computing device further comprises a bus 204, and the processor 201, the memory 202, and the network interface 203 are typically connected to each other through the bus 204, or in other manners.

The following describes a load balancing scheduling method provided in an embodiment of the present application:

please refer to fig. 6, which is a flowchart illustrating a load balancing scheduling method according to an embodiment of the present disclosure. The method is applied to a processor of a computing device. As shown in fig. 6, the method may include S101-S106.

S101: the processor is responsive to a preset condition for invoking the load balancing scheduling algorithm.

Wherein the processor comprises a plurality of processor cores; the plurality of processor cores are respectively provided with a respective task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that the task queue of the processor core has the task to be executed; the idle state indicates that the task to be executed in the task queue of the processor core is processed.

The processor, in response to the preset condition for invoking the load balancing scheduling algorithm, is embodied as: when the condition in the preset condition occurs in the computing equipment, the processor calls a load balancing scheduling algorithm corresponding to the preset condition one by one.

The embodiment of the present application does not limit the specific conditions of the preset conditions, and for example, any one of conditions 1 to 3 may be included:

and (1) adding a new task in the processor.

The task queue of a core contains tasks to be executed that the processor assigns to the core and tasks that the core is executing.

A blocking queue is also configured in the processor. The suspended task is not executed completely in the core of the packet processor in the blocking queue (i.e., the blocking task). And the suspended tasks which are not completely executed are removed from the core task queue and enter a blocking queue. When the blocking task needs to be executed continuously, the processor needs to remove the blocking task from the blocking queue and redistribute the blocking task to the core task queue.

The newly added task is a task which needs to be newly allocated to a plurality of cores in the processor besides tasks in a plurality of core task queues. For example, the newly added task includes a newly created task or a newly awakened blocking task.

The newly created task refers to a newly received task in the operating system, and does not exist in the task queue of the core or the task in the blocking queue. For example, the newly created task may be a task newly issued by the front-end application.

The newly awakened blocking task refers to a task which currently exists in the blocking queue and is ready to be redistributed to the core task queue.

In one example, when the operating system of the computing device is a Linux operating system, if a new task is added to the operating system, the processor needs to allocate a kernel for the new task. At this time, the processor executes the scheduled _ exec () flow, and allocates a core for the newly added task to run select _ task _ rq (), i.e. the newly added task is inserted into the task queue of the corresponding core.

And 2, completing the execution of the last task to be executed in the task queue of any processor core.

The task to be executed refers to a task waiting to be executed in the core task queue.

When the execution of the task in the task queue of any core is completed and the busy state is to be changed into the idle state, the core triggers the processor to call the load balancing scheduling algorithm.

In an example, when the operating system of the computing device is a Linux operating system, if a task queue of any core in a processor of the computing device is empty after a task to be executed is executed, the core changes from a busy state to an idle state, and at this time, the core triggers the processor to call idle _ balance (), where the function is used to attempt to pull a task from a task queue of another core in the busy state to be executed on the core in the idle state.

Condition 3, interval preset time.

The preset time period is a time period which is preset in the operating system, and the processor automatically calls a load balancing scheduling algorithm every other preset time period.

In one example, the operating system of the computing device is a Linux operating system, and the processor calls the tigger _ load _ balance () in the scheduler _ tick () at preset time intervals (e.g., one minute) to perform load balancing on the plurality of cores.

S102: the processor obtains a current load amount.

Optionally, the processor calculates a weighted average load amount of the plurality of processor cores within the first predetermined time.

For example, a preferred load calculation method of the Linux kernel may be a per-entity load tracking (pel) based scheduling entity, which counts a weighted average of historical load contributions of tasks in a task queue within a certain time window as a load amount of a plurality of processor cores.

The first predetermined time is a period of historical time, here based on a period of time prior to when the processor responded to invoking the load balancing scheduling algorithm, such as: 1024us.

In one example, the processor may perform sampling statistics on the total load capacity of the plurality of processor cores for a plurality of times within a first predetermined time, and perform weighted average on the load capacity of each sampling as the current load capacity of the processor. For example, the processor has 10 cores, and counts the total load of the 10 cores once per minute within 5 minutes, and if the total load of the 10 cores counted each time is 60%, 50%, 40%, 35%, and 25%, respectively, and weights of 0.1, 0.3, 0.5, 0.7, and 1.0 are respectively given to the loads obtained 5 times, then the weighted total load of the 10 cores within 5 minutes is:

(0.1 × 60% +0.3 × 50% +0.5 × 40% +0.7 × 35% +1.0 × 25%)/5= 18.1%, that is, in this case, the present supporting amount is 18.1%.

The weighted average load of the processor in the first preset time can avoid the influence of the instantaneous load on the judgment of the current load result of the processor core, and it can be understood that the value farther from the judgment time occupies lower weight.

S103: the processor determines whether the current load amount is less than or equal to a preset value.

If yes, executing S104; if not, go to S105.

The preset value is a preset critical value for determining whether the processor is under high load or low load. When the load is less than or equal to the preset value, the processor is considered to be in a low load state, and when the load is greater than the preset value, the processor is considered to be in a high load state.

S104: and the processor executes a load balancing scheduling algorithm corresponding to a preset condition so as to keep the processor core in an idle state in the idle state. The preset conditions correspond to load balancing scheduling algorithms one to one.

Specifically, when the preset condition includes a condition 1 to a condition 3 in S101, the condition 1 corresponds to the algorithm 1, the condition 2 corresponds to the algorithm 2, and the condition 3 corresponds to the algorithm 3.

Algorithm 1, the processor performs load balancing among the processor cores that are in a busy state.

Specifically, the method comprises the following steps: the processor schedules the newly added task to the task queue of the processor core in the busy state.

It can be understood that, at this time, since the processor is in a low-load state and the load amount of the core in the busy state is relatively low, when a new task is added in the operating system, the processor does not allocate the task to the core in the idle state, but allocates the new task to the core in the busy state in a balanced manner, so that the core in the idle state can continue to maintain the idle state, thereby saving power consumption for the computing device.

Algorithm 2, the processor does not perform load balancing scheduling.

The processor not performing load balancing scheduling is a specific implementation of the load balancing scheduling algorithm.

And 3, carrying out load balancing among the processor cores in the busy state by the processor.

In the load balancing algorithm corresponding to the condition 3, the processor performs load balancing among the processor cores in the busy state, namely when the core loads in the busy state are not balanced, the processor schedules the loads of the processor cores to balance the loads of the processor cores, and when the core loads in the busy state are balanced, the processor does not schedule the loads of the processor cores to keep the balanced states.

S105: the processor performs load balancing among all processor cores.

If the current load is larger than the preset value, the processor is in a high-load state at the moment, and at the moment, the processor performs load balancing scheduling on all the processor cores when distributing tasks, so that the load of each processor core is kept balanced, and the problem that the processing speed and other performances are influenced by overlarge load of some cores can be avoided.

S106: and after the processor core is kept in the idle state for the second preset time, the processor turns off the power supply and/or the clock of the processor core.

It can be understood that, after the processor core is kept in the idle state for the second predetermined time, the processor turns off the power supply and/or the clock of the processor core, which can further control the power consumption of the core and save energy deeply for the computing device.

According to the load balancing scheduling method, when a load balancing scheduling algorithm is called, if the load of a processor is smaller than or equal to a preset value, the load balancing scheduling algorithm corresponding to the preset condition is executed based on the limited condition for calling the load balancing scheduling algorithm, so that the idle-state core is kept in an idle state. The method enables the processor to supply power to the idle-state core at a low voltage/low frequency to control the power consumption of the core and save energy for the computing device. Subsequently, after the core is kept in the idle state for the second predetermined time, the processor may turn off the clock and the power supply to the core, so as to further control the core power consumption and save energy deeply for the computing device.

A method for load balancing scheduling provided above is described below with several specific embodiments.

Example 1:

fig. 7 is a flowchart of a load balancing scheduling method according to an embodiment of the present application. Wherein the method is applied to a processor of a computing device. The method shown in fig. 7 includes:

s201: when a new task is created or a blocking task is woken up in the Linux operating system, the processor executes a scheduled _ exec () procedure.

S202: the processor determines whether the current load amount is less than or equal to a preset value.

If yes, go to S203;

if not, executing S204.

S203: the processor selects at least one busy state core to run select task rq () for the newly created task or blocking task.

After S203 is executed, the present flow ends.

S204: the processor selects at least one idle state core (find _ idle _ CPU ()) for a new task or a blocked task to run select _ task _ rq ().

It is to be understood that, in S204, when there is an idle core in the processor, the idle core is preferentially selected to execute a new task or block a task, and when there is no idle core in the processor, a core with relatively few tasks is selected from the plurality of cores to execute a new task or block a task.

In the method, when the load of a processor is larger than a preset value, the processor selects a core without tasks or with relatively few tasks from a plurality of cores to execute a newly added task; when the computing device is in a low load state, one or more cores are selected from the busy cores to perform the newly added task. The method enables the task to be concentrated on part of cores when the processor is in low load, enables more cores to enter an idle state, controls the power consumption of the cores and realizes energy saving of the computing equipment.

Example 2:

fig. 8 is a flowchart of a load balancing scheduling method according to an embodiment of the present application. Wherein the method is applied to a processor of a computing device. The method shown in fig. 8 includes:

s301: when the last task to be executed in the task queue of any processor core is executed, the processor calls idle _ balance () to try to pull the task from the task queues of other cores in busy states, so that the task can be uniformly distributed on each core.

S302: the processor determines whether the current load amount is less than or equal to a preset value.

If yes, executing S303;

if not, go to step S304.

S303: the processor ignores idle _ balance (), and the last core to be executed in the task queue of the core enters an idle state.

After execution of S303, the present flow ends.

S304: the processor allocates tasks in the task queue of the busy-state core to the idle-state core.

In the method, when the current load of the processor is greater than a preset value, if the last task to be executed of any core is executed and is to enter an idle state, the processor calls a function to perform load balancing scheduling, and allocates appropriate tasks in a task queue of the core to be in the idle state and other cores in the idle state, so that the cores keep load balancing. When the current load of the processor is less than or equal to the preset value, if the last task to be executed of any core is finished and the core is to enter the idle state, the processor ignores the call function instruction, so that the core which finishes executing the task enters the idle state, and the core which is already in the idle state is continuously kept in the idle state, thereby controlling the power consumption of the core and realizing the energy saving of the computing device.

Fig. 9 is a flowchart of a load balancing scheduling method according to an embodiment of the present application. Wherein the method is applied to a processor of a computing device. The method shown in fig. 9 includes:

s401: when the processor periodically triggers the load balancing process, trigger _ load _ balance () is called in scheduler _ tick ().

S402: the processor determines whether the current load amount is less than or equal to a preset value.

If yes, executing S403;

if not, go to S404.

S403: the processor ignores the trigger _ load _ balance ().

After execution of S403, the present flow ends.

S404: the processor performs load balancing among all cores.

In the method, when the current load of the processor is greater than a preset value, if the processor periodically triggers a load balancing flow, a load balancing function is called to perform load balancing scheduling on all cores. When the current load of the processor is less than or equal to the preset value, if the processor periodically triggers the load balancing process, the processor ignores the function of performing load balancing scheduling on all cores, so that the tasks are continuously and uniformly distributed on the cores in the busy state in a centralized manner, and the cores in the idle state are kept in the idle state, thereby controlling the core power consumption and saving energy for the computing device.

The scheme provided by the embodiment of the application is mainly introduced from the perspective of a method. To implement the above functions, it includes hardware structures and/or software modules for performing the respective functions. Those of skill in the art will readily appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as hardware or combinations of hardware and computer software. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

The embodiment of the application also provides a processor 300. Fig. 10 is a schematic structural diagram of a processor 300 according to an embodiment of the present disclosure.

Wherein, the processor 300 comprises: the obtaining unit 310 is configured to obtain a current load amount in response to a preset condition for invoking a load balancing scheduling algorithm; wherein the processor comprises a plurality of processor cores; the plurality of processor cores are respectively provided with a respective task queue; at least one processor core is in a busy state; at least one processor core is in an idle state; the busy state indicates that the task queue of the processor core has the task to be executed; the idle state indicates that the tasks to be executed in the task queue of the processor core are processed; a determining unit 320, configured to determine that the current load is less than or equal to a preset value, and a load balancing scheduling unit 330, configured to execute a load balancing scheduling algorithm corresponding to a preset condition; so that the processor core in the idle state is kept in the idle state; the preset conditions correspond to load balancing scheduling algorithms one to one. For example, referring to fig. 6, the obtaining unit 310 is used in S101 and S102 in the method embodiment, the determining unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S104 in the method embodiment.

Optionally, the preset condition for invoking the load balancing scheduling algorithm includes: newly adding a task; the newly added task comprises a new task or a blocked task which is awakened; or the last task to be executed in the task queue of any processor core is executed; or at preset intervals.

Optionally, when the preset condition is a newly added task, the determining unit 320 is specifically configured to determine that the current load is less than or equal to a preset value, and the load balancing scheduling unit 330 is specifically configured to perform load balancing between processor cores in a busy state. For example, in conjunction with fig. 6, the determining unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S104 in the method embodiment.

Optionally, the load balancing scheduling unit 330 is specifically configured to schedule the newly added task to the task queue of the processor core in the busy state. For example, in conjunction with fig. 6, the load balancing scheduling unit 330 is used in S104 in the method embodiment.

Optionally, when the preset condition is that the last to-be-executed task in the task queue of any processor core is completely executed, the determining unit 320 is specifically configured to determine that the current load is less than or equal to the preset value, and the load balancing scheduling unit 330 is specifically configured to not execute the load balancing scheduling by the processor. For example, in conjunction with fig. 6, the determining unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S104 in the method embodiment.

Optionally, when the preset condition is that the preset time is spaced, the determining unit 320 is specifically configured to, if it is determined that the current load is less than or equal to the preset value, the load balancing scheduling unit 330 is specifically configured to, by the processor, perform load balancing between the processor cores in the busy state. For example, in conjunction with fig. 6, the determining unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S104 in the method embodiment.

Optionally, the determining unit 320 is further configured to, if it is determined that the current load is greater than the preset value, perform load balancing among all processor cores of the processor by using the load balancing scheduling unit 330. For example, in conjunction with fig. 6, the determining unit 320 is used in S103 in the method embodiment, and the load balancing scheduling unit 330 is used in S105 in the method embodiment.

Optionally, the obtaining unit 310 is specifically configured to calculate a weighted average load amount of the plurality of processor cores in the first predetermined time. For example, in conjunction with fig. 6, the acquisition unit 310 is used in S102 in the method embodiment.

Optionally, the processor further includes a power management unit 340, configured to turn off a power and/or a clock of the processor core after the processor core is kept in an idle state for a second predetermined time. For example, in conjunction with fig. 6, power management unit 340 is used for S106 in the method embodiment.

Of course, the processor 300 provided in the embodiment of the present application may include, but is not limited to, an obtaining unit 310, a determining unit 320, a load balancing scheduling unit 330, and a power management unit 340.

Another embodiment of the present application further provides a computing device, which may be, for example, a server, a tablet computer, a desktop, a laptop, a notebook, a netbook, and the like. The computing device includes a memory and a processor. A memory coupled to the processor; the memory is for storing computer program code, the computer program code including computer instructions. Wherein the computer instructions, when executed by the processor, cause the computing device to perform the steps of the load balancing scheduling method shown in the above method embodiments.

Another embodiment of the present application further provides a computer-readable storage medium, where a computer instruction is stored in the computer-readable storage medium, and when the computer instruction runs on a computing device, the computing device is caused to perform each step performed by the computing device in the flow of the load balancing scheduling method shown in the foregoing method embodiment.

Another embodiment of the present application further provides a chip system, which is applied to a computing device. The system-on-chip includes one or more interface circuits, and one or more processors. The interface circuit and the processor are interconnected by a line. The interface circuit is configured to receive signals from the memory of the computing device and to send signals to the processor, the signals including computer instructions stored in the memory. When the processor of the computing device executes the computer instructions, the computing device executes the steps executed by the computing device in the flow of the load balancing scheduling method shown in the above method embodiments.

In another embodiment of the present application, a computer program product is further provided, where the computer program product includes computer instructions, and when the computer instructions are executed on a computing device, the computing device is caused to perform the steps performed by the computing device in the load balancing scheduling method flow shown in the foregoing method embodiment.

In the above embodiments, all or part of the implementation may be realized by software, hardware, firmware, or any combination thereof. When implemented using a software program, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The processes or functions according to the embodiments of the present application are generated in whole or in part when the computer-executable instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. Computer-readable storage media can be any available media that can be accessed by a computer or data storage device including one or more available media integrated servers, data centers, and the like. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid State Disk (SSD)), among others.

The foregoing is only illustrative of the present application. Those skilled in the art should appreciate that changes and substitutions can be made in the embodiments provided herein without departing from the scope of the present disclosure.

Claims

1. A load balancing scheduling method, the method comprising:

the processor responds to a preset condition for calling a load balancing scheduling algorithm to obtain the current load; wherein the processor comprises a plurality of processor cores; the plurality of processor cores are respectively provided with a respective task queue; at least one of the processor cores is in a busy state; at least one processor core is in an idle state; the busy state indicates that a task to be executed exists in a task queue of the processor core; the idle state indicates that the tasks to be executed in the task queue of the processor core are processed;

the processor determines that the current load is less than or equal to a preset value, and executes the load balancing scheduling algorithm corresponding to the preset condition; so that the processor core in the idle state is kept in the idle state; and the preset conditions correspond to the load balancing scheduling algorithm one to one.

2. The method of claim 1, wherein the preset condition for invoking the load balancing scheduling algorithm comprises:

newly adding a task; the new task comprises a new task or a blocked task which is awakened; or

The last task to be executed in the task queue of any processor core is executed; or

The interval is preset time.

3. The method according to claim 1 or 2, wherein when the preset condition is a newly added task, the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to the preset condition, including:

and determining that the current load is less than or equal to the preset value, and carrying out load balancing among the processor cores in the busy state by the processor.

4. The method of claim 3, wherein the processor load balancing among processor cores in the busy state comprises:

and the processor dispatches the newly added task to the task queue of the processor core in the busy state.

5. The method according to claim 1 or 2, wherein when the preset condition is that a last task to be executed in a task queue of any processor core is executed completely, the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to the preset condition, including:

and if the current load is determined to be less than or equal to the preset value, the processor does not execute load balancing scheduling.

6. The method according to claim 1 or 2, wherein when the preset condition is the interval preset time, the processor determines that the current load is less than or equal to a preset value, and executes a load balancing scheduling algorithm corresponding to the preset condition, including:

and when the current load is determined to be less than or equal to the preset value, the processor performs load balancing among the processor cores in a busy state.

7. The method of any of claims 1 to 6, further comprising:

and if the current load is larger than the preset value, performing load balancing among all processor cores of the processor.

8. The method according to any one of claims 1 to 7, wherein the obtaining the current load amount comprises:

and calculating the weighted average load amount of the plurality of processor cores in the first preset time.

9. The method according to any one of claims 1 to 8, further comprising: and after the processor core is kept in an idle state for a second preset time, the processor turns off the power supply and/or the clock of the processor core.

10. A computing device comprising a memory and a processor; the memory and the processor are coupled; the memory for storing computer program code, the computer program code comprising computer instructions; wherein when the processor invokes program instructions to perform the method of any one of claims 1-9.