CN115390337A - Method for realizing integrated all-optical logic gate by chip based on plating layer structure - Google Patents

Abstract

The invention realizes the free switching of seven operation functions of AND, OR, NOT, NAND, NOR, XOR, XNOR or the like by using a single device structure and simple electrical control. Transferring coating materials such as transition metal sulfide and the like to the upper part of a waveguide structure such as a micro-ring cavity and the like; the resonance eigenwavelength of the micro-ring cavity is tuned by controlling the concentration of free carriers of the coating through bias voltage, and two paths of optical fields carrying input bits change the concentration of the free carriers of the coating to cause the resonance wavelength deviation of the micro-ring cavity; the light field output from the through port and the uploading and downloading port has the characteristics related to the incident light field; by adjusting the resonance intrinsic wavelength and selecting an output port, various logic operations are realized. The all-optical logic gate device can realize various all-optical logic operations by using a single structure, does not need high-speed electrical signal control, is highly compatible with the existing preparation process, is used as a general all-optical logic gate device, and lays a solid foundation for constructing a chip integrated super-large-scale all-optical computing system.

Description

Method for realizing integrated all-optical logic gate by chip based on plating layer structure

Technical Field

The invention belongs to the field of interdisciplines of integrated optics, optical computation and microwave photonics, and particularly relates to an all-optical logic gate system which utilizes photoinduced free carriers of coating materials such as transition metal sulfides to adjust the refractive index of a chip integrated waveguide and realizes seven operations of AND, OR, NOT, XOR, XNOR and the like.

Background

The all-optical computing system mainly realizes various complex computing functions through optical effects and has higher computing performance than a traditional computer in the aspect of solving specific problems. At present, an all-optical computing system is mainly based on a free space optical path or an all-fiber optical path and has the problems of large volume, high power consumption, poor stability, high failure rate and the like. More importantly, with the exponential increase of the scale of the all-optical computing system, the existing loose coupling inheritance modes of the free space optical path and the all-optical fiber optical path seriously lag the practical upgrading of the large-scale all-optical computing system. On the other hand, the chip integrated optical circuit has the advantages of small volume, low power consumption, rich functions, stable performance, integrated board card, batch preparation and the like, is highly compatible with the traditional chip integrated circuit process, can mix the integrated functional optical circuit and the logic circuit on a single chip, and is expected to become the preferred technical scheme of a future all-optical computing system.

The all-optical logic gate is the core of all-optical computation, and the main function of the all-optical logic gate is to realize the logic operation of optical bits. The smaller the size of the all-optical logic gate, the lower the power consumption and the simpler the structure, the larger the scale of the all-optical computing system which can be constructed. However, in the current stage, all-optical logic gates are mainly realized by optical interference and optical switches, and the difference of the optical path structures of the gates used for all logic functions is large, so that the logic functions are difficult to integrate uniformly and always need to be controlled by high-speed electrical signals.

Disclosure of Invention

Aiming at the defects, the technical problem to be solved by the invention is how to integrate optical devices such as a micro-ring cavity, a carrier straight waveguide, an incident straight waveguide and the like on a single chip, and coat coating materials such as transition metal sulfide and the like on the waveguide, wherein two paths of optical fields carrying incident bits are input from the incident straight waveguide and are used for generating a reference optical field of emergent bits to be input from the carrier straight waveguide; applying bias voltage on the external electrode, changing the concentration of free carriers of the coating material and adjusting the intrinsic resonance wavelength of the micro-ring cavity, and inputting an incident light field into the incident straight waveguide, changing the concentration of free carriers of the coating material and adjusting the resonance wavelength of the micro-ring cavity; under the dual action of external voltage and incident light field, the reference light field carries outgoing bits to be output from different ports, and the function of the chip integrated all-optical logic gate is realized.

In view of the above defects, the present invention aims to provide a method for realizing an integrated all-optical logic gate based on a chip with a plating layer structure, which uses a single device structure and simple electrical control to realize free switching of seven operation functions of and, or, not, nand, nor, xor, and/or. Specifically, coating materials such as transition metal sulfide and the like are transferred to the upper part of a waveguide structure such as a micro-ring cavity and the like; the resonance eigenwavelength of the micro-ring cavity is tuned by controlling the concentration of free carriers of the coating through bias voltage, and two paths of optical fields carrying input bits change the concentration of the free carriers of the coating to cause the resonance wavelength deviation of the micro-ring cavity; the resonance conditions of the reference light field and the micro-ring cavity are changed, and the output light field from an All-pass (All-pass) port and an upload-download (Add-drop) port has the characteristic related to the incident light field; by adjusting the resonance intrinsic wavelength and selecting the output port, various logic operations can be realized.

In order to achieve the effect, the method for realizing the integrated all-optical logic gate based on the chip with the coating structure, provided by the invention, is characterized in that a double-carrier straight waveguide micro-ring cavity is prepared on a single chip, two incident straight waveguides are prepared near the micro-ring cavity, coating materials such as transition metal sulfides and the like are transferred to the surfaces of all waveguides, an external electrode is prepared, two paths of optical fields carrying incident bits are input into the incident straight waveguides to cause the concentration of free carriers of a coating to change and adjust the resonant wavelength of the micro-ring cavity, bias voltage is applied to the external electrode to change the concentration of free carriers of the coating and adjust the intrinsic wavelength of the micro-ring cavity, and a truth table of an input optical field and an output optical field is changed to realize the function switching of the all-optical logic gate.

Preferably, the reference optical field incident into the carrier straight waveguide in the method is switched between a harmonic state and a detune state and is output from different ports, so that all-optical logic operation is realized.

Preferably, the method specifically comprises the following steps:

s1, preparing optical structures of a micro-ring cavity, a carrier straight waveguide and an incident straight waveguide by a chip integrated optical path standard process, transferring coating materials such as transition metal sulfides to the surfaces of a left waveguide and a right waveguide, and preparing an external electrode;

s2, inputting two paths of light fields carrying incident bits into an incident straight waveguide, causing concentration change of free carriers of a coating and tuning resonance wavelength of the micro-ring cavity, inputting the carrier straight waveguide into a reference light field, outputting the carrier straight waveguide from one output port under a harmonic condition, and outputting the carrier straight waveguide from the other output port under a detuning condition;

and S3, applying different bias voltages to the coating through the external electrode, adjusting the intrinsic resonant frequency of the micro-ring cavity to realize the on-resonance or off-resonance state of the reference light field, and outputting the reference light field from different ports under the dual functions of electric control tuning and light control tuning of the resonant frequency of the micro-ring cavity to realize free switching of seven operation functions of AND, OR, NOT, NAND, NOT, XOR, XNOR and the like.

Preferably, the method changes the resonance wavelength of the micro-ring cavity through two paths of photoinduced free carriers of the transmitted light field to the coating material and the external electrodes to the electroluminescent free carriers of the coating material in the incident straight waveguide, so that the reference light fields input by the carrier straight waveguide are output from different ports as required.

Preferably, the method realizes various logic operations by adjusting the resonance intrinsic wavelength and selecting the output port.

Preferably, in the method, two paths of optical fields carry logic bits to input into the logic gate in the all-optical logic operation, and the high/low of the optical field intensity respectively corresponds to 1/0 of the logic bits; the center frequencies of the input light field and the output light field are consistent in various logic operations.

Preferably, the plating layer is transferred to the surface of the chip integrated waveguide in a lossless manner through a growth process control parameter and a standard process, the close attachment is realized, and the electro-optic parameter is accurately regulated and controlled by taking the crystal structure and the layered thickness as the freedom degree.

The invention provides a system for realizing an integrated all-optical logic gate by a chip based on a coating structure, which comprises a single chip integrating a micro-ring cavity, carrier straight waveguides, incident straight waveguides and other optical devices, wherein a double-carrier straight waveguide micro-ring cavity is prepared on the single chip, two incident straight waveguides are prepared near the micro-ring cavity, coating materials such as transition metal sulfides are transferred to the surfaces of all waveguides, an external electrode is prepared, two paths of light fields carrying incident bits are input into the incident straight waveguides to cause the concentration change of free carriers of the coating and adjust the resonance wavelength of the micro-ring cavity, the concentration of the free carriers of the coating is changed and the intrinsic resonance wavelength of the micro-ring cavity is adjusted by applying bias voltage on an external electrode, and the truth tables of the input light field and the output light field are changed to realize the function switching of the all-optical logic gate.

Preferably, the system utilizes a single device structure and electrical control to realize free switching of seven operation functions of AND, OR, NOT, XOR, XORing or the like, and changes the resonance wavelength of the micro-ring cavity through two paths of photoinduced free carriers of the transmission light field to the coating material and the external electrodes to the electrogenerated free carriers of the coating material in the incident straight waveguide, so that the reference light field input by the carrier straight waveguide is output from different ports as required; by adjusting the resonance intrinsic wavelength and selecting the output port, various logic operations can be realized.

Compared with the prior art, the invention achieves the following technical effects:

firstly, the invention provides a device design scheme highly compatible with the existing preparation process for a chip integrated all-optical computing system, can realize various logic operations through simple structures such as a micro-ring cavity, a straight waveguide, a plating material, an external electrode and the like, and greatly improves the universality and universality of an all-optical logic gate;

secondly, the all-optical logic gate can be flexibly switched among various logic operations, and the external electrode mainly plays a role in maintaining the stable resonance wavelength of the micro-ring cavity and tuning the intrinsic resonance wavelength of the micro-ring cavity without high-speed electrical signal control;

in addition, the method can also provide a feasible means for all-optical signal interoperation, namely, the interaction of two paths of optical fields is realized by taking the coating material as a medium and controlling the free carrier concentration of the coating material on the premise of not generating optical field coupling.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments of the present invention will be briefly described below, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic diagram of a structure of a chip integrated all-optical logic gate based on a plating layer structure;

fig. 2 shows a schematic diagram of the method for implementing the integrated all-optical logic gate based on the chip with the plating layer structure.

Detailed Description

Features and exemplary embodiments of various aspects of the present invention will be described in detail below, and in order to make objects, technical solutions and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. It will be apparent to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the present invention.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of another like element in a process, method, article, or apparatus that comprises the element.

The invention provides an embodiment of a method for realizing an integrated all-optical logic gate based on a chip with a plating layer structure, which comprises the following steps:

s101, preparing optical structures such as a micro-ring cavity, a carrier straight waveguide and an incident straight waveguide through a chip integrated optical circuit standard process, transferring coating materials such as transition metal sulfide to the surfaces of a left waveguide and a right waveguide, and preparing an external electrode;

s102, inputting two paths of light fields carrying incident bits into an incident straight waveguide, causing the concentration change of free carriers of a coating and tuning the resonance wavelength of a micro-ring cavity, inputting the carrier straight waveguide by referring to the light fields, downloading the output from an Add-drop port under a harmonic condition, and outputting from a through All-pass port under a detuning condition;

s103, applying different bias voltages to the plating layer through the external electrode, adjusting the intrinsic resonant frequency of the micro-ring cavity to realize the on-resonance or off-resonance state of the reference light field, and under the dual functions of electric control tuning and light control tuning of the resonant frequency of the micro-ring cavity, outputting the reference light field from different ports to realize free switching of seven operation functions of AND, OR, NOT, NAND, NOT, XOR, XNOR or Co.

As shown in fig. 1, this embodiment shows a structural embodiment of a plating-layer-structure-based all-optical logic gate: an incident light field is input from two ports I1 and I2 on the right side through a grating coupler, a reference light field is input from a port on the lower left corner through the grating coupler, the incident light field and the reference light field are consistent in intensity modulation, repetition frequency and arrival time, the incident light field input by the I1 and the I2 carries a logic bit sequence to be calculated, and the reference light field carries a full-1 logic bit sequence; when the wavelength of the reference light field is consistent with the resonance wavelength of the micro-ring (under a harmonic condition), the reference light field is output from an Add-drop port (O1) through micro-ring coupling, and when the wavelength of the reference light field is different from the resonance wavelength of the micro-ring (under a detuning condition), the reference light field is output from an All-pass port (O2); the incident light field generates photoinduced free carriers in the coating material and changes the resonance wavelength of the micro-ring cavity, the tuning value of the single-path incident light field to the resonance wavelength of the micro-ring cavity is A, and the tuning value of the double-path incident light field to the resonance wavelength of the micro-ring cavity is 2A; after the optical field is removed, the recovery time of the resonance wavelength of the micro-ring cavity is far shorter than the pulse period of the reference optical field and the incident optical field, and the working principle of each logic gate is as follows:

(1) Non-operation: and applying bias voltage through the external electrode, wherein the electric control bias tuning value between the intrinsic resonance wavelength of the micro-ring cavity and the wavelength of the reference light is-A, I1 is used as an input end, and O2 is used as an output end. I1=1, the reference light field satisfies the harmonic condition and is output from O1, when O2=0; i2=0, the reference field satisfies the detuning condition and is output from O2, when O2=1;

(2) And operation: bias voltage is applied through the external electrode, the electric control bias tuning value between the intrinsic resonance wavelength of the micro-ring cavity and the wavelength of the reference light is-2A, I1 and I2 are used as input ends, and O1 is used as an output end. I1=1, I2=1, the reference light field satisfies the harmonic condition and is output from O1, when O1=1; otherwise, the reference field satisfies the detuning condition and is output from O2, when O1=0.

(3) And (3) NAND operation: bias voltage is applied through the external electrode, the electric control bias tuning value between the intrinsic resonance wavelength of the micro-ring cavity and the wavelength of the reference light is-2A, I1 and I2 are used as input ends, and O2 is used as an output end. I1=1, I2=1, the reference light field satisfies the harmonic condition and is output from O1, when O2=1; otherwise, the reference field satisfies the detuning condition and is output from O2, when O2=0.

(4) Or operation: and applying bias voltage through the external electrode, wherein the electric control bias tuning value between the intrinsic resonance wavelength of the micro-ring cavity and the wavelength of the reference light is 0, I1 and I2 are used as input ends, and O2 is used as an output end. I1=0, I2=0, the reference light field satisfies the harmonic condition and is output from O1, when O2=0; otherwise, the reference field satisfies the detuning condition and is output from O2, when O2=1.

(5) Or operation: and applying bias voltage through the external electrode, wherein the electric control bias tuning value between the intrinsic resonance wavelength of the micro-ring cavity and the wavelength of the reference light is 0, I1 and I2 are used as input ends, and O1 is used as an output end. I1=0, I2=0, the reference light field satisfies the harmonic condition and is output from O1, when O1=1; otherwise, the reference field satisfies the detuning condition and is output from O2, when O1=0.

(6) And (3) XOR operation: and applying bias voltage through the external electrode, wherein the electric control bias tuning value between the intrinsic resonance wavelength of the micro-ring cavity and the wavelength of the reference light is-A, I1 and I2 are used as input ends, and O1 is used as an output end. I1= I2, the reference field satisfies the detuning condition (a or-a) and is output from O2, when O1=0, otherwise the reference field satisfies the detuning condition and is output from O1, when O1=1.

(7) And (3) carrying out an exclusive OR operation: and applying bias voltage through the external electrode, wherein the electric control bias tuning value between the intrinsic resonance wavelength of the micro-ring cavity and the wavelength of the reference light is-A, I1 and I2 are used as input ends, and O2 is used as an output end. I1= I2, the reference field satisfies the detuning condition (a or-a) and is output from O2, when O2=1, and otherwise, the reference field satisfies the detuning condition and is output from O1, when O2=0.

As shown in fig. 2, this embodiment further provides a method for implementing an integrated all-optical logic gate based on a chip with a plated layer structure, including:

s201, preparing a device, namely preparing a double-carrier straight waveguide micro-ring cavity on a single chip, preparing two incident straight waveguides near the micro-ring cavity, transferring coating materials such as transition metal sulfide and the like to the surfaces of all waveguides, and preparing an external electrode;

s202, realizing the function of an all-optical logic gate, inputting two paths of light fields carrying incident bits into an incident straight waveguide, causing the concentration change of free carriers of a coating and adjusting the resonant wavelength of a micro-ring cavity, and switching the reference light field of the incident carrier straight waveguide in an on-resonance state and an off-resonance state and outputting the reference light field from different ports, namely realizing all-optical logic operation;

and S203, switching functions of the all-optical logic gate, namely applying bias voltage to an external electrode to change the concentration of free carriers of the coating and adjust the intrinsic resonant wavelength of the micro-ring cavity, and changing the truth tables of an input optical field and an output optical field to realize the switching of the functions of the all-optical logic gate.

In some embodiments, the step two is to adjust the refractive index of the chip integrated waveguide by changing the free carrier concentration and to achieve electro-optical phase modulation of the transmitted optical field, where the phase distribution of the transmitted optical field will repetitively modulate the electrical signal distribution.

In some embodiments, the chip integrated waveguide is prepared by a chip integrated optical circuit standard process, has a certain degree of structural design freedom, efficiently transmits an optical field without loss, and generates refractive index change under the action of free carriers, and the material platform used by the chip integrated waveguide includes but is not limited to silicon on insulator, hydrogen-carrying amorphous silicon, silicon nitride, silicon carbide, chalcogenide glass, high-refractive-index quartz, three-five-group AlGaAs, three-five-group InP, and the like, and can adopt a single material integration method or a multi-material mixed integration method.

In some embodiments, the coating is transferred to the surface of the chip integrated waveguide in a lossless manner through a growth process control parameter and a standard process, and realizes close fit, and the electro-optical parameters are accurately regulated and controlled by taking a crystal structure and a layered thickness as degrees of freedom; the voltage-sensitive two-dimensional layered material coating can be used as a substrate stable growth electrode and can generate physical responses such as free carrier concentration change and the like under the action of an external voltage, the environment variable-sensitive two-dimensional layered material coating can generate physical responses under the action of environment variables, the physical responses cause optical refractive index change, the coating materials include but are not limited to graphene, molybdenum disulfide, tungsten sulfide, perovskite and the like, and specific structural parameters and preparation processes are not limited.

In some embodiments, two paths of optical fields in the all-optical logic operation carry logic bits to input into the logic gate, and the high/low of the optical field intensity respectively corresponds to 1/0 of the logic bits; in various logic operations, the center frequencies of an input light field and an output light field are consistent, and the strength is subject to the condition of distinguishing logic bits, so that hard unification requirements are not made.

In some specific embodiments, the optical switch carrier includes, but is not limited to, a micro-ring cavity, a micro-disk cavity, a fabry-perot cavity, a photonic crystal microcavity, and the like, and the plating tuning parameters include, but are not limited to, a free carrier concentration, an electrical conductivity, a refractive index, and the like, without limiting the operating frequency of the all-optical logic operation, the optical field coupling mode, the circuit control mode, the specific parameters of the photonic device and the electronic device, and without limiting the combination mode, the specific function, and the application scenario of the all-optical logic gate.

Compared with the prior art, the invention has the following advantages:

firstly, the invention provides a device design scheme highly compatible with the existing preparation process for a chip integrated all-optical computing system, can realize various logic operations through simple structures such as a micro-ring cavity, a straight waveguide, a plating material, an external electrode and the like, and greatly improves the universality and universality of an all-optical logic gate;

secondly, the all-optical logic gate can be flexibly switched among various logic operations, and the external electrode mainly plays a role in maintaining the stable resonance wavelength of the micro-ring cavity and tuning the intrinsic resonance wavelength of the micro-ring cavity without high-speed electrical signal control.

In addition, the method can also provide a feasible means for all-optical signal interoperation, namely, the interaction of two paths of optical fields is realized by taking the coating material as a medium and controlling the free carrier concentration of the coating material on the premise of not generating optical field coupling.

For convenience of description, the above devices are described as being divided into various units by function, and are described separately. Of course, the functionality of the units may be implemented in one or more software and/or hardware when implementing the present application.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

The application may be described in the general context of computer-executable instructions, such as program modules, being executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. The application may also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network. In a distributed computing environment, program modules may be located in both local and remote computer storage media including memory storage devices.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.

The memory may include forms of volatile memory in a computer readable medium, random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.

Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static Random Access Memory (SRAM), dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), read Only Memory (ROM), electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.

All the embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, as for the system embodiment, since it is substantially similar to the method embodiment, the description is relatively simple, and reference may be made to the partial description of the method embodiment for relevant points.

The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement or the like made within the spirit and principle of the present application shall be included in the scope of the claims of the present application.

Claims (10)

1. A method for realizing integrated all-optical logic gate based on chip of coating structure includes preparing dual-carrier straight waveguide micro-ring cavity on single chip, preparing two incident straight waveguides near micro-ring cavity, transferring coating material such as transition metal sulfide to all waveguide surfaces and preparing external electrodes, inputting two paths of light fields carrying incident bits into incident straight waveguides and causing concentration variation of free carriers of coating and adjusting resonance wavelength of micro-ring cavity, applying bias voltage on external electrodes to change concentration of free carriers of coating and adjust intrinsic resonance wavelength of micro-ring cavity, changing truth tables of input light field and output light field to realize function switching of all-optical logic gate.

2. The method for realizing the integrated all-optical logic gate based on the chip with the coating structure, according to the claim 1, is characterized in that the reference optical field incident to the carrier straight waveguide is switched in two states of harmonic and detuning and is output from different ports, so that all-optical logic operation is realized.

3. The method for realizing an integrated all-optical logic gate based on the chip with the plating structure as claimed in claim 1, wherein the method comprises the following steps:

s1, preparing optical structures of a micro-ring cavity, a carrier straight waveguide and an incident straight waveguide by a chip integrated optical circuit standard process, transferring coating materials such as transition metal sulfides to the surfaces of a left waveguide and a right waveguide, and preparing an external electrode;

s2, inputting two paths of light fields carrying incident bits into an incident straight waveguide, causing concentration change of free carriers of a coating and tuning resonance wavelength of the micro-ring cavity, inputting the carrier straight waveguide into a reference light field, outputting the carrier straight waveguide from one output port under a harmonic condition, and outputting the carrier straight waveguide from the other output port under a detuning condition;

and S3, applying different bias voltages to the coating through the external electrode, adjusting the intrinsic resonant frequency of the micro-ring cavity to realize the on-resonance or off-resonance state of the reference light field, and outputting the reference light field from different ports under the dual functions of electric control tuning and light control tuning of the resonant frequency of the micro-ring cavity to realize free switching of seven operation functions of AND, OR, NOT, NAND, NOT, XOR, XNOR and the like.

4. The method for realizing the integrated all-optical logic gate based on the chip with the coating structure as claimed in one of claims 1 to 3, wherein the method changes the resonance wavelength of the micro-ring cavity by transmitting the light field to the photoinduced free carriers of the coating material and the external electrodes to the electro-generated free carriers of the coating material in two paths of incident straight waveguides, so that the reference light field input by the carrier straight waveguides can be output from different ports as required.

5. The method for realizing the integrated all-optical logic gate based on the chip with the coating structure as claimed in claim 1 or 4, wherein the method realizes a plurality of logic operations by adjusting the resonance eigenwavelength and selecting an output port.

6. The method for realizing the integrated all-optical logic gate based on the chip with the plating layer structure according to one of claims 1 to 5, wherein two paths of optical fields carry logic bits to be input into the logic gate in all-optical logic operation, and the high/low of the intensity of the optical fields respectively corresponds to 1/0 of the logic bits; the center frequencies of the input light field and the output light field are consistent in various logic operations.

7. The method for realizing the integrated all-optical logic gate based on the chip with the coating structure as claimed in one of claims 1 to 5, wherein the coating is nondestructively transferred to the surface of the chip integrated waveguide by a standard process through growth process control parameters and is tightly attached, and electro-optical parameters are accurately regulated and controlled by taking a crystal structure and a layered thickness as degrees of freedom.

8. A system for realizing an integrated all-optical logic gate based on a chip with a plated layer structure as claimed in any one of claims 1 to 7, which comprises a single chip integrating a micro-ring cavity, carrier straight waveguides, incident straight waveguides and other optical devices, wherein a double-carrier straight waveguide micro-ring cavity is prepared on the single chip, two incident straight waveguides are prepared near the micro-ring cavity, a plated material such as transition metal sulfide is transferred to the surfaces of all waveguides and an external electrode is prepared, two optical fields carrying incident bits are input into the incident straight waveguides to cause the concentration of free carriers of the plated layer to change and adjust the resonance wavelength of the micro-ring cavity, and the truth tables of the input optical field and the output optical field are changed by applying bias voltage on the external electrode to change the concentration of free carriers of the plated layer and adjust the intrinsic resonance wavelength of the micro-ring cavity so as to realize the function switching of the all-optical logic gate.

9. The system of claim 8, wherein the system utilizes a single device structure and electrical control to realize free switching of seven operation functions of and, or, not, nand, nor, xor, and/or, and changes the resonance wavelength of the micro-ring cavity by transmitting light field to photoinduced free carriers of the coating material and external electrodes to electroluminescence free carriers of the coating material in the two paths of incident straight waveguides, so that the reference light field input by the carrier straight waveguides can be output from different ports as required; by adjusting the resonance intrinsic wavelength and selecting the output port, various logic operations can be realized.

10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the method of any one of claims 1 to 7.

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