CN115382855A - Cleaning method of semiconductor process chamber - Google Patents
Cleaning method of semiconductor process chamber Download PDFInfo
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- CN115382855A CN115382855A CN202211213837.5A CN202211213837A CN115382855A CN 115382855 A CN115382855 A CN 115382855A CN 202211213837 A CN202211213837 A CN 202211213837A CN 115382855 A CN115382855 A CN 115382855A
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- B08—CLEANING
- B08B—CLEANING IN GENERAL; PREVENTION OF FOULING IN GENERAL
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Abstract
The application discloses a cleaning method of a semiconductor process chamber, and the semiconductor process chamber is used for executing a processing technology of a wafer, and belongs to the technical field of semiconductor equipment. The cleaning method comprises the following steps: after the process chamber performs the current processing technology of the wafer in the current process period, performing a post-wafer dry cleaning technology on the process chamber; and performing a post-wafer remote plasma cleaning process on the process chamber until the first total number of the wafers which have been subjected to the processing process is greater than or equal to a first preset value. The scheme can solve the problem of low capacity of the traditional process chamber.
Description
Technical Field
The application belongs to the technical field of semiconductor processing, and particularly relates to a cleaning method of a semiconductor process chamber.
Background
In the field of semiconductor manufacturing industry, by-product particles are generated during the wafer processing process, and the particles will deposit on the inner wall of the process chamber to pollute the chamber environment, especially in the chemical vapor deposition process, because the step coverage rate of the deposition is higher than that of the physical vapor deposition, the removal of the by-product of the chemical vapor deposition is an important issue in the industry.
The deposited by-products are large in amount and difficult to completely remove, and the in-situ dry cleaning cannot remove the areas which cannot be contacted by the plasma, and the charging and discharging and physical bombardment effects caused by the ion components in the plasma easily cause certain damage to the hardware of the process chamber. Therefore, the RPS (Remote plasma system) is usually used to clean the process chamber, and the RPS works based on the principle of the electric induction coupled plasma, so that the ionization rate of gas molecules is high, the molecules can be completely split, more than 95% of reaction gas can be ionized, and the process chamber can be cleaned more quickly, efficiently and completely; and due to the remote conveying function of the RPS, the gas can be conveyed to the area which cannot be contacted originally in the process chamber for cleaning, ion components in the plasma are annihilated in the conveying process, and the process chamber cannot be damaged. However, since RPS start-up is slow and the time for pre-deposition to the process chamber after RPS cleaning is long, frequent RPS cleaning results in low wafer throughput.
Disclosure of Invention
An object of the present invention is to provide a method for cleaning a semiconductor process chamber, which is used for performing a wafer processing process and can solve the problem of low productivity of the existing process chamber.
In order to solve the technical problem, the present application is implemented as follows:
the embodiment of the application provides a semiconductor processing technology, which is applied to semiconductor processing equipment, wherein the semiconductor processing equipment comprises a process chamber, and the processing technology comprises the following steps:
after the processing technology of the current wafer is executed by the process chamber in the current process period, performing a post-wafer dry cleaning technology on the process chamber;
and performing a post-wafer remote plasma cleaning process on the process chamber until the first total number of the wafers which have been subjected to the processing process is greater than or equal to a first preset value.
In the embodiment of the application, when the number of the wafers needing to be processed is large, the wafers are divided into a plurality of process periods to be processed, in one of the process periods, a post-wafer dry cleaning process is performed on the process chamber after the processing process is performed on each wafer, until the first total number of the wafers having been processed is greater than or equal to a first preset value, the post-wafer remote plasma cleaning process is performed on the process chamber, so that the deposits in the process chamber are efficiently and thoroughly removed, that is, in one process period, the post-wafer dry cleaning process is performed on the process chamber after the processing process is performed on each wafer, and after all the wafers corresponding to the current process period are processed, the high-efficiency and thorough post-wafer remote plasma cleaning process is performed on the process chamber, so that the number of the post-wafer remote plasma cleaning is reduced, and the wafer production efficiency is improved.
Drawings
Fig. 1-2 are schematic flow diagrams of a method for cleaning a semiconductor processing chamber according to an embodiment of the present disclosure;
FIG. 3 is a schematic diagram of an assembly configuration of semiconductor processing equipment and a remote plasma system as disclosed in an embodiment of the present application.
Description of reference numerals:
110-a process chamber, 111-a central air inlet, 112-a marginal air inlet, 120-an electrostatic chuck, 130-a radio frequency coil, 140-a lower electrode, 150-a direct current adsorption power supply, 160-a second radio frequency power supply, 170-a second radio frequency matcher and 180-a vacuum pump;
200-remote plasma system;
300-a first radio frequency power supply;
400-first radio frequency matcher.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some, but not all, embodiments of the present application. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.
The terms first, second and the like in the description and in the claims of the present application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that embodiments of the application may be practiced in sequences other than those illustrated or described herein, and that the terms "first," "second," and the like are generally used herein in a generic sense and do not limit the number of terms, e.g., the first term can be one or more than one. In addition, "and/or" in the specification and claims means at least one of connected objects, a character "/", and generally means that the former and latter related objects are in an "or" relationship.
The method for cleaning a semiconductor processing chamber according to the embodiments of the present application is described in detail with reference to the accompanying drawings.
Referring to fig. 1 to 3, an embodiment of the present application discloses a cleaning method of a semiconductor process chamber for performing a process of processing a wafer, the cleaning method including:
s110, after the process chamber 110 in the current process cycle completes the processing process of the current wafer, a post-wafer dry cleaning process is performed on the process chamber 110.
The current wafer is a certain wafer in the current process cycle, and a processing process is performed on the wafer in the process chamber 110, where the processing process may be a deposition process, an etching process, or the like, and the embodiment of the present application is not particularly limited. The specific process cycle refers to a batch of a plurality of wafers which need to be processed, the processing of several wafers is executed in one process cycle, and thus the batch of wafers is divided into a plurality of process cycles for execution.
After each wafer is processed in the process chamber 110, the wafer is transferred out of the process chamber 110, and since by-products generated during the processing of the wafer are deposited on the process chamber 110 and the deposits contaminate the environment of the process chamber 110, a post-wafer dry cleaning process is performed on the process chamber 110 to remove the deposits in the process chamber 110, thereby providing a good chamber environment for the next wafer to be processed.
S120, when the first total number of the wafers which have been processed is larger than or equal to a first preset value, a post-wafer remote plasma cleaning process is performed on the process chamber 110.
In the process of executing the processing technique, it is required to record a first total number of the wafers on which the processing technique has been executed in the current process cycle, and determine whether the first total number of the wafers on which the processing technique has been executed is greater than or equal to a first preset value, where the first preset value refers to the number of all the wafers on which the processing technique needs to be executed in each process cycle, and it should be noted that the first preset value may be selected according to actual needs, which is not specifically limited in the embodiment of the present application.
When the first total number is greater than or equal to the first preset value, it indicates that a process cycle has been performed, and at this time, a post-wafer remote plasma cleaning process needs to be performed on the process chamber 110, so as to efficiently and thoroughly clean the deposits in the process chamber 110, thereby providing a good chamber environment for the wafer of the next process cycle.
In the embodiment of the present application, when the number of the wafers requiring the processing process is large, the wafers are divided into a plurality of process cycles for processing, and in one of the process cycles, a post-wafer remote plasma cleaning process is performed on the process chamber 110 after the processing process is performed on each wafer until the first total number of the wafers subjected to the processing process is greater than or equal to the first preset value, so as to efficiently and completely remove the deposits in the process chamber 110, that is, in one process cycle, the post-wafer remote plasma cleaning process is performed on the process chamber 110 after the processing process is performed on each wafer, and after all the wafers corresponding to the current process cycle are processed, the post-wafer remote plasma cleaning process is performed on the process chamber 110 efficiently and completely, thereby reducing the number of the post-wafer remote plasma cleaning processes and further improving the wafer production efficiency.
In an alternative embodiment, the total number of wafers on which the processing process has been performed in all process cycles is a second total number, and the cleaning method further includes:
s130, before the process chamber 110 performs the processing, the initial value of the first total number is set to 1, and the initial value of the second total number is set to 0.
When the first process cycle is started, the number of wafers currently performing the processing process is set to 1, which is an initial value of the first total number, and the number of wafers already performing the processing process is set to 0, which is an initial value of the second total number.
S140, when the first total quantity is smaller than the first preset value, whether the second total quantity is equal to the second preset value or not is judged.
When the current process cycle is executed, when the first total number is smaller than the first preset value, it needs to be further determined whether a sum of the number of wafers subjected to the processing process in the previous process cycle and the number of wafers subjected to the processing process in the current process cycle is equal to a second preset value, where the second preset value is the number of wafers in the batch that need to be subjected to the processing process, and it should be noted that the second preset value may be selected according to actual needs, which is not specifically limited in the embodiments of the present application.
S150, when the second total number is smaller than the second preset value, the first total number is incremented by 1, and the process chamber 110 performs a processing process on a next wafer in the current process cycle.
When the second total number is smaller than the second preset value, it indicates that the current process cycle has not been executed, and there are wafers that need to execute the processing process, and the processing process needs to be continuously executed on the remaining wafers in the current process cycle. In the embodiment, the values of the first total quantity and the second total quantity are updated at any time in a value assignment mode, so that whether the first total quantity and the second total quantity meet the corresponding requirements or not can be conveniently and rapidly judged, and the processing technology of the wafer is further accelerated.
The embodiment can accurately judge whether all the wafers are processed, so as to prevent the situation that when the wafers corresponding to the last process cycle are less than the wafers corresponding to other process cycles due to the division of the process cycles, the wafers in the last process cycle are processed without processing.
In another optional embodiment, after step S120, the cleaning method further includes:
and S160, assigning the sum of the second total number of the previous process cycle and the first total number of the current process cycle to the second total number.
When the first total quantity of the wafers which have executed the processing technology is larger than or equal to a first preset value, the first total quantity of the current technology period and the second total quantity of the previous technology period are accumulated through the step, and the second total quantity is assigned to facilitate the accumulated calculation when the next technology period is executed.
And S170, judging whether the second total quantity is smaller than a second preset value.
S180, when the second total number is smaller than the second predetermined value, the first total number is set to 1, and the semiconductor process chamber 110 performs a processing process on the wafer in the next process cycle.
And when the second total number is smaller than a second preset value, the current process cycle is executed, but all the wafers needing to be subjected to the processing process in the batch are not executed, the next process cycle needs to be executed, and the processing process is continuously executed on the rest wafers. Therefore, the embodiment can accurately judge whether the wafer is processed or not through the accumulated calculation of the data, so as to prevent the occurrence of the wafer which is missed and does not execute the processing technology.
In another optional embodiment, the cleaning method further includes:
and S190, when the second total number is equal to a second preset value, performing a post-wafer remote plasma cleaning process on the process chamber 110.
When the first total number is smaller than the first preset value and the second total number is equal to the second preset value, it indicates that the current process cycle has not been completed, but all the wafers of the batch that need to be processed have been processed, that is, the cycle is the last cycle of the batch of wafers, and at this time, a post-wafer remote plasma cleaning process may be performed on the process chamber 110, so that the deposits in the process chamber 110 are efficiently and thoroughly removed, so as to provide a good chamber environment for the next batch of wafers that need to be processed.
In another optional embodiment, the cleaning method further includes:
s210, after performing the pre-wafer remote plasma cleaning process on the process chamber 110 and before performing the processing process of the current process cycle on the process chamber 110, performing a pre-cycle pre-deposition process on the process chamber 110.
Before the processing of the current batch of wafers is performed, the deposits in the process chamber 110 are efficiently and thoroughly cleaned by the wafer-level remote plasma cleaning process, so as to provide a good chamber environment for performing the processing of the current batch of wafers. In addition, before the process chamber 110 performs the processing process of the current process cycle, the process chamber 110 satisfies the process conditions by performing the pre-deposition process before the cycle on the process chamber 110, so that a better chamber environment is provided for the wafer to perform the processing process, and the success rate of the wafer processing process is improved. The current process cycle may be specifically a first process cycle of the batch of wafers, and may also be a second process cycle, a third process cycle, and the like, which is not limited herein. That is, a pre-deposition process may be performed on the process chamber before each process cycle begins.
In a further optional embodiment, step S110 specifically includes:
s111, a first auxiliary cleaning process is performed on the process chamber 110.
This step is primarily used to remove byproducts such as nitride and oxide deposited on the process chamber 110.
S112, performing a post-wafer pre-deposition process on the process chamber 110.
The post-wafer pre-deposition process is performed mainly to provide a good process environment for processing the next wafer.
S113, a second auxiliary cleaning process is performed on the process chamber 110.
After the post-wafer pre-deposition process is performed on the process chamber 110, a second auxiliary cleaning process is performed on the process chamber 110, so as to further take away by-products attached to the process chamber 110, stabilize the atmosphere of the process chamber 110 after the post-wafer pre-deposition process, and further provide a stable chamber environment for performing the wafer processing process.
In an optional embodiment, the type of the film obtained by the pre-deposition process before the cycle and the type of the film obtained by the pre-deposition process after the wafer are the same as the type of the film obtained by the processing process on the wafer, where the types may include the components of the obtained film, and the like, that is, the process recipe of the pre-deposition process before the cycle and the process recipe of the pre-deposition process after the wafer are both the same as the process recipe of the main deposition process of the wafer, so as to improve the success rate of the wafer processing process.
Alternatively, the process time of the post-wafer pre-deposition process may be longer than or shorter than the process time of the pre-cycle pre-deposition process, or may be equal. After the first auxiliary cleaning process is performed, the main purpose of performing the post-wafer pre-deposition process is to repair the process environment of the process chamber 110, so the process time of the post-wafer pre-deposition process is shorter than that of the pre-deposition process before the cycle, and the processing efficiency of the wafer is improved on the basis of meeting the processing condition of executing the next wafer.
In another optional embodiment, step S111 specifically includes:
s1111, a first cleaning step is performed on the process chamber 110 using a process gas including NF 3 And oxygen.
S1112, performing a second cleaning step on the process chamber 110 to remove NF remained in the process chamber 110 after the first cleaning step 3 The process gas used in the second cleaning step comprises oxygen.
In this embodiment, when the deposition material on the process chamber 110 is silicon nitride, the oxygen is mainly used to improve the cleaning efficiency of silicon nitride to generate nitrogen-oxygen products; when the deposition on the process chamber 110 is silicon oxide, oxygen is not a necessary gas. According to the embodiment, the cleaning of the process chamber is realized through the first cleaning step and the second cleaning step, and the cleaning effect is better.
In a further alternative embodiment, when the deposit in the process chamber 110 contains silicon oxide, the process gas used in step S1111 further includes nitrogen to form a metastable NO product, so as to increase the chemical reaction rate of the reactant, thereby increasing the cleaning efficiency and facilitating the increase of the wafer throughput.
In yet another optional embodiment, the cleaning method further includes:
s220, acquiring the type of the deposit in the process chamber 110.
The deposition may be silicon oxide or silicon nitride, but other types of deposition are also possible, and are not particularly limited herein.
S230, when the sediment contains silicon oxide, the process gas adopted by the pre-deposition process comprises SiH 4 ，SiH 4 Is a first flow rate, and both the center oxygen flow rate and the edge oxygen flow rate of the electrostatic chuck 120 within the process chamber 110 are greater than 0.
S240, when the sediment contains silicon nitride, the process gas adopted by the pre-deposition process comprises SiH 4 And NH 3 ，SiH 4 At a second flow rate, NH 3 The flow rate of (a) is a third flow rate, and the central oxygen flow rate and the peripheral oxygen flow rate of the electrostatic chuck 120 in the process chamber 110 are both 0, wherein the second flow rate and the third flow rate are both less than the first flow rate.
When the sediment is other substances, the process gas adopted by the wafer post-predeposition process can be adjusted according to actual needs.
In another optional embodiment, after step S120, the cleaning method further includes:
s250, a batch post dry cleaning process is performed on the process chamber 110.
After all wafers of the lot that need to be processed have been processed, and the post-wafer remote plasma cleaning process has been performed on the process chamber 110, a post-lot dry cleaning process may be performed on the process chamber 110, and a pre-cycle pre-deposition process may be performed on the process chamber 110 during the post-lot dry cleaning process to protect the process chamber 110 while waiting for the next wafer lot to be input.
Of course, after step S190, a batch dry cleaning process may be performed on the process chamber 110, that is, the wafer in the last process cycle is processed, and after the wafer in the process chamber 110 is processed by the post-wafer remote plasma cleaning process, the batch dry cleaning process is performed on the process chamber 110, and a pre-cycle pre-deposition process may be performed on the process chamber 110 during the batch dry cleaning process, so as to protect the process chamber 110 during the process of waiting for the input of the next batch of wafers.
As shown in fig. 2, when a batch of wafers needs to be processed, the batch of wafers is divided into a plurality of cycles, the wafers having been processed are set as a first total number, an initial value of the first total number is set to 1, the total number of the wafers having been processed in all the process cycles is set as a second total number, an initial value of the second total number is set to 0, and the process chamber 110 is warmed by performing a pre-batch dry cleaning process. Then, after the wafer-level remote plasma cleaning process is performed on the process chamber and before the process chamber performs the processing process of the current process cycle, a pre-cycle pre-deposition process is performed on the process chamber, and then the wafer is transferred into the process chamber. After the processing technology of the current wafer is executed by the process chamber in the current process period, the post-wafer dry cleaning technology is executed on the process chamber, and the post-wafer dry cleaning technology specifically comprises the steps of executing a first auxiliary cleaning technology on the process chamber, then executing a post-wafer pre-deposition technology, and then executing a second auxiliary cleaning technology. When the first total quantity of the wafers which have executed the processing technology is larger than or equal to a first preset value, a post-wafer remote plasma cleaning technology is executed on the process chamber, the sum of the second total quantity in the previous process period and the first total quantity in the current process period is assigned to the second total quantity, then whether the second total quantity is smaller than the second preset value or not is judged, when the second total quantity is smaller than the second preset value, the first total quantity is set to be 1, and at the moment, the semiconductor process chamber needs to execute the processing technology on the wafers in the next process period. When the first total quantity is smaller than the first preset value, judging whether the second total quantity is smaller than a second preset value, when the second total quantity is smaller than the second preset value, indicating that the current process cycle is not executed, increasing the first total quantity by 1, and executing a processing process on a next wafer in the current process cycle by the process chamber; when the second total number equals a second predetermined value, a post wafer remote plasma cleaning process is performed on the process chamber, at which point all wafers of the batch have performed the processing process.
In a further alternative embodiment, as shown in fig. 3, the pre-wafer remote plasma cleaning process, the post-wafer remote plasma cleaning process, the pre-cycle pre-deposition process, the first auxiliary cleaning process, the second auxiliary cleaning process, the batch post dry cleaning process, and the post-wafer pre-deposition process all use the same operating frequency. The main execution bodies of the pre-wafer remote plasma cleaning process and the post-wafer remote plasma cleaning process are the remote plasma system 200, the main execution bodies of the first auxiliary cleaning process, the second auxiliary cleaning process and the batch post dry cleaning process are the radio frequency systems of the semiconductor process equipment, namely the process chamber 110 is subjected to in-situ cleaning, and when the pre-wafer remote plasma cleaning process, the post-wafer remote plasma cleaning process, the first auxiliary cleaning process, the second auxiliary cleaning process, the pre-period pre-deposition process and the post-wafer pre-deposition process all adopt equal working frequencies, the remote plasma system 200 and the radio frequency systems of the semiconductor process equipment can share the same set of radio frequency source, namely share the radio frequency source of the radio frequency system of the semiconductor process equipment, so that the cost is reduced and saved. Alternatively, the frequencies of the remote plasma system 200 and the radio frequency system of the semiconductor processing equipment may both be 400kHz or 2MHz.
Optionally, a center gas inlet hole 111 and an edge gas inlet hole 112 are formed in a top plate of the process chamber 110 opposite to the wafer, the center gas inlet hole 111 is disposed opposite to the center region of the wafer, and the edge gas inlet hole 112 is disposed opposite to the edge of the wafer, so that the gas introduced into the process chamber 110 is uniformly distributed in the center region and the edge region of the wafer. Optionally, the number of the edge gas inlet holes 112 is at least two, and each edge gas inlet hole 112 is spaced along the edge of the top plate to facilitate the gas to be introduced into the process chamber 110 to uniformly contact the wafer.
Alternatively, when the remote plasma system 200 and the rf system of the semiconductor process equipment share the same set of rf sources, the rf coil of the remote plasma system 200 and the rf coil of the rf system of the semiconductor process equipment can share the first rf power supply 300 and the first rf matcher 400 to save costs.
Optionally, the rf system of the semiconductor processing apparatus includes an rf coil 130, the rf coil 130 being embedded within the process chamber 110.
In an alternative embodiment, the first rf matcher 400 is connected to a single-pole double-throw switch, and generates a large electromagnetic force at a high current, so that the metal strip is deformed to switch/disconnect a circuit, and an SF needs to be added to the circuit breaker 6 To assist arc extinction, SF 6 Has good thermal conductivity and higher electronegativity, and can rapidly extinguish the electric arc, thereby avoiding the occurrence of the sparking phenomenon.
Optionally, the semiconductor processing equipment further includes a lower electrode 140, a dc adsorption power supply 150, a second rf power supply 160, a second rf matcher 170, and a vacuum pump 180, wherein the lower electrode 140 is disposed below the electrostatic chuck 120, the dc adsorption power supply 150 and the second rf matcher 170 are both connected to the lower electrode 140, and the second rf power supply 160 is connected to the second rf matcher 170 for supplying power to the second rf matcher 170. The vacuum pump 180 is in communication with the process chamber 110 for adjusting the pressure within the process chamber 110 to meet the conditions of the wafer processing process.
Alternatively, the post-wafer remote plasma cleaning process recipe may be as shown in table 1.
TABLE 1
Wherein, the pressure range in the process chamber 110 is 500-20000 mTorr, the power range of the remote plasma cleaning process is 500-15000W, NF 3 The flow range is 10 to 1000sccm, the Ar flow range is 10 to 1000sccm, and the temperature of the cooling liquid of the electrostatic chuck 120 is-15 to 100 ℃ (preferably 50 ℃).
Alternatively, the pre-cycle pre-deposition process recipe is shown in table 2.
TABLE 2
Wherein the process chamber 110 has a pressure range of 1 mTorr to 200mTorr, and a top electrode center power range500-15000W, 500-15000W of the edge power range of the upper electrode, 0-15000W of the power range of the lower electrode 140 and center NF 3 Flow rate range of 10-1000 sccm, central SiH 4 Flow rate range of 10-1000 sccm, edge O 2 The flow range is 10-1000 sccm, the edge O 2 The flow rate ranges from 10 to 1000sccm, and the electrostatic chuck 120 coolant temperature ranges from-15 to 100 deg.C (preferably 50 deg.C).
Alternatively, the wafer processing recipe is exemplified by a main deposition recipe, as shown in table 3.
TABLE 3
Wherein, the pressure range in the process chamber 110 is 1 mTorr to 200mTorr, the central power range of the upper electrode is 500W to 15000W, the edge power range of the upper electrode is 500W to 15000W, the power range of the lower electrode 140 is 0W to 15000W, and the center NF 3 Flow rate range of 10-1000 sccm and central SiH 4 The flow range is 10-1000 sccm, the edge O 2 The flow range is 10-1000 sccm, the edge H 2 The flow rate ranges from 10 sccm to 1000sccm, and the temperature of the cooling fluid of the electrostatic chuck 120 ranges from-15 ℃ to 100 ℃ (preferably 50 ℃).
Alternatively, the post-sheet dry cleaning process recipe is shown in table 4.
TABLE 4
The cleaning step 1 is a first cleaning step, the cleaning step 2 is a second cleaning step, the preliminary deposition 1 is a wafer post-preliminary deposition process corresponding to the case that the deposit is silicon oxide, the preliminary deposition 2 is a wafer post-preliminary deposition process corresponding to the case that the deposit is silicon nitride, and the cleaning step 3 is a second auxiliary cleaning process. The process chamber 110 has a pressure range of 1-200 mTorr, a top electrode center power range of 500-15000W, a top electrode edge power range of 500-15000W, a bottom electrode 140 power range of 0-500W (when bottom electrode power is applied, a dummy wafer is required to protect ESC), siH 4 The flow range is 10-1000 sccm，NH 3 Flow rate range of 10-1000 sccm, center NF 3 Flow rate range of 10-1000 sccm, edge NF 3 The flow range is 10-1000 sccm, and the center O 2 Flow rate range of 10-1000 sccm, edge O 2 The flow rate ranges from 10 sccm to 1000sccm, and the temperature of the cooling fluid of the electrostatic chuck 120 ranges from-15 ℃ to 100 ℃ (preferably 50 ℃).
While the present embodiments have been described with reference to the accompanying drawings, it is to be understood that the invention is not limited to the precise embodiments described above, which are meant to be illustrative and not restrictive, and that various changes may be made therein by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (10)
1. A method of cleaning a semiconductor processing chamber configured to perform a process on a wafer, comprising:
after the processing technology of the current wafer is executed by the process chamber in the current process period, performing a post-wafer dry cleaning technology on the process chamber;
and performing a post-wafer remote plasma cleaning process on the process chamber until the first total number of the wafers which have been subjected to the processing process is greater than or equal to a first preset value.
2. The cleaning method according to claim 1, wherein the total number of the wafers on which the processing process has been performed in all process cycles is a second total number, the method further comprising:
setting an initial value of the first total number to 1 and the second total number to 0 before the process chamber performs a process;
when the first total quantity is smaller than the first preset value, judging whether the second total quantity is smaller than a second preset value;
and when the second total number is smaller than the second preset value, the first total number is increased by 1, and the processing chamber executes the processing process on the next wafer in the current process cycle.
3. The cleaning method of claim 2, wherein after the step of performing a post-wafer remote plasma cleaning process on the process chamber, further comprising:
assigning the sum of the second total number of the previous process cycle and the first total number of the current process cycle to the second total number;
judging whether the second total number is smaller than a second preset value or not;
and when the second total number is smaller than the second preset value, setting the first total number to be 1, and executing a processing process on the wafer in the next process period by the semiconductor process chamber.
4. The cleaning method according to claim 2, further comprising:
performing a post-wafer remote plasma clean process on the process chamber when the second total number equals the second preset value.
5. The cleaning method according to claim 3, further comprising:
performing a pre-cycle pre-deposition process on the process chamber after performing a pre-wafer remote plasma clean process on the process chamber and before performing a process of a current process cycle on the process chamber.
6. The cleaning method of claim 5, wherein the step of performing a post-wafer dry cleaning process on the process chamber comprises:
performing a first auxiliary cleaning process on the process chamber;
performing a post-wafer pre-deposition process on the process chamber;
a second auxiliary cleaning process is performed on the process chamber.
7. The cleaning method according to claim 6, wherein the film obtained by the pre-cycle deposition process and the film obtained by the post-wafer deposition process are both the same type as the film obtained by the processing process on the wafer, and the process time of the post-wafer deposition process is shorter than that of the pre-cycle deposition process.
8. The cleaning method of claim 6, wherein performing a first auxiliary cleaning process on the process chamber comprises:
performing a first cleaning step on the process chamber, the first cleaning step using a process gas comprising NF 3 And oxygen;
performing a second cleaning step on the process chamber to remove NF remained in the process chamber after the first cleaning step 3 And the process gas adopted by the second cleaning step comprises oxygen.
9. The cleaning method of claim 8, wherein the process gas used in the first cleaning step further comprises nitrogen when the deposits in the process chamber comprise silicon oxide.
10. The cleaning method according to claim 7, wherein the pre-wafer remote plasma cleaning process, the post-wafer remote plasma cleaning process, the pre-cycle pre-deposition process, the first auxiliary cleaning process, the second auxiliary cleaning process and the post-wafer pre-deposition process all use equal operating frequencies.
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| KR20080078344A (en) * | 2007-02-23 | 2008-08-27 | 삼성전자주식회사 | Equipment for etching semiconductor device and management method at the same |
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| CN101894737A (en) * | 2009-05-19 | 2010-11-24 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Control method of cavity environment |
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