CN115377158A - Display panel, manufacturing method thereof and display device - Google Patents

Abstract

The disclosure provides a display panel, a manufacturing method thereof and a display device, and belongs to the technical field of display. The display panel comprises a substrate, a driving circuit layer and a plurality of pixel circuits, wherein the driving circuit layer is arranged on one side of the substrate and comprises a plurality of pixel circuits; the first light-emitting layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of first light-emitting devices, and the pixel circuits are used for driving the first light-emitting devices to emit light in a one-to-one correspondence mode; the second light-emitting layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of second light-emitting devices, and the second light-emitting devices are organic light-emitting transistors; wherein an orthographic projection of the second light emitting device on the substrate does not overlap with an orthographic projection of the first light emitting device on the substrate. The display panel and the display method thereof contribute to improving the color gamut and the resolution of the display panel and improving the display effect of the display panel.

Description

Display panel, manufacturing method thereof and display device

Technical Field

The disclosure relates to the technical field of display, and in particular to a display panel, a manufacturing method thereof and a display device.

Background

With the development of OLED (Organic Light-Emitting Diode) display technology, consumers have made higher demands on OLED display products. At present, the color gamut and resolution of the OLED display panel are still to be further improved.

The above information disclosed in the background section is only for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not constitute prior art that is known to a person of ordinary skill in the art.

Disclosure of Invention

The present disclosure is directed to a display panel, a manufacturing method thereof, and a display device, which are helpful for improving a color gamut and a resolution of the display panel and improving a display effect of the display panel. In order to achieve the purpose, the technical scheme adopted by the disclosure is as follows:

according to a first aspect of the present disclosure, there is provided a display panel including:

a substrate base plate, a first substrate,

the driving circuit layer is arranged on one side of the substrate and comprises a plurality of pixel circuits;

the first light-emitting layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of first light-emitting devices, and the pixel circuits are used for driving the first light-emitting devices to emit light in a one-to-one correspondence manner;

the second light-emitting layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of second light-emitting devices, and the second light-emitting devices are organic light-emitting transistors;

wherein an orthographic projection of the second light emitting device on the substrate does not overlap with an orthographic projection of the first light emitting device on the substrate.

In one exemplary embodiment of the present disclosure, the first light emitting layer includes:

the first electrode layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of first electrodes of the first light-emitting devices which are distributed at intervals;

the pixel defining layer is arranged on one side, far away from the substrate base plate, of the first electrode layer and provided with a plurality of openings, and the openings expose the first electrodes of the first light-emitting devices in a one-to-one correspondence mode;

the first light-emitting functional layer is arranged on one side, far away from the substrate base plate, of the first electrode layer and comprises a plurality of first light-emitting parts, and the first light-emitting parts are located in the openings in a one-to-one correspondence mode;

a second electrode layer disposed on a side of the first light-emitting functional layer away from the first light-emitting functional layer, the second electrode layer including a plurality of second electrodes of the first light-emitting devices;

wherein an orthographic projection of the second light emitting device on the substrate base plate at least partially overlaps with an orthographic projection of the pixel defining layer on the substrate base plate.

In one exemplary embodiment of the present disclosure, the second light emitting layer includes:

the second gate layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of gates of the second light-emitting devices which are distributed at intervals;

the grid dielectric layer is arranged on one side, far away from the substrate, of the second grid layer and covers the second grid layer;

the third electrode layer is arranged on one side, far away from the substrate base plate, of the grid dielectric layer and comprises a plurality of first electrodes of the second light-emitting devices which are distributed at intervals;

the second light-emitting functional layer is arranged on one side, far away from the substrate, of the third electrode layer;

and the fourth electrode layer is arranged on one side of the second light-emitting functional layer, which is far away from the substrate, and comprises a plurality of second electrodes of the second light-emitting devices.

In an exemplary embodiment of the present disclosure, the second gate layer is disposed in the same layer as the first electrode layer, and an orthogonal projection of the second gate layer on the substrate does not overlap an orthogonal projection of the first electrode layer on the substrate;

the grid dielectric layer is multiplexed as the pixel defining layer.

In one exemplary embodiment of the present disclosure, the second light emitting layer includes:

the third electrode layer is arranged on one side, away from the substrate base plate, of the pixel defining layer and comprises a plurality of first electrodes of the second light-emitting devices which are distributed at intervals;

the second light-emitting functional layer is arranged on one side, far away from the substrate, of the third electrode layer;

the fourth electrode layer is arranged on one side, far away from the substrate, of the second light-emitting functional layer and comprises a plurality of second electrodes of the second light-emitting devices;

the grid dielectric layer is arranged on one side, far away from the substrate base plate, of the fourth electrode layer and covers the fourth electrode layer;

and the second gate layer is arranged on the surface of one side, far away from the substrate, of the second gate layer, and the second gate layer comprises a plurality of gates of the second light-emitting devices which are distributed at intervals.

In one exemplary embodiment of the present disclosure, the thickness of the third electrode layer is 100 to 500nm, and the material of the third electrode layer includes an opaque material.

In an exemplary embodiment of the present disclosure, the fourth electrode layer is disposed at the same layer as the second electrode layer.

In an exemplary embodiment of the present disclosure, the thickness of the pixel defining layer is 1 to 1.5 μm, the slope angle of the pixel defining layer between adjacent two of the openings is 20 to 40 °, the width of the pixel defining layer between adjacent two of the openings is 10 to 15 μm, and the width of the opening is 70 to 90 μm in the arrangement direction of the first and second light emitting devices.

In an exemplary embodiment of the present disclosure, the display panel further includes:

the packaging layer is arranged on one sides, far away from the substrate, of the first light-emitting layer and the second light-emitting layer;

the color film layer is arranged on one side, far away from the substrate base plate, of the packaging layer and comprises a shading portion and a plurality of light filtering portions separated by the shading portion, and the light filtering portions are arranged in one-to-one correspondence with the first light-emitting devices or the second light-emitting devices in the direction perpendicular to the substrate base plate.

In an exemplary embodiment of the present disclosure, the display panel further includes:

the quantum dot conversion layer is arranged between the packaging layer and the color film layer, the quantum dot conversion layer comprises an isolation part and a plurality of light conversion parts separated by the isolation part, the light conversion parts are arranged in one-to-one correspondence with the first light emitting devices or the second light emitting devices in a direction perpendicular to the substrate base plate, the light conversion parts and the light filtering parts are arranged in one-to-one correspondence in a direction perpendicular to the substrate base plate, and at least part of the conversion parts in the plurality of light conversion parts contain quantum dot materials.

In an exemplary embodiment of the present disclosure, the plurality of light conversion parts include:

a plurality of first light conversion parts for converting light emitted from the first light emitting device or the second light emitting device into a first color;

a plurality of second light conversion parts to convert light emitted from the first or second light emitting devices into a second color.

In an exemplary embodiment of the present disclosure, the plurality of light conversion parts further includes:

a plurality of third light conversion parts for converting light emitted from the first light emitting device or the second light emitting device into a third color;

or a plurality of light-transmitting portions for transmitting light emitted from the first light-emitting device or the second light-emitting device.

In an exemplary embodiment of the present disclosure, the driving circuit layer further includes:

a first scan line for supplying a first gate driving signal to the pixel circuit;

a second scan line for supplying a second gate driving signal to a gate electrode of the second light emitting device;

a first data line for supplying a first data signal to the pixel circuit;

a second data line for supplying a second data signal to the first electrode of the second light emitting device;

a first power voltage line for supplying a first voltage to a second electrode of the first light emitting device;

a second power voltage line for supplying a second voltage to a second electrode of the second light emitting device.

According to a second aspect of the present disclosure, there is provided a method for manufacturing a display panel, including:

a substrate base plate is provided and is provided,

forming a driving circuit layer on one side of the substrate, wherein the driving circuit layer comprises a plurality of pixel circuits;

forming a first light emitting layer and a second light emitting layer on one side of the driving circuit layer, which is far away from the substrate, wherein the first light emitting layer comprises a plurality of first light emitting devices, the pixel circuits are used for driving the first light emitting devices to emit light in a one-to-one correspondence manner, the second light emitting layer comprises a plurality of second light emitting devices, and the second light emitting devices are organic light emitting transistors;

wherein an orthographic projection of the second light emitting device on the substrate does not overlap with an orthographic projection of the first light emitting device on the substrate.

According to a third aspect of the present disclosure, there is provided a display device comprising the display panel according to the first aspect.

The display panel provided by the disclosure comprises a first light emitting layer and a second light emitting layer, wherein the first light emitting layer comprises a first light emitting device, the second light emitting layer comprises a second light emitting device, the second light emitting device is an organic light emitting transistor, and orthographic projections of the first light emitting device and the second light emitting device on a substrate do not overlap. According to the display panel, the first light-emitting device driven by the pixel circuit is combined with the second light-emitting device with the switch function, so that the color gamut and the resolution of the display panel are improved, and the display effect of the display panel is improved.

Drawings

The above and other features and advantages of the present disclosure will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings.

FIG. 1 is a schematic view of a substrate base plate structure in an exemplary embodiment of the present disclosure;

FIG. 2 is a schematic diagram of a display panel structure in an exemplary embodiment of the disclosure;

FIG. 3 is a schematic diagram of a display panel structure in another exemplary embodiment of the present disclosure;

FIG. 4 is a schematic diagram of a display panel structure in yet another exemplary embodiment of the present disclosure;

FIG. 5 is a schematic diagram of a display panel structure according to yet another exemplary embodiment of the present disclosure;

fig. 6 is a schematic view of a second light emitting device signal line connection structure in an exemplary embodiment of the present disclosure;

FIG. 7 is a schematic diagram of a pixel arrangement structure of a display panel according to an exemplary embodiment of the disclosure;

fig. 8 is a schematic diagram of a pixel arrangement structure of a display panel in an exemplary embodiment of the disclosure.

The reference numerals of the main elements in the figures are explained as follows:

1-a substrate base plate; 01-a display area; 02-peripheral region; 2-a drive circuit layer; 21-a light-shielding layer; 22-a buffer layer; 231-an active layer; 232-gate insulating layer; 233 — first gate layer; 234-interlayer dielectric layer; 235-source drain layer; 24-a passivation layer; 25-a planarization layer; 26-an insulating layer; 27-a second data line; 28-a second supply voltage line; 29-a second scan line; 3-a first light-emitting layer; 30-a first light emitting device; 301-a first electrode layer; 302-a first luminescent functional layer; 303-a second electrode layer; 31-a pixel definition layer; 4-a second light-emitting layer; 40-a second light emitting device; 401 — second gate layer; 402-a gate dielectric layer; 403-a third electrode layer; 404-a second light-emitting functional layer; 405-a fourth electrode layer; 5-packaging layer; a 6-quantum dot conversion layer; 61-a spacer; 62-a light conversion section; 621-a first light conversion part; 622 — second light conversion section; 623-a light-transmitting part; 7-a color film layer; 71-a light-shielding portion; 72-a filter section; 8-cover plate.

Detailed Description

Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure.

In the drawings, the thickness of regions and layers may be exaggerated for clarity. The same reference numerals in the drawings denote the same or similar structures, and thus a detailed description thereof will be omitted.

The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the embodiments of the disclosure can be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring the primary technical ideas of the disclosure.

When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via another structure.

The terms "a," "an," "the," and the like are used to denote the presence of one or more elements/components/parts; the terms "comprising" and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. other than the listed elements/components/etc. The terms "first" and "second", etc. are used merely as labels, and are not limiting on the number of their objects.

In the related art, the color gamut and the resolution of the OLED display panel are yet to be further improved. For example, for a QD-OLED (quantum dot-Organic Light-Emitting Diode) display panel, light emitted by a blue Organic Light-Emitting Diode usually needs to be converted into red Light and green Light by a quantum dot conversion layer, but the B-OLED (blue Organic Light-Emitting Diode) has low device efficiency and low quantum dot conversion efficiency, which results in large device power consumption, low color gamut and low resolution.

As shown in fig. 1 to 5, the display panel according to the embodiment of the present disclosure includes a substrate 1, a driving circuit layer 2, a first light emitting layer 3, and a second light emitting layer 4, where the driving circuit layer 2 is disposed on one side of the substrate 1 and includes a plurality of pixel circuits; the first light-emitting layer 3 is arranged on one side of the driving circuit layer 2 far away from the substrate base plate 1, the first light-emitting layer 3 comprises a plurality of first light-emitting devices 30, and the plurality of pixel circuits are used for driving the first light-emitting devices 30 to emit light in a one-to-one correspondence manner; the second light-emitting layer 4 is arranged on one side of the driving circuit layer 2 far away from the substrate base plate 1, the second light-emitting layer 4 comprises a plurality of second light-emitting devices 40, and the second light-emitting devices 40 are organic light-emitting transistors; wherein the orthographic projection of the second light emitting device 40 on the substrate base plate 1 is not overlapped with the orthographic projection of the first light emitting device 30 on the substrate base plate 1.

The display panel provided by the present disclosure includes a first light emitting layer 3 and a second light emitting layer 4, wherein the first light emitting layer 3 includes a first light emitting device 30, the second light emitting layer 4 includes a second light emitting device 40, the second light emitting device 40 is an organic light emitting transistor, and orthographic projections of the first light emitting device 30 and the second light emitting device 40 on a substrate 1 do not overlap. The present disclosure combines the first light emitting device 30 driven by the pixel circuit with the second light emitting device 40 having the switching function, which is helpful to improve the color gamut and the resolution of the display panel and improve the display effect of the display panel.

The components of the display panel provided in the embodiments of the present disclosure are described in detail below with reference to the accompanying drawings:

as shown in fig. 2 to 5, the present disclosure provides a display panel, which may be an OLED (Organic Light-Emitting Diode) display panel or a QD-OLED (quantum dot-Organic Light-Emitting Diode) display panel. The display panel includes a substrate 1, a driving circuit layer 2, a first light emitting layer 3, and a second light emitting layer 4. The driving circuit layer 2 is arranged on one side of the substrate base plate 1 and comprises a plurality of pixel circuits; the first light-emitting layer 3 is arranged on one side of the driving circuit layer 2 far away from the substrate base plate 1, the first light-emitting layer 3 comprises a plurality of first light-emitting devices 30, and the plurality of pixel circuits are used for driving the first light-emitting devices 30 to emit light in a one-to-one correspondence manner; and the second light-emitting layer 4 is arranged on one side of the driving circuit layer 2 far away from the substrate base plate 1, the second light-emitting layer 4 comprises a plurality of second light-emitting devices 40, and the second light-emitting devices 40 are organic light-emitting transistors.

The base substrate 1 may be an inorganic base substrate 1 or an organic base substrate 1. For example, in one embodiment of the present disclosure, the material of the substrate base plate 1 may be a glass material such as soda-lime glass (soda-lime glass), quartz glass, or sapphire glass, or may be a metal material such as stainless steel, aluminum, or nickel. The substrate 1 may also be a flexible substrate 1, for example, in one embodiment of the present disclosure, the material of the substrate 1 may be Polyimide (PI). The substrate 1 may also be a composite of multiple layers of materials, for example, in an embodiment of the present disclosure, the substrate 1 may include a Bottom Film layer (Bottom Film), a pressure sensitive adhesive layer, a first polyimide layer, and a second polyimide layer, which are sequentially stacked.

As shown in fig. 1, the base substrate 1 may include a display region 01 and a peripheral region 02 located at the periphery of the display region 01. The display area 01 may be correspondingly provided with a pixel circuit, a light emitting device, and the like to display a picture. The peripheral area 02 may be correspondingly provided with peripheral circuits and the like to drive the pixel circuits located in the display area 01.

As shown in fig. 2 to 5, the driving circuit layer 2 is disposed on one side of the substrate 1, and the driving circuit layer 2 includes a driving circuit for driving each of the first light emitting devices 30 to emit light. The driving circuit may include a pixel circuit and a peripheral circuit, the pixel circuit is disposed in the display area 01, and may be a pixel circuit of 7T1C, 7T2C, 6T1C, or 6T2C, as long as the first light emitting device 30 can be driven to emit light, and the structure thereof is not particularly limited. The number of the pixel circuits is the same as the number of the first light emitting devices 30, and the pixel circuits are connected to the respective first light emitting devices 30 in a one-to-one correspondence so as to control the respective first light emitting devices 30 to emit light, respectively. Where nTmC denotes that one pixel circuit includes n transistors (denoted by the letter "T") and m capacitors (denoted by the letter "C").

The peripheral circuit is located in the peripheral area 02, and the peripheral circuit is connected to the pixel circuit for inputting a driving signal to the pixel circuit so as to control the first light emitting device 30 to emit light. The peripheral circuit may include a gate driving circuit and a light emission control circuit, and of course, may include other circuits, and the specific structure of the peripheral circuit is not particularly limited herein.

The driving circuit layer 2 may include a plurality of layers, for example, a top gate thin film transistor is a transistor in the driving circuit, and the driving circuit layer 2 may include an active layer 231, a gate insulating layer 232, a first gate layer 233, an interlayer dielectric layer 234, and a source drain layer 235. The active layer 231 is disposed on one side of the substrate base plate 1, and the material of the active layer 231 may be polysilicon or IGZO (indium gallium zinc oxide), which may change the conductivity at different positions through processes such as doping. The active layer 231 may include an active region of each transistor in the driving circuit. The gate insulating layer 232 is disposed on a side of the active layer 231 away from the substrate base plate 1, and the gate insulating layer 232 covers the active layer 231. The gate insulating layer 232 may be a single layer of silicon nitride, silicon oxide, aluminum oxide, or a plurality of layers formed by a combination thereof. The gate insulating layer 232 may be formed by a deposition method, for example, a silicon oxide layer may be formed by a vapor chemical deposition method as a gate insulating material layer, and the gate insulating layer 232 may be formed after patterning the gate insulating material layer. The first gate layer 233 is disposed on a side of the gate insulating layer 232 away from the substrate 1, and the first gate layer 233 may include gates of transistors in the pixel circuit. The first gate layer 233 may include a metal material or an alloy material to ensure good conductive performance thereof. Of course, the first gate layer 233 may also be made of a transparent conductive material, such as ITO (indium tin oxide), IZO (indium zinc oxide), and the like. The interlayer dielectric layer 234 is disposed on a side of the first gate layer 233 away from the substrate 1, and the interlayer dielectric layer 234 covers the gate layer. The source drain layer 235 is disposed on a side of the interlayer dielectric layer 234 away from the substrate base plate 1, and the source drain layer 235 may include a source and a drain of each transistor, and the source and the drain of each transistor are connected to a respective active region. Source drain layer 235 may include a metal material or an alloy material to ensure good conductivity. Of course, the source/drain layer 235 may also be made of a transparent conductive material, such as ITO (indium tin oxide), IZO (indium zinc oxide), and the like.

In some embodiments, the driving circuit layer 2 further includes a light shielding layer 21 and a buffer layer 22, wherein the light shielding layer 21 is disposed between the substrate 1 and the active layer 231, the light shielding layer 21 is used for shielding the active layer 231 from light, and the light shielding layer 21 may be made of an opaque metal material or a metal alloy material. The orthographic projection of the active layer 231 on the base substrate 1 is located within the orthographic projection of the light shielding layer 21 on the base substrate 1, and further, the orthographic projection of the gate electrode of each transistor in the pixel circuit on the base substrate 1 is located within the orthographic projection of the light shielding layer 21 on the base substrate 1. The light-shielding layer 21 may be connected to the active layer 231 and further connected to a power supply voltage through a source or a drain of each transistor in the pixel circuit, thereby reducing the impedance of the power supply line. The buffer layer 22 is provided between the light-shielding layer 21 and the active layer 231, and the buffer layer 22 covers the light-shielding layer 21.

Further, the driving circuit layer 2 further includes a planarization layer 25 disposed on a side of the source drain layer 235 away from the substrate base plate 1.

The first light emitting layer 3 includes a plurality of first light emitting devices 30, and the first light emitting devices 30 may be organic light emitting diodes. The first light emitting device 30 may include a first electrode, a second electrode, and a light emitting function layer between the first electrode and the second electrode. The first electrode may be an anode and the second electrode may be a cathode. The plurality of first light emitting devices 30 are arrayed in the display region 01.

The first light-emitting layer 3 includes a first electrode layer 301, a pixel defining layer 31, a first light-emitting function layer 302, and a second electrode layer 303. The first electrode layer 301 is disposed on a side of the driving circuit layer 2 away from the substrate base plate 1, and the first electrode layer 301 includes a plurality of first electrodes of the first light emitting devices 30 arranged at intervals. The material of the first electrode layer 301 may be a metal material or an alloy material to ensure good electrical conductivity thereof. Of course, a transparent conductive material such as ITO (indium tin oxide), IZO (indium zinc oxide), or the like may also be used. The first electrode layer 301 may be a single-layer film structure or a multi-layer film layer stacked structure, for example, the first electrode layer 301 may be a multi-layer stacked structure formed of ITO/Ag/ITO, or Ti/Al/Ti.

The pixel defining layer 31 is provided on a side of the first electrode layer 301 remote from the base substrate 1, e.g., on a side of the planarization layer 25 remote from the base substrate 1. The pixel defining layer 31 may be used to partition the first light emitting device 30. The pixel defining layer 31 is provided with a plurality of openings exposing the first electrodes of the respective first light emitting devices 30 in a one-to-one correspondence. Each opening is not larger than the exposed first electrode of the first light emitting device 30, that is, the range of any opening is located within the boundary of the first electrode of its corresponding first light emitting device 30. Each opening defines an area that is an area of a first light emitting device 30. The shape of the opening, that is, the shape of the outline of the opening on the orthographic projection of the substrate base plate 1, may be a polygon, a smooth closed curve or other shapes, and is not particularly limited herein. The pixel defining layer 31 has a thickness of 1 to 1.5 μm, a slope angle of the pixel defining layer between adjacent two of the openings is 20 to 40 °, such as 30 °, a width of the pixel defining layer between adjacent two of the openings is 10 to 15 μm, such as 12 μm, and a width of the opening is 70 to 90 μm, such as 84 μm, in an arrangement direction of the first and second light emitting devices. . It should be noted that, the slope angle herein refers to an included angle between a side surface of the pixel defining layer 31 close to the substrate 1 and a sidewall of the pixel defining layer 31 between two adjacent openings.

The first light emitting function layer 302 is disposed on a side of the first electrode layer 301 away from the base substrate 1, and the first light emitting function layer 302 includes a plurality of first light emitting portions, which are located in the openings in a one-to-one correspondence. The first light emitting function layer 302 may include a hole injection layer, a hole transport layer, a first light emitting material layer, an electron transport layer, and an electron injection layer, which are sequentially stacked in a direction away from the driving backplane, and may generate visible light by combining holes and electrons into excitons in the light emitting material layer and radiating photons from the excitons, and the specific light emitting principle will not be described in detail herein. The light emitting color of the first light emitting device 30 can be determined by the first light emitting material layer, and different first light emitting material layers can emit light with different colors. For example, the first light emitting device 30 may emit red light, green light, and blue light, and of course, the first light emitting device 30 may also emit white light, and the disclosure is not limited thereto.

The second electrode layer 303 is provided on the first light-emitting function layer 302 on the side away from the first light-emitting function layer 302. The second electrode layer 303 includes a plurality of second electrodes of the first light emitting devices 30 which are spaced apart. The orthographic projection of the second electrode on the base substrate 1 covers the orthographic projection of the opening on the base substrate 1. In some embodiments of the present disclosure, the first electrode and the second electrode of each first light emitting device 30 are both independent structures, that is, the first electrode layer 301 and the second electrode layer 303 corresponding to each first light emitting device 30 are not connected to each other, and are independent structures arranged at intervals.

In some embodiments of the present disclosure, an orthographic projection of the second light emitting device 40 on the substrate base 1 at least partially overlaps with an orthographic projection of the pixel defining layer 31 on the substrate base 1. Thus, the area of the pixel defining layer 31 can be utilized, which is helpful for improving the resolution and the aperture ratio of the display panel. In addition, the light emitting color of the second light emitting device 40 can be adjusted according to the display effect of the first light emitting device 30, so that the color gamut of the display panel is improved, and the display effect is improved.

The second Light Emitting device 40 is an Organic Light Emitting Transistor (OLET) which has a switching property by itself. The second light emitting device 40 includes a gate electrode, a gate dielectric layer, a first electrode, a second electrode, and a light emitting function layer between the first electrode and the second electrode. The first electrode may be a source electrode or a drain electrode, and the second electrode may be a drain electrode or a source electrode, respectively.

The second light emitting device 40 may be a top gate structure or a bottom gate structure.

As shown in fig. 2 and 4, in some embodiments, the second light emitting device 40 is a bottom gate structure. The second light emitting layer 4 includes a second gate layer 401, a gate dielectric layer 402, a third electrode layer 403, a second light emitting function layer 404, and a fourth electrode layer 405.

The second gate layer 401 is disposed on a side of the driving circuit layer 2 away from the substrate 1, and the second gate layer 401 includes a plurality of gates of the second light emitting devices 40 distributed at intervals. An orthogonal projection of the second gate layer 401 on the substrate base plate 1 does not overlap an orthogonal projection of the first electrode layer 301 on the substrate base plate 1. The material of the second gate layer 401 may include a metal material or an alloy material to ensure good conductivity. Of course, a transparent conductive material such as ITO (indium tin oxide), IZO (indium zinc oxide), or the like may be included. The second gate layer 401 may be a single-layer film structure or a multi-layer film layer stacked structure, for example, the second gate layer 401 may be a multi-layer stacked structure formed of ITO/Ag/ITO, or Ti/Al/Ti.

In an embodiment of the present disclosure, the second gate layer 401 is disposed in the same layer as the first electrode layer 301. In the present disclosure, the same layer arrangement means that the same material and the same process are adopted for manufacturing. Specifically, a conductive material layer may be formed on a side of the planarization layer 25 away from the substrate 1, and then patterned to form the second gate layer 401 and the first electrode layer 301, the second gate layer 401 and the first electrode layer 301 being disconnected so as to independently control the first light emitting device 30 and the second light emitting device 40, respectively.

The gate dielectric layer 402 is disposed on a side of the second gate layer 401 away from the substrate 1, and the gate dielectric layer 402 covers the second gate layer 401. The material of the gate dielectric layer 402 may include a high dielectric constant material, such as AL2O3, tiO2, siNx, siO2, siON, PMMA (polymethyl methacrylate), PEO (polyethylene oxide), and the like. In some embodiments, the gate dielectric layer 402 is multiplexed into the pixel definition layer 31. That is, the gate dielectric layer 402 and the pixel defining layer 31 are the same film layer, i.e., function to isolate the second gate layer 401 from the third electrode layer 403, and also function to define the range of the first light emitting device 30. When the gate dielectric layer 402 is multiplexed as the pixel defining layer 31, the shape and size of the gate dielectric layer 402 should meet the requirements of the display panel for the pixel defining layer 31. In this embodiment, the gate dielectric layer 402 and the pixel defining layer 31 share the same film layer, which helps to reduce the thickness of the display panel.

The third electrode layer 403 is disposed on a side of the gate dielectric layer 402 away from the substrate base plate 1, and the third electrode layer 403 includes a plurality of first electrodes of the second light emitting devices 40 distributed at intervals. In this embodiment, the first electrode of the second light emitting device 40 may be a source electrode. An orthogonal projection of the third electrode layer 403 on the base substrate 1 at least partially overlaps an orthogonal projection of the pixel defining layer 31 on the base substrate 1, such as within the orthogonal projection of the pixel defining layer 31 on the base substrate 1. The material of the third electrode layer 403 may be the same as or different from that of the first electrode layer 301, and a metal material or an alloy material may be selected to ensure good electrical conductivity. The third electrode layer 403 may be a single-layer film structure or a multilayer film layer stacked structure, for example, the third electrode layer 403 may be a multilayer stacked structure formed of ITO/Ag/ITO, or Ti/Al/Ti. In addition, the material of the third electrode layer 403 may include opaque conductive materials, such as carbon nanotubes, graphene, silver nanowires, and other low density materials, which is helpful for reducing the side light leakage probability and reducing crosstalk between different pixels. The thickness of the third electrode layer 403 may be 100 to 500nm, which may not shield the charge control function of the gate of the second light emitting device 40, but may also reduce the transmittance, and may be used as the pixel defining layer 31 together with the gate dielectric layer 402 to reduce the occurrence probability of crosstalk between adjacent pixels.

The second light-emitting functional layer 404 is provided on the side of the third electrode layer 403 remote from the base substrate 1. The second light emitting functional layer 404 may include a hole injection layer, a hole transport layer, a second light emitting material layer, an electron transport layer, and an electron injection layer, which are sequentially stacked in a direction away from the driving backplane, and may generate visible light by combining holes and electrons into excitons in the light emitting material layer and radiating photons from the excitons, and the specific light emitting principle will not be described in detail herein. The light emitting color of the second light emitting device 40 may be determined by the second light emitting material layers, and different second light emitting material layers may emit light of different colors. For example, the second light emitting device 40 may emit red light, green light, and blue light, and of course, the first light emitting device 30 may also emit white light, and the disclosure is not limited thereto.

A fourth electrode layer 405 is provided on the side of the second light-emitting functional layer 404 away from the base substrate 1, and the fourth electrode layer 405 includes second electrodes of the plurality of second light-emitting devices 40. In some embodiments of the present disclosure, the first electrode and the second electrode of each second light emitting device 40 are independent structures, that is, the third electrode layer 403 and the fourth electrode layer 405 corresponding to each second light emitting device 40 are not connected to each other, and are independent structures arranged at intervals. The fourth electrode layer 405 may be disposed on the same layer as the second electrode layer 303, that is, the fourth electrode layer 405 and the second electrode layer 303 are made of the same material and by the same process.

In other embodiments of the present disclosure, as shown in fig. 3 and fig. 5, the second light emitting device 40 is a top-gate structure, and the second light emitting layer 4 sequentially includes a third electrode layer 403, a second light emitting function layer 404, a fourth electrode layer 405, a gate dielectric layer 402, and a second gate layer 401 along a direction away from the substrate 1.

The third electrode layer 403 is disposed on a side of the pixel defining layer 31 away from the substrate base plate 1, and the third electrode layer 403 includes a plurality of first electrodes of the second light emitting devices 40 distributed at intervals. The first electrode of the second light emitting device 40 may be a source or a drain, for example, where the first electrode may be a drain. The orthographic projection of the third electrode layer 403 on the base substrate 1 at least partially overlaps the orthographic projection of the pixel defining layer 31 on the base substrate 1, such as within or just completely overlapping the orthographic projection of the pixel defining layer 31 on the base substrate 1. The thickness of the third electrode layer 403 may be 100 to 500nm, which may reduce transmittance, and may define the range of the first light emitting device 30 together with the pixel defining layer 31, thereby reducing the occurrence probability of crosstalk between adjacent pixels. In this embodiment, the material of the third electrode layer 403 can refer to the selection of the material of the third electrode layer 403 in the above embodiments, which is not described in detail herein.

The second light-emitting functional layer 404 is provided on the side of the third electrode layer 403 remote from the base substrate 1. The fourth electrode layer 405 is provided on a side of the second light emitting function layer 404 away from the base substrate 1, and the fourth electrode layer 405 includes second electrodes of the plurality of second light emitting devices 40. The second electrode of the second light emitting device 40 may be a drain or a source, for example, where the second electrode may be a source. In this embodiment, the film structures and material selections of the second light-emitting functional layer 404 and the fourth electrode layer 405 can refer to the above embodiments, which are not described in detail herein. In this embodiment, the fourth electrode layer 405 may also be disposed in the same layer as the second electrode layer 303.

The gate dielectric layer 402 is disposed on a side of the fourth electrode layer 405 away from the substrate 1, and the gate dielectric layer 402 covers the fourth electrode layer 405. In this embodiment, the gate dielectric layer 402 may be designed differently from the above embodiment, instead of being multiplexed as the pixel defining layer 31, and the thickness may be set thinner than that of the above embodiment. In this embodiment, the material of the gate dielectric layer 402 can refer to the above embodiments, and is not described in detail herein.

The second gate layer 401 is disposed on a surface of the second gate layer 401 away from the substrate 1, and the second gate layer 401 includes a plurality of gates of the second light emitting devices 40 distributed at intervals. In this embodiment, the material of the second gate layer 401 may include a metal material or an alloy material to ensure good conductivity. Of course, a transparent conductive material such as ITO (indium tin oxide), IZO (indium zinc oxide), or the like may also be included.

In this embodiment, the first electrode layer 301 further includes a shielding electrode 407, and an orthogonal projection of the second light emitting device 40 on the substrate base plate 1 and an orthogonal projection of the shielding electrode 407 on the substrate base plate at least partially overlap to reduce an influence of the lower pixel circuit on a light emitting signal of the second light emitting device 40.

As shown in fig. 2 to 5, in some embodiments of the present disclosure, the display panel further includes an encapsulation layer 5, and the encapsulation layer 5 covers surfaces of the first light emitting layer 3 and the second light emitting layer 4 away from the substrate 1, which may be used to protect the first light emitting layer 3 and the second light emitting layer 4 and prevent external water and oxygen from corroding the first light emitting device 30 and the second light emitting device 40.

In some embodiments of the present disclosure, the Encapsulation may be implemented by using a Thin-Film Encapsulation (TFE), and specifically, the Encapsulation layer 5 may include a first inorganic layer, an organic layer, and a second inorganic layer, wherein the first inorganic layer covers the surfaces of the first light-emitting layer 3 and the second light-emitting layer 4 away from the substrate 1, the organic layer may be disposed on the surface of the first inorganic layer away from the substrate 1, the edge of the organic layer is defined inside the boundary of the first inorganic layer, the second inorganic layer covers the organic layer and the first inorganic layer not covered by the organic layer, the second inorganic layer may block the water and oxygen intrusion, and the planarization may be implemented by the organic layer having flexibility.

In the present disclosure, the light emitting colors of the first and second light emitting devices 30 and 40 may be set according to the display requirements of the display panel. For example, different first light emitting devices 30 of the plurality of first light emitting devices 30 may emit light of different colors, such as red light, green light, and blue light. The second light emitting device 40 may be the most supplementary light emitting device to make up for the deficiency of the first light emitting device 30, e.g., the second light emitting device 40 may emit blue light. Of course, the light emission colors of the first and second light emitting devices 30 and 40 are not limited thereto.

As shown in fig. 7 and 8, in some embodiments, the first light emitting device 30 and the second light emitting device 40 may form different pixel arrangements according to their own arrangement sequence, for example, the first light emitting device 30 and the second light emitting device 40 may be used as a respective independent sub-pixel, and each of the first light emitting device 30 and the second light emitting device 40 may emit light with different colors to form sub-pixels with different colors, such as a red sub-pixel (R), a green sub-pixel (G), and a blue sub-pixel (B). The first light emitting device 30 positioned in the opening of the pixel defining layer 31 and the second light emitting device 40 positioned on the pixel defining layer 31 may be arranged to form pixels such as RGB BRG BGR BGRB RBGB. For example, as shown in fig. 8, the first light emitting device 30 positioned in the opening of the pixel defining layer 31 and the second light emitting device 40 positioned on the pixel defining layer 31 are arranged to form an RGB pixel, and as shown in fig. 7, the first light emitting device 30 positioned in the opening of the pixel defining layer 31 and the second light emitting device 40 positioned on the pixel defining layer 31 are arranged to form an RBGB pixel.

As shown in fig. 2 and fig. 3, of course, the first light emitting device 30 and the second light emitting device 40 may also emit white light, in this case, the display panel may further include a color film layer 7 disposed on a side of the encapsulation layer 5 away from the substrate 1, the color film layer 7 includes a light shielding portion 71 and a plurality of filter portions 72 separated by the light shielding portion 71, and the filter portions 72 are disposed in one-to-one correspondence with the first light emitting device 30 or the second light emitting device 40 in a direction perpendicular to the substrate 1. The light shielding portion 71 may be a light shielding material, for example, the material of the light shielding portion 71 may include black resin. The light shielding portion 71 may be opened with through holes corresponding to the first light emitting device 30 or the second light emitting device 40 one to define the range of the light filter portion 72. The light-filtering portions 72 may be made of light-filtering materials, each light-filtering portion 72 only allows light of one color to pass through, meanwhile, the light-filtering portions 72 are correspondingly disposed in the through holes of the light-shielding portions 71, so as to be separated by the light-shielding portions 71, and light emitted from the first light-emitting device 30 and the second light-emitting device 40 can be emitted through the corresponding light-filtering portions 72. Each of the first and second light emitting devices 30 and 40 and the corresponding filter 72 may form a light emitting unit that can emit monochromatic light, such as red, blue, or green. Of course, the light emitting unit may also emit white light, and in this case, the filter portion 72 may be made of a transparent material. Each light emitting unit forms one sub-pixel, and as in the above embodiments, a plurality of light emitting units may be arranged to form pixels of RGB BRG BGR rb RBGB, etc.

As shown in fig. 4 and 5, in some embodiments, the display panel further includes a quantum dot conversion layer 6, the quantum dot conversion layer 6 is disposed between the encapsulation layer 5 and the color film layer 7, and the quantum dot conversion layer 6 includes a partition 61 and a plurality of light conversion portions 62 separated by the partition 61. The material of the isolation portion 61 may be a plastic material, and the isolation portion 61 may be formed with through holes corresponding to the first light emitting devices 30 or the second light emitting devices 40 one to define the range of the light conversion portion 62. The plurality of light conversion portions 62 are disposed in one-to-one correspondence with the first light emitting device 30 or the second light emitting device 40 in a direction perpendicular to the substrate base plate 1, and at least a part of the plurality of light conversion portions 62 contains a quantum dot material. Quantum dots are nano-scale semiconductors that emit light of a specific frequency by applying a certain electric field or light pressure to the nano-semiconductor material, and the frequency of the emitted light varies with the size of the semiconductor, so that the color of the emitted light can be controlled by adjusting the size of the nano-semiconductor.

In some embodiments of the present disclosure, the plurality of light conversion parts 62 include a plurality of first light conversion parts 621 and a plurality of second light conversion parts 622, wherein the first light conversion parts 621 are used to convert light emitted from the first light emitting device 30 or the second light emitting device 40 into a first color. The second light conversion part 622 functions to convert light emitted from the first or second light emitting device 30 or 40 into a second color. The specific color selection of the first color and the second color can be set according to practical situations, for example, the first color can be green, and the second color can be red, but is not limited thereto. For example, the first and second light emitting devices 30 and 40 may emit blue light, the first light conversion part 621 may convert the blue light into green light, and the second light conversion part 622 may convert the blue light into red light.

In an embodiment, the plurality of light conversion parts 62 further includes a plurality of third light conversion parts for converting light emitted from the first light emitting device 30 or the second light emitting device 40 into a third color. The third color may be blue.

In another embodiment, the plurality of light conversion portions 62 further include a plurality of light transmitting portions 623 for transmitting light emitted from the first light emitting device 30 or the second light emitting device 40. The light-transmitting portion 623 may include scattering particles. For example, the first light emitting device 30 or the second light emitting device 40 may emit blue light, and the light transmitting portion 623 may transmit the blue light.

In the present disclosure, the color of the light converted by the light conversion portion 62 is the same as the color of the light transmitted by the corresponding filter portion 72, and if the color of the light converted by the first light conversion portion 621 is the first color, for example, green, then the corresponding filter portion 72 can transmit the light of the first color, for example, green. In this embodiment, each of the first light emitting device 30 or the second light emitting device 40, together with the corresponding light conversion part 62 and the filter part 72, forms a light emitting unit that can emit monochromatic light, such as red, blue, or green. Each light emitting unit forms one sub-pixel, and as in the above embodiments, a plurality of light emitting units may be arranged to form pixels of RGB BRG BGR rb RBGB, etc.

As shown in fig. 2 to 5, in some embodiments of the present disclosure, the display panel further includes a cover plate 8 disposed on a side of the color film layer 7 away from the substrate base plate 1. The material of the cover plate 8 may be a transparent material.

In the present disclosure, the driving circuit layer 2 further includes a first scanning line, a second scanning line 29, a first data line, a second data line 27, a first power voltage line, and a second power voltage line 28, wherein the first scanning line is used for providing a first gate driving signal to the pixel circuit, and in particular, is used for providing a gate driving signal to the gate of the driving transistor in the pixel circuit. The second scan line 29 is used to provide a second gate driving signal to the gate electrode of the second light emitting device 40. The first data line is used to provide a first data signal to the pixel circuit to control the light emission luminance of the first light emitting device 30, and the second data line 27 is used to provide a data signal to the first electrode of the second light emitting device 40, such as to the source electrode of the second light emitting device 40, to control the light emission luminance of the second light emitting device 40. The first power voltage line is used to supply a first voltage to the second electrode of the first light emitting device 30. The second power voltage line 28 is used to supply a second voltage to the second electrode of the second light emitting device 40. The first voltage and the second voltage may be Vss signals, which may be the same or different in size.

In this embodiment, the first scan line may be distributed in the first gate layer 233, the first data line may be distributed in the source drain layer 235, and the first power voltage line may also be distributed in the source drain layer 235, and of course, the first scan line, the first data line, and the first power voltage line may also be distributed in other conductive layers of the driving circuit layer 2 as long as they have good conductive performance.

As shown in fig. 6, the driving circuit layer 2 may further include at least one signal line layer, which is disposed between the source drain layer 235 and the planarization layer 25, and insulating layers are disposed between the source drain layer 235 and the signal line layer, and between two adjacent signal line layers. The second scan line 29, the second data line 27, and the second power voltage line 28 may be distributed in at least one signal line layer, and particularly in which signal line layer, and the disclosure is not particularly limited.

Further, the driving circuit layer 2 further includes a third power voltage line and a fourth power voltage line, wherein the third power voltage line is used for providing a third voltage to the pixel circuit, the fourth power voltage line is used for providing a fourth voltage to the first electrode of the second light emitting device 40, and the third voltage and the fourth voltage may be Vdd signals, and the magnitudes of the third voltage and the fourth voltage may be the same or different. The third power voltage line may be distributed in the source drain layer 235, and the fourth power voltage line may be distributed in the signal line layer, but is not limited thereto.

As shown in fig. 2 to 5, the present disclosure also provides a method for manufacturing a display panel, including:

step S100, providing a substrate base plate 1,

step S200, forming a driving circuit layer 2 on one side of a substrate 1, wherein the driving circuit layer 2 comprises a plurality of pixel circuits;

step S300, forming a first light emitting layer 3 and a second light emitting layer 4 on a side of the driving circuit layer 2 away from the substrate 1, where the first light emitting layer 3 includes a plurality of first light emitting devices 30, the plurality of pixel circuits are used to drive the first light emitting devices 30 to emit light in a one-to-one correspondence manner, the second light emitting layer 4 includes a plurality of second light emitting devices 40, and the second light emitting devices 40 are organic light emitting transistors;

wherein the orthographic projection of the second light-emitting device 40 on the substrate base plate 1 is not overlapped with the orthographic projection of the first light-emitting device 30 on the substrate base plate 1.

As shown in fig. 2 and 4, in some embodiments of the present disclosure, the step S200 of forming the first light emitting layer 3 and the second light emitting layer 4 on the side of the driving circuit layer 2 away from the substrate 1 includes:

step S210, forming a first conductive material layer on a side of the driving circuit layer 2 away from the substrate 1, patterning the first conductive material layer to form a first electrode layer 301 and a second gate layer 401, where the first electrode layer 301 includes a plurality of first electrodes of the first light emitting devices 30 distributed at intervals, and the second gate layer 401 includes a plurality of gates of the second light emitting devices 40 distributed at intervals;

step S220 is to form a high-k material layer on the sides of the first electrode layer 301 and the third electrode layer 403 away from the substrate base plate 1, pattern the high-k material layer, and form a gate dielectric layer 402, where the gate dielectric layer 402 is multiplexed as a pixel definition layer 31, the pixel definition layer 31 includes a plurality of openings, the openings expose the first electrodes of the first light emitting devices 30 in a one-to-one correspondence manner, and an orthographic projection of the gate dielectric layer 402 on the substrate base plate 1 may cover an orthographic projection of the second gate layer 401 on the substrate base plate 1.

Step S230, forming a second conductive material layer on the side of the gate dielectric layer 402 away from the substrate base plate 1, patterning the second conductive material layer to form a third electrode layer 403, where the third electrode layer 403 includes a plurality of first electrodes of the second light emitting devices 40 distributed at intervals, and an orthogonal projection of the third electrode layer 403 on the substrate base plate 1 at least partially overlaps an orthogonal projection of the gate dielectric layer 402 on the substrate base plate 1.

In step S240, a light emitting function layer is formed on the first electrode layer 301 and the third electrode layer 403 at the side away from the substrate 1, and the patterned light emitting function layer forms the first light emitting function layer 302 and the second light emitting function layer 404. The first light-emitting functional layer 302 is located in each opening of the pixel defining layer 31, and an orthographic projection of the second light-emitting functional layer 404 on the base substrate 1 is at least partially overlapped with an orthographic projection of the third electrode layer 403 on the base substrate 1.

Step S250, forming a third conductive material layer on the first light-emitting functional layer 302 and the second light-emitting functional layer 404 away from the substrate 1, patterning the third conductive material layer, and forming a second electrode layer 303 and a fourth electrode layer 405, wherein the second electrode layer 303 includes a plurality of second electrodes of the first light-emitting devices 30 distributed at intervals, and the fourth electrode layer 405 includes a plurality of second electrodes of the second light-emitting devices 40 distributed at intervals.

In this embodiment, the specific structural relationship of each film layer can refer to the embodiments shown in fig. 2 and fig. 4, which are not described in detail herein.

As shown in fig. 3 and fig. 5, in another embodiment of the present disclosure, the step S200 of forming the first light emitting layer 3 and the second light emitting layer 4 on the side of the driving circuit layer 2 away from the substrate 1 includes:

step S210, forming a first conductive material layer on a side of the driving circuit layer 2 away from the substrate base plate 1, patterning the first conductive material layer to form a first electrode layer 301, where the first electrode layer 301 includes a plurality of first electrodes of the first light emitting devices 30 distributed at intervals;

in step S220, a pixel defining material layer is formed on the first electrode layer 301 at a side away from the substrate base plate 1, the pixel defining material layer is patterned to form a pixel defining layer 31, the pixel defining layer 31 includes a plurality of openings, and the openings expose the first electrodes of the first light emitting devices 30 in a one-to-one correspondence manner.

Step S230, a second conductive material layer is formed on a side of the pixel definition layer 31 away from the base substrate 1, the second conductive material layer is patterned to form a third electrode layer 403, the third electrode layer 403 includes a plurality of first electrodes of the second light emitting devices 40 distributed at intervals, and an orthographic projection of the third electrode layer 403 on the base substrate 1 at least partially overlaps with an orthographic projection of the pixel definition layer 31 on the base substrate 1.

In step S240, a light emitting function layer is formed on the first electrode layer 301 and the third electrode layer 403 away from the base substrate 1, and the light emitting function layer is patterned to form a first light emitting function layer 302 and a second light emitting function layer 404. The first light-emitting functional layer 302 is located in each opening of the pixel defining layer 31, and an orthographic projection of the second light-emitting functional layer 404 on the base substrate 1 is at least partially overlapped with an orthographic projection of the third electrode layer 403 on the base substrate 1.

Step S250, forming a third conductive material layer on the first light-emitting functional layer 302 and the second light-emitting functional layer 404 away from the substrate 1, patterning the third conductive material layer, and forming a second electrode layer 303 and a fourth electrode layer 405, wherein the second electrode layer 303 includes a plurality of second electrodes of the first light-emitting devices 30 distributed at intervals, and the fourth electrode layer 405 includes a plurality of second electrodes of the second light-emitting devices 40 distributed at intervals;

step S260, a high-k material layer is formed on the side of the fourth electrode layer 405 away from the substrate 1, the high-k material layer is patterned to form a gate dielectric layer 402, and an orthographic projection of the gate dielectric layer 402 on the substrate 1 may cover an orthographic projection of the fourth electrode layer 405 on the substrate 1.

In step S270, a fourth conductive material layer is formed on the side of the gate dielectric layer 402 away from the substrate base plate 1, and the fourth conductive material layer is patterned to form the second gate layer 401. The second gate layer 401 includes a plurality of gates of the second light emitting devices 40 spaced apart.

In this embodiment, the specific structural relationship of each film layer can be shown in fig. 3 and fig. 5, which are not described in detail herein for the illustrated embodiment.

The present disclosure further provides a display device, which includes a display panel, where the display panel may be the display panel of any of the above embodiments, and the specific structure and the beneficial effects of the display device may refer to the above embodiments of the display panel, which are not described herein again. The display device disclosed by the invention can be an electronic device such as a mobile phone, a tablet computer, a television and the like, which are not listed one by one.

It should be noted that although the various steps of the methods of the present disclosure are depicted in the drawings in a particular order, this does not require or imply that these steps must be performed in this particular order, or that all of the depicted steps must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken into multiple step executions, etc., are all considered part of this disclosure.

It is to be understood that the disclosure is not limited in its application to the details of construction and the arrangements of the components set forth in the specification. The disclosure is capable of other embodiments and of being practiced and carried out in various ways. The foregoing variations and modifications are within the scope of the present disclosure. It should be understood that the disclosure disclosed and defined in this specification extends to all alternative combinations of two or more of the individual features mentioned or evident from the text and/or drawings. All of these different combinations constitute various alternative aspects of the present disclosure. The embodiments of this specification illustrate the best mode known for carrying out the disclosure and will enable those skilled in the art to utilize the disclosure.

Claims (15)

1. A display panel, comprising:

a substrate base plate, a first substrate base plate,

the driving circuit layer is arranged on one side of the substrate and comprises a plurality of pixel circuits;

the first light-emitting layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of first light-emitting devices, and the pixel circuits are used for driving the first light-emitting devices to emit light in a one-to-one correspondence manner;

the second light-emitting layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of second light-emitting devices, and the second light-emitting devices are organic light-emitting transistors;

wherein an orthographic projection of the second light emitting device on the substrate does not overlap with an orthographic projection of the first light emitting device on the substrate.

2. The display panel according to claim 1, wherein the first light-emitting layer comprises:

the first electrode layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of first electrodes of the first light-emitting devices which are distributed at intervals;

the pixel defining layer is arranged on one side, far away from the substrate base plate, of the first electrode layer and provided with a plurality of openings, and the openings expose the first electrodes of the first light-emitting devices in a one-to-one correspondence mode;

the first light-emitting functional layer is arranged on one side, far away from the substrate base plate, of the first electrode layer and comprises a plurality of first light-emitting parts, and the first light-emitting parts are located in the openings in a one-to-one correspondence mode;

a second electrode layer disposed on a side of the first light-emitting functional layer away from the first light-emitting functional layer, the second electrode layer including a plurality of second electrodes of the first light-emitting devices;

wherein an orthographic projection of the second light emitting device on the base substrate at least partially overlaps with an orthographic projection of the pixel defining layer on the base substrate.

3. The display panel according to claim 2, wherein the second light-emitting layer comprises:

the second gate layer is arranged on one side, far away from the substrate, of the driving circuit layer and comprises a plurality of gates of the second light-emitting devices which are distributed at intervals;

the grid dielectric layer is arranged on one side, far away from the substrate, of the second grid layer and covers the second grid layer;

the third electrode layer is arranged on one side, far away from the substrate base plate, of the grid dielectric layer and comprises a plurality of first electrodes of the second light-emitting devices which are distributed at intervals;

the second light-emitting functional layer is arranged on one side, far away from the substrate, of the third electrode layer;

and the fourth electrode layer is arranged on one side of the second light-emitting functional layer, which is far away from the substrate, and comprises a plurality of second electrodes of the second light-emitting devices.

4. The display panel according to claim 3, wherein the second gate layer is provided in the same layer as the first electrode layer, and an orthogonal projection of the second gate layer on the substrate does not overlap with an orthogonal projection of the first electrode layer on the substrate;

the grid dielectric layer is multiplexed as the pixel definition layer.

5. The display panel according to claim 1, wherein the second light-emitting layer comprises:

the third electrode layer is arranged on one side, away from the substrate base plate, of the pixel defining layer and comprises a plurality of first electrodes of the second light-emitting devices which are distributed at intervals;

the second light-emitting functional layer is arranged on one side, far away from the substrate, of the third electrode layer;

a fourth electrode layer disposed on a side of the second light-emitting functional layer away from the substrate, the fourth electrode layer including a plurality of second electrodes of the second light-emitting devices;

the grid dielectric layer is arranged on one side, far away from the substrate base plate, of the fourth electrode layer and covers the fourth electrode layer;

and the second gate layer is arranged on the surface of one side, far away from the substrate, of the second gate layer, and comprises a plurality of gates of the second light-emitting devices distributed at intervals.

6. The display panel according to claim 3 or 5, wherein the thickness of the third electrode layer is 100-500nm, and the material of the third electrode layer comprises an opaque material.

7. The display panel according to claim 3 or 5, wherein the fourth electrode layer is provided in the same layer as the second electrode layer.

8. The display panel according to claim 2, wherein the thickness of the pixel defining layer is 1 to 1.5 μm, the slope angle of the pixel defining layer between two adjacent openings is 20 to 40 °, the width of the pixel defining layer between two adjacent openings is 10 to 15 μm, and the width of the opening is 70 to 90 μm in the arrangement direction of the first light emitting device and the second light emitting device.

9. The display panel according to claim 1, characterized in that the display panel further comprises:

the packaging layer is arranged on one sides, far away from the substrate, of the first light-emitting layer and the second light-emitting layer;

the color film layer is arranged on one side, far away from the substrate base plate, of the packaging layer and comprises a shading portion and a plurality of light filtering portions separated by the shading portion, and the light filtering portions are arranged in one-to-one correspondence with the first light-emitting devices or the second light-emitting devices in the direction perpendicular to the substrate base plate.

10. The display panel according to claim 9, wherein the display panel further comprises:

the quantum dot conversion layer is arranged between the packaging layer and the color film layer, the quantum dot conversion layer comprises an isolation part and a plurality of light conversion parts separated by the isolation part, the light conversion parts are arranged in one-to-one correspondence with the first light emitting devices or the second light emitting devices in a direction perpendicular to the substrate base plate, the light conversion parts and the light filtering parts are arranged in one-to-one correspondence in a direction perpendicular to the substrate base plate, and at least part of the conversion parts in the plurality of light conversion parts contain quantum dot materials.

11. The display panel according to claim 10, wherein the plurality of light conversion portions comprise:

a plurality of first light conversion parts for converting light emitted from the first or second light emitting devices into a first color;

a plurality of second light conversion parts for converting light emitted from the first light emitting device or the second light emitting device into a second color.

12. The display panel according to claim 11, wherein the plurality of light conversion portions further comprise:

a plurality of third light conversion parts for converting light emitted from the first light emitting device or the second light emitting device into a third color;

or a plurality of light-transmitting portions for transmitting light emitted from the first light-emitting device or the second light-emitting device.

13. The display panel according to claim 3 or 5, wherein the driving circuit layer further comprises:

a first scan line for supplying a first gate driving signal to the pixel circuit;

a second scan line for supplying a second gate driving signal to a gate electrode of the second light emitting device;

a first data line for supplying a first data signal to the pixel circuit;

a second data line for supplying a second data signal to the first electrode of the second light emitting device;

a first power voltage line for supplying a first voltage to a second electrode of the first light emitting device;

a second power voltage line for supplying a second voltage to a second electrode of the second light emitting device.

14. A method for manufacturing a display panel is characterized by comprising the following steps:

providing a substrate base plate, and making the substrate base plate,

forming a driving circuit layer on one side of the substrate, wherein the driving circuit layer comprises a plurality of pixel circuits;

forming a first light emitting layer and a second light emitting layer on one side of the driving circuit layer, which is far away from the substrate, wherein the first light emitting layer comprises a plurality of first light emitting devices, the pixel circuits are used for driving the first light emitting devices to emit light in a one-to-one correspondence manner, the second light emitting layer comprises a plurality of second light emitting devices, and the second light emitting devices are organic light emitting transistors;

wherein an orthographic projection of the second light emitting device on the substrate does not overlap with an orthographic projection of the first light emitting device on the substrate.

15. A display device characterized by comprising the display panel according to any one of claims 1 to 13.

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