CN115376911A - Substrate processing method and system - Google Patents

Substrate processing method and system Download PDF

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CN115376911A
CN115376911A CN202110557429.0A CN202110557429A CN115376911A CN 115376911 A CN115376911 A CN 115376911A CN 202110557429 A CN202110557429 A CN 202110557429A CN 115376911 A CN115376911 A CN 115376911A
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gas
opening
substrate
deposition
substrate processing
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胡增文
侯剑秋
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Advanced Micro Fabrication Equipment Inc Shanghai
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Advanced Micro Fabrication Equipment Inc Shanghai
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching

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  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
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  • Inorganic Chemistry (AREA)
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Abstract

The invention discloses a substrate processing method and a system, wherein the method comprises the following steps: forming a plurality of spacers on a substrate; introducing deposition gas and exciting into plasma; forming a polymer deposit on the spacer surface such that the difference in distance between adjacent spacers is reduced; and introducing a processing gas to etch the substrate. The advantages are that: according to the method, the deposition gas is introduced and excited into the plasma, so that the polymer is deposited on the surface of the spacer, and the difference value of the distances between adjacent spacers is changed according to the process requirements, so that the etching of the subsequent process is facilitated, the yield of wafers is improved, and the preparation flow of the integrated circuit is optimized.

Description

Substrate processing method and system
Technical Field
The invention relates to the field of plasma etching, in particular to a substrate processing method and a substrate processing system.
Background
With the vigorous development of semiconductor technology, the size of a chip is made lower and lower, and in order to ensure the quality of the chip, the process requirements on the semiconductor are also more and more strict, and the size reduction is one of the development driving forces of integrated circuit processing. By reducing the size, a simultaneous increase in cost-effectiveness and device performance can be achieved. The normal one-wafer-to-last-package process requires thousands of process flows, which create inevitable complexities in the processing, especially in multiple patterning techniques.
In the process of preparing the self-aligned multi-pattern, core etching, spacer deposition, spacer etching and core stretching are usually included. In the above process, the final feature critical dimension is controlled by the spacer deposition thickness and the spacer physical characteristics, such as line edge roughness and line width roughness.
With the fabrication of self-aligned multi-patterns using conventional dry etch processes, spacer etching typically suffers from distortion of the final spacer profile, such as spacer faceting (spacer faceting), and loss of critical dimension difference CD. However, it is important to maintain the spacer profile and CD for the entire etch process, since the spacer profile has a significant impact on the mask budget and the resulting self-aligned multi-pattern.
In the existing dry etching process, most of the spacer deposition processes generate spacers with ox horn shapes, the distance difference between adjacent spacers is differentiated, the spacers are unevenly distributed, and the traditional process lacks selectivity between core materials and spacer materials, so that the height loss of the spacers or the step height difference between the spacers and the like are caused. The above-mentioned substrate spacer defects easily cause defects of a multi-pattern device, reduce the productivity of products, and affect the yield and manufacturing scale of integrated circuits.
Disclosure of Invention
The invention aims to provide a substrate processing method and a substrate processing system, wherein the substrate processing method is characterized in that deposition gas is introduced and excited into plasma, so that a polymer is formed and deposited on the surface of a spacer, and the difference of the distances between adjacent spacers is changed according to the process requirements, so that the subsequent etching of multiple patterns is facilitated, the product productivity is improved, and the preparation flow of an integrated circuit is optimized.
In order to achieve the purpose, the invention is realized by the following technical scheme:
a method of processing a substrate, comprising:
forming a plurality of spacers on a substrate;
the adjacent spacers are provided with a first opening and a second opening, the opening distance of the first opening is smaller than the bottom distance of the first opening, and the opening distance of the second opening is larger than the bottom distance of the second opening;
introducing deposition gas and exciting into plasma;
forming a polymer, wherein the deposition amount of the polymer on the surface of the adjacent spacer corresponding to the first opening is smaller than that of the polymer on the surface of the adjacent spacer corresponding to the second opening, so that the opening distance of the second opening is reduced;
and introducing a treatment gas to etch the substrate.
Optionally, the forming a number of spacers on the substrate includes:
forming a plurality of cores by performing plasma etching on the core layer on the substrate;
depositing a spacer layer over the core by chemical vapor deposition;
the spacers are formed by plasma etching the core and spacer.
Optionally, the forming the polymer deposited on the surface of the spacer includes:
the extent of the polymer deposition is proportional to the distance between the spacers.
Optionally, the deposition gas comprises C x H y F z A gas.
Optionally, selecting CH 3 F、CH 2 F 2 、C 4 F 6 、C 4 H 2 F 6 、C 3 H 2 F 4 、C 3 F 6 、C 2 F 4 、CHF 3 And C 4 F 8 As a deposition gas.
Optionally, CH 3 F gas flow rate of 5-20sccm, and/or, C 4 F 6 Gas flow rate of 3-12sccm, and/or, C 4 F 8 Gas flow rate of 5-20sccm, and/or，CH 2 F 2 Gas flow rate of 5-12sccm, and/or CHF 3 Gas flow rate of 3-12sccm, and/or, C 4 H 2 F 6 Gas flow rate of 3-20sccm, and/or, C 3 H 2 F 4 The gas flow is 5-12sccm.
Optionally, the polymer has a deposition time of 5 to 20 seconds.
Optionally, the deposition gas is a gas without double bonds, and the relationship between F, H and C content in the deposition gas is (F-H)/C ≦ 2.
Optionally, the deposition gas is a double bond-containing gas comprising C 4 F 6 、C 4 H 2 F 6 、C 3 H 2 F 4 、C 3 F 6 And C 2 F 4 As a deposition gas.
Optionally, the deposition gas further comprises an inert gas.
Optionally, the inert gas is N 2 。
Optionally, the N is 2 The gas flow is 200-800sccm.
Optionally, the working pressure range of the deposition gas is 40-160 mt, the radio frequency power range is 300-1200W, the radio frequency is 60MHz, and the flow time of the deposition gas is 5-20s.
Optionally, the material of the substrate and the core can be carbon, polysilicon or silicon oxide;
and/or the material of the spacer may be silicon oxide, nitride or polysilicon.
Optionally, the bottom distance of the first opening is equal to the bottom distance of the second opening.
Optionally, a system for substrate processing, comprising:
an ion etching chamber configured to:
receiving a substrate having a spacer;
introducing deposition gas and exciting into plasma;
a source controller coupled to the ion etch chamber, the source controller configured to control polymer deposition on spacer surfaces such that a difference in opening distances between adjacent spacers is reduced;
and introducing a processing gas to etch the substrate.
Compared with the prior art, the invention has the following advantages:
according to the substrate processing method and the substrate processing system, the deposition gas is introduced and excited into the plasma, so that the polymer is deposited on the surface of the spacer, and the difference value of the distances between the adjacent spacers is changed according to the process requirements, so that the subsequent process can etch the spacer, the wafer production rate is improved, and the preparation flow of the integrated circuit is optimized.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention patent, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a substrate processing system of the present invention;
FIG. 2 is a schematic view of a plurality of spacers formed on a substrate in the substrate processing method of the present invention;
FIG. 3 is a schematic view of a polymer deposit formed on the surface of a spacer in a substrate processing method according to the present invention.
Detailed Description
In order to facilitate understanding of the features, contents, and advantages of the present invention and the efficacy achieved thereby, the present invention will be described in detail with reference to the accompanying drawings in the form of embodiments, wherein the drawings are provided for illustration and description, and not for the purpose of limiting the invention to the actual scale and precise configuration after the practice of the invention, and the drawings are not to be construed as being limited to the scale and the configuration of the drawings.
Various operations will be described as multiple discrete operations in turn, in a manner that is most helpful in understanding the present invention. However, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation. The operations described may be performed in a different order than the embodiments described. In other embodiments, various additional operations may be performed and/or the operations described may be omitted.
As used herein, the term "substrate" refers to and includes the base material or construction upon which the material is formed. It should be understood that the substrate may comprise a single material, multiple layers of different materials, one or more layers having regions of different materials or different structures therein, etc. These materials may include semiconductors, insulators, conductors, or combinations thereof. For example, the substrate may be a semiconductor base, a base semiconductor layer on a support structure, a metal electrode having one or more layers, structures or regions formed thereon, or a semiconductor substrate. The substrate may be a conventional silicon substrate or other bulk substrate comprising a layer of semiconductor material. The substrate may be doped or undoped.
It is to be noted that the drawings are in a very simplified form and are all used in a non-precise ratio for the purpose of facilitating and distinctly aiding in the description of the embodiments of the invention. Referring now to the drawings, in which like reference numerals designate identical or corresponding parts throughout the several views.
FIG. 1 is an embodiment of a system for substrate processing of the present invention. In this embodiment, the substrate processing system can be adapted to perform the substrate processing method for plasma etching as described in fig. 2-3. An etch configured to perform the process conditions described above is shown in fig. 1, which includes: the ion etching chamber 100 is formed by enclosing an etching chamber body 101 and a chamber body end cover 102, and a wafer transmission port 103 is arranged on the ion etching chamber 100, and the wafer transmission port 103 is used for realizing the transmission of wafers between the inside and the outside of the ion etching chamber 100. The outside of the wafer transfer port 103 may be connected to a transfer chamber and an airlock chamber (not shown) that may be switched between vacuum and atmospheric pressure to maintain the ion etch chamber 100 in a stable state within the substrate processing system. Several sets of robots may be disposed within the transfer chamber to transfer the wafer W between the airlock chamber, the transfer chamber, and the ion etch chamber 100. Alternatively, the wafer W may be a semiconductor substrate.
The ion etching chamber 100 includes a lower electrode assembly 110 disposed at the bottom of the ion etching chamber 100, and the lower electrode assembly 110 includes a base having a carrying surface on which a wafer W to be processed introduced into the ion etching chamber 100 is placed. Also contained within the ion etching chamber 100 is an upper electrode assembly 120 disposed opposite the lower electrode assembly 110, and the chamber volume between the upper electrode assembly 120 and the lower electrode assembly 110 can be configured as a processing region to facilitate etching of the surface of the wafer W.
A temperature control device 130 may be provided in the insulating material layer of the lower electrode assembly 110 to provide a proper temperature to the wafer W. The temperature control device 130 may be a joule heating device, such as by electrical resistance, or a thermally conductive channel, such as by a coolant in a thermally conductive channel. Further, the temperature control device 130 may have a partition arrangement manner, so that the temperatures of different regions of the wafer W can be controlled respectively, and the purpose of uniform temperature control is achieved.
A mixture of ionizable gases or process gases is introduced via gas distribution system 140. For a given process gas flow, the process pressure is regulated using a vacuum pumping system. The gas distribution system 140 may include a showerhead 141 for introducing process gases. Alternatively, the gas distribution system 140 may include a multi-zone showerhead design for introducing and adjusting the distribution of a mixture of process gases over the wafer W. For example, a multi-zone showerhead design may be configured to adjust the amount of process gas flow or composition flowing to the peripheral zone above the wafer W by adjusting the amount of process gas flow or composition flowing into the central zone above the wafer W. In such embodiments, the gases may be distributed in a suitable combination to form a highly uniform plasma within the processing region.
Further, an exhaust port 104 is disposed on the etching chamber 101. In this embodiment, the exhaust port is disposed at the bottom of the ion etching chamber 100, i.e., the bottom of the etching chamber 101, and a gas extraction device 150 exhausts the gas inside the ion etching chamber 100, i.e., the reaction waste product, out of the chamber through the exhaust port. Alternatively, the gas pumping device 150 may be a molecular pump or a dry pump, and the structure of the gas pumping device 150 is not limited thereto, and may be any other device capable of achieving the same gas pumping function.
Optionally, the lower electrode assembly 110 may be connected to one or more rf matchers 160, for example, two rf matchers 160 may be connected, and in an embodiment where a plurality of rf matchers 160 are connected, each rf matcher 160 may provide a different rf frequency and power from the other rf matchers 160, so as to meet the requirements of different processing technologies. In these embodiments, the upper electrode assembly 120 may be grounded. In other embodiments, the upper electrode assembly 120 may be connected to an RF matcher 160, and the lower electrode assembly 110 may be connected to an RF matcher 160, wherein the two RF matchers 160 may provide different RF frequencies and powers.
In this embodiment, at least one RF match 160 is applied to the lower electrode assembly 110 via a matching network to dissociate the process gas into a plasma, leaving the processing region between the upper electrode assembly 120 and the lower electrode assembly 110 in a plasma environment. The plasma environment contains a large number of active particles such as electrons, ions, excited atoms, molecules, radicals and the like, and the active particles can perform various physical and/or chemical reactions with the surface of the wafer W to be processed, so that the morphology of the wafer W to be processed is changed, and the processing of the wafer W to be processed is completed.
In this embodiment, a source controller in a substrate processing system controls the entire process, which may include a microprocessor, memory, and digital I/O ports capable of generating control voltages sufficient to communicate and activate inputs to the system as well as monitor outputs from the system. For example, a program stored in the memory can be used to activate inputs to various components of the system in accordance with a process in order to perform a plasma-assisted process, such as a substrate pretreatment process, a plasma etch process, on the wafer W.
Based on the above substrate processing system, the present invention provides a substrate processing method, as shown in fig. 2 and 3 in combination, the method comprising:
(1) A number of spacers 210 are formed on the substrate 200. In the present invention, the manner of forming the spacer 210 is not limited.
As shown in fig. 2, the forming a number of spacers 210 on a substrate 200 includes: forming a plurality of cores 221 by performing plasma etching on the core layer on the substrate 200; a spacer layer 222 is deposited on the core 221 by chemical vapor deposition; the spacers 210 are formed by plasma etching the core 221 and the spacer layer 222.
In some embodiments, the material of the substrate 200 and the core 221 may be carbon, such as one or more of an Advanced Patterning Film (APF), an Amorphous Carbon Layer (ACL), a spin carbon (SOC), a spin hard film (SOH) type amorphous carbon, and a polysilicon, and the suitable material of the substrate 200 and the core 221 is selected according to the process conditions and the process requirements. Of course, the materials of the core 221 and the spacer layer 222 are not limited to one or more of the above, but may be other materials that can be applied in the field of etching semiconductor wafers W. The material of the spacers 210 may be silicon oxide, nitride or polysilicon. As shown in table 1, some examples of core 221/spacer 222 combinations, such as for example, for a core 221 that is polysilicon, the spacer 222 may be nitride. In the present embodiment, the substrate 200 is made of SiOxNy (silicon oxide and silicon nitride composite), the core 221 is made of carbon (such as amorphous carbon), the spacer layer 222 is made of silicon oxide, and the spacer 210 is made of silicon oxide. Alternatively, the core 221 layer on the substrate 200 may be formed by a photolithography process, the core 221 may be formed by a plasma etching process, and the spacer layer 222 may be formed by a CVD deposition process. As shown in FIG. 2, the adjacent spacers 210 have a first opening at a distance CD1 and a second opening at a distance CD2, the distance CD1 of the first opening is less than the distance of the bottom of the adjacent spacer 210, i.e., the adjacent spacer corresponding to the distance CD1 of the first opening is bent inward at the opening, and the distance CD2 of the second opening is greater than the distance CD2 of the bottom of the adjacent spacer 210, i.e., the adjacent spacer corresponding to the distance CD2 of the second opening is bent outward at the opening. In some embodiments, the distance between the bottom of the first opening is equal to the distance between the bottom of the second opening, and after the polymer deposition process, the distance between the first opening and the distance between the second opening are both close to the bottom distance, thereby achieving the technical effect that the distances between the adjacent spacers are both close to the same.
TABLE 1 core/spacer schematic
Serial number Core/spacer layer
1 Polysilicon/nitride
2 Polysilicon/oxide
3 Amorphous carbon/nitride
4 Amorphous carbon/oxide
(2) And introducing deposition gas and exciting into plasma. Specifically, the controller controls the rf matcher 160 to apply rf power to the upper electrode assembly 120 or the lower electrode assembly 110 of the substrate processing system to energize deposition gas in the processing region of the ion etching chamber 100 to form plasma.
(3) The polymer 230 is formed on the surface of the spacer 210, so that the difference between the distances of the adjacent spacers 210 is reduced, such as the distance CD1 between the first openings of two adjacent spacers and the distance CD2 between the second openings of the other two adjacent spacers in fig. 2, and the distance between the adjacent spacers is reduced as much as possible by depositing the polymer 230 on the spacers, so that the value of CD1-CD2 is reduced. The difference between the distances of the adjacent spacers 210 is a critical dimension difference, and the smaller the critical dimension difference, the more uniform the distance distribution between the spacers 210. In the multiple pattern etching process, the smaller the difference value of the critical dimension is, the more perfect the plasma etching effect of the multiple patterns is.
The present inventors have discovered that by processing the deposition gas in the ion etching chamber 100 to form the polymer 230, the polymer 230 formed has a viscosity that, when deposited from the top down, preferentially falls on the top of the spacer surface with a large opening distance, and the polymer later preferentially bonds to the polymer already deposited. Specifically, more polymer 230 is deposited on the surface of the adjacent spacer having the second opening than on the adjacent spacer having the first opening, and more polymer is deposited on the top of the spacer for the same adjacent spacer than on the bottom, i.e., the polymer 230 gradually accumulates along the edge and shoulder of each portion of the spacer 210 to change the distance between the adjacent spacers 210, and different gases are selected to perform different deposition processes according to the process requirements. Since the spacer 222 is deposited around the core 221, the spacers 210 will form an inverted-horn shape as shown in fig. 2 after plasma etching, resulting in non-uniform spacing between the spacers, and the processing method of the present invention enables the polymer deposition method to further adjust and control the difference in distance between adjacent spacers 210 on the substrate 200, which is helpful for improving the etching effect of the subsequent process. When the spacers 210 are uniform in shape and pitch, the operation may adjust the distance between the spacers 210 according to process requirements.
In this embodiment, the deposition gas contains C x H y F z A gas. In the RF environment of the ion etching chamber 100, C x H y F z The gas can be dissociated into different polymer 230 attached according to its own characteristicsThe polymer 230 dissociated by the different gas components on the spacer 210 is attached at different positions, and the present invention mainly uses the generated polymer deposited on the shoulder of the spacer 210.
The mechanism of forming polymer 230 from the deposition gas can be mainly divided into two types: radical coupling or radical chain propagation. Each deposition gas tends to favor one of the ways depending on the specific component structure of the gas. Alternatively, CH may be used 3 F、CH 2 F 2 、C 4 F 6 、C 4 H 2 F 6 、C 3 H 2 F 4 、C 3 F 6 、C 2 F 4 、CHF 3 And C 4 F 8 As a deposition gas.
The deposition gas may comprise a first type of deposition gas that does not contain double bonds and/or a second type of deposition gas that contains double bonds.
Wherein the first type of deposition gas not containing double bonds is CH 2 F 2 、CHF 3 、CH 3 F and C 4 F 8 And a small portion of the gas in the rf environment of the ion etching chamber 100 is decomposed into active radicals, i.e., the gas contains radicals with multiple active sites in the rf environment (e.g., CF) 2 CHF, CF, etc.) and free radicals containing a single active site (e.g., CF 3 ·、CF 2 H·)。
Among them, the free radicals of multiple active sites are easier to couple two by two into linear or even form polymer 230, while the free radical of single active site is easier to stop the continued coupling reaction, which is equivalent to blocking both ends of the chain. The first type of deposition gas that does not contain double bonds can therefore produce free-radically coupled polymers 230, and if more multi-site radicals are produced, it is easier to form long-chain polymers 230, and thus the polymer 230 will have a higher molecular weight and a higher viscosity or adsorption coefficient, and therefore will tend to hang up on the side walls rather than the bottom (i.e., the polymer 230 formed will fall down with no chance to fall to the bottom by contacting the top). Therefore, the first type of deposition gas is selected to be more compatible in a radio frequency environmentThe polymer 230 is easily generated to be attached to the shoulder of the spacer 210, thereby adjusting the distance between the adjacent spacers 210. In addition, as the H content in the gas molecule increases, the molecular weight of the polymer increases, that is, when the relationship between the contents of F, H and C in the gas molecule is (F-H)/C.ltoreq.2, the smaller the ratio, the larger the molecular weight of the polymer formed, and the more easily the distance non-uniformity between adjacent spacers can be improved, for example, CH 3 F、CH 2 F 2 It is easier to form long chain polymers 230 to hang on the sidewalls of the spacers 210 because the C-H bonds are more easily broken than the C-F bonds, and H can form HF gas with F, resulting in increased C content in the gas and increased free radicals at multiple active sites, i.e., the higher the C/F ratio and the higher the H content, the heavier the polymer 230 is produced by the deposition gas.
The second type of deposition gas containing double bonds can be, for example, C4F6, C4H2F6, C3H2F4, C3F6, C2F4, etc., the double bonds in the second type of deposition gas, under the initiation of the rf environment of the ion etching chamber 100, generate radical active sites and then become active monomers, the active monomers are rapidly combined with the next active monomer to form active sites of bi-monomers, and then are combined with the third active monomer, and so on, the continuous growth of radical chains is completed, the chain length is not limited, larger polymers can be formed, the adsorptivity is also stronger, and the radical chains grow until chain termination occurs with the combination of single active radical or similar active monomers.
In addition, as can be set by process requirements, the forming the polymer 230 deposited on the surface of the spacer 210 includes: the amount of polymer 230 deposited increases as the distance between the spacers 210 increases, and two adjacent spacers 210 having the second distance CD2 have a larger open contact area for plasma, i.e., polymer, than two adjacent spacers having the first distance CD1, so that more polymer 230 is deposited, and the difference in distance between different adjacent spacers is balanced by the deposition of polymer.
As shown in Table 2, different CD differences can be generated for different deposition gas compositions, and CD depends on the distance between two adjacent spacersThe same distance between spacers results in a CD difference of 0, so that the smaller the difference in distance between different adjacent spacers, the smaller the CD difference and the more uniform the size of the plasma etched holes. Different deposition gas compositions are used according to the process requirements. For example, C may be selected when the process requires that the distance difference between adjacent spacers 210, i.e., the CD difference, be as small as possible 4 F 6 、C 3 H 2 F 4 When the gas is exhausted, the distance between the spacers 210 is homogenized, the subsequent ion etching multiple pattern process is more accurate, the ion etching accuracy is improved, and the yield of the product is also improved.
TABLE 2 Critical dimension Difference for different deposition gas compositions
Deposition gas composition Critical dimension difference
CH 3 F 6.7nm
C 4 F 6 1.0nm
C 4 F 8 2.9nm
CH 2 F 2 7.3nm
CHF 3 8.5nm
C 4 H 2 F 6 1.0nm
C 3 H 2 F 4 1.1nm
Table 2 shows the critical dimension difference when using a single reactive gas component, wherein the specific process parameters are: CH (CH) 3 F gas flow rate of 5-20sccm, C 4 F 6 The gas flow is 3-12sccm, C 4 F 8 The gas flow is 5-20sccm, CH 2 F 2 The gas flow is 5-12sccm, CHF 3 The gas flow is 3-12sccm, C 4 H 2 F 6 The gas flow is 3-20sccm, C 3 H 2 F 4 The gas flow is 5-12sccm. In the process, the working pressure range of the deposition gas is 40-160 mt, the radio frequency power range is 300-1200W, the radio frequency is 60MHz, the flow time of the deposition gas is 5-20s, the deposition time influences the total amount of polymers deposited on the spacing pieces, holes between adjacent spacing pieces can be blocked if the deposition time is too long, the subsequent etching is influenced, and the flow time of the deposition gas of 5-20s can reach the best uniformity under the condition of not blocking the holes.
In another aspect, the deposition gas further comprises an inert gas to dilute the reactive process gas, depending on the type of deposition gas and the concentration of deposition gas desired.
Optionally, the inert gas is nitrogen (N) 2 ). In the process, the N is 2 The gas flow range can be 200-800sccm, and different N can be adopted according to the required active component concentration or deposition thickness 2 The flow rate of the gas. It should be noted that the inert gas is not limited to N only 2 It may also be other gases that do not affect the reaction of the reactive species in the deposition gas (e.g., helium), and will not be further described herein.
(4) The process gas is introduced to etch the substrate 200 to complete the etching of the wafer W.
In summary, the present invention provides a substrate processing method and system, in which the deposition gas is introduced and excited into plasma, so as to form a polymer 230 deposited on the surface of the spacer 210, and the difference between the distances of the adjacent spacers 210 is changed according to the process requirements, so as to facilitate the etching process of the subsequent process, improve the yield of the wafer, and optimize the manufacturing process of the integrated circuit.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.

Claims (16)

1. A method of processing a substrate, comprising:
forming a plurality of spacers on a substrate;
the adjacent spacers are provided with a first opening and a second opening, the opening distance of the first opening is smaller than the bottom distance of the first opening, and the opening distance of the second opening is larger than the bottom distance of the second opening;
introducing deposition gas and exciting into plasma;
forming a polymer, wherein the deposition amount of the polymer on the surface of the adjacent spacer corresponding to the first opening is smaller than that of the polymer on the surface of the adjacent spacer corresponding to the second opening, so that the opening distance of the second opening is reduced;
and introducing a processing gas to etch the substrate.
2. The method of claim 1, wherein forming a plurality of spacers on a substrate comprises:
forming a plurality of cores by performing plasma etching on the core layer on the substrate;
depositing a spacer layer over the core by chemical vapor deposition;
the spacers are formed by plasma etching the core and spacer.
3. The substrate processing method of claim 1, wherein the forming a polymer deposit on a spacer surface comprises:
the degree of polymer deposition is proportional to the distance between the spacers.
4. The substrate processing method according to claim 1,
the deposition gas contains C x H y F z A gas.
5. The substrate processing method according to claim 1 or 4,
selecting CH 3 F、CH 2 F 2 、C 4 F 6 、C 4 H 2 F 6 、C 3 H 2 F 4 、C 3 F 6 、C 2 F 4 、CHF 3 And C 4 F 8 As a deposition gas.
6. The substrate processing method according to claim 5,
CH 3 f gas flow rate of 5-20sccm, and/or, C 4 F 6 Gas flow rate of 3-12sccm, and/or, C 4 F 8 Gas flow rate of 5-20sccm, and/or, CH 2 F 2 Gas flow rate of 5-12sccm, and/or CHF 3 Gas flow rate of 3-12sccm, and/or, C 4 H 2 F 6 Gas flow rate of 3-20sccm, and/or, C 3 H 2 F 4 The gas flow is 5-12sccm.
7. The substrate processing method according to claim 6,
the deposition time of the polymer is 5 to 20 seconds.
8. The substrate processing method according to claim 4,
the deposition gas is a gas without double bonds, and the relationship between F, H and C content in the deposition gas conforms to (F-H)/C is less than or equal to 2.
9. The substrate processing method according to claim 4,
the deposition gas is a gas containing double bonds, including C 4 F 6 、C 4 H 2 F 6 、C 3 H 2 F 4 、C 3 F 6 And C 2 F 4 As a deposition gas.
10. The substrate processing method according to claim 1 or 4,
the deposition gas also includes an inert gas.
11. The substrate processing method according to claim 10,
the inert gas is N 2 。
12. The substrate processing method of claim 11,
said N is 2 The gas flow is 200-800sccm.
13. The substrate processing method according to claim 1,
the working pressure range of the deposition gas is 40-160 mt, the radio frequency power range is 300-1200W, the radio frequency is 60MHz, and the circulation time of the deposition gas is 5-20s.
14. The substrate processing method according to claim 2,
the material of the substrate and the core can be carbon, polysilicon or silicon oxide;
and/or the material of the spacer may be silicon oxide, nitride or polysilicon.
15. The substrate processing method according to claim 1,
the bottom distance of the first opening is equal to the bottom distance of the second opening.
16. A system for substrate processing, comprising:
an ion etching chamber configured to:
receiving a substrate having a spacer;
introducing deposition gas and exciting into plasma;
a source controller coupled to the ion etch chamber, the source controller configured to control polymer deposition on spacer surfaces such that a difference in opening distances between adjacent spacers is reduced;
and introducing a processing gas to etch the substrate.
CN202110557429.0A 2021-05-21 2021-05-21 Substrate processing method and system Pending CN115376911A (en)

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