CN115361631A - Wireless microphone system and method thereof - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R3/00—Circuits for transducers, loudspeakers or microphones
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R1/00—Details of transducers, loudspeakers or microphones
- H04R1/20—Arrangements for obtaining desired frequency or directional characteristics
- H04R1/32—Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only
- H04R1/40—Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers
- H04R1/406—Arrangements for obtaining desired frequency or directional characteristics for obtaining desired directional characteristic only by combining a number of identical transducers microphones
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Abstract
The invention provides a wireless microphone system and a method thereof, which use an FPGA algorithm to replace the traditional data transmission FSK, GFSK, OOK and DS-SS circuits or analog amplitude modulation and frequency modulation and phase modulation circuits. The circuit architecture of wireless audio transmission is simplified, the universality of components is improved, and the production efficiency is improved. In the aspect of product application scenes: according to the setting or configuration of a user application scene, the ultra-long distance voice communication of a DS-SS modulation mode can be realized by using a set of standard circuits, the application scenes of low delay, high-quality audio and a long-distance concert of an analog FM modulation mode can be realized, and the HIFI-level pure digital audio transmission mode with high bandwidth can be realized. The user can cover almost all the scene requirements of wireless audio transmission by using one set of products. Furthermore, the structure circuit based on the FPGA and the algorithm thereof is simple, the stability is high, and the carrier frequency and the modulation mode which are variable from 100MHz to 6GHz can effectively avoid the audio transmission signal from being interfered.
Description
Technical Field
The invention relates to the technical field of voice processing, FPGA (field programmable gate array) and wireless communication, in particular to a wireless microphone system and a method thereof.
Background
Wireless audio transmission technology has been applied in many fields, such as mobile phones, walkie-talkies, wireless voice fax machines, cordless phones, bluetooth audio, fm broadcasts, teaching speakers, conference systems, simultaneous interpretation, broadcast television, wireless microphone systems, etc., and is almost ubiquitous in today's society. Wireless transmission techniques play a key role in these many areas of application.
The wireless transmission technology is various, and can be divided into long-distance wireless transmission, short-distance wireless transmission and near-field transmission according to distance classification; divided into VLF, VHF, UHF and SHF by frequency or wavelength; the method can be classified into narrow-band microwave, direct sequence spread spectrum, frequency hopping spread spectrum, homeRF, bluetooth and the like according to a modulation method or spectral characteristics; the classification into carrier waves can be classified into light wave transmission and radio wave transmission.
Among these wireless transmission technologies, the wireless transmission technology of audio signals is the most complex, and the method and the diversity thereof are adopted, and the performance and the requirement of the general wireless audio transmission on the carrier and the codec are higher than those of other wireless transmission technologies, so as to meet the requirements of different applications. For example, the performance wireless microphone requires low delay, ultrahigh tone quality, no dead angle in mobile transmission and ultra-low power consumption, the conference system requires voice encryption, low delay, noise removal, no howling and speech control attached thereto, and the wireless interphone requires long communication distance, low power consumption, large bandwidth required by a broadcast television system, high transmission efficiency required by bluetooth audio, and the like.
Therefore, in each featured application, different wireless audio transmission technologies are adopted due to different application occasions, and different products are designed accordingly. There are most applications, and although the application scenarios are different, users want to buy one set of equipment to cover most application scenarios to save unnecessary waste, and unfortunately, such products do not exist in the market.
Disclosure of Invention
In view of the above practical needs, an object of the present invention is to provide a wireless microphone system and a method thereof, which upgrade and modify the architecture and method of the existing wireless microphone system, and use an FPGA algorithm to replace the conventional data transmission circuit or analog frequency modulation circuit. The conventional data transmission circuit generally has an architecture of a combination of an MCU or a DSP and a data transmission module, wherein the MCU or the DSP processes audio signals, and the data transmission module is responsible for modulating audio data by a built-in modulation method and then transmitting the audio data, or restoring the audio data from a received carrier by a built-in demodulation method. The receiving end of the traditional audio transmission analog circuit is generally composed of a voltage-reducing circuit, a demodulation circuit, an intermediate frequency circuit, a mixing circuit, a local oscillator and a low-noise amplifier (LNA), and the transmitting end of the traditional audio transmission analog circuit is generally composed of a voltage-reducing circuit, a modulation circuit, a local oscillator and a Power Amplifier (PA). It can be seen that the traditional data transmission circuit and analog circuit mode is very solidified, practical and inflexible, and can not be suitable for switching a plurality of practical scenes. Compared with the traditional data transmission circuit, the FPGA algorithm has the advantages that the FPGA implementation scheme architecture of audio wireless transmission is simple and free of debugging, the algorithm firmware in the FPGA memory is used, and different working modes can be switched according to different application scenes.
In order to achieve the above objects and other related objects, the present invention adopts the following technical solutions:
a wireless microphone system, comprising: the system comprises an array silicon microphone module, a CODEC module, an FPGA module and a radio frequency module;
the array silicon microphone module is used for converting audio signals into electric signals from multiple directions;
the CODEC module is used for converting digital signals into electric signals or converting the electric signals into digital signals and is connected with the array silicon microphone module;
the FPGA module is used for realizing the processing of audio digital signals, generating modulation signals and demodulation signals and is connected with the CODEC module, wherein the audio digital signals are subsets of the digital signals;
the radio frequency module is used for mixing, transmitting and receiving wireless signals and is connected with the FPGA module;
the FPGA firmware signal processing method of the wireless microphone system comprises the following steps:
s1) transmitting a mode;
s11) picking up array silicon microphone data, and performing noise suppression, echo suppression, dereverberation processing, companding and data compression processing on the data;
s12) compiling a Matlab file and generating a cosine data table, and configuring and generating an FPGA ROM IP core by using the cosine data table;
s13) calling and configuring an FPAG multiplier IP;
s14) inputting a modulation mode, and generating a modulation signal by using a DDS method according to the configuration of the ROMIP;
s15) moving the modulation signal to a carrier wave configured by the FPGA by using a multiplier and outputting the modulation signal;
s2) receiving a mode;
s21) acquiring an intermediate frequency digital signal from the CODEC module, calling and configuring an IP core of an FPGA filter, filtering the intermediate frequency digital signal and acquiring a processed carrier signal S (n);
s22) writing a Matlab file and generating a sine and cosine orthogonal signal data table, configuring and generating an FPGA ROM IP core by using the sine and cosine data table, and generating a sine signal sin (omega) c n) and cosine signal cos (ω) c n) where ω is c Is the center frequency;
s23) calls and configures the FPAG multiplier IP and performs the following calculations:
I(n)＝S(n)×cos(ω c n)
Q(n)＝S(n)×sin(ω c n)，
wherein I (n) is the I signal of S (n), and Q (n) is the Q signal of S (n);
s24) the following calculations are carried out:
s25) selecting a decoding function DC ();
s26) performs a decoding operation DC (m (n)), and performs decompression and decompression processing to restore the signal.
Optionally, the array silicon microphone module is an 8-way array silicon microphone.
Optionally, the CODEC module has a 24-bit high-precision AD/DA interface, where the DA interface has an output interface with a first-stage amplification function.
Optionally, the firmware function of the FPGA module further includes a filtering process of audio data, a compression and decompression process of audio data, an encoding process of audio data, a synthesis modulation signal, a demodulation signal, and a modulation transform, where the modulation transform includes AM, FM, SSB, PM, FSK, GFSK, DS-SS modulation techniques.
Optionally, the rf module includes a VCO, a PLL, a mixer, and configurable frequency and RX or TX mode.
Optionally, the carrier frequency of the radio frequency module is from 100MHz to 6GHz.
Optionally, the FPAG multiplier IP is an optional functional packet of the FPGA, and performs multiplication.
Optionally, the FPGA ROM IP core is an optional function packet of the FPGA, and performs a table lookup function.
The invention has the beneficial effects that: the FPGA algorithm is used for replacing the traditional data transmission FSK, GFSK, OOK and DS-SS circuits or analog amplitude modulation and frequency modulation and phase modulation circuits. In terms of product production: the circuit architecture of wireless audio transmission is simplified, the circuits of the transmitting end and the receiving end are consistent, the production debugging of products is facilitated, the technical level requirements on production line workers are reduced, the universality of components is improved, and the production efficiency is greatly improved. In the aspect of product application scenes: according to the setting or configuration of a user application scene, the ultra-long distance voice communication of a DS-SS modulation mode can be realized by using a set of standard circuits, the application scenes of low delay, high-quality audio and a long-distance concert of an analog FM modulation mode can be realized, and the HIFI-level pure digital audio transmission mode with high bandwidth can be realized. The user can cover almost all the scene requirements of wireless audio transmission by using one set of products. Furthermore, the structure circuit based on the FPGA and the algorithm thereof is simple, the stability is high, and the carrier frequency and the modulation mode which are variable from 100MHz to 6GHz can effectively avoid the audio transmission signal from being interfered.
Drawings
Fig. 1 is a system block diagram of a wireless microphone system and method thereof.
Fig. 2 is a schematic diagram of a wireless microphone system and a method thereof.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention.
In one embodiment, a wireless microphone system has an overall structure as shown in fig. 1; the implementation flow is shown in fig. 2, and comprises the following steps: the system comprises an array silicon microphone module, a CODEC module, an FPGA module and a radio frequency module;
the array silicon microphone module is used for converting audio signals into electric signals from multiple directions;
the CODEC module is used for converting digital signals into electric signals or converting the electric signals into digital signals and is connected with the array silicon microphone module;
the FPGA module is used for realizing the processing of audio digital signals, generating modulation signals and demodulation signals and is connected with the CODEC module, wherein the audio digital signals are subsets of the digital signals;
the radio frequency module is used for mixing, transmitting and receiving wireless signals and is connected with the FPGA module;
the FPGA firmware signal processing method of the wireless microphone system comprises the following steps:
s1) transmitting a mode;
s11) picking up array silicon microphone data, and carrying out noise suppression, echo suppression, dereverberation processing, companding and data compression processing on the data;
s12) compiling a Matlab file and forming a cosine data table, and configuring and generating an FPGAROM IP core by using the cosine data table;
s13) calling and configuring an FPAG multiplier IP;
s14) inputting a modulation mode, and generating a modulation signal by using a DDS method according to the FPGAROMIP configuration;
s15) moving the modulation signal to a carrier wave configured by the FPGA by using the FPAG multiplier and outputting the modulation signal;
s2) receiving a mode;
s21) acquiring an intermediate frequency digital signal from the CODEC module, calling and configuring an IP core of an FPGA filter, filtering the intermediate frequency digital signal and acquiring a processed carrier signal S (n);
s22) writing a Matlab file and generating a sine and cosine orthogonal signal data table, configuring and generating an FPGA ROM IP core by using the sine and cosine data table, and generating a sine signal sin (omega) c n) and cosine signal cos (ω) c n) where ω is c Is the center frequency;
s23) calls and configures the FPAG multiplier IP and performs the following calculations:
I(n)＝S(n)×cos(ω c n)
Q(n)＝S(n)×sin(ω c n)，
wherein I (n) is the I signal of S (n), and Q (n) is the Q signal of S (n);
s24) performs the following calculation:
s25) selecting a decoding function DC ();
s26) performs a decoding operation DC (m (n)), and performs decompression and decompression processing to restore the signal.
In another embodiment, the array silicon microphone module is an 8-way array silicon microphone. The CODEC module is provided with a 24-bit high-precision AD/DA interface, wherein the DA interface is provided with an output interface with a first-stage amplification function. The firmware functions of the FPGA module further comprise audio data filtering processing, audio data compression and decompression processing, audio data coding processing, modulation signal synthesis, signal demodulation and modulation transformation, wherein the modulation transformation comprises AM, FM, SSB, PM, FSK, GFSK and DS-SS modulation technologies. The radio frequency module comprises a VCO, a PLL, a mixer, a configurable frequency and an RX or TX mode. The carrier frequency of the radio frequency module ranges from 100MHz to 6GHz. The FPAG multiplier IP is an optional functional packet of the FPGA and executes multiplication operation. The FPGA ROM IP core is an optional function packet of the FPGA and executes the function of table lookup.
The invention has the beneficial effects that: the FPGA algorithm is used for replacing the traditional data transmission FSK, GFSK, OOK and DS-SS circuits or analog amplitude modulation and frequency modulation and phase modulation circuits. In terms of product production: the circuit architecture of wireless audio transmission is simplified, the circuits of the transmitting end and the receiving end are consistent, production debugging of products is facilitated, the technical level requirements on production line workers are reduced, the universality of components is improved, and the production efficiency is greatly improved. In terms of product application scenarios: according to the setting or configuration of a user application scene, the ultra-long distance voice communication of a DS-SS modulation mode can be realized by using a set of standard circuits, the application scenes of low delay, high-quality audio and a long-distance concert of an analog FM modulation mode can be realized, and the HIFI-level pure digital audio transmission mode with high bandwidth can be realized. The user can cover almost all the scene requirements of wireless audio transmission by using one set of products. Furthermore, the structure circuit based on the FPGA and the algorithm thereof is simple, the stability is high, and the carrier frequency and the modulation mode which are variable from 100MHz to 6GHz can effectively avoid the audio transmission signal from being interfered.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that it is obvious to those skilled in the art that various modifications and improvements can be made without departing from the principle of the present invention, and these modifications and improvements should also be considered as the protection scope of the present invention.
Claims (9)
1. A wireless microphone system, comprising: the system comprises an array silicon microphone module, a CODEC module, an FPGA module and a radio frequency module;
the array silicon microphone module is used for converting audio signals into electric signals from multiple directions;
the CODEC module is used for converting digital signals into electric signals or converting the electric signals into digital signals and is connected with the array silicon microphone module;
the FPGA module is used for realizing the processing of audio digital signals, generating modulation signals and demodulation signals and is connected with the CODEC module, wherein the audio digital signals are subsets of the digital signals;
the radio frequency module is used for mixing, transmitting and receiving wireless signals and is connected with the FPGA module.
2. The wireless microphone system as claimed in claim 1, wherein the FPGA firmware signal processing method of the wireless microphone system comprises the steps of:
s1) transmitting a mode;
s11) picking up array silicon microphone data, and performing noise suppression, echo suppression, dereverberation processing, companding and data compression processing on the data;
s12) compiling a Matlab file and generating a cosine data table, and configuring and generating an FPGA ROM IP core by using the cosine data table;
s13) calling and configuring an FPAG multiplier IP;
s14) inputting a modulation mode, and generating a modulation signal by using a DDS method according to the ROMIP configuration;
s15) moving the modulation signal to a carrier wave configured by the FPGA by using a multiplier and outputting the modulation signal;
s2) receiving a mode;
s21) acquiring an intermediate frequency digital signal from the CODEC module, calling and configuring an IP core of an FPGA filter, filtering the intermediate frequency digital signal and acquiring a processed carrier signal S (n);
s22) writing Matlab files and generating sine and cosine orthogonal signal data tables, configuring and generating an FPGA ROM IP core by using the sine and cosine data tables, and generating sine signal sin (omega) c n) and cosine signal cos (ω) c n) where ω is c Is the center frequency;
s23) calls and configures the FPAG multiplier IP and performs the following calculations:
I(n)＝S(n)×cos(ω c n)
Q(n)＝S(n)×sin(ω c n)，
wherein I (n) is the I signal of S (n), and Q (n) is the Q signal of S (n);
s24) performs the following calculation:
s25) selecting a decoding function DC ();
s26) performs a decoding operation DC (m (n)), and performs decompression and decompression processing to restore the signal.
3. A wireless microphone system according to claim 1, wherein the arrayed silicon microphone module is an 8-way arrayed silicon microphone.
4. The wireless microphone system of claim 1, wherein the CODEC module has a 24-bit high-precision AD/DA interface, wherein the DA interface has an output interface with a first amplification function.
5. The wireless microphone system of claim 1, wherein the firmware functions of the FPGA module further comprise audio data filtering processing, audio data compression and decompression processing, audio data encoding processing, modulation signal synthesis, demodulation signal and modulation conversion, wherein the modulation conversion comprises AM, FM, SSB, PM, FSK, GFSK, DS-SS modulation technology.
6. A wireless microphone system according to claim 1 wherein the rf module includes a VCO, a PLL, a mixer and configurable frequency and RX or TX modes.
7. The wireless microphone system of claim 1, wherein the radio frequency module carrier frequency is from 100MHz to 6GHz.
8. The method as claimed in claim 2, wherein the FPAG multiplier IP is an optional functional packet of the FPGA, and performs multiplication.
9. The method as claimed in claim 2, wherein the FPGA ROM IP core is an optional feature packet of the FPGA that performs a table lookup function.
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