CN115347036B - Light-emitting panel and display device - Google Patents

Light-emitting panel and display device Download PDF

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Publication number
CN115347036B
CN115347036B CN202210753642.3A CN202210753642A CN115347036B CN 115347036 B CN115347036 B CN 115347036B CN 202210753642 A CN202210753642 A CN 202210753642A CN 115347036 B CN115347036 B CN 115347036B
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Prior art keywords
pixel circuit
driving transistor
light
active layer
driving
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CN115347036A (en
Inventor
刘剑
王柳
王志杰
吴树茂
赖国昌
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Xiamen Tianma Microelectronics Co Ltd
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Xiamen Tianma Microelectronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/33—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes
    • G09F9/335—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements being semiconductor devices, e.g. diodes being organic light emitting diodes [OLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Optics & Photonics (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The embodiment of the invention discloses a light-emitting panel and a display device, comprising a first non-display area and a second non-display area which are positioned at two opposite sides of a display area; a power signal line extending along the column direction of the pixel circuit is electrically connected with a power terminal of the first non-display area; at least part of pixel circuits positioned in the same column are electrically connected with the same power signal line; an active layer of a driving transistor in the pixel circuit includes a channel region, a source region, and a drain region; the first pixel circuit is positioned on one side of the second pixel circuit away from the first non-display area; the length of the channel region of the driving transistor in the first pixel circuit in the first direction is L1, and the width in the second direction is W1; the channel region of the driving transistor in the second pixel circuit has a length L2 in the first direction and a width W2 in the second direction; W1/L1 > W2/L2; the second direction intersects with the first direction and is parallel to the plane of the substrate. The technical scheme provided by the embodiment of the invention is used for improving the uniformity of the display brightness of the light-emitting panel.

Description

Light-emitting panel and display device
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a light-emitting panel and a display device.
Background
With the continuous development of display technology, the display requirements on the display panel are also increasing. At present, different light emitting areas in the display panel have display brightness differences, so that the light emitting brightness of the display panel is uneven, and the display effect of the display panel is affected.
Disclosure of Invention
The invention provides a light-emitting panel and a display device, which are used for improving the uniformity of the display brightness of the light-emitting panel.
In a first aspect, an embodiment of the present invention provides a light emitting panel, including: a display area and a non-display area; the non-display area comprises a first non-display area and a second non-display area which are positioned on two opposite sides of the display area;
The light-emitting panel further comprises a substrate, at least one power terminal, a plurality of power signal wires and a plurality of pixel circuits which are arranged in an array, wherein the at least one power terminal is positioned on one side of the substrate; the power terminal is positioned in the first non-display area; the power supply signal line is electrically connected with the power supply terminal, and extends along the column direction of the pixel circuit; at least part of the pixel circuits positioned in the same column are electrically connected with the same power signal line; the column direction is parallel to the direction in which the first non-display area points to the second non-display area;
The pixel circuit includes at least a driving transistor and a light emitting element; the driving transistor is used for providing driving current for the light-emitting element according to the data signal so as to drive the light-emitting element to emit light; the active layer of the driving transistor includes a source region, a drain region, and a channel region between the source region and the drain region;
Wherein the plurality of pixel circuits comprise a first pixel circuit and a second pixel circuit; the first pixel circuit is positioned at one side of the second pixel circuit away from the first non-display area; the length of the channel region of the driving transistor in the first pixel circuit in the first direction is L1, and the width in the second direction is W1; a channel region of the driving transistor in the second pixel circuit has a length L2 in the first direction and a width W2 in the second direction; W1/L1 > W2/L2; the second direction intersects with the first direction, and the second direction and the first direction are parallel to the plane of the substrate.
In a second aspect, an embodiment of the present invention further provides a display device, including the light emitting panel of the first aspect.
According to the technical scheme, the power supply terminal is arranged in the first non-display area, and the power supply signal wire electrically connected with the power supply terminal is simultaneously electrically connected with at least part of the pixel circuits in the same column, so that the power supply terminal provides power supply signals for each pixel circuit through the power supply signal wire, and each pixel circuit can perform luminous display; meanwhile, the width-to-length ratio W1/L1 of the channel region of the driving transistor in the first pixel circuit, which is positioned on one side of the second pixel circuit far from the first non-display region, is set to be larger than the width-to-length ratio W2/L2 of the channel region of the driving transistor in the second pixel circuit, so that the generated driving current of the driving transistor in the first pixel circuit can be larger than the driving current of the driving transistor in the second pixel circuit under the condition that the same gate-source voltage signal is input, the difference between the display luminance of the control panel of the first pixel circuit and the display luminance of the control panel of the second pixel circuit is made up for due to the fact that the length of the power signal line between the first pixel circuit and the power terminal is different from the length of the power signal line between the second pixel circuit and the power terminal, and the difference between the power signal received by the first pixel circuit and the second pixel circuit is made up, when the driving signals received by the first pixel circuit and the second pixel circuit are identical, the display luminance of the first pixel circuit and the second pixel circuit can tend to be consistent, and the display luminance of the second pixel circuit can be further reduced, and the display luminance of the first pixel circuit and the second pixel circuit can be controlled.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic structural diagram of a light-emitting panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 3 is a schematic cross-sectional structure of a driving transistor according to an embodiment of the present invention;
fig. 4 is a schematic top view of a driving transistor according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a top-down comparison structure of driving transistors in a first pixel circuit and a second pixel circuit according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a top-down comparison structure of driving transistors in a first pixel circuit and a second pixel circuit according to another embodiment of the present invention;
FIG. 7 is a schematic diagram showing a top-down contrast structure of driving transistors in a first pixel circuit and a second pixel circuit according to another embodiment of the present invention;
fig. 8 is a schematic diagram of a top-down comparison structure of active layers of driving transistors in a first pixel circuit and a second pixel circuit according to an embodiment of the present invention;
Fig. 9 is a schematic diagram of a cross-sectional comparison structure of driving transistors in a first pixel circuit and a second pixel circuit according to an embodiment of the present invention;
fig. 10 is a control timing diagram of a pixel circuit according to an embodiment of the present invention;
Fig. 11 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Fig. 1 is a schematic structural diagram of a light-emitting panel according to an embodiment of the present invention, where, as shown in fig. 1, the light-emitting panel includes a display area 100 and a non-display area 200; the non-display area 200 includes a first non-display area 201 and a second non-display area 202 located at opposite sides of the display area 10; the light-emitting panel further comprises a substrate base plate 10, at least one power terminal 11 positioned on one side of the substrate base plate 10, a plurality of power signal lines 12 and a plurality of pixel circuits 13 arranged in an array; the power terminal 11 is located in the first non-display area 201; the power supply signal line 12 is electrically connected to the power supply terminal 11, and the power supply signal line 12 extends along the column direction Y of the pixel circuit 13; at least part of the pixel circuits 13 located in the same column are electrically connected to the same power supply signal line 12; the column direction Y is parallel to the direction in which the first non-display area 201 points to the second non-display area 202; the pixel circuit 13 includes at least a driving transistor 131 and a light emitting element 132; the driving transistor 131 is configured to supply a driving current to the light emitting element 132 according to the data signal, so as to drive the light emitting element 132 to emit light; the active layer 1311 of the driving transistor 131 includes a source region, a drain region, and a channel region between the source region and the drain region; wherein the plurality of pixel circuits 13 includes a first pixel circuit 13A and a second pixel circuit 13B; the first pixel circuit 13A is located at a side of the second pixel circuit 13B away from the first non-display area 201; the channel region of the driving transistor 131 in the first pixel circuit 13A has a length L1 in the first direction X and a width W1 in the second direction Y; the channel region of the driving transistor 131 in the second pixel circuit 13B has a length L2 in the first direction X and a width W2 in the second direction Y; W1/L1 > W2/L2; the second direction Y intersects the first direction X, and both the second direction Y and the first direction X are parallel to the plane of the substrate 10.
Wherein the base substrate 10 may be transparent, translucent or opaque. The substrate 10 may be a rigid substrate, such as a glass substrate; the substrate 10 may also be a flexible substrate so that it has the characteristics of being stretchable, foldable, bendable or crimpable, in which case the substrate 10 may be formed of any suitable insulating material having flexibility, for example, a polymer material such as Polyimide (PI), polycarbonate (PC), polyethersulfone (PES), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyarylate (PAR), or glass Fiber Reinforced Plastic (FRP).
It can be appreciated that the first non-display area 201 is generally a setting area of a driving circuit, and the driving circuit is electrically connected to the pixel circuit 13 to provide a driving signal for the pixel circuit 13, so that the pixel circuit 13 performs display and light emission under the driving of the driving circuit. The driving current may be a power driving circuit for providing a power signal to the pixel circuit 13, or other driving circuits for providing a data signal or a scan signal to the pixel circuit 13, which is not particularly limited in the embodiment of the present invention.
With continued reference to fig. 1, one side of the substrate 10 of the display area 100 is correspondingly provided with pixel circuits 13 arranged in an array, at least one power terminal 11 is provided in the first non-display area 201, fig. 1 only illustrates one power terminal 11, and the power signal line 12 electrically connected with the power terminal 11 is simultaneously electrically connected with at least part of the pixel circuits 13 in the same column, so that after receiving a power signal (for example, a positive power signal PVDD) output by the power driving circuit, the power terminal 11 can transmit the power signal to the pixel circuits 13 along the direction from the first non-display area 201 to the second non-display area 202 through the power signal line 12, and the pixel circuits 13 are driven to work normally.
Since the power signal line 12 has a certain resistivity, a certain voltage drop is generated in the power signal transmitted by the power signal line, and the longer the power signal line 12 is, the larger the resistance value of the power signal line 12 is, and the larger the voltage drop is generated in the power signal transmitted by the power signal line. Therefore, the farther from the power terminal 11, that is, the closer to the second non-display area 202, the voltage value of the power signal received by the pixel circuit 13 will be smaller, but the greater the voltage value of the power signal received by the pixel circuit 13 closer to the first non-display area 201, the further the difference exists between the pixel circuit 13 closer to the first non-display area 201 and the power signal received by the pixel circuit 13 closer to the second non-display area 202, so that the difference occurs in the light-emitting brightness of the light-emitting element 132, and the uniformity of the light-emitting brightness is affected.
Considering that the voltage drop of the power signal line 12 is objectively present and difficult to eliminate, the difference in light emission luminance can be reduced by differently designing the pixel circuits 13 of different light emission regions, and the uniformity of the display light emission luminance can be improved.
With continued reference to fig. 1, the pixel circuit 13 includes a first pixel circuit 13A and a second pixel circuit 13B; the first pixel circuit 13A is located at a side of the second pixel circuit 13B away from the first non-display area 201, and the first pixel circuit 13A and the second pixel circuit 13B are designed differently, so that the display light-emitting brightness of the first pixel circuit 13A and the display light-emitting brightness of the second pixel circuit 13A are kept consistent under the same gray scale voltage, thereby being beneficial to improving the uniformity of the panel light-emitting brightness.
As shown in fig. 2, fig. 2 schematically illustrates a circuit structure of a pixel circuit 13 of 7TIC (i.e. including seven transistors M1, M2, M3, M4, M5, M6, and M7, and a storage capacitor Cst), and it is understood that among the seven transistors M1, M2, M4, M5, M6, and M7 in the pixel circuit 13, the transistors M1, M2, M4, M5, M6, and M7 are turned on or off under the control of corresponding Scan signals (Scan 1, scan2, emit), respectively, to control the on/off of the transmission paths of the data signal Vdata, the initialization signal, and the reset signal VRef, and to control the time of supplying the driving current to the light emitting element 132. The transistor M3 is the driving transistor 131, and after the power signal line 12 transmits the received power signal (for example, the positive power signal PVDD) to the first pole of the driving transistor 131, the cathode of the light emitting element 132 is written with the negative power signal PVEE, so that when the transistors M1 and M6 are in the on state, a current path is formed from the positive power signal PVDD to the negative power signal PVEE, so that the driving transistor 131 generates a driving current according to the voltage difference between the data signal written in the gate thereof and the positive power signal PVDD of the first pole thereof, and the light emitting element 132 is determined to emit light. The reset signal may be the same as or different from the initialization signal, which is not specifically limited in the embodiment of the present invention. It is understood that when the pixel circuit 13 provided in the embodiment of the present invention is a 7T1C circuit, the driving timing thereof may be similar to that of a 7T1C circuit known to those skilled in the art, and will not be described herein.
It can be understood that in the light emitting panel provided in the embodiment of the present invention, the structure of the pixel circuit is not limited to the structure of 7T1C, but may be 2T1C (a switching transistor, a driving transistor and a storage capacitor), or may be other structures, and the embodiment of the present invention does not specifically limit the structure of the pixel circuit on the premise that the pixel circuit includes the driving transistor and the light emitting element.
Wherein, optionally, the light emitting element 132 includes, but is not limited to, an OLED, a mini LED, or a micro LED, which is not limited by the embodiment of the present invention. The light-emitting panel provided by the embodiment of the invention can be a display panel for directly displaying pictures, and can also be a backlight panel for providing light sources for other display panels, and the invention is not limited in particular. For convenience of description, the embodiments of the present invention take the light-emitting panel as a display panel capable of directly displaying images as an example, and the technical solutions of the embodiments of the present invention are described in an exemplary manner.
Further, fig. 3 is a schematic cross-sectional structure diagram of a driving transistor according to an embodiment of the present invention, referring to fig. 2 and 3 in combination, the driving transistor 131 includes an active layer 1311, a gate electrode 1312, and a source electrode 1313 and a drain electrode 1314, wherein the active layer 1311 may include a source region, a drain region, and a channel region located between the gate region and the drain region, the source electrode 1313 may contact the source region of the active layer 1311 through a via hole, the drain electrode 1314 may contact the drain region of the active layer 1311 through a via hole, the gate electrode 1312 overlaps the channel region of the active layer 1311 in a direction Z perpendicular to a plane of the substrate 10, and a region of the active layer 1311 overlapping the gate electrode 1312 is the channel region of the active layer 1311, and at this time, a width of the channel region of the active layer 1311 in the first direction X is a width of the gate electrode 1312 in the first direction X. When a corresponding electric signal is applied to the gate electrode 1312 and the source electrode 1313 of the driving transistor 131, for example, a voltage difference Vgs between the electric signal applied to the gate electrode 1312 and the electric signal applied to the source electrode 1313 satisfies |vgs|v|vth| (Vth is a threshold voltage of the driving transistor 131), an electric field generated in the interlayer insulating layer 14 between the gate electrode 1312 and the active layer 1311 can be applied to the active layer 1311 to cause carriers in a channel region of the active layer 1311 to be accumulated to form a carrier layer, so that a source region and a drain region of the active layer 1311 are communicated through the carrier layer of the channel region, and the source electrode 1313 and the drain electrode 1314 are turned on, thereby causing the driving transistor 131 to be in an on state; in contrast, if the electric field in the interlayer insulating layer 14 is insufficient to control the aggregation of minority carriers into minority carriers in the active layer 1311, the source 1313 and the drain 1314 thereof cannot communicate, so that the driving transistor 131 is in an off state. For example, the active layer 1311 may employ a low temperature polysilicon material or an oxide semiconductor material; when the active layer is made of low-temperature polysilicon, the driving transistor 131 can be a P-type transistor, and at the moment, the threshold voltage Vth is less than 0, and at Vgs < Vth, the driving transistor 131 is in a conducting state; when the active layer is made of an oxide semiconductor material, the driving transistor 131 may be an N-type transistor, and in this case, the threshold voltage Vth thereof is >0, and in Vgs > Vth, the driving transistor 131 is in an on state.
Further, fig. 4 is a schematic top view of a driving transistor according to an embodiment of the present invention, with continued reference to fig. 2, 3 and 4, in which the driving current I generated by the driving transistor 131 is calculated as i=k (Vgs-Vth) 2 when the driving transistor is usually operated in the saturation region,W is the width of the channel region, L is the length of the channel region, cox is the parasitic capacitance formed by the gate electrode and the active layer of the drive transistor, and μ is the mobility of the active layer of the drive transistor. It can be understood that, in the data writing stage, the voltage signal written by the gate of the driving transistor 131 is Vdata-Vth, that is, vg=vdata-vth|, and the source voltage signal of the driving transistor 131 is a positive power supply signal PVDD, that is, vs=pvdd, so that, in the light emission control stage, the driving current generated by the driving transistor 131 can be further calculated as i=k (PVDD-Vdata) 2 by using the driving current I calculation formula of the driving transistor 131. From this, it is understood that, under the same Vdata and PVDD, the larger the K value, the larger the driving current generated by the corresponding driving transistor 131, so that the higher the light emitting luminance of the light emitting element 132 in the pixel circuit 13, when the power source signal PVDD supplied along the power source signal line 12 is reduced due to the voltage drop, the variation of the driving current I caused by the reduction of PVDD can be compensated by increasing the K value, thereby reducing the display light emitting luminance difference of the first pixel circuit 13A and the second pixel circuit 13B and improving the uniformity of the display light emitting luminance.
Thus, as shown in FIGS. 1 and 4, the length of the channel region of the driving transistor 131 corresponding to the first pixel circuit 13A in the first direction X is L1, the width of the channel region of the driving transistor 131 corresponding to the second pixel circuit 13B in the second direction Y is W1, the length of the channel region of the driving transistor 131 corresponding to the second pixel circuit 13B in the first direction X is L2, and the width of the channel region of the driving transistor in the second direction Y is W2, W1/L1 > W2/L2 is set so that the driving current generated by the driving transistor 131 corresponding to the first pixel circuit 13A is larger than the driving current generated by the driving transistor 131 corresponding to the second pixel circuit 13B when the same gate-source voltage signal is inputted, therefore, the voltage drop difference between the positive power supply signal PVDD received by the first pixel circuit 13A and the positive power supply signal PVDD received by the second pixel circuit is made up, so that the difference between the driving current generated by the driving transistor of the first pixel circuit 13A and the driving current generated by the second pixel circuit 13B is lower than the preset threshold value, further, the brightness emitted by the light emitting element 132 in the first pixel circuit 13A is ensured to be consistent with the brightness emitted by the light emitting element 132 in the second pixel circuit 13B, the difference of the brightness emitted by the light emitting element 132 controlled by the first pixel circuit 13A and the second pixel circuit 13B is reduced, and the uniformity of the panel display brightness is improved.
It is to be understood that fig. 4 only schematically illustrates a rectangular structure of the top view of the active layer 1311 of the driving transistor 131, and the top view of the active layer may also have a regular or irregular shape such as a "Z" shape, a "U" shape, a "several" shape, or the like in the embodiment of the present invention. The length of the channel region of the active layer in the driving transistor is the total length of the region of the active layer extending from one side of the source region to one side of the drain region and overlapping the gate, and the first direction is the direction extending from one side of the source region to one side of the drain region; the width of the channel region of the active layer in the driving transistor is the smallest dimension in the direction intersecting the length direction of the channel region at each position of the channel region.
It will also be appreciated that fig. 2 illustrates, by way of example only, the first pixel circuit 13A and the second pixel circuit 13B, and that the aspect ratio of the channel regions of the drive transistors 131 in the pixel circuits 13 may be gradually increased in the direction Y along which the first non-display region points to the second non-display region, and that the aspect ratios of the channel regions of the drive transistors 131 in the pixel circuits 13 located in the same row may be the same or different; or the display area may be divided into a plurality of sub-display areas, the aspect ratio of the channel area of the driving transistor in the pixel circuit in each sub-display area may be gradually increased in a direction along the first non-display area toward the second non-display area, and the aspect ratio of the channel area of the driving transistor in each pixel circuit in the same sub-display area may be the same or different; the embodiment of the present invention is not limited thereto. Preferably, the width to length ratio of the channel regions of the driving transistors 131 in the pixel circuits 13 located in the same row or the same sub-display region is the same to further improve the uniformity of the panel display light emission luminance. For convenience of description, the embodiment of the present invention takes the parameter relationship of the driving transistors in the two pixel circuits (i.e. the first pixel circuit and the second pixel circuit) as an example, and the technical solution of the embodiment of the present invention is described in an exemplary manner.
In addition, the power signal lines mentioned in the embodiments of the present invention include, but are not limited to, power signal lines for transmitting positive power signals, and may also include power signals for transmitting negative power signals. For convenience of description and simplification of the drawings, the embodiments of the present invention take the power signal line as the power signal line for transmitting the positive power signal as an example, and the technical solutions of the embodiments of the present invention are described in an exemplary manner.
In the embodiment of the invention, the power supply terminal is arranged in the first non-display area, and the power supply signal wire electrically connected with the power supply terminal is simultaneously electrically connected with at least part of the pixel circuits in the same column, so that the power supply terminal provides a power supply signal for each pixel circuit through the power supply signal wire, and each pixel circuit performs luminous display; meanwhile, the width-to-length ratio W1/L1 of the channel region of the driving transistor in the first pixel circuit, which is positioned on one side of the second pixel circuit far from the first non-display region, is set to be larger than the width-to-length ratio W2/L2 of the channel region of the driving transistor in the second pixel circuit, so that the generated driving current of the driving transistor in the first pixel circuit can be larger than the driving current of the driving transistor in the second pixel circuit under the condition that the same gate-source voltage signal is input, the difference between the display luminance of the control panel of the first pixel circuit and the display luminance of the control panel of the second pixel circuit is made up for due to the fact that the length of the power signal line between the first pixel circuit and the power terminal is different from the length of the power signal line between the second pixel circuit and the power terminal, and the difference between the power signal received by the first pixel circuit and the second pixel circuit is made up, when the driving signals received by the first pixel circuit and the second pixel circuit are identical, the display luminance of the first pixel circuit and the second pixel circuit can tend to be consistent, and the display luminance of the second pixel circuit can be further reduced, and the display luminance of the first pixel circuit and the second pixel circuit can be controlled.
In an alternative embodiment, fig. 5 is a schematic diagram of a top-view comparison structure of driving transistors in a first pixel circuit and a second pixel circuit according to an embodiment of the present invention, as shown in fig. 5, W1 > W2, and l2=l1.
As can be appreciated from the description of fig. 3 and 4, in the process of manufacturing the panel, a semiconductor layer corresponding to each active layer 1311 of the driving transistor 131 may be formed on the substrate 10, and after patterning the semiconductor layer, a film layer corresponding to the interlayer insulating layer 14 and the gate electrode 1312 may be sequentially formed on the patterned semiconductor layer, and the interlayer insulating layer 14 and the gate electrode 1312 may be patterned to expose a source region and a drain region in the active layer 1311, and the source region and the drain region may be doped with the gate electrode 1312 as a mask to form the active layer 1311 including the source region, the channel region and the drain region, or a mask may be additionally provided to dope the source region and the drain region in the active layer 1311.
In this way, by setting the size of the opening of the mask plate to be different from that of the opening of the mask plate, the channel region of the active layer of the driving transistor 131 in the first pixel circuit 13A and the second pixel circuit 13B can be made different in size. Taking the gate electrode of the driving transistor 131 as an example of a mask, by setting the width of the gate electrode 1312 of the driving transistor 131 in the first pixel circuit 13A in the second direction Y to be larger than the width of the gate electrode 1312 of the driving transistor 131 in the second pixel circuit 13B in the second direction Y, the width W1 of the channel region of the driving transistor 131 in the first pixel circuit 13A in the second direction Y can be made larger than the width W2 of the channel region of the driving transistor 131 in the second pixel circuit 13B, and the length L1 of the channel region of the driving transistor 131 in the first pixel circuit 13A in the first direction X is equal to the length L2 of the channel region of the driving transistor 131 in the second pixel circuit 13B in the first direction X, so that the display luminance of the light emitting element 132 controlled by the first pixel circuit 13A and the display luminance of the light emitting element 132 controlled by the second pixel circuit 13B can be made to be more uniform, and the uniformity of the luminance of the light emitting element 132 due to the difference in luminance of the first pixel circuit 13B and the display luminance of the light emitting element 13B can be improved.
It should be noted that the active layers 1311 of the driving transistors in the first pixel circuit 13A and the second pixel circuit 13B may be prepared by the same or different preparation processes, which is not limited in the embodiment of the present invention.
In another alternative embodiment, fig. 6 is a schematic diagram of a top view comparison structure of driving transistors in a first pixel circuit and a second pixel circuit according to another embodiment of the present invention, as shown in fig. 6, W1 > W2, and L2 > L1, which also can enable a channel region of an active layer 1311 of the driving transistor 131 in the first pixel circuit 13A and a channel region of an active layer 1311 of the driving transistor 131 in the second pixel circuit 13B to satisfy W1/L1 > W2/L2, so as to reduce a difference between light-emitting brightness displayed by the light-emitting elements 132 controlled by the first pixel circuit 13A and the second pixel circuit 13B, and improve uniformity of panel display brightness, which is not described herein.
In another alternative embodiment, fig. 7 is a schematic diagram of a top view comparison structure of driving transistors in a first pixel circuit and a second pixel circuit according to another embodiment of the present invention, as shown in fig. 7, w1=w2, and L2 > L1, which also enables a channel region of an active layer 1311 of the driving transistor 131 in the first pixel circuit 13A and a channel region of an active layer 1311 of the driving transistor 131 in the second pixel circuit 13B to satisfy W1/L1 > W2/L2, so as to reduce a difference between light-emitting brightness displayed by the light-emitting elements 132 controlled by the first pixel circuit 13A and the second pixel circuit 13B, and improve uniformity of panel display brightness, which is not described herein.
It should be noted that, in any of the above embodiments, specific numerical values of W1, W2, L1 and L2 may be set according to practical situations, and the embodiment of the present invention does not limit any specific numerical values.
In an alternative embodiment, fig. 8 is a schematic diagram of a top-down comparison structure of active layers of driving transistors in a first pixel circuit and a second pixel circuit according to an embodiment of the present invention, where as shown in fig. 8, a source region S may include a heavily doped source region S01 and a lightly doped source region S02; the lightly doped source region S02 is positioned between the heavily doped source region S01 and the channel region P; the drain region D may include a heavily doped drain region D01 and a lightly doped drain region D02; the lightly doped drain region D02 is positioned between the heavily doped drain region D01 and the channel region P; the length of the lightly doped source region S02 of the driving transistor 131 in the first pixel circuit 13A in the first direction X is L11; the length of the lightly doped drain region D02 of the driving transistor 131 in the first pixel circuit 13A in the first direction X is L12; the length of the lightly doped source region S02 of the driving transistor 131 in the second pixel circuit 13B in the first direction X is L21; the length of the lightly doped drain region D02 of the driving transistor 131 in the second pixel circuit 12B in the first direction X is L22; wherein L11< L21, and/or L12< L22.
Taking L11< L21 and L12< L22 as examples, the doping concentration of the lightly doped source region S02 in the source region S is smaller than the doping concentration of the heavily doped source region S01, and the doping concentration of the lightly doped drain region D02 in the drain region D is smaller than the doping concentration of the heavily doped drain region D01; wherein, the heavily doped source region S01 is in direct contact with the source electrode to realize electrical connection, and the heavily doped drain region D01 is in direct contact with the drain electrode to realize electrical connection; the presence of the lightly doped source region S02 and the lightly doped drain region D02 can weaken the electric field of the source region and the drain region to prevent the hot electron degradation effect from affecting the magnitude of the driving current generated by the driving transistor 131. Since the lengths of the lightly doped source region S02 and the lightly doped drain region D02 in the first direction X are inversely related to the on-current of the driving transistor 131, i.e., the longer the lengths of the lightly doped source region S02 and the lightly doped drain region D02 in the first direction X, the smaller the on-current of the driving transistor 131. Based on this, by setting the length L11 of the lightly doped source region S02 of the driving transistor in the first pixel circuit 13A to be smaller than the length L21 of the lightly doped source region S02 of the driving transistor in the second pixel circuit 13B, and setting the length L12 of the lightly doped drain region D02 of the driving transistor in the first pixel circuit 13A to be smaller than the length L22 of the lightly doped drain region D02 of the driving transistor in the second pixel circuit 13B, the on-current of the driving transistor 131 in the first pixel circuit 13A is made larger than the on-current of the driving transistor 131 in the second pixel circuit 13B, the display light emission luminance of the first pixel circuit 13A can be kept uniform with the display light emission luminance of the light emitting element 132 controlled by the second pixel circuit 13B, and the display light emission uniformity of the light emitting panel can be improved.
In an alternative embodiment, with continued reference to fig. 8, the length L0 of the active layer 1311 of the driving transistor 131 of each pixel circuit 13 in the first direction X is the same, and the width of the active layer 1311 of the driving transistor 131 of each pixel circuit 13 in the second direction Y is the same.
At this time, the width of the channel region of the active layer of the driving transistor 131 of each pixel circuit 13 may be the same, the length L1 of the channel region P of the active layer of the driving transistor 131 in the first pixel circuit 13A may be equal to the length L2 of the channel region P of the active layer of the driving transistor 131 in the second pixel circuit 13B, the width W1 of the channel region P of the active layer of the driving transistor 131 in the first pixel circuit 13A may be equal to the width W2 of the channel region P of the active layer of the driving transistor 131 in the second pixel circuit 13B, and the length L13 of the heavily doped source region S01 of the active layer of the driving transistor 131 in the first pixel circuit 13A may be greater than the length L23 of the heavily doped source region S01 of the active layer of the driving transistor 131 in the second pixel circuit 13B, the length L14 of the heavily doped drain region D01 of the active layer of the driving transistor 131 in the first pixel circuit 13A may be greater than the length L24 of the heavily doped drain region D01 of the active layer of the driving transistor 131 in the second pixel circuit 13B, and the length L11 of the lightly doped source region S02 of the active layer of the driving transistor 131 in the first pixel circuit 13A may be less than the length L21 of the lightly doped source region S02 of the active layer of the driving transistor 131 in the second pixel circuit 13B, and the length L12 of the lightly doped drain region D02 of the active layer of the driving transistor 131 in the first pixel circuit 13A may be less than the length L22 of the lightly doped drain region D02 of the active layer of the driving transistor 131 in the second pixel circuit 13B; in this way, the area of the active layer of the driving transistor 131 in the first pixel circuit 131A may be the same as the area of the active layer of the driving transistor 131 in the second pixel circuit 131B, i.e., the areas of the active layers of the driving transistors in all the pixel circuits may be the same, so that different openings are not required to be formed in the mask for preparing different pixel circuits, thereby facilitating the simplification of the process of the light-emitting panel and the reduction of the preparation cost of the light-emitting panel.
Alternatively, the mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A is μ 1, and the mobility of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B is μ 2; wherein mu 1 is more than mu 2.
Specifically, as can be seen from the driving current calculation formula of the driving transistor 13, the magnitude of the K value is also affected by the mobility μ of the active layer 1311 of the driving transistor 131, and the larger the mobility μ is, the larger the corresponding K value is. In this way, in the process of preparing the first pixel circuit 13A and the second pixel circuit 13B, by making the mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A larger than the mobility of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B to be μ1 and μ2, the driving current of the driving transistor 131 in the first pixel circuit 13A and the driving current of the driving transistor 131 in the second pixel circuit 13B can be made the same, so that the display light-emitting luminance of the first pixel circuit 13A and the display light-emitting luminance of the light-emitting element 132 controlled by the second pixel circuit 13B are kept consistent, and further, the difference between the display light-emitting luminance of the first pixel circuit 13A and the display light-emitting luminance of the second pixel circuit 13B due to the voltage drop of the power supply signal line 12 is compensated, and the uniformity of the display light-emitting luminance of the panel is improved.
It is understood that the mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A and the second pixel circuit 13B may be different in different doping concentrations or different materials, which is not limited by the embodiment of the present invention.
Illustratively, when the active layer 1311 of the driving transistor 131 In the first pixel circuit 13A and the second pixel circuit 13B employs an oxide semiconductor material including, but not limited to, indium gallium zinc oxide (In m GaZnO, IGZO), for an oxide semiconductor material containing indium, wherein the content of indium can determine the mobility of electrons (carriers) In the oxide semiconductor, the higher the content of indium In the oxide semiconductor, the higher the carrier mobility thereof can be made to have a higher mobility. Accordingly, the indium content of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A may be set to be greater than the indium content of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B, so that the mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A is greater than the mobility of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B. Alternatively, the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A may include indium gallium zinc oxide (InGaZnO, IGZO), the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B may include indium gallium zinc tin oxide (InGaZnSnO, IGZTO), and the mobility of indium gallium zinc tin oxide (InGaZnSnO, IGZTO) may be generally smaller than that of indium gallium zinc oxide (InGaZnO, IGZO), which may also make the mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A larger than that of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B.
Note that, the mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A and the mobility of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B are relative concepts, and the specific value of the mobility of each active layer 1311 of the driving transistor 131 in the pixel circuit 13 is not specifically limited on the premise that the active layer 1311 of the driving transistor 131 can have both low power consumption and high reliability.
Optionally, the doping concentration of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A is C1, and the doping concentration of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B is C2; wherein C1 is less than C2.
It can be understood that the smaller the doping concentration of the active layer 1311 of the driving transistor 131, the greater the activity of the carrier, so that the carrier is more likely to migrate, and thus the greater the mobility, so that the uniformity of the panel display light-emitting luminance can be improved by setting the doping concentration C1 of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A to be smaller than the doping concentration C2 of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B, so that the mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A is larger than the mobility of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B to be μ2, and further reducing the display light-emitting luminance difference of the light-emitting element 132 controlled by the first pixel circuit 13A and the second pixel circuit 13B due to the voltage drop of the power supply signal line 12. The active layers of the driving transistors in different pixel circuits can be doped through a half-mask process, so that the active layers of the driving transistors in different pixel circuits can have corresponding doping concentrations.
It should be noted that, depending on the preparation materials of the active layer 1311 of the driving transistor 131, the specific components thereof may be set to have different doping concentrations, which is not limited in the embodiment of the present invention.
Optionally, fig. 9 is a schematic diagram showing a cross-sectional comparison structure of driving transistors in a first pixel circuit and a second pixel circuit according to an embodiment of the present invention, as shown in fig. 9, a first metal layer 15 and a semiconductor layer 16 located on one side of a substrate 10; an interlayer insulating layer 14 is provided between the first metal layer 15 and the semiconductor layer 16; the first metal layer 15 includes a gate electrode 1312 of the driving transistor 131; the semiconductor layer 16 includes an active layer 1311 of the driving transistor 131; in a direction Z perpendicular to a plane in which the substrate base plate 10 is located, an overlapping region of the active layer 1311 of the driving transistor 131 and the gate electrode 1312 is a channel region of the active layer 1311; the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the first pixel circuit 13A constitute a first parasitic capacitance Cox1; the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the second pixel circuit 13B constitute a second parasitic capacitance Cox2; wherein Cox1 > Cox2.
Specifically, as can be seen from the driving current calculation formula of the driving transistor 13, the magnitude of the K value is also affected by the parasitic capacitance Cox formed by the gate 1312 of the driving transistor 131 and the active layer 1311, and the larger Cox is, the larger the corresponding K value is. In this way, in the process of preparing the first pixel circuit 13A and the second pixel circuit 13B, the gate 1312 of the driving transistor 131 in the first pixel circuit 13A and the active layer 1311 form the first parasitic capacitance Cox1 larger than the gate 1312 of the driving transistor 131 in the second pixel circuit 13B and the active layer 1311 form the second parasitic capacitance Cox2, so that the driving current of the driving transistor 131 in the first pixel circuit 13A is the same as the driving current of the driving transistor 131 in the second pixel circuit 13B, so that the display light-emitting brightness of the first pixel circuit 13A is consistent with the display light-emitting brightness of the light-emitting element 132 controlled by the second pixel circuit 13B, and the difference between the display light-emitting brightness of the light-emitting element 132 controlled by the first pixel circuit 13A and the second pixel circuit 13B due to the voltage drop of the power signal line 12 is compensated, thereby improving the uniformity of the panel display light-emitting brightness.
Note that, the manner of adjusting the magnitude of the parasitic capacitance Cox formed by the gate electrode 1312 and the active layer 1311 of the driving transistor 131 in the pixel circuit 13 includes, but is not limited to, by changing the thickness of each film layer or the material used to manufacture each film layer, which is not limited in the embodiment of the present invention.
Optionally, with continued reference to fig. 8, a first metal layer 15 and a semiconductor layer 16 on one side of the substrate base 10; an interlayer insulating layer 14 is provided between the first metal layer 15 and the semiconductor layer 16; the first metal layer 15 includes a gate electrode 1312 of the driving transistor 131; the semiconductor layer 16 includes an active layer 1311 of the driving transistor 131; in a direction Z perpendicular to a plane in which the substrate base plate 10 is located, an overlapping region of the active layer 1311 of the driving transistor 131 and the gate electrode 1312 is a channel region of the active layer 1311; the thickness of the interlayer insulating layer 14 between the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the first pixel circuit 13A is d1; the thickness of the interlayer insulating layer 14 between the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the second pixel circuit 13B is d2; wherein d1 < d2.
The material of the interlayer insulating layer 14 may be silicon oxide, silicon oxynitride, silicon nitride, aluminum oxide, titanium oxide, hafnium oxide, tantalum oxide, zirconium oxide, or the like, which is not limited in the embodiment of the present invention.
It can be understood that in the panel manufacturing process, the entire semiconductor layer 16 is formed on the substrate 10, then the active layer 1311 is patterned by a yellow light process, the interlayer insulating layer 14 is formed on the active layer 1311 and the substrate 10, the corresponding manufacturing process may be plasma chemical vapor deposition, physical vapor deposition, atomic layer deposition or pulse laser deposition, then the entire first metal layer 15 is formed on the interlayer insulating layer 14, and then the patterned gate electrode 1312 is obtained by a yellow light process, where the overlapping region of the active layer 1311 and the gate electrode 1312 of the driving transistor 131 is the channel region of the active layer 1311.
Since the parasitic capacitance Cox formed by the gate electrode 1312 of the driving transistor 131 and the active layer 1311 is related to the thickness of the interlayer insulating layer 14 between the gate electrode 1312 and the active layer 1311 and is inversely related to the thickness of the interlayer insulating layer 14 between the gate electrode 1312 of the driving transistor 131 and the active layer 1311, the difference between the display luminance of the light emitting element 132 controlled by the first pixel circuit 13A and the display luminance of the light emitting element 132 controlled by the second pixel circuit 13B due to the voltage drop of the power signal line 12 can be compensated by setting the thickness d1 of the interlayer insulating layer 14 between the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the first pixel circuit 13A smaller than the thickness d2 of the interlayer insulating layer 14 between the gate electrode 1312 of the driving transistor 131 and the active layer 1311, so that the first parasitic capacitance Cox1 formed by the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the first pixel circuit 13A is larger than the second parasitic capacitance Cox2 formed by the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the second pixel circuit 13B. The interlayer insulating layers of the driving transistors in different pixel circuits can be etched through a half-mask process, so that the interlayer insulating layers of the driving transistors in different pixel circuits can have corresponding thicknesses.
It should be noted that, in the embodiment of the present invention, specific values of the thickness of the interlayer insulating layer 14 between the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the pixel circuit 13 are not limited, and may be selectively set according to practical situations.
Alternatively, as shown in fig. 1 to 9, if the data signals provided to the driving transistors 131 of the first pixel circuit 13A and the second pixel circuit 13B are Vdata, the power signal PVDD provided by the power terminal 11 is transmitted to the source 1313 or the drain 1314 of the driving transistor 131 of the first pixel circuit 13A and the second pixel circuit 13B respectively through the power signal line 12, then:
Wherein Cox1 is a first parasitic capacitance formed by the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the first pixel circuit 13A, μ 1 is a mobility of the active layer 1311 of the driving transistor 131 in the first pixel circuit 13A, N1 is a length of the power supply signal line 12 between the power supply terminal 11 and the first pixel circuit 13A, cox2 is a second parasitic capacitance formed by the gate electrode 1312 of the driving transistor 131 and the active layer 1311 in the second pixel circuit 13B, μ 2 is a mobility of the active layer 1311 of the driving transistor 131 in the second pixel circuit 13B, N2 is a length of the power supply signal line 12 between the power supply terminal 11 and the second pixel circuit 13B, i is a theoretical driving current generated by the driving transistor 131 when the data signal is Vdata, and R is a power supply signal line 12 resistance per unit length.
Specifically, since the parasitic resistance exists in the power signal line 12, the resistance of the power signal line 12 per unit length can be regarded as R, so that the voltage drop generated by the power terminal 11 in the process of applying the power signal PVDD to the pixel circuit 13 through the power signal line 12 is the product of the resistance of the power signal line 12 per unit length, the length N of the power signal line 12 between the power terminal 11 and the first pixel circuit 13A, and the theoretical driving current i generated by the driving transistor 131 when the data signal is Vdata, i.e., Δu=n·r·i, the power signal received by the corresponding first pixel circuit 13A is PVDD-n1·r·i, and the driving current generated by the driving transistor 131 in the first pixel circuit 13A isThe power supply signal received by the second pixel circuit 13B is PVDD-N2.R.i, and the driving current generated by the driving transistor 131 in the second pixel circuit 13B is PVDD-N2.R.iIn this way, in order to ensure that the light emitting elements 132 controlled by the first pixel circuit 13A and the second pixel circuit 13B have the same display light emitting luminance, it is necessary to make the driving current generated by the driving transistor 131 in the first pixel circuit 13A equal to the driving current generated by the driving transistor 131 in the second pixel circuit 13B, that is, to satisfy the following relationship:
according to the above relation, the specific numerical correspondence of each parameter in the first pixel circuit 13A and the second pixel circuit 13B can be accurately obtained, so that when the transistor 131 is driven in the pixel circuit 13, the preparation accuracy can be improved, the difference of the light emitting brightness of the light emitting element 132 controlled by the first pixel circuit 13A and the second pixel circuit 13B can be reduced, and the uniformity of the panel display light emitting brightness can be improved.
Optionally, fig. 10 is a control timing diagram of a pixel circuit according to an embodiment of the present invention, and as shown in fig. 2 and 10, the pixel circuit 13 further includes at least one light-emitting control transistor 133; the light emission control transistor 133 is configured to control the driving transistor 131 to supply a driving current to the light emitting element 132 according to the light emission control signal Emit; a light-emitting driving circuit is further provided on one side of the substrate 10; the light emission drive circuit is configured to control a light emission control signal duty ratio supplied to the light emission control transistor 133 of each pixel circuit 13 according to the data signal Vdata supplied to the drive transistor 131 in each pixel circuit 13; the duty ratios of the emission control signals Emit corresponding to the different data signals Vdata are different.
It will be appreciated that fig. 2 exemplarily shows that the pixel circuit 13 includes two light emission control transistors, that is, M1 and M6, and the light emission control transistors may be P-type transistors or N-type transistors, which is not limited in the embodiment of the present invention. When the light-emitting control transistor is a P-type transistor, the transistor is turned on when the corresponding light-emitting control signal Emit is at a low level, and the transistor is turned off when the corresponding light-emitting control signal Emit is at a high level; when the light-emitting control transistor is an N-type transistor, the transistor is turned on when the corresponding light-emitting control signal Emit is at a high level, and the transistor is turned off when the corresponding light-emitting control signal Emit is at a low level. For example, in this embodiment, P-type transistors are used as the transistors in the pixel circuit 13, and the control timing chart is shown in fig. 10. In addition, the light-emitting driving circuit for providing the light-emitting control signal Emit for the pixel circuit 13 is generally located in the non-display area 20 of the panel, and the specific circuit structure of the light-emitting driving circuit is not limited in the embodiment of the present invention, and a conventional light-emitting driving circuit may be used, which is not described herein.
With continued reference to fig. 2 and 10, the light emission control of the light emitting panel includes at least one refresh frame in which the driving process of the pixel circuit 13 includes an initialization (reset) phase, a data writing phase, and a light emission control phase, specifically, in the initialization phase t1, the Scan signal Scan1 transitions from a high level to a low level, the transistor M5 is turned on, the initialization signal Vref is written to the gate of the driving transistor 131, and the potential thereof is initialized. In the data writing stage t2, the Scan signal Scan2 jumps from high level to low level, the transistors M2 and M4 are turned on, the data signal Vdata is written into the gate of the driving transistor 131 sequentially through M2, M3 and M4, wherein the gate potential signal of the driving transistor 131 is a data signal subjected to threshold compensation, that is, vdata-Vth (Vth is the threshold voltage of the driving transistor 131), meanwhile, the transistor M7 is also in a turned-on state, and the initializing signal Vref is written into the anode of the light emitting element 132 to avoid the influence of the voltage signal written in the previous frame. In the emission control phase t3, the emission control signal Emit transitions from a high level to a low level, the emission control transistors M1 and M6 are turned on, a path is formed between the power supply voltage signals PVDD and PVEE, and the light emitting element 132 emits light.
As will be understood by those skilled in the art, when the light-emitting panel performs display light emission, each pixel circuit 13 corresponds to a gray-scale value, which can be regarded as the brightness of the light-emitting element 132, the higher the gray-scale value is, the higher the brightness of the light-emitting element 132 is, and the light-emitting control signal Emit can control the light-emitting time of the light-emitting element 132, and the longer the light-emitting time is, the greater the integral of the brightness of the light emitted by the human eye displayed by the light-emitting element 132 is, so that the higher the light-emitting brightness exhibited by the light-emitting element 132 is. In this way, the higher the gray scale, the longer the light emission time for the light emitting element 132, that is, the longer the light emission control signal Emit remains at an active level (i.e., a level controlling the light emission control transistor to be turned on). The embodiment of the invention does not limit the division of gray scale levels, for example, the gray scale levels can be divided into 256 (0-255), and the brightness of the corresponding light emitting element 132 is different due to the different data signals Vdata, that is, the corresponding gray scale levels are different, and the duty ratio of the corresponding light emitting control signals Emit is different, wherein the duty ratio of the light emitting control signals refers to the ratio of the time length of the effective level to the time length of the light emitting control period in one light emitting control period. Fig. 10 exemplarily shows a timing diagram of the emission control signal Emit at gray scales of 255, 127, and 0.
Since the performance of the light emitting element 132 in each pixel circuit 13 may be different due to the process deviation, so that the light emitting element 132 in each pixel circuit 13 has a problem of accurate light emitting brightness, the light emitting brightness difference of the light emitting element 132 controlled by each pixel circuit 13 can be further compensated by adjusting the duty ratio of the light emitting control signal provided to the light emitting control transistor controlling each pixel circuit 13, so that the display light emitting brightness of the panel is more uniform, and the uniformity of the display light emitting brightness is improved.
Based on the same inventive concept, the embodiments of the present invention also provide a display device, where the display device includes the light-emitting panel provided by any embodiment of the present invention, so that the display device provided by any embodiment of the present invention includes technical features of the light-emitting panel provided by any embodiment of the present invention, and can achieve beneficial effects of the light-emitting panel provided by any embodiment of the present invention, and the same points can be referred to the description of the light-emitting panel provided by any embodiment of the present invention, and are not repeated herein.
Fig. 11 is a schematic structural diagram of a display device according to an embodiment of the present invention, and as shown in fig. 11, the display device 2 includes a light-emitting panel 1, and the display device 2 may be any electronic product with a display function, including but not limited to the following categories: television, notebook computer, desktop display, tablet computer, digital camera, mobile phone, smart bracelet, smart glasses, vehicle-mounted display, medical equipment, industrial control equipment, touch interaction terminal, etc.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.

Claims (12)

1. A light-emitting panel, comprising: a display area and a non-display area; the non-display area comprises a first non-display area and a second non-display area which are positioned on two opposite sides of the display area;
The light-emitting panel further comprises a substrate, at least one power terminal, a plurality of power signal wires and a plurality of pixel circuits which are arranged in an array, wherein the at least one power terminal is positioned on one side of the substrate; the power terminal is positioned in the first non-display area; the power supply signal line is electrically connected with the power supply terminal, and extends along the column direction of the pixel circuit; at least part of the pixel circuits positioned in the same column are electrically connected with the same power signal line; the column direction is parallel to the direction in which the first non-display area points to the second non-display area;
The pixel circuit includes at least a driving transistor and a light emitting element; the driving transistor is used for providing driving current for the light-emitting element according to the data signal so as to drive the light-emitting element to emit light; the active layer of the driving transistor includes a source region, a drain region, and a channel region between the source region and the drain region;
Wherein the plurality of pixel circuits comprise a first pixel circuit and a second pixel circuit; the first pixel circuit is positioned at one side of the second pixel circuit away from the first non-display area; the length of the channel region of the driving transistor in the first pixel circuit in the first direction is L1, and the width in the second direction is W1; a channel region of the driving transistor in the second pixel circuit has a length L2 in the first direction and a width W2 in the second direction; W1/L1 > W2/L2; the second direction intersects with the first direction, and the second direction and the first direction are parallel to the plane of the substrate.
2. The light-emitting panel according to claim 1, wherein W1 > W2, and l2=l1; or W1 > W2 and L2 > L1; or w1=w2, and L2 > L1.
3. The light emitting panel of claim 1, wherein the source region comprises a heavily doped source region and a lightly doped source region; the lightly doped source region is positioned between the heavily doped source region and the channel region;
The drain region comprises a heavily doped drain region and a lightly doped drain region; the lightly doped drain region is located between the heavily doped drain region and the channel region;
The length of the lightly doped source region of the driving transistor in the first pixel circuit in the first direction is L11; the length of the lightly doped drain region of the driving transistor in the first pixel circuit in the first direction is L12; the length of the lightly doped source region of the driving transistor in the second pixel circuit in the first direction is L21; the length of the lightly doped drain region of the driving transistor in the second pixel circuit in the first direction is L22;
wherein L11< L21, and/or L12< L22.
4. A light-emitting panel according to claim 3, wherein the active layers of the driving transistors of the pixel circuits are the same in length in the first direction, and the active layers of the driving transistors of the pixel circuits are the same in width in the second direction.
5. The light-emitting panel according to claim 1, wherein a mobility of an active layer of the driving transistor in the first pixel circuit is μ 1, and a mobility of an active layer of the driving transistor in the second pixel circuit is μ 2; wherein mu 1 is more than mu 2.
6. The light-emitting panel according to claim 1, wherein a doping concentration of an active layer of the driving transistor in the first pixel circuit is C1, and a doping concentration of an active layer of the driving transistor in the second pixel circuit is C2; wherein C1 is less than C2.
7. The light-emitting panel according to claim 1, further comprising:
A first metal layer and a semiconductor layer located on one side of the substrate base plate; an interlayer insulating layer is arranged between the first metal layer and the semiconductor layer;
The first metal layer includes a gate of the driving transistor; the semiconductor layer includes an active layer of the driving transistor; in the direction perpendicular to the plane of the substrate base plate, the overlapped area of the active layer and the grid electrode of the driving transistor is a channel area of the active layer;
The grid electrode of the driving transistor and the active layer in the first pixel circuit form a first parasitic capacitance Cox1; the grid electrode of the driving transistor and the active layer in the second pixel circuit form a second parasitic capacitance Cox2; wherein Cox1 > Cox2.
8. The light-emitting panel according to claim 1, further comprising:
A first metal layer and a semiconductor layer located on one side of the substrate base plate; an interlayer insulating layer is arranged between the first metal layer and the semiconductor layer;
The first metal layer includes a gate of the driving transistor; the semiconductor layer includes an active layer of the driving transistor; in the direction perpendicular to the plane of the substrate base plate, the overlapped area of the active layer and the grid electrode of the driving transistor is a channel area of the active layer;
The thickness of the interlayer insulating layer between the gate electrode of the driving transistor and the active layer in the first pixel circuit is d1; the thickness of the interlayer insulating layer between the gate electrode of the driving transistor and the active layer in the second pixel circuit is d2; wherein d1 < d2.
9. The light-emitting panel according to claim 1, wherein if data signals supplied to the driving transistors of the first pixel circuit and the second pixel circuit are Vdata, a power supply signal PVDD supplied from the power supply terminal is transmitted to the source or the drain of the driving transistor of the first pixel circuit and the second pixel circuit, respectively, through the power supply signal line, then:
Wherein Cox1 is a first parasitic capacitance formed by a gate electrode and an active layer of a driving transistor in the first pixel circuit, μ1 is a mobility of the active layer of the driving transistor in the first pixel circuit, N1 is a length of the power signal line between the power terminal and the first pixel circuit, cox2 is a first parasitic capacitance formed by a gate electrode and the active layer of the driving transistor in the second pixel circuit, μ2 is a mobility of the active layer of the driving transistor in the second pixel circuit, N2 is a length of the power signal line between the power terminal and the second pixel circuit, i is a theoretical driving current generated by the driving transistor when the data signal is Vdata, and R is a power signal line resistance of a unit length.
10. The light-emitting panel according to claim 1, wherein the light-emitting element comprises a mini LED or a micro LED.
11. The light-emitting panel according to claim 1, wherein the pixel circuit further comprises at least one light-emission control transistor;
The light-emitting control transistor is used for controlling the driving transistor to provide driving current for the light-emitting element according to a light-emitting control signal;
A light-emitting driving circuit is further arranged on one side of the substrate base plate; the light-emitting driving circuit is used for controlling the duty ratio of a light-emitting control signal provided for a light-emitting control transistor of each pixel circuit according to a data signal provided for a driving transistor in each pixel circuit; wherein the duty ratios of the light emission control signals corresponding to the different data signals are different.
12. A display device, comprising: the light-emitting panel of any one of claims 1-11.
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