CN115334019B

CN115334019B - Data processing method for processing SAT problem by programmable switch and programmable switch

Info

Publication number: CN115334019B
Application number: CN202210928481.7A
Authority: CN
Inventors: 江靖辉; 黄振培; 向乔; 舒继武
Original assignee: Xiamen University
Current assignee: Xiamen University
Priority date: 2022-08-03
Filing date: 2022-08-03
Publication date: 2023-09-26
Anticipated expiration: 2042-08-03
Also published as: CN115334019A

Abstract

The present disclosure provides a data processing method for processing SAT problem by a programmable switch, including: the programmable switch receives SAT formula data preprocessed by the server; the programmable switch receives a solving instruction sent by a server; solving the SAT problem by the programmable switch; the programmable switch sends the SAT problem solving result to the server. The present disclosure also provides a programmable switch.

Description

Data processing method for processing SAT problem by programmable switch and programmable switch

Technical Field

The disclosure relates to the technical field of computer data processing, and in particular relates to a data processing method for processing SAT (secure architecture) problems by a programmable switch and the programmable switch.

Background

The boolean satisfaction problem, boolean satisfiability problem, simply SAT problem, is a problem of determining whether there is an interpretation that satisfies a given boolean formula. In other words, it asks whether the variables of a given boolean formula can make the formula calculation true by being assigned a true or false. This formula is satisfied if it is possible. Otherwise, for a given boolean formula, the formula is not satisfied. The SAT problem stems from the concept of classical proposition logic with respect to the satisfiability of formulas in mathematical logic, which is a core problem in computer science, and the first one proved to be NP-complete. It is important in many fields of computer science, circuit design, complexity theory, cryptography, and artificial intelligence.

At present, the SAT problem solving methods are mainly divided into two major categories, namely a complete method and an incomplete method. The incomplete method can only judge partial meeting conjunctive norms or judge partial meeting conjunctive norms, for example, local search cannot prove that one conjunctive norms CNF is unsatisfiable. The complete method, i.e. it can prove to be satisfactory or not satisfactory for any CNF. For a complete SAT solving algorithm, two common algorithms are a DPLL algorithm and a CDCL algorithm. Early SAT problem solving is mainly based on a DPLL algorithm, which is a basic algorithm for solving the SAT problem, and most of later researches are based on the DPLL algorithm; the CDCL (collision driven clause learning) algorithm is a commonly used solving algorithm for modern SAT solvers, which is based on the DPLL algorithm by efficient collision analysis, clause learning, non-time sequential backtracking (also known as rebound) and "double observation word" units to enhance the basic DPLL search algorithm.

The time consuming process of the SAT problem is mainly focused on determining whether a given variable assignment will result in a collision of a formula (i.e., the true value of the formula is false), its temporal complexity is O (m×n), where m represents the number of clauses and n represents the average number of variables per clause. Improving the processing speed and processing efficiency of SAT is a technical problem to be solved.

Disclosure of Invention

To solve at least one of the above technical problems, the present disclosure provides a data processing method for a programmable switch (Programming Protocol-independent Packet Processors) to handle SAT problems and the programmable switch.

According to one aspect of the present disclosure, there is provided a data processing method for a programmable switch to process SAT problems, including:

the programmable switch receives SAT formula data preprocessed by the server;

the programmable switch receives a solving instruction sent by a server;

solving the SAT problem by the programmable switch;

the programmable switch sends the SAT problem solving result to the server.

A data processing method according to at least one embodiment of the present disclosure, the preprocessing including: dividing SAT formula data into a plurality of clauses;

the programmable switch receives SAT formula data preprocessed by the server, and comprises the following steps: the programmable switch places the multiple clauses into different conflict tables.

According to a data processing method of at least one embodiment of the present disclosure, the solving instruction is sent in a form of a data packet, the data packet includes control information for solving the SAT, the control information is encapsulated in a form of a packet header, and the packet header includes:

A network type field, wherein the network type field is used for identifying a network type applicable to the SAT solving method;

the search field comprises control information including assignable variable search, stack operation and unit table matching;

and each judgment field comprises information of the conflict table, a conflict processing function, information of the unit table and a unit processing function.

According to a data processing method of at least one embodiment of the present disclosure, a programmable switch solves a SAT problem, including:

searching variable which can be assigned in SAT formula data, and assigning values for the variable of clauses of the SAT formula data;

pushing the assigned variables into a stack;

the assigned variables are sent to a conflict table, whether the variables are in conflict or not after being assigned is judged through the conflict table, if the variables are in conflict, the stack is traced back and the variable which can be assigned is assigned again, and if the variables are not in conflict, matching of the unit table is conducted;

judging whether to generate the unit variable or not based on the matching result of the unit table, if the unit variable is generated, assigning the unit variable, and if the unit variable is not generated, searching other assignable variables in clauses of SAT formula data.

According to a data processing method of at least one embodiment of the present disclosure, determining whether there is a conflict after variable assignment through a conflict table includes:

while assigning each variable of clause of SAT formula data one by one, judging whether each variable of clause has completed assignment or not through assignment fields of a conflict table;

under the condition that all variable assignments in clauses of SAT formula data are completed, judging whether assignments to the clauses of the SAT formula data cause conflict or not;

if a conflict is caused, conflict processing is performed by a conflict processing function of the conflict table.

According to a data processing method of at least one embodiment of the present disclosure, determining, through an assignment field of a conflict table, whether each variable of the clause has completed assignment includes:

initializing a valuation field as unassigned state information;

after each variable is assigned, modifying an assigned field corresponding to the variable into assigned state information;

and if the corresponding assignment fields of the clause variables are all modified to be assigned states, judging that all the variables of the clause are assigned.

According to a data processing method of at least one embodiment of the present disclosure, determining whether to generate a unit variable includes:

When each variable of the clause is assigned to only one non-assigned value, judging that the only one non-assigned variable is a unit variable.

According to a data processing method of at least one embodiment of the present disclosure, backtracking a stack to find an assignable variable is performed by a pointer that ensures that both the currently pointed variable and the variable directly or indirectly linked to the current variable by the pointer have completed assigning, so as to reduce the time to search for the assignable variable.

According to yet another aspect of the present disclosure, there is provided a programmable switch, comprising:

the SAT formula data receiving module is used for receiving SAT formula data preprocessed by the server;

the solving instruction processing module is used for receiving the solving instruction sent by the server;

the SAT problem solving module is used for solving the SAT problem;

and the result sending module is used for sending the SAT problem solving result to the server.

The SAT problem solving module according to at least one embodiment of the present disclosure includes:

the searching component is used for searching the variable which can be assigned and assigning the variable;

A judging component that judges whether the assignment would cause a conflict or whether there are unit variables;

wherein the search component is formed by a stack formed by registers and SRAM, the search component comprising:

the search module is used for determining an assignable variable by traversing all variables, and assigning the assignable variable as the input of the conflict table;

the rollback module is used for searching the assignable variables again through a backtracking stack based on the conflict table matching result;

the unit module is used for sending a notification to the search module and assigning values to the unit variables under the condition that the unit variables exist based on the judging result of the unit table;

the judging component comprises a conflict table and a unit table, judges whether variable assignment to SAT formula data clauses can cause conflict or not based on the conflict table, and judges whether unit variables exist or not based on the unit table.

Drawings

The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the disclosure and together with the description serve to explain the principles of the disclosure.

Fig. 1 is a flow diagram of a data processing method of a programmable switch to handle SAT problems according to one embodiment of the present disclosure.

Fig. 2 is a schematic diagram of the architecture of a programmable switch of one embodiment of the present disclosure.

Fig. 3 is a schematic diagram of a packet header of a programmable switch of one embodiment of the present disclosure.

Fig. 4 is a schematic diagram of a prior art conflict table.

Fig. 5 is a schematic diagram of a conflict table for adding assignment fields in one embodiment of the present disclosure.

Fig. 6 is a schematic diagram of a determination component header structure according to an embodiment of the present disclosure.

FIG. 7 is a schematic diagram of a formula partitioning method of one embodiment of the present disclosure.

Fig. 8 is a schematic diagram of the structure of a cell table of one embodiment of the present disclosure.

Fig. 9 is a schematic diagram of a search component header structure of one embodiment of the present disclosure.

Fig. 10 is a stack operation schematic of an embodiment of the present disclosure.

FIG. 11 is a schematic diagram of search component operation of one embodiment of the present disclosure.

Fig. 12 is a schematic diagram of programmable switch (P4-DPLL) performance evaluation results of one embodiment of the present disclosure.

Detailed Description

The present disclosure is described in further detail below with reference to the drawings and the embodiments. It is to be understood that the specific embodiments described herein are merely illustrative of the relevant content and not limiting of the present disclosure. It should be further noted that, for convenience of description, only a portion relevant to the present disclosure is shown in the drawings.

In addition, embodiments of the present disclosure and features of the embodiments may be combined with each other without conflict. The technical aspects of the present disclosure will be described in detail below with reference to the accompanying drawings in conjunction with embodiments.

Unless otherwise indicated, the exemplary implementations/embodiments shown are to be understood as providing exemplary features of various details of some ways in which the technical concepts of the present disclosure may be practiced. Thus, unless otherwise indicated, features of the various implementations/embodiments may be additionally combined, separated, interchanged, and/or rearranged without departing from the technical concepts of the present disclosure.

The use of cross-hatching and/or shading in the drawings is typically used to clarify the boundaries between adjacent components. As such, the presence or absence of cross-hatching or shading does not convey or represent any preference or requirement for a particular material, material property, dimension, proportion, commonality between illustrated components, and/or any other characteristic, attribute, property, etc. of a component, unless indicated. In addition, in the drawings, the size and relative sizes of elements may be exaggerated for clarity and/or descriptive purposes. While the exemplary embodiments may be variously implemented, the specific process sequences may be performed in a different order than that described. For example, two consecutively described processes may be performed substantially simultaneously or in reverse order from that described. Moreover, like reference numerals designate like parts.

When an element is referred to as being "on" or "over", "connected to" or "coupled to" another element, it can be directly on, connected or coupled to the other element or intervening elements may be present. However, when an element is referred to as being "directly on," "directly connected to," or "directly coupled to" another element, there are no intervening elements present. For this reason, the term "connected" may refer to physical connections, electrical connections, and the like, with or without intermediate components.

The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, when the terms "comprises" and/or "comprising," and variations thereof, are used in the present specification, the presence of stated features, integers, steps, operations, elements, components, and/or groups thereof is described, but the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof is not precluded. It is also noted that, as used herein, the terms "substantially," "about," and other similar terms are used as approximation terms and not as degree terms, and as such, are used to explain the inherent deviations of measured, calculated, and/or provided values that would be recognized by one of ordinary skill in the art.

As shown in fig. 1, a data processing method for a programmable switch to process SAT problems includes:

s102, the programmable switch receives SAT formula data preprocessed by a server;

s104, the programmable switch receives a solving instruction sent by the server;

s106, solving the SAT problem by the programmable switch;

s108, the programmable switch sends the SAT problem solving result to the server.

Wherein, the server preprocesses SAT formula data, including: the SAT formula data will be divided into multiple clauses.

In this disclosure, a programmable switch places multiple clauses into different conflict tables.

In S104, the solving instruction is sent in a data packet form, the data packet includes control information for solving the SAT, the control information is encapsulated in a packet header form, and the packet header includes:

the network type field is used for identifying the network type applicable to the SAT solving method;

and the judging fields comprise information of a conflict table, a conflict processing function, information of a unit table and a unit processing function.

The step S106, the programmable switch solves the SAT problem, including:

pushing the assigned variables into a stack;

the assigned variables are sent to a conflict table, whether the variables are in conflict or not after being assigned is judged through the conflict table, if the variables are in conflict, the variables which can be assigned are assigned again through backtracking stacks, and if the variables are not in conflict, matching of the unit tables is conducted;

judging whether a unit variable is generated or not based on the matching result of the unit table, if the unit variable is generated, assigning the unit variable, and if the unit variable is not generated, searching other assignable variables in clauses of SAT formula data.

Judging whether the variable has conflict after being assigned by the conflict table, wherein the method comprises the following steps:

if a conflict is caused, conflict processing is performed by the conflict processing function of the conflict table.

Wherein, judge whether each variable of clause has been accomplished the assignment through the assignment field of conflict table, include:

initializing a valuation field as unassigned state information;

and if the corresponding assignment fields of the clause variables are all modified to be assigned states, determining that all the variables of the clause are assigned.

Wherein determining whether a unit variable is to be generated comprises:

when each variable of the clause is assigned to only one non-assigned variable, then the only one non-assigned variable is determined to be the unit variable.

The backtracking stack searches the assignable variable through a pointer, and the pointer ensures that the currently pointed variable and the variable directly or indirectly linked with the current variable through the pointer are assigned, so that the time for searching the assignable variable is reduced.

the SAT formula data receiving module is used for receiving the SAT formula data preprocessed by the server;

The SAT problem solving module is used for solving the SAT problem;

and the result sending module is used for enabling the programmable switch to send the SAT problem solving result to the server.

According to a programmable switch of at least one embodiment of the present disclosure, the SAT problem solving module includes:

the search component is used for searching the variable which can be assigned and assigning the variable;

a judging component which judges whether the assignment can cause conflict or not and whether the unit variable exists or not;

wherein, search the assembly and form through the stack formed by register and SRAM, search the assembly and include:

the search module is used for determining assignable variables by traversing all variables, and assigning the assignable variables as the input of the conflict table;

the rollback module is used for searching the assignable variable again through the backtracking stack based on the conflict table matching result;

the judging component comprises a conflict table and a unit table, judges whether the variable assignment to the SAT formula data clause causes conflict or not based on the conflict table, and judges whether the unit variable exists or not based on the unit table.

As shown in fig. 2, the programmable switch includes a judgment Component (Judgment Component) and a Search Component (Search Component) that take advantage of the parallel lookup capabilities of the switch to accelerate. To avoid the overhead of forwarding data packets on the control path, the present disclosure deploys both the decision Component (Judgment Component) and the Search Component (Search Component) in the data plane.

The judging component has two functions, namely judging whether the current assignment can cause conflict or not, and judging whether the assignment can generate unit variables or not. These functions are implemented on a programmable switch (P4-DPLL) by two TCAM tables, the first being a collision Table (collision Table) for determining if there is a collision. The second TCAM Table is a Unit Table (Unit Table) for determining whether there are Unit variables. The present disclosure achieves acceleration of these two functions by exploiting the capability of TCAM tables to look up in parallel.

The main function of the search component is to search the variable with assignment, assign the variable with assignment and deal with special cases. One key challenge of the search component is that it needs to record a search history for backtracking. To address this challenge, the present disclosure implements a stack structure on the switch using registers and SRAM tables, which is also a critical design of the present disclosure in the search component. The stack of the present disclosure is able to record the search history on the switch and return the correct location when appropriate.

The core of the search component in the programmable switch is a stack that tracks search history during SAT solution. Based on this stack, the search component is divided into three parts: the device comprises a searching module, a rollback module and a unit module. The search module and the rollback module operate the forward and backward of the stack completion algorithm. The unit module does not operate the stack and mainly realizes the processing of unit variables.

Because the search component is complex, the present disclosure accomplishes this by cycling the data packet multiple times across the programmable switch. The present disclosure uses the OP field to identify what the programmable switch should do when processing a packet and uses if_op_done to indicate whether the current operation is finished. The OP field of the SEARCH component and other control information are mainly placed in the SEARCH header, as shown in fig. 9.

Referring to fig. 2, where at the Search module (Search Part), the programmable switch will linearly look up all current variables to find an assignable variable. To avoid searching from the head each time, the programmable switch maintains a search pointer and ensures that all variables before the pointer have been assigned. After finding a valuable variable, the programmable switch valuates it and generates the input to the conflict table. After these operations are completed, the search module pushes the data onto the stack and passes the data to the conflict table.

The rollback module (Go-back Part) is shown in fig. 2. After the data packet is sent to the conflict table, the data packet enters the rollback module. In this section, the solver decides whether to start the rollback process or to start looking for unit variables based on a Conflict Table (Conflict Table) match. If the return process starts, the solver will continue to trace back and reassign variables on the stack until there are no more conflicts. If the switch is returned until there are no more variables to choose from, the solver will report to the server that UN-SAT, indicates unsatisfiable. If there is no conflict, the solver will begin matching the Unit Table (Unit Table).

A Unit module (Unit part) is shown in fig. 2. The partial solver judges whether the current variable generates the unit variable according to the result of the unit table. If so, the unit module will report to the search module (notably, there will sometimes be multiple unit variables; in the solver of the present disclosure, the first found unit variable will be selected) and begin assigning values to the unit variables. If no unit variable is generated, the programmable switch modifies the OP field, returns to the first portion, and looks for the next variable that can be assigned.

Fig. 3 is a schematic diagram of a packet header data structure of a programmable switch according to an embodiment of the present disclosure.

As shown in fig. 3, to carry the data required by the SAT solver, the present disclosure designs two special headers, SEARCH and jugment. The programmable switch field is located within the ethernet payload, so the present disclosure also reserves a special ethertype for the programmable switch, namely ETH shown in fig. 3. The switch uses this type to invoke custom packet processing logic.

Fig. 4 is a conflicting representation intent of the SAT problem in the prior art.

In SAT formula data, if an assignment results in a conflict, that must be because the calculation result of one clause under the current assignment is false. For one clause of the SAT formula data, the calculation is false, meaning that all characters in the clause are calculated as false. So no matter how long a clause is, only one assignment causes the clause to be evaluated as false, known as a false assignment.

In the formula on the left side of fig. 4, for the first clause, the true value of that clause is false only if x1 is assigned false, x2 is assigned false, and x3 is assigned true. For the second clause, only x2 is assigned false and x3 is assigned false. The variable is assigned a false value by 0 and the value is assigned a true value by 1. Since the second clause does not contain x1, the value of x1 is noted as x, representing an arbitrary value. In this way, a false assignment can be generated for each clause. Similarly, a false assignment of this formula can be obtained. For any SAT formula, a corresponding false assignment can be obtained.

If a false assignment occurs in the assignments, it can be concluded that the assignment will result in a conflict, and a conflict assignment matching table, called a conflict table, can be constructed based on the false assignment.

As shown in FIG. 4, the key of the conflict table is the value of a variable, each bit represents a variable, the action used is a conflict handling function, and each entry of the conflict table corresponds to a false assignment of a clause. Thus, whenever a conflict table hits, false assignments of at least one clause must occur in the variable truth value assignments of the current formula. Thus, whenever a conflict table hits, the current assignment may be asserted to cause a conflict, and thus may be transitioned to conflict handling. However, this is not sufficient for the DPLL algorithm. Since the DPLL algorithm assigns values to the variables one by one and the initial value of the variable is 0, matching directly using the conflict table may result in some erroneous results.

Fig. 5 is a schematic diagram of a SAT conflict table structure with added assignment fields according to one embodiment of the present disclosure.

As shown in FIG. 5, when x1 is assigned a false and x2 and x3 have not yet been assigned, then the key-value is 000, which hits in the second row of the conflict table, thereby turning to conflict processing. However, only x1 is assigned at this time, and no conflict is caused.

To address this problem, the present disclosure adds a key field in the conflict table as an assigned, as shown in fig. 5. The assignment field, namely an assigned field, is used for marking variables to be assigned in the current clause so as to accurately match whether false assignment of the current clause occurs in the current assignment, wherein 1 represents assigned value and 0 represents unassigned value. Taking the formula in FIG. 4 as an example, when x1 is assigned 0 and x2 and x3 have not yet been assigned, then the value of key-value is 000 and the value of key-assigned is 100, without hitting any entry in the conflict table. It can be seen that by adding the assigned field, an exact match of the false assignment in the current assignment can be achieved.

Fig. 6 is a schematic diagram of a packet header structure of a judgment component according to an embodiment of the present disclosure.

As shown in fig. 6, to carry the variable information matching conflict table, the present disclosure uses the judgment component header structure shown in fig. 6. Limited to the computational power of the programmable switch, the present disclosure sets the length of the VALUE and assign fields to 32 bits, which is just the upper limit of the switch length to perform the computational operations. There are a total of 8 headers that together may represent 256 variables, just the size of a collision table.

Fig. 7 is a schematic diagram of a formulation partitioning method of the present disclosure.

In current programmable switches, the TCAM table size does not exceed 512 bits wide. Since in the design of the present disclosure, the conflict table has two fields of equal length, value and assigned, a conflict table can handle the conflict situation of 256 variables at most. In order to process larger SAT formulas, the present disclosure designs formula partitioning algorithms, i.e., the compatibility of a programmable switch to large formulas can be achieved by dividing one large SAT formula data into several small parts, and then placing the small parts one by one into corresponding conflict tables.

The formula partitioning algorithm of the present disclosure partitions the entire formula according to the width of the form matching key. It traverses all clauses of the entire formula and then decides whether to partition the clause into the current matching table based on whether the table has sufficient capacity. If the match-key of the table has sufficient free width and the table is not full, the algorithm divides the clause into the current table. If the match-key of the table has enough free width, but the current table is full, the algorithm will not split the clause into tables; and vice versa. Of course, if all the variables contained in a clause are already contained in the table, but the table is not yet full, then that clause will also be contained in the table.

As shown in fig. 7 (a), (b) and (c), there are two tables, table1 and table2, respectively, and the matching key width of the table is assumed to be 5 bits, and only 2 entries can be included at most. For the first clause, table1 may be put directly into table1 because table1 is empty at this time. For the second clause, it has a variable already contained in Table1, so if Table1 is to be placed, it is necessary to consume one bit wide on the match-key of Table 1. At this time, the match-key of Table1 still has enough free bits, but Table1 is not full, so the second clause can be put into Table 1. The same is true for the second clause if the third clause is to be placed in Table 1. However, the bit width in table1 is now exhausted and no new variables can be loaded, so only the third clause can be put into table 2.

Fig. 8 is a schematic diagram of a cell table structure of an embodiment of the present disclosure.

As shown in fig. 8, the main function of the unit table is to quickly determine whether a unit clause variable is generated. It is similar in principle to a conflict table. For a clause, if its variable is assigned to leave only one, and all assigned variable calculations are false, it will generate a unit variable. In this case, the condition of no conflict is that the calculation result of the remaining variables is true. That is, for a clause having k variables, there are k ways to generate the unit variables.

As shown in fig. 8, for a clause with 3 variables, it would generate 3 different element assignments. As with the false assignment, when a cell assignment occurs in the current assignment, the current assignment must generate a cell variable throughout the SAT formula. Thus, the unit table of unit assignment conversion can achieve a function similar to that of the conflict table. When a cell table hits, it means that the current assignment must generate a cell variable in the entire SAT formula data.

The conflict table returns the result directly and invokes the conflict handling function, but the unit table returns an additional parameter indicating which unit variable the entry generated. The unit table does not need to consider the priority of the entries. For the unit table, all unit variables generated by the current assignment have the same priority. After processing the first unit variable, the remaining unit variables are identified and processed again at a later time when they enter the unit table.

Fig. 9 is a schematic diagram of a SEARCH component (SEARCH) header structure according to an embodiment of the present disclosure.

As shown in fig. 9, the SEARCH component (SEARCH) header contains fields and corresponding meanings as follows. If_context and if_context are return values of two tables (CONFLICT table and unit table) to record IF there is a CONFLICT; the have_data is used for judging whether the packet header has additional formula information currently; value_to_set is used TO record whether the variable should be assigned true or false; the FIND_OR_UNIT records whether the currently assigned variable is a UNIT variable; the OP records what the current operation is; if_op_done records whether the current operation is completed; three fields TABLE_INDEX, SEGMENT_INDEX, POSITION_INDEX are indexes used to record the location in the formula of the current operating variable; id_now records the ID of the current variable; id_all records how many variables the current formula shares; LAYER records the number of LAYERs of the current search space on the stack; CLAUSE_ID and VARIABLE_ID are operation auxiliary VARIABLEs, and provide storage space for the auxiliary VARIABLEs.

Fig. 10 is a schematic diagram of a stack structure of an embodiment of the present disclosure.

As shown in fig. 10, the get and push operations of the stack are put on the same stage (actually, only on the same stage due to the restriction of atomicity), but the conditions required to perform these two actions are different. When OP is 213, the matching table hits, and a push operation is performed. At this time, the acquisition operation cannot be performed. When OP is 210, the matching table hits, and the get operation is performed. At this time, the push operation cannot be performed. If the solver needs to acquire data immediately after the push operation, the op field needs to be modified and the data packet recycled back to the parser.

The functions of all parts in the search component are relatively independent, and the input and output of the conflict table and the unit table are respectively processed.

FIG. 11 is a diagram of a search component workflow of one embodiment of the present disclosure.

As shown in fig. 11, the search component workflow includes the following steps.

In the first step, the Search module (Search Part) searches for unassigned variables and finds x1, assigns x1 as false, pushes the result onto the stack and enters it into the conflict table.

In the second step, since there is no conflict, the rollback module (Go-back Part) enters the current assignment into the unit table.

Third, after entering the Unit module (Unit Part), the Unit variables are processed as they are generated.

Fourth, the search module receives the data of the unit module and pushes it onto the stack.

In the fifth step, since the current assignment may cause formula conflict, the rollback module (Go-back Part) acquires the history data from the stack in the fifth step, and returns to the search module to start reassigning.

The data processing method for processing the SAT problem by the programmable switch can be realized by the following verification conditions, including algorithm realization, a metric method experiment platform, a data set and a comparison method.

A programmable switch of the present disclosure is implemented on a Barefoot Tofino switch. In addition, another version of the P Server of the programmable switch of the present disclosure is implemented. The P Server only deploys the judging process on the programmable switch by deploying the searching unit on the Server, and the SAT problem is processed by the interaction between the programmable switch and the Server. The server will first search for the variable. When the judgment is needed, the P Server sends the data packet carrying the current assignment information to the programmable switch through the DPDK to judge. In this way, the programmable switch and the server constantly interact. Finally, the server will obtain the data processing results of the SAT problem. To better evaluate the performance of the programmable switch of the present disclosure, a DPLL algorithm implemented entirely on the Server side, called Server, is designed.

MathSAT is also realized based on the DPLL algorithm, but adds a lot of optimizations for special cases; z3 is designed based on CDCL algorithm.

In the aspect of a metric method experiment platform, the P4-DPLL and the P Server are realized by a Barefoot Tofino switch and a Server with 2 Intel Xeon Silver 4210R CPUs and 128GB memory. In addition, a Server is implemented using a Server with 2 Intel Xeon Silver 4210R CPUs and 128GB of memory.

In terms of data sets, the SAT problem is collected from two common data sets SATLIB-Benchmark Problems and The International SAT Competition. There are 46787 CNF patterns in total in these two datasets, of which 46685 are satisfactory and 102 are not. The variables in these paradigms range from 20 to 63624 and the clauses range from 80 to 368352.

In the same class of method comparisons, to verify the performance of the programmable switch of the present disclosure, 5 methods were used for comparison, respectively: P4-DPLL, P Server, Z3 and Math SAT. Math SAT and Z3 are the most commonly used algorithms for handling SAT problems, with good performance in current applications. Wherein the resolving times of different SAT algorithms are tested and analyzed on the same dataset. In order to fairly compare the time consumption of each algorithm, the time consumption herein does not include the time spent preprocessing. In order to analyze the time dominant region between each method, the solving time is further divided into a search time and a judgment time.

On the basis of the above authentication preparation, for the data processing method of the present disclosure, authentication is performed from the following aspects: overall performance, performance of solving formulas of different sizes, and time-consuming comparisons at decision time and search time.

Fig. 12 is a schematic diagram of performance evaluation results of a programmable switch according to one embodiment of the present disclosure.

The solution time of the formulas collected from the dataset is counted. The CDF is plotted in fig. 12 (a), and 90% quantiles of all test cases for each method are given in fig. 12 (b). It can be seen that the programmable switch of the present disclosure increases the solution time by a factor of 101 and 16, respectively, over 90% of all test cases, as compared to implementing the DPLL algorithm on the CPU. Furthermore, as can be seen from fig. 12 (a), the processing time of the data processing method of the programmable switch of the present disclosure is faster than Math SAT and Z3 on 50% of the fractional numbers of all test cases. The reason why Math SAT and Z3 are a significant fraction of the instances faster than P4-DPLL is that Z3 uses CDCL, which is essentially much faster than DPLL, math SAT employs many instance-related optimizations on DPLL, such as variable elimination, inclusion clause deletion, and inverse inclusion.

To analyze the impact of formulas of different sizes on SAT solver performance, formulas in the dataset are divided into 8 different categories according to the number of variables and the number of clauses. And aiming at different types of formulas, respectively analyzing the evaluation results of different SAT solvers. The solution time for the 90% quantile case for different formula sizes is shown in fig. 12 (c). Along with the increase of the variable quantity in the formula, the processing time of the P Server version SAT solver, the Server version SAT solver and the Z3 is obviously increased. There was no significant difference between the solution time of Math SAT and the processing time of the programmable switch of the present disclosure. Furthermore, when the formula is smaller, the programmable switch of the present disclosure has significant advantages in performance over other solvers. When the formula is relatively large, the performance of the programmable switch of the present disclosure is similar to Math SAT.

As for the processing time, it is further divided into a search time and a judgment time, so that a time advantage area between the respective solvers is analyzed.

The judgment time and search time for each method are given in fig. 12 (d). The programmable switch solver of the present disclosure has the shortest judgment time and the Server version SAT solver has the longest judgment time. This is because the programmable switch of the present disclosure uses the table of programmable switches to make a judgment, and the judgment result can be obtained in a linear time. The P Server version SAT solver also uses a programmable switch to determine whether assignments conflict, but the determination result of the switch can be obtained by frequently receiving and transmitting messages through a Server. The judgment time of the programmable switch of the present disclosure is shorter than that of the P Server version SAT solver. It can be seen that the programmable switch of the present disclosure increases the judgment speed by a factor of 246 and a factor of 35, respectively, compared to the P Server version SAT solver and the Server version SAT solver. Further, it can be seen that the judgment time ratio of the programmable switch solver of the present disclosure is maximized. This is because the programmable switch of the present disclosure uses a stack implementation algorithm, requiring multiple calls to the stack for each check. This increases the search time, thereby reducing the judgment time.

Taken together, the programmable switch (P4-DPLL) of the present disclosure provides significant performance improvements over the P Server version of SAT solver and the Server version of SAT solver. In addition, the SAT solving time of the P4-DPLL is faster than Math SAT and Z3 over 50% of the quantiles of all test cases. In particular, P4-DPLL has significant performance advantages over small formulas. For relatively large formulas, the P4-DPLL solver is comparable to the Math SAT solver currently popular. In addition, the P4-DPLL determination time is significantly less than PServer version SAT solver and Server version SAT solver, since tables in programmable switches are used to expedite the determination of conflicts.

Taken together, the present disclosure implements a SAT parser on a Barefoot Tofino switch and a commercial server, and widely evaluates its performance. The results show that the programmable switch (P4-DPLL) of the present disclosure increases processing speed by a factor of 101 over 90% of all test cases compared to CPU-based DPLL implementations.

In the description of the present specification, reference to the terms "one embodiment/mode," "some embodiments/modes," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment/mode or example is included in at least one embodiment/mode or example of the present application. In this specification, the schematic representations of the above terms are not necessarily the same embodiments/modes or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments/modes or examples. Furthermore, the various embodiments/implementations or examples described in this specification and the features of the various embodiments/implementations or examples may be combined and combined by persons skilled in the art without contradiction.

Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present application, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.

It will be appreciated by those skilled in the art that the above-described embodiments are merely for clarity of illustration of the disclosure, and are not intended to limit the scope of the disclosure. Other variations or modifications will be apparent to persons skilled in the art from the foregoing disclosure, and such variations or modifications are intended to be within the scope of the present disclosure.

Claims

1. A data processing method for a programmable switch to handle SAT problems, comprising:

the programmable switch receives SAT formula data preprocessed by the server; the pretreatment comprises the following steps: dividing SAT formula data into a plurality of clauses; the programmable switch receives SAT formula data preprocessed by the server, and comprises the following steps: the programmable switch places the clauses into different conflict tables;

The programmable switch receives a solving instruction sent by a server; the solving instruction is sent in a data packet form, the data packet comprises control information for solving the SAT, the control information is packaged in a packet header form, the packet header comprises a network type field, a search field and a plurality of judgment fields, and the network type field is used for identifying a network type suitable for the SAT solving method; the search field comprises control information including assignable variable search, stack operation and unit table matching; each judgment field comprises information of the conflict table, a conflict processing function, information of the unit table and a unit processing function;

solving the SAT problem by the programmable switch; and

the programmable switch sends the SAT problem solving result to the server;

wherein the programmable switch solves the SAT problem, comprising:

pushing the assigned variables into a stack;

the assigned variables are sent to a conflict table, whether the variables are in conflict or not after being assigned is judged through the conflict table, if the variables are in conflict, the stack is traced back and the variable which can be assigned is assigned again, and if the variables are not in conflict, matching of the unit table is conducted; and

2. The data processing method according to claim 1, wherein determining whether there is a conflict after the variable assignment by the conflict table comprises:

under the condition that all variable assignments in clauses of SAT formula data are completed, judging whether assignments to the clauses of the SAT formula data cause conflict or not; and

3. The data processing method according to claim 2, wherein determining whether each variable of the clause has completed assignment by the assignment field of the conflict table comprises:

initializing a valuation field as unassigned state information;

after each variable is assigned, modifying an assigned field corresponding to the variable into assigned state information; and

4. The data processing method according to claim 1, wherein determining whether to generate the unit variable comprises:

5. A data processing method according to claim 1, wherein backtracking the stack for the assignable variable is performed by means of a pointer ensuring that both the currently pointed variable and the variable linked directly or indirectly to the current variable by means of the pointer have been assigned to reduce the time to search for the assignable variable.

6. A programmable switch, comprising:

the SAT formula data receiving module is used for receiving SAT formula data preprocessed by the server; the pretreatment comprises the following steps: dividing SAT formula data into a plurality of clauses; the SAT formula data receiving module is used for receiving SAT formula data preprocessed by the server, and comprises the following steps: the SAT formula data receiving module places the clauses into different conflict tables;

The solving instruction processing module receives a solving instruction sent by the server; the solving instruction is sent in a data packet form, the data packet comprises control information for solving the SAT, the control information is packaged in a packet header form, the packet header comprises a network type field, a search field and a plurality of judgment fields, and the network type field is used for identifying a network type suitable for the SAT solving method; the search field comprises control information including assignable variable search, stack operation and unit table matching; each judgment field comprises information of the conflict table, a conflict processing function, information of the unit table and a unit processing function;

the SAT problem solving module is used for solving the SAT problem; and

the result sending module is used for sending the SAT problem solving result to the server;

wherein, the SAT problem solving module comprises:

the searching component is used for searching the variable which can be assigned and assigning the variable; and