CN115311493B - Method, system, memory and equipment for judging direct current circuit state - Google Patents

Method, system, memory and equipment for judging direct current circuit state Download PDF

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CN115311493B
CN115311493B CN202210935477.3A CN202210935477A CN115311493B CN 115311493 B CN115311493 B CN 115311493B CN 202210935477 A CN202210935477 A CN 202210935477A CN 115311493 B CN115311493 B CN 115311493B
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肖小龙
史明明
袁晓冬
苏伟
孙健
郭佳豪
孙天奎
姜云龙
方鑫
吴凡
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Electric Power Research Institute of State Grid Jiangsu Electric Power Co Ltd
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Abstract

The invention discloses a method, a system, a memory and equipment for judging the state of a direct current circuit. The invention can be widely applied to the fields of photovoltaic power generation systems, electric automobiles, direct current power distribution systems and the like.

Description

Method, system, memory and equipment for judging direct current circuit state
Technical Field
The invention relates to a method, a system, a memory and equipment for judging a direct current circuit state, and belongs to the technical field of photovoltaic module detection.
Background
The photovoltaic power generation system comprises a large number of photovoltaic modules, and in long-term operation, the conditions of module aging, line aging, connection relaxation and the like can occur, so that series-type or parallel-type arc faults of the photovoltaic module array can occur. The faults can cause accidents such as fire disaster and the like, and the safe and reliable operation of the photovoltaic power generation system is seriously affected.
Disclosure of Invention
The invention aims to provide a method, a system, a memory and equipment for judging a direct current circuit state, which are used for classifying loop current states in a direct current system based on a ResNet algorithm and identifying arc faults, load abrupt changes and loop switch actions in the direct current system.
In order to achieve the above purpose, the invention adopts the following technical scheme:
the first aspect of the present invention provides a method for judging a state of a dc circuit, including:
acquiring a group of direct current system loop current waveform images;
preprocessing the acquired loop current waveform image;
and inputting the preprocessed loop current waveform image into a pre-constructed ResNet classification model to obtain the state of the direct current circuit, wherein the state comprises a stable state, arc faults and load abrupt changes in the loop.
Further, the acquiring a set of dc system loop current waveform images includes:
and acquiring the loop current of the direct current system, drawing a frame of current waveform image every 25ms of loop current, and drawing a plurality of frames of current waveform images according to time sequence as a group of input.
Further, the preprocessing the acquired loop current waveform image includes:
and rolling and maximally pooling the loop current waveform image.
Further, pre-constructing a ResNet classification model, including:
collecting 3 different-state currents in a direct current system through experiments, wherein the currents comprise a steady-state current, an arc fault current and a load abrupt change current in a loop;
drawing a frame of current waveform image of each 25ms of current, and taking the current waveform image and the state corresponding to the image as a sample to obtain a training sample set;
performing convolution and maximum pooling operation on the training sample set;
and inputting the output of the maximum pooling operation into a ResNet model, and training to obtain a trained ResNet classification model.
Further, the steady state current includes: a steady state current waveform with a protrusion and a steady state current waveform without a protrusion.
Further, the convolving and maximizing the pooling operation on the training sample set includes:
inputting samples in the training set into a convolution layer according to a time sequence, and combining a current waveform image drawn by the current 25ms minus a current waveform image drawn by the current 25ms to form a new image as input of the next step;
performing axisymmetric copying on the input new combined image;
cutting each copied picture vertically into a plurality of parts, and calculating the pixel point units of each part to be used as a feature map;
and carrying out maximum pooling operation on the feature map.
A second aspect of the present invention provides a system for determining a state of a dc circuit, comprising:
the sampling module is used for acquiring a group of direct current system loop current waveform images;
the preprocessing module is used for preprocessing the acquired loop current waveform image and taking the loop current waveform image as the input of the classification model;
and the classification module is used for classifying the state of the direct current circuit, outputting classification results including a stable state, arc faults and load abrupt changes in a loop.
Further, the sampling module is specifically used for,
and acquiring the loop current of the direct current system, drawing a frame of current waveform image every 25ms of loop current, and drawing a plurality of frames of current waveform images according to time sequence as a group of input.
Further, the preprocessing module includes:
the convolution layer is used for combining the current waveform image drawn by the current input 25ms minus the current waveform image drawn by the current input 25ms to form a new image as the input of the next step; performing axisymmetric copying on the input new combined image; cutting each copied picture vertically into a plurality of parts, and calculating the pixel point units of each part to be used as a feature map;
and the maximum pooling layer is used for carrying out maximum pooling operation on the feature map.
Further, the classification module includes: a ResNet model;
the ResNet model comprises a four-layer network, a maximum pooling layer, a full connection layer and a Softmax layer;
the first layer is composed of 3 residual modules;
the second layer is composed of a downsampling residual error module and 3 residual error modules;
the third layer is composed of a downsampling residual error module and 5 residual error modules;
the fourth layer is composed of a downsampled residual block and 2 residual blocks.
Further, the downsampling residual module is configured to downsample the input by one half.
A third aspect of the invention provides a memory storing one or more programs, the one or more programs comprising instructions, which when executed by a computing device, cause the computing device to perform any of the methods described hereinbefore.
A fourth aspect of the invention provides a computing device characterized by: comprising the steps of (a) a step of,
one or more processors, memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs comprising instructions for performing any of the methods according to the foregoing.
The beneficial effects of the invention are as follows:
the invention draws a frame of current waveform image by adopting loop current with a certain period as input, builds a classification model based on ResNet, can be used for detecting arc faults, load abrupt changes and switching actions of a direct current system, and can also be applied to the fields of photovoltaic power generation systems, electric automobiles, direct current power distribution systems and the like.
Drawings
FIG. 1 is a flowchart of a method for determining a DC circuit status according to an embodiment of the present invention;
FIG. 2 is a graph showing a steady state 25ms current waveform according to an embodiment of the present invention;
FIG. 3 is a graph showing another steady state 25ms current waveform according to an embodiment of the present invention;
FIG. 4 is a graph of a 25ms current waveform of an arc fault in an embodiment of the present invention;
FIG. 5 is a graph of a current waveform for 25ms in which a sudden load change occurs in an embodiment of the present invention;
FIG. 6 is a graph of training set loss values in an embodiment of the present invention;
FIG. 7 is a graph of test set loss values in an embodiment of the present invention;
FIG. 8 is a graph of recognition accuracy after 20 training cycles in an embodiment of the present invention.
Detailed Description
The invention is further described below. The following examples are only for more clearly illustrating the technical aspects of the present invention, and are not intended to limit the scope of the present invention.
Example 1
The embodiment provides a method for judging a state of a direct current circuit, which comprises the following steps:
acquiring a group of direct current system loop current waveform images;
preprocessing the acquired loop current waveform image;
and inputting the preprocessed loop current waveform image into a pre-constructed ResNet classification model to obtain the state of the direct current circuit, wherein the state comprises a stable state, arc faults and load abrupt changes in the loop.
In this embodiment, a set of dc system loop current waveform images is obtained, which means,
a frame of current waveform image is drawn every 25ms of loop current, and a plurality of frames of current waveform images are drawn in time sequence as a set of inputs.
In this embodiment, a ResNet classification model is pre-built, and the specific implementation process is as follows:
s1, acquiring 3 different-state currents in a direct current system through experiments, wherein the currents comprise a steady-state current, an arc fault current and a load abrupt change current in a loop;
s2, drawing a frame of current waveform image for each 25ms of current, and taking the current waveform image and the state corresponding to the current waveform image as a sample to obtain a training sample set;
specifically, the steady state current has two waveforms, one of which contains a protruding waveform as in fig. 2 and the normal current without a protrusion as in fig. 3; current waveform images containing arc faults and abrupt load changes are shown in fig. 4 and 5.
In this embodiment, 2574 samples are selected as training sets, and 286 samples are selected as test sets.
S3, carrying out convolution and maximum pooling operation on the input image to obtain a feature map,
s31, inputting samples in the training set into a convolution layer according to time sequence, and combining a current waveform image drawn by the current 25ms minus a current waveform image drawn by the current 25ms to form a new image as input of the next step, wherein the step can keep the characteristic of current change in the current time period compared with the current change in the previous time period.
And (3) carrying out axisymmetric copying on the new image after the combination, wherein the upper part and the lower part of the image are identical in image data image, and if the current acts, the characteristic points of the image are increased, so that the useful information quantity of the image is increased. In this embodiment, axisymmetric copying refers to copying with the center line of the picture being aligned vertically as the axis.
Each of the copied pictures was cut vertically into a plurality of parts (the number is represented by po), and the pixel point number of each part (represented by pix (x)) was calculated as a feature map.
S32, performing maximum pooling operation
Pooling can be seen as a linear weighting of the activation values within a sliding window.
Let F be the pooling function, I be the characteristic diagram of the input, O be the output after pooling, I under the single channel condition x,y 、O x,y Representing the activation values of the input and output at coordinates (x, y), respectively, Ω is the index set of the pooling window, e.g. the pooling range is 2 x 2, then Ω= {0,1,2}, all pooling ways can be seen as:
Figure BDA0003781615270000041
wherein delta x,y Is the differentiation at coordinates (x, y), I x For activation value in x-axis direction, F (I) x For x-axis sliding window weights, the exp function is to prevent negative numbers, the multiplication represents a linear weighting.
S4, inputting the output of the maximum pooling operation into a ResNet model, and training to obtain a trained ResNet classification model;
in this embodiment, the ResNet model includes a four-layer network, a max pooling layer, a full connectivity layer and a Softmax layer,
the first layer is composed of 3 residual modules;
the second layer is composed of a downsampling residual error module and 3 residual error modules;
the third layer is composed of a downsampling residual error module and 5 residual error modules;
the fourth layer is composed of a downsampling residual error module and 2 residual error modules;
the residual structure is an initial result of the partial output of the upper layer feature map x, and the output result is H (x) =f (x) +x, and when F (x) =0, the result becomes an identity map. Therefore, such a structure corresponds to learning the H (x) -x portion, i.e., the residual, and the subsequent hierarchy is to approximate the residual result to 0.
The seed processing functions F (x) of the residual modules are different, and specifically selected according to actual situations.
The purpose of the downsampling function is to pool the shapes of the same pre of the input channels, the shapes reaching the same.
It should be noted that each downsampling residual module downsamples one half of the input.
After passing through the four-layer network, the maximum pooling is carried out again, and the classification result is output through the full connection layer and the Softmax.
And comparing the classification result with the actual state, optimizing the network parameters, and performing iterative training until the termination condition is reached.
In this embodiment, training is performed for 20 rounds, as shown in fig. 6 for the training set loss value, fig. 7 for the test set loss value, and fig. 8 for the recognition accuracy rate after 20 rounds of training, reaching 98.3%, and being stable and unchanged.
Example 2
The present embodiment provides a system for determining a state of a dc circuit, including:
the sampling module is used for acquiring a group of direct current system loop current waveform images;
the preprocessing module is used for preprocessing the acquired loop current waveform image and taking the loop current waveform image as the input of the classification model;
and the classification module is used for classifying the state of the direct current circuit, outputting classification results including a stable state, arc faults and load abrupt changes in a loop.
In this embodiment, the sampling module is specifically configured to,
and acquiring the loop current of the direct current system, drawing a frame of current waveform image every 25ms of loop current, and drawing a plurality of frames of current waveform images according to time sequence as a group of input.
In this embodiment, the preprocessing module includes:
the convolution layer is used for combining the current waveform image drawn by the current input 25ms minus the current waveform image drawn by the current input 25ms to form a new image as the input of the next step; performing axisymmetric copying on the input new combined image; cutting each copied picture vertically into a plurality of parts, and calculating the pixel point units of each part to be used as a feature map;
and the maximum pooling layer is used for carrying out maximum pooling operation on the feature map.
In this embodiment, the classification module includes: a ResNet model;
the ResNet model comprises a four-layer network, a maximum pooling layer, a full connection layer and a Softmax layer;
the first layer is composed of 3 residual modules;
the second layer is composed of a downsampling residual error module and 3 residual error modules;
the third layer is composed of a downsampling residual error module and 5 residual error modules;
the fourth layer is composed of a downsampled residual block and 2 residual blocks.
In this embodiment, the downsampling residual module is configured to downsample the input by one half.
Example 3
The present embodiment provides a memory storing one or more programs, the one or more programs comprising instructions, which when executed by a computing device, cause the computing device to perform any of the methods of embodiment 1 described previously.
Example 4
The present embodiment provides a computing device, comprising,
one or more processors, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs comprising instructions for performing any of the methods according to the foregoing embodiment 1.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical aspects of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that: modifications and equivalents may be made to the specific embodiments of the invention without departing from the spirit and scope of the invention, which is intended to be covered by the claims.

Claims (9)

1. A method for determining a state of a dc circuit, comprising:
acquiring a set of direct current system loop current waveform images, including: acquiring a direct current system loop current, drawing a frame of current waveform image by each 25ms loop current, and drawing a plurality of frames of current waveform images according to time sequence as a group of input;
preprocessing the acquired loop current waveform image, including: inputting images into a convolution layer according to a time sequence, and combining a current waveform image drawn by the current 25ms minus a current waveform image drawn by the current 25ms to form a new image as the input of the next step; performing axisymmetric copying on the input new combined image; cutting each copied picture vertically into a plurality of parts, and calculating the pixel point units of each part to be used as a feature map; carrying out maximum pooling operation on the feature map;
and inputting the preprocessed loop current waveform image into a pre-constructed ResNet classification model to obtain the state of the direct current circuit, wherein the state comprises a stable state, arc faults and load abrupt changes in the loop.
2. The method of claim 1, wherein preprocessing the acquired loop current waveform image comprises:
and rolling and maximally pooling the loop current waveform image.
3. The method of claim 1, wherein pre-constructing a res net classification model comprises:
collecting 3 different-state currents in a direct current system through experiments, wherein the currents comprise a steady-state current, an arc fault current and a load abrupt change current in a loop;
drawing a frame of current waveform image of each 25ms of current, and taking the current waveform image and the state corresponding to the image as a sample to obtain a training sample set;
performing convolution and maximum pooling operation on the training sample set;
and inputting the output of the maximum pooling operation into a ResNet model, and training to obtain a trained ResNet classification model.
4. A method of determining a state of a dc circuit according to claim 3, wherein the steady state current comprises: a steady state current waveform with a protrusion and a steady state current waveform without a protrusion.
5. A system for judging a state of a direct current circuit, characterized in that the method for judging a state of a direct current circuit according to any one of claims 1 to 4 is adopted for judging a state of a direct current circuit, comprising:
the sampling module is used for acquiring a group of direct current system loop current waveform images, specifically, acquiring direct current system loop current, drawing a frame of current waveform image every 25ms of loop current, and drawing a plurality of frames of current waveform images according to time sequence as a group of input;
the preprocessing module is used for preprocessing the acquired loop current waveform image; the preprocessing module comprises a convolution layer and a maximum pooling layer; the convolution layer is used for combining a current waveform image drawn by 25ms of the current input minus a current waveform image drawn by 25ms of the current input to form a new image as the input of the next step; performing axisymmetric copying on the input new combined image; cutting each copied picture vertically into a plurality of parts, and calculating the pixel point units of each part to be used as a feature map; the maximum pooling layer is used for carrying out maximum pooling operation on the feature map;
the classification module is used for inputting the preprocessed loop current waveform image into a pre-constructed ResNet classification model to obtain the state of the direct current circuit, wherein the state comprises a stable state, arc faults and load abrupt changes in the loop.
6. The system for determining the status of a dc circuit of claim 5, wherein the classification module comprises: a ResNet classification model;
the ResNet classification model comprises a four-layer network, a maximum pooling layer, a full connection layer and a Softmax layer;
the first layer is composed of 3 residual modules;
the second layer is composed of a downsampling residual error module and 3 residual error modules;
the third layer is composed of a downsampling residual error module and 5 residual error modules;
the fourth layer is composed of a downsampled residual block and 2 residual blocks.
7. The system of claim 6, wherein the downsampling residual module is configured to downsample one-half of the input.
8. A memory storing one or more programs, characterized by: the one or more programs include instructions, which when executed by a computing device, cause the computing device to perform any of the methods of claims 1-4.
9. A computing device, characterized by: comprising the steps of (a) a step of,
one or more processors, memory, and one or more programs, wherein one or more programs are stored in the memory and configured to be executed by the one or more processors, the one or more programs comprising instructions for performing any of the methods of claims 1-4.
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