CN115310038B - PLA-based real-time physiological data processing method, device, storage medium and system - Google Patents
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Abstract
The present disclosure provides a real-time physiological data processing method, apparatus, storage medium and system based on PLA. The physiological data processing method comprises the following steps: segmenting input physiological data to obtain multiple sections of physiological data; determining an output physiological data sequence based on the combined error of the multiple pieces of physiological data; and encoding the output physiological data sequence. According to various embodiments provided by the present disclosure, the physiological data is compressed in real time, so that the pressure of the storage and transmission of the physiological data is reduced.
Description
Technical Field
The present disclosure relates generally to the field of signal processing, and more particularly to a PLA-based real-time physiological data processing method, apparatus, non-transitory computer-readable storage medium, and computer system.
Background
This section is intended to introduce a selection of aspects of the art, which may be related to various aspects of the present disclosure that are described and/or claimed below. This section is believed to be helpful in providing background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these descriptions should be read in this light, and not as admissions of prior art.
Physiological data (e.g., ECG signal) compression techniques can be divided into two main categories: lossy compression and lossless compression. Lossless compression techniques can remove redundant information in the data without losing any information in the signal, and thus can perfectly reconstruct the bio-signal. Typical lossless compression techniques are Huffman coding (Huffman coding), arithmetic coding (arithmetric coding), etc. Although lossless compression techniques do not lose any information, the compression ratio of such methods is typically only around 2 times, and is therefore less useful in compressing biological signals.
Therefore, lossy compression techniques are mostly used to compress the physiological data. Lossy compression techniques can be broadly divided into three categories:
1. time domain compression method: redundant information is eliminated by analyzing the original data, and polynomial interpolation is mostly adopted.
2. Transform domain compression method: firstly, orthogonal transformation is carried out on signals, and then redundant information in a signal spectrum or an energy spectrum is removed, wherein common methods comprise discrete Fourier transformation, discrete cosine transformation, wavelet packet transformation and the like.
3. Characteristic parameter extraction method: extracting the characteristic points of the signal or establishing a signal model, and reconstructing the waveform by using the characteristic points or model parameters.
The time domain compression method is generally simple and easy to use, but has a relatively low compression ratio. The feature parameter extraction method can achieve a very good compression effect, but is generally complex in calculation, long in time consumption and requires a predetermined model or parameter, and the compression effect may be reduced if the signal deviates from the model due to the influence of artifacts, data anomalies and other factors. Transform domain compression methods, particularly wavelet transforms, perform well, but generate large amounts of data if the bandwidth of the measured signal is wide.
Disclosure of Invention
An object of the present disclosure is to provide a real-time physiological data processing method, apparatus, computer program product, non-transitory computer readable storage medium and computer system based on PLA (piece-wise linear approximation) to reduce the pressure in storing and transmitting physiological data.
According to a first aspect of the present disclosure, there is provided a PLA-based physiological data processing method, comprising: segmenting input physiological data to obtain multiple sections of physiological data; determining an output physiological data sequence based on the combined error of the multiple pieces of physiological data; and encoding the output physiological data sequence.
According to a second aspect of the present disclosure, there is provided a PLA-based physiological data processing apparatus comprising: the segmentation module is configured to segment the input physiological data to obtain a plurality of segments of physiological data; a determination module configured to determine an output sequence of physiological data based on a combined error of the plurality of pieces of physiological data; and an encoding module configured to encode the output sequence of physiological data.
According to a third aspect of the present disclosure, there is provided a non-transitory computer readable storage medium having stored thereon computer instructions for causing the computer to perform the method according to the first aspect of the present disclosure.
According to a fourth aspect of the present disclosure, there is provided a computer system comprising: a processor, a memory in electronic communication with the processor; and instructions stored in the memory and executable by the processor to cause the computer system to perform the method according to the first aspect of the disclosure.
According to various embodiments provided by the present disclosure, the physiological data is compressed in real time, so that the pressure of storing and transmitting the physiological data is reduced.
It should be understood that the statements herein are not intended to identify key or essential features of the claimed subject matter, nor are they intended to be used as an aid in determining the scope of the claimed subject matter, alone.
Drawings
In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only the embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative efforts. Throughout the drawings, identical reference numbers designate similar, but not necessarily identical, elements.
Fig. 1 shows a schematic flow diagram of a PLA-based real-time physiological data processing method according to an embodiment of the present disclosure.
Fig. 2 shows a schematic diagram of one example of a process of updating a combined error of physiological data according to an embodiment of the present disclosure.
Fig. 3 shows a flow diagram of a PLA-based real-time physiological data processing method according to another embodiment of the present disclosure.
Fig. 4 illustrates an exemplary block diagram of a PLA-based real-time physiological data processing apparatus according to an embodiment of the present disclosure.
FIG. 5 illustrates a schematic block diagram of an example computer system that can be used to implement embodiments of the present disclosure.
Detailed Description
The present disclosure will be described more fully hereinafter with reference to the accompanying drawings. The disclosure may, however, be embodied in many alternate forms and should not be construed as limited to the embodiments set forth herein. Accordingly, while the disclosure is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that there is no intention to limit the disclosure to the specific forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the disclosure as defined by the appended claims.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the teachings of the present disclosure.
Some examples are described herein in connection with block diagrams and/or flowchart illustrations, where each block represents a circuit element, module, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in other implementations, the functions noted in the blocks may occur out of the order noted. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved.
Reference herein to "according to.. Examples" or "in.. Examples" means that a particular feature, structure, or characteristic described in connection with the examples can be included in at least one implementation of the present disclosure. The appearances of the phrase "according to.. Example" or "in.. Example" in various places herein are not necessarily all referring to the same example, nor are separate or alternative examples necessarily mutually exclusive of other examples.
Fig. 1 shows a schematic flow diagram of a PLA-based real-time physiological data processing method according to an embodiment of the present disclosure. As shown in fig. 1, the input physiological data, such as an ECG signal, may first be buffered. Then, whether the buffered physiological data is the preset length X is judged. For example, it may be determined whether the duration of the buffered physiological data reaches 20s (seconds). If the cached physiological data reaches the preset length X, the physiological data can be segmented. Illustratively, the method of segmenting physiological data may be:
Seg 2= (data 3, data4);
……
and so on.
Returning to fig. 1, next, a merging error of the segmented physiological data is calculated. For example, the combining error for Seg 1 is calculated as follows:
wherein segMerge = [ Seg 1 Seg 2=]= (data 1, data 2, data3, data 4), seg 1= (data 1, data 2), seg 2= (data 3, data 4), seg 1 represents 1 st segment of physiological data, seg 2 represents 2 nd segment of physiological data, data 1, data 2, data3, data4 represent 1 st, 2 nd, 3 th, 4 th pieces of physiological data respectively,
represents the linear regression of segMerge.
With continued reference to fig. 1, next, a piece of physiological data with the smallest combination error is selected (e.g., the piece of physiological data is Seg (k)). Then, it is determined whether the combined Error (denoted as Err _ Seg (k)) of the segment of physiological data Seg (k) is smaller than a preset threshold Error. When the Err _ Seg (k) is greater than or equal to the preset threshold Error, each segment of physiological data can be output as a data sequence, and the segments with the length of C at the two ends of the data sequence are deleted. For example, a segment of 2s (seconds) length at both ends of the data sequence may be deleted. Then, the initial value, the final value and the slope of each piece of physiological data can be encoded and output, so that the compression of the physiological data is realized.
When the Err _ Seg (k) is smaller than the preset threshold Error, the physiological data Seg (k) and Seg (k + 1) may be merged, and then the Err _ Seg (k) is updated, the merged Error Err _ Seg (k + 1) of the next segment of physiological data Seg (k + 1) of the physiological data Seg (k) is deleted, and the merged Error Err _ Seg (k-1) of the previous segment of physiological data Seg (k-1) of the updated physiological data Seg (k) is updated. This is explained below with reference to fig. 2.
As shown in fig. 2, the buffered physiological data is divided into six segments, seg 1, seg 2, seg 3, seg 4, seg 5, and Seg 6. The combined errors of each segment of physiological data are Err _ Seg 1, err _ Seg 2, err _ Seg 3, err _ Seg 4 and Err _ Seg 5 respectively (Seg 6 has no combined error). The combined Error Err _ Seg 2 of the second segment of physiological data Seg 2 is the minimum, and the Err _ Seg 2 is smaller than the preset threshold Error. Here, the Seg 2 and Seg 3 may be merged to form a new Seg 2 '(Seg 2' = (data 3, data4, data5, data 6)). Then, err _ Seg 3 is deleted. In addition, according to the new second segment of physiological data Seg 2 'and Seg 1, the combined error Err _ Seg 1' of Seg 1 can be recalculated; based on the new second segment of physiological data Seg 2 'and Seg 3, the combined error Err _ Seg 2' of the new second segment of physiological data can be recalculated.
Returning to fig. 1, after the combining errors of the physiological data of each segment are obtained again, the segment with the minimum combining Error is continuously selected and whether the minimum combining Error is smaller than the preset threshold Error is further determined until the minimum combining Error is greater than or equal to the preset threshold Error.
Fig. 3 shows a flow diagram of a PLA-based real-time physiological data processing method according to another embodiment of the present disclosure. As shown in fig. 3, the physiological data processing method includes:
step 302: and segmenting the input physiological data to obtain a plurality of segments of physiological data.
Step 304: and determining an output physiological data sequence based on the combined error of the plurality of pieces of physiological data.
Step 306: encoding the output physiological data sequence.
The related contents have already been described in conjunction with fig. 1 and 2, and are not described in detail here. According to the PLA-based real-time physiological data processing method provided by the disclosure, the physiological data are compressed in real time, so that the stress on the storage and transmission of the physiological data is relieved.
Fig. 4 shows an exemplary block diagram of a processing device of physiological data according to an embodiment of the present disclosure. As shown in fig. 4, the apparatus 400 for processing physiological data includes: a segmentation module 401 configured to segment the input physiological data to obtain a plurality of segments of physiological data; a determining module 402 configured to determine an output physiological data sequence based on a combined error of the plurality of pieces of physiological data; and an encoding module 403 configured to encode the output sequence of physiological data.
According to the processing device of the physiological data disclosed by the embodiment of the disclosure, the physiological data is compressed in real time, so that the pressure of storing and transmitting the physiological data is reduced.
It should be understood that the various modules of the processing device 400 of physiological data shown in fig. 4 may correspond to the various steps in the method 300 described with reference to fig. 3. Thus, the operations, features and advantages described above with respect to the method 300 are equally applicable to the processing device 400 of physiological data and the modules comprised thereby. Certain operations, features and advantages may not be described in detail herein for the sake of brevity.
In some embodiments, the determining module 402 comprises: a merging error determination module configured to determine a merging error of each piece of physiological data according to each piece of physiological data and a next piece of physiological data in a time sequence; and a physiological data sequence determination module configured to determine an output physiological data sequence by comparing the minimum value of the combined error of the plurality of pieces of physiological data with a preset threshold.
In some embodiments, the physiological data sequence determination module comprises: a selecting module configured to select a minimum value of the combined errors of the plurality of pieces of physiological data; and an output module configured to output the plurality of pieces of physiological data in response to the minimum value of the combined errors of the plurality of pieces of physiological data being greater than a preset threshold.
In some embodiments, the physiological data sequence determination module is further configured to perform the steps of: step S10: selecting the minimum value in the combination errors of the multiple sections of physiological data; step S20: judging whether the minimum value in the merging errors of the multiple sections of physiological data is smaller than a preset threshold value, if so, entering a step S30, otherwise, entering a step S50; step S30: merging a section of physiological data corresponding to the minimum value and the next section of physiological data in time sequence, and entering step S40; step S40: determining a combination error of each physiological data according to the combined multiple physiological data, and entering step S10; step S50: and outputting the multiple pieces of physiological data.
In some embodiments, the encoding module 403 is further configured to: and encoding the initial value, the final value and the slope of each piece of physiological data.
In some embodiments, the processing device 400 of physiological data further comprises: and the deleting module is configured to delete the part with the time sequence length being a preset value in two ends of the physiological data sequence before the output physiological data sequence is coded.
In some embodiments, the combined error of each piece of physiological data is calculated by the following formula:
Err_Seg k=
wherein SegMerge = [ Seg k Seg (k + 1)]= (data m, data m +1, data m +2, data m + 3), seg k = (data m, data m + 1), seg (k + 1) = (data m +2, data m + 3), seg k represents the kth segment of physiological data, seg (k + 1) represents the kth segment of physiological data, data m +1, data m +2, data m +3 represent the m, m +1, m +2, m +3 physiological data, respectively,
represents the linear regression of segMerge.
Fig. 5 illustrates an example computer system 500. In particular embodiments, one or more computer systems 500 perform one or more steps of one or more methods described or illustrated herein. In a particular embodiment, one or more computer systems 500 provide the functionality described or illustrated herein. In particular embodiments, software running on one or more computer systems 500 performs one or more steps of one or more methods described or illustrated herein or provides functions described or illustrated herein. Particular embodiments include one or more portions of one or more computer systems 500. Herein, a "computer system" may include a computing device, and vice versa, where appropriate. Further, a "computer system" may include one or more computer systems, where appropriate.
The present disclosure includes any suitable number of computer systems 500. The present disclosure includes computer system 500 in any suitable physical form. By way of example and not limitation, computer System 500 may be an embedded Computer System, a System On a chip (SOC), a single board Computer System (SBC) (e.g., a Computer-On-Module (COM) or System-On-Module (SOM)), a desktop Computer System, a laptop or notebook Computer System, an interactive kiosk, a mainframe, a network of Computer systems, a mobile phone, a Personal Digital Assistant (PDA), a server, a tablet Computer System, or a combination of these. Where appropriate, computer system 500 may include one or more computer systems 500; may be centralized or distributed; may span multiple locations; multiple machines may be spanned; may span multiple data centers; or may reside in a cloud, which may include one or more cloud components in one or more networks. Where appropriate, one or more computer systems 500 may perform one or more steps of one or more methods described or illustrated herein, without substantial spatial or temporal limitation. By way of example, and not limitation, one or more computer systems 500 may perform in real-time or in batch mode one or more steps of one or more methods described or illustrated herein. One or more computer systems 500 may perform at different times or at different locations one or more steps of one or more methods described or illustrated herein, where appropriate.
In a particular embodiment, computer system 500 includes a processor 502, a memory 504, a hard disk 506, an input/output (I/O) interface 508, a communication interface 510, and a bus 512. Although this disclosure describes and illustrates a particular computer system as having a particular number of particular components and arranged in a particular manner, this disclosure also encompasses any suitable computer system having any suitable number of any suitable components and which may be arranged in any suitable manner.
In a particular embodiment, the processor 502 includes hardware for executing instructions (e.g., instructions that make up a computer program). By way of example, and not limitation, to execute instructions, processor 502 may retrieve (or fetch) instructions from an internal register, an internal cache, memory 504, or hard disk 506; decoding and executing the instruction; the one or more results are then written to an internal register, internal cache, memory 504, or hard disk 506. In particular embodiments, processor 502 may include one or more internal caches for data, instructions, or addresses. The present disclosure includes processor 502 including any suitable number of any suitable internal caches, where appropriate. By way of example, and not limitation, processor 502 may include one or more instruction caches and one or more data caches. The instructions in the instruction cache may be copies of the instructions in memory 504 or hard disk 506 and the instruction cache may speed up retrieval of these instructions by processor 502. The data in the data cache may be copies of data in memory 504 or hard disk 506 for operation by instructions executing at processor 502; may be the result of a previous instruction executed at processor 502 to access or write to memory 504 or hard disk 506 by a subsequent instruction executed at processor 502; or may be other suitable data. The data cache may speed up read or write operations of processor 502. In particular embodiments, processor 502 may include one or more internal registers for data, instructions, or addresses. The present disclosure includes processor 502 including any suitable number of any suitable internal registers, where appropriate. Where appropriate, processor 502 may include one or more Arithmetic Logic Units (ALUs); is a multi-core processor; or include one or more processors 502. Although this disclosure describes and illustrates a particular processor, this disclosure also includes any suitable processor.
In particular embodiments, memory 504 includes a main memory for storing instructions to be executed by processor 502 or data to be operated on by processor 502. By way of example, and not limitation, computer system 500 may load instructions from hard disk 506 or another source (e.g., another computer system 500) to memory 504. The processor 502 may then load the instructions from the memory 504 into an internal register or internal cache. To execute instructions, processor 502 may retrieve and decode the instructions from an internal register or internal cache. During or after instruction execution, processor 502 may write one or more results (which may be intermediate or final results) to an internal register or internal cache. Processor 502 may then write one or more of these results to memory 504. In certain embodiments, the processor 502 executes instructions only in one or more internal registers or internal caches or memory 504 (as opposed to the hard disk 506 or other source) and operates on data only in one or more internal registers or internal caches or memory 504 (as opposed to the hard disk 506 or other source). One or more memory buses (which may each include an address bus and a data bus) may couple processor 502 to memory 504. Bus 512 may include one or more memory buses, as described below. In particular embodiments, one or more Memory Management Units (MMUs) reside between processor 502 and Memory 504 and facilitate accesses to Memory 504 requested by processor 502. In a particular embodiment, memory 504 includes Random Access Memory (RAM). The RAM may be volatile memory, where appropriate. The RAM may be Dynamic RAM (DRAM) or Static RAM (SRAM), where appropriate. Further, the RAM may be single-port or multi-port RAM, where appropriate. The present disclosure includes any suitable RAM. Memory 504 may include one or more memories 504, where appropriate. Although this disclosure describes and illustrates particular memory, this disclosure also includes any suitable memory.
In certain embodiments, hard disk 506 comprises a mass storage hard disk for data or instructions. By way of example, and not limitation, the Hard Disk 506 may include a Hard Disk Drive (HDD), a floppy Disk Drive, flash memory, an optical Disk, a magneto-optical Disk, magnetic tape, or a Universal Serial Bus (USB) Drive or a combination of these. Hard disk 506 may include removable or non-removable (or fixed) media, where appropriate. Hard disk 506 may be internal or external to computer system 500, where appropriate. In a particular embodiment, the hard disk 506 is non-volatile solid-state memory. In a particular embodiment, hard disk 506 includes Read-Only Memory (ROM). Where appropriate, the ROM may be mask-programmed ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically Erasable PROM (EEPROM), electrically erasable ROM (EAROM), flash memory, or a combination of these. The present disclosure includes a mass storage hard disk 506 in any suitable physical form. Hard disk 506 may include one or more hard disk control units to facilitate communication between processor 502 and hard disk 506, where appropriate. The hard disk 506 may include one or more hard disks 506, where appropriate. Although this disclosure describes and illustrates a particular hard disk, this disclosure also includes any suitable hard disk.
In particular embodiments, I/O interfaces 508 include hardware, software, or both that provide one or more interfaces for communication between computer system 500 and one or more I/O devices. Computer system 500 may include one or more I/O devices, where appropriate. One or more of these I/O devices may enable communication between a person and computer system 500. By way of example, and not limitation, I/O devices may include a keyboard, keypad, microphone, monitor, mouse, printer, scanner, speaker, still camera, stylus, tablet, touch screen, trackball, video camera, other suitable I/O device, or a combination of these devices. The present disclosure includes any suitable I/O devices and any suitable I/O interfaces 508 for them. I/O interface 508 may include one or more devices or software drivers, where appropriate, to enable processor 502 to drive one or more of these I/O devices. I/O interfaces 508 can include one or more I/O interfaces 508, where appropriate. Although this disclosure describes and illustrates particular I/O interfaces, this disclosure also includes any suitable I/O interfaces.
In particular embodiments, communication interface 510 includes hardware, software, or both providing one or more interfaces for communication (e.g., packet-based communication) between computer system 500 and one or more other computer systems 500 or one or more networks. By way of example, and not limitation, communication Interface 510 may include a Network Interface Controller (NIC) or Network adapter for communicating with an Ethernet or other wired Network, or a Wireless NIC (WNIC) or wireless adapter for communicating with a wireless Network, such as a WI-FI Network. The present disclosure includes any suitable network and any suitable communication interface 510 thereof. By way of example and not limitation, computer system 500 may communicate with one or more portions of an ad hoc network, a Personal Area Network (PAN), a Local Area Network (LAN), a Wide Area Network (WAN), a Metropolitan Area Network (MAN), or the internet, or a combination of these. One or more portions of one or more of these networks may be wired or wireless. By way of example, computer system 500 may communicate with a Wireless PAN (WPAN) (e.g., a Bluetooth WPAN), a WI-FI network, a WI-MAX network, a cellular telephone network (e.g., a Global System for Mobile communications (GSM) network), or other suitable wireless network or combination of networks. Computer system 500 may include any suitable communication interface 510 for any of these networks, where appropriate. Communication interface 510 may include one or more communication interfaces 510, where appropriate. Although this disclosure describes and illustrates a particular communication interface, this disclosure also includes any suitable communication interface.
In particular embodiments, bus 512 includes hardware, software, or both that couple components of computer system 500 to one another. By way of example, and not limitation, BUS 512 may include an Accelerated Graphics Port (AGP) or other graphics BUS, an Extended Industry Standard Architecture (EISA) BUS, a Front-Side BUS (Front Side BUS, FSB), a Hyper Transport (HT) Interconnect, an Industry Standard Architecture (ISA) BUS, an INFINIBAND Interconnect, a Low Pin Count (LPC) BUS, a memory BUS, a Micro Channel Architecture (MCA) BUS, a Peripheral Component Interconnect (PCI) BUS, a PCI-Express (PCIe) BUS, a Serial Advanced Technology Attachment (Serial Advanced Technology Attachment, SATA), a Video Electronics Standards Association (Video Electronics Local area Standards), or other suitable combination of these or other suitable combinations of these. Bus 512 may include one or more buses 512, where appropriate. Although this disclosure describes and illustrates a particular bus, this disclosure also includes any suitable bus or interconnect.
In this context, the one or more computer-readable non-transitory storage media may include one or more semiconductor-based or other Integrated Circuits (ICs) (e.g., field Programmable Gate Arrays (FPGAs) or Application Specific ICs (ASICs)), hard Disk Drives (HDDs), hybrid hard disk drives (HHDs), optical disks, optical Disk Drives (ODDs), magneto-optical disks, magneto-optical disk drives, floppy disks, floppy Disk Drives (FDD), magnetic tape, solid State Drives (SSDs), RAM drives, any other suitable computer-readable non-transitory storage media. The computer-readable non-transitory storage medium may be volatile, non-volatile, or a combination of volatile and non-volatile.
Claims (7)
1. A PLA-based real-time physiological data processing method comprises the following steps:
segmenting input physiological data to obtain multiple sections of physiological data;
determining an output physiological data sequence based on the combined error of the plurality of pieces of physiological data; and
encoding the output sequence of physiological data;
wherein the determining an output sequence of physiological data based on the combined error between the plurality of pieces of physiological data comprises:
determining a merging error of each segment of physiological data according to each segment of physiological data and the next segment of physiological data in time sequence; and
determining an output physiological data sequence by comparing the minimum value of the merging errors of the multiple sections of physiological data with a preset threshold value;
the determining the output physiological data sequence by comparing the minimum value of the combined error of the plurality of pieces of physiological data with a preset threshold value comprises:
step S10: selecting the minimum value in the combination errors of the multiple sections of physiological data;
step S20: judging whether the minimum value in the merging errors of the multiple pieces of physiological data is smaller than a preset threshold value, if so, entering a step S30, otherwise, entering a step S50;
step S30: merging a section of physiological data corresponding to the minimum value and the next section of physiological data in time sequence, and entering step S40;
step S40: determining a combination error of each section of physiological data according to the combined plurality of sections of physiological data, and entering a step S10;
step S50: outputting the plurality of pieces of physiological data;
the combination error of each segment of physiological data is calculated by the following formula:
Err_Seg k=
wherein SegMerge = [ Seg k Seg (k + 1)]= (data m, data m +1, data m +2, data m + 3), seg k = (data m, data m + 1), seg (k + 1) = (data m +2, data m + 3), seg k represents the kth segment of physiological data, seg (k + 1) represents the kth segment of physiological data, data m +1, data m +2, data m +3 represent the m, m +1, m +respectively2. The number of the m +3 pieces of physiological data,
represents the linear regression of segMerge.
2. The processing method according to claim 1, wherein the determining the output physiological data sequence by comparing the minimum value of the combined error of the plurality of pieces of physiological data with a preset threshold value comprises:
selecting the minimum value in the combination errors of the multiple sections of physiological data; and
and outputting the plurality of pieces of physiological data in response to the minimum value in the combination errors of the plurality of pieces of physiological data being larger than a preset threshold value.
3. The processing method of claim 1, wherein the encoding the output sequence of physiological data comprises:
and encoding the initial value, the final value and the slope of each piece of physiological data.
4. The processing method of claim 1, wherein prior to encoding the output sequence of physiological data, the processing method further comprises:
and deleting the part of the two ends of the physiological data sequence, wherein the time sequence length of the part is a preset value.
5. A PLA-based real-time physiological data processing apparatus, comprising:
the segmentation module is configured to segment the input physiological data to obtain a plurality of segments of physiological data;
a determination module configured to determine an output sequence of physiological data based on a combined error of the plurality of pieces of physiological data; and
an encoding module configured to encode the output sequence of physiological data,
wherein the determining an output sequence of physiological data based on the combined error between the plurality of pieces of physiological data comprises:
determining a merging error of each segment of physiological data according to each segment of physiological data and the next segment of physiological data in time sequence; and
determining an output physiological data sequence by comparing the minimum value of the merging errors of the multiple sections of physiological data with a preset threshold value;
the determining the output physiological data sequence by comparing the minimum value of the combined error of the plurality of pieces of physiological data with a preset threshold value comprises:
step S10: selecting the minimum value in the combination errors of the multiple sections of physiological data;
step S20: judging whether the minimum value in the merging errors of the multiple sections of physiological data is smaller than a preset threshold value, if so, entering a step S30, otherwise, entering a step S50;
step S30: merging a section of physiological data corresponding to the minimum value and the next section of physiological data in time sequence, and entering step S40;
step S40: determining a combination error of each physiological data according to the combined multiple physiological data, and entering step S10;
step S50: outputting the plurality of pieces of physiological data;
the combination error of each segment of physiological data is calculated by the following formula:
Err_Seg k=
wherein SegMerge = [ Seg k Seg (k + 1)]= (data m, data m +1, data m +2, data m + 3), seg k = (data m, data m + 1), seg (k + 1) = (data m +2, data m + 3), seg k represents the kth segment of physiological data, seg (k + 1) represents the kth segment of physiological data, data m +1, data m +2, data m +3 represent the m, m +1, m +2, m +3 physiological data, respectively,
represents the linear regression of segMerge.
6. A non-transitory computer-readable storage medium having stored thereon computer instructions for causing the computer to perform the method of any one of claims 1-4.
7. A computer system, comprising:
a processor for processing the received data, wherein the processor is used for processing the received data,
a memory in electronic communication with the processor; and
instructions stored in the memory and executable by the processor to cause the computer system to perform the method of any of claims 1 to 4.
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