CN115309347A - Time management method, device, equipment and medium based on SSD master control frequency conversion - Google Patents
Time management method, device, equipment and medium based on SSD master control frequency conversion Download PDFInfo
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Abstract
The invention relates to the field of storage, and discloses a time management method, a time management device, time management equipment and a time management medium based on SSD master control frequency conversion. The method comprises the following steps: acquiring a new frequency value of SSD master control frequency conversion and an initial clock beat value facing to firmware during frequency conversion, and calculating to obtain an initial time value facing to firmware during frequency conversion; calculating to obtain the current time difference of the firmware after frequency conversion according to the current clock beat value facing the firmware after frequency conversion, the initial clock beat value facing the firmware during frequency conversion and the new frequency value; and obtaining the current time value of the backward firmware of the frequency conversion based on the sum of the starting time value facing the firmware during the frequency conversion and the current time difference of the backward firmware of the frequency conversion. The method disclosed by the invention can eliminate the problem of inaccurate time counting caused by frequency conversion, is convenient for unified scheduling of firmware, adds a timestamp function to keep the time in the SSD device consistent with the time displayed for a user, and is more friendly to the user.
Description
Technical Field
The invention relates to the field of storage, in particular to a time management method, a time management device, time management equipment and a time management medium based on SSD master control frequency conversion.
Background
As a relatively complex embedded electronic device, the normal operation of the firmware (software program running inside the SSD) function is very critical. The execution of many functions of the firmware needs to follow a strict time sequence, and ensuring that the controller is in correct timing and has no timing disorder is a problem which must be considered when the firmware is designed. In the prior art, a set of time counting method exists in a controller, the method depends on the frequency of the controller, namely clock beats (Ticks), the clock beats gradually increase along with the time, and a developer can calculate the time lapse according to the time beat value and the known frequency of the controller; some other controllers provide a timer function to meet the requirement of periodically executing a certain task, but the timer cannot be used arbitrarily, and resource limitation exists.
The first of the above two prior art methods is simple and easy to use, but in many cases it is inconvenient to use. For example, in the case of a variable frequency of the controller, the time cannot be calculated from the clock cycle count and the controller frequency, since the master frequency is unknown; on the other hand, logs should be stored in the running process of the SSD, so that the bug is located when the monitoring device runs and the storage device has a problem, and if the time of each log is calculated by a clock beat, it is very unfriendly and inefficient. The second method is convenient to use, but is more suitable for periodic tasks, cannot directly record time, and has resource limitation.
Disclosure of Invention
In view of this, the present invention provides a time management method, apparatus, device and readable medium based on SSD master control frequency conversion. The invention provides a time management method based on SSD master frequency conversion, which is applied to the time management of the multi-core frequency conversion of the SSD and mainly comprises the following steps: time calculation under the condition of single-core frequency conversion, namely a mode of time management of a CPU with variable main frequency; the problem of time synchronization among the cores of the controller under the condition of multiple cores enables the multiple cores to keep synchronous with external time; meanwhile, the current time value of the frequency conversion rear side of the SSD to the firmware is converted into the current time of the frequency conversion rear side to the user through the function of the timestamp, namely the internal time of the SSD is converted into a mode of year, month, day, hour, minute and second, so that the functions of logs and the like related to time sequence are simpler and easier to use, and are more friendly to the user.
Based on the above purpose, an aspect of the embodiments of the present invention provides a time management method based on SSD master frequency conversion, the method includes the following steps: acquiring a new frequency value of SSD master control frequency conversion and an initial clock beat value facing to firmware during frequency conversion, and calculating to obtain an initial time value facing to firmware during frequency conversion; calculating to obtain the current time difference of the firmware after frequency conversion according to the current clock beat value facing the firmware after frequency conversion, the initial clock beat value facing the firmware during frequency conversion and the new frequency value; and obtaining the current time value of the backward firmware of the frequency conversion based on the sum of the starting time value facing the firmware during the frequency conversion and the current time difference of the backward firmware of the frequency conversion.
In some embodiments, the method further comprises: setting and recording an initial time value and an initial clock beat value facing the firmware when the frequency is not converted, and acquiring a frequency value when the frequency is not converted; calculating to obtain a firmware-oriented time difference during frequency conversion according to the firmware-oriented starting clock beat value during frequency conversion, the firmware-oriented starting clock beat value during non-frequency conversion and the frequency value during non-frequency conversion; and obtaining the initial time value facing the firmware during frequency conversion based on the sum of the initial time value facing the firmware during non-frequency conversion and the time difference facing the firmware during frequency conversion.
In some embodiments, the setting records a start time value and a start clock tick value facing the firmware when the frequency is not converted, and the obtaining the frequency value when the frequency is not converted includes: initializing the start time value facing the firmware when the frequency is not converted to be 0 and recording the clock beat value corresponding to the start time value as the start clock beat value facing the firmware when the frequency is not converted.
In some embodiments, the calculating the firmware-oriented time difference at the time of frequency conversion according to the firmware-oriented start clock tick value at the time of frequency conversion, the firmware-oriented start clock tick value at the time of non-frequency conversion, and the frequency value at the time of non-frequency conversion includes: obtaining a current clock difference value during frequency conversion according to the difference value of the initial clock beat value facing the firmware during frequency conversion and the initial clock beat value facing the firmware during non-frequency conversion; and calculating the ratio of the current clock difference value during frequency conversion to the frequency value during non-frequency conversion to obtain the time difference facing the firmware during frequency conversion.
In some embodiments, the calculating the current time difference of the post-frequency conversion firmware according to the current clock tick value of the post-frequency conversion firmware, the start clock tick value of the post-frequency conversion firmware, and the new frequency value includes: obtaining a current clock difference value after frequency conversion according to a difference value between a current clock beat value facing to the firmware after frequency conversion and an initial clock beat value facing to the firmware during frequency conversion; and calculating the ratio of the current clock difference value after frequency conversion to the new frequency value to obtain the current time difference of the backward firmware after frequency conversion.
In some embodiments, the method further comprises: in response to the occurrence of a new frequency conversion, updating the firmware-oriented start clock beat value and the firmware-oriented start time value with the new frequency conversion clock beat value and the new firmware-oriented start time value, and calculating a new frequency conversion firmware-oriented current time value based on the new frequency conversion frequency value.
In some embodiments, the method further comprises: in response to the SSD operating with multiple cores, selecting one of the multiple cores as a reference core for time synchronization of the multiple cores; and respectively calculating deviation values of the residual cores and the reference core, and calculating the current time values of the frequency-converted firmware-oriented residual cores based on the deviation values so as to keep the current time values of the frequency-converted firmware-oriented residual cores consistent with the current time values of the frequency-converted firmware-oriented reference cores.
In some embodiments, said selecting one of the multiple cores as a reference core for time synchronization of the multiple cores in response to the SSD operating with multiple cores comprises: and selecting a core with the optimal performance in the multiple cores as a reference core of the time synchronization of the multiple cores.
In some embodiments, the calculating the deviation values of the remaining cores and the reference core respectively, and calculating the current time values of the variable-frequency firmware of the remaining cores based on the deviation values so that the current time values of the variable-frequency firmware of the remaining cores and the current time values of the variable-frequency firmware of the reference core are consistent comprises: obtaining a deviation value of the residual core and the reference core based on a difference between an initial clock beat value facing the firmware when the residual core is not frequency-converted and an initial clock beat value facing the firmware when the reference core is not frequency-converted; calculating to obtain the current time difference of the frequency-converted firmware-oriented residual cores according to the current clock beat values of the frequency-converted firmware-oriented residual cores, the initial clock beat values of the frequency-converted firmware-oriented residual cores, the deviation values and the frequency values of the frequency-converted residual cores; and obtaining the current time value of the variable-frequency firmware facing the residual core based on the sum of the starting time value of the variable-frequency firmware facing the reference core and the current time difference of the variable-frequency firmware facing the residual core, so as to keep the current time value consistent with the current time value of the variable-frequency firmware facing the reference core.
In some embodiments, the deriving the offset values for the remaining cores and the reference core based on a difference between the firmware-oriented start clock tick values for the remaining cores and the firmware-oriented start clock tick values for the reference core comprises: initializing the start time value of the reference core facing the firmware when the frequency is not converted to be 0 and recording a clock beat value corresponding to the start time value as the start clock beat value of the reference core facing the firmware when the frequency is not converted.
In some embodiments, the calculating, according to the frequency-converted firmware-oriented current clock tick value of the remaining core, the frequency-converted firmware-oriented starting clock tick value of the remaining core, the deviation value, and the frequency-converted frequency value of the remaining core, a current time difference of the frequency-converted firmware-oriented current clock tick value of the remaining core includes: adding the deviation value based on the difference between the firmware-oriented current clock beat value of the residual cores after frequency conversion and the firmware-oriented initial clock beat value of the residual cores during frequency conversion to obtain the frequency-converted current clock difference value of the residual cores; and calculating the ratio of the current clock difference value of the residual cores after frequency conversion to the frequency value of the residual cores after frequency conversion to obtain the current time difference of the residual cores after frequency conversion and facing the firmware.
In some embodiments, the method further comprises: and obtaining a current time value of the frequency-converted firmware-oriented device corresponding to the timestamp based on the timestamp received by the SSD, and obtaining a current time value of the frequency-converted firmware-oriented device oriented to the user based on the timestamp and the current time value of the frequency-converted firmware-oriented device corresponding to the timestamp.
In another aspect of the embodiments of the present invention, a time management apparatus based on SSD master frequency conversion is further provided, which includes the following modules: the system comprises a first module, a second module and a third module, wherein the first module is configured to obtain a new frequency value of SSD master control frequency conversion and an initial clock beat value facing to firmware during frequency conversion, and calculate to obtain an initial time value facing to firmware during frequency conversion; the second module is configured to calculate and obtain a current time difference of the backward firmware after frequency conversion according to a current clock beat value of the backward firmware after frequency conversion, an initial clock beat value of the backward firmware during frequency conversion and the new frequency value; and the third module is configured to obtain the current time value of the backward firmware after the frequency conversion based on the sum of the starting time value facing the firmware during the frequency conversion and the current time difference of the backward firmware after the frequency conversion.
In some embodiments, the apparatus further comprises: and the fourth module is configured to update the firmware-oriented start clock beat value and the firmware-oriented start time value with the new frequency conversion clock beat value and the new firmware-oriented time value in response to the occurrence of the new frequency conversion, and calculate a new frequency conversion firmware-oriented current time value based on the new frequency conversion frequency value.
In some embodiments, the apparatus further comprises: a fifth module configured to select one of the multiple cores as a reference core for time synchronization of the multiple cores in response to the SSD operating as multiple cores; and the sixth module is configured to calculate offset values of the residual cores and the reference core respectively, and calculate current time values of the frequency-converted firmware-oriented devices of the residual cores based on the offset values, so that the current time values of the frequency-converted firmware-oriented devices of the residual cores are consistent with the current time values of the frequency-converted firmware-oriented devices of the reference core.
In some embodiments, the apparatus further comprises: and the seventh module is configured to obtain a current time value of the frequency-converted firmware-oriented device corresponding to the timestamp based on the timestamp received by the SSD, and obtain a current time value of the frequency-converted firmware-oriented device corresponding to the user based on the timestamp and the current time value of the frequency-converted firmware-oriented device corresponding to the timestamp.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including at least one processor; and a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of any of the methods described above.
In yet another aspect of the embodiments of the present invention, a computer-readable storage medium is further provided, in which a computer program for implementing any one of the above method steps when executed by a processor is stored.
The invention has at least the following beneficial effects: the invention provides a time management method, a device, equipment and a medium based on SSD master frequency conversion, wherein the time management method based on the SSD master frequency conversion is applied to the time management method under the condition that the SSD master frequency is variable. The method can solve the problem of inaccurate time counting caused by frequency conversion, and is convenient for direct calling of firmware; the multi-core time synchronization method in the method is convenient for unified scheduling of firmware; the method adds the timestamp function, so that the time inside the SSD equipment is kept consistent with the time of display facing a user, the research, development and positioning problems are facilitated, and the method is more friendly to the user.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram illustrating an embodiment of a time management method based on SSD master frequency conversion according to the present invention;
fig. 2 shows an embodiment of a time management method based on SSD master frequency conversion according to the present invention;
fig. 3 is a schematic diagram illustrating an embodiment of a time management apparatus based on SSD master frequency conversion according to the present invention;
fig. 4 is a schematic diagram illustrating another embodiment of a time management apparatus based on SSD master frequency conversion according to the present invention;
fig. 5 is a schematic diagram illustrating another embodiment of a time management apparatus based on SSD master frequency conversion according to the present invention;
fig. 6 is a schematic diagram illustrating another embodiment of a time management apparatus based on SSD master control frequency conversion according to the present invention;
FIG. 7 is a schematic diagram illustrating one embodiment of a computer device provided by the present invention;
FIG. 8 is a schematic diagram illustrating an embodiment of a computer-readable storage medium provided by the present invention.
Detailed Description
Embodiments of the present invention are described below. However, it is to be understood that the disclosed embodiments are merely examples and that other embodiments may take various and alternative forms.
In addition, it should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are only used for convenience of expression and should not be construed as a limitation to the embodiments of the present invention, and the descriptions thereof in the following embodiments are omitted. The terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
In the prior art, a method for managing time of an SSD device includes: a set of time counting methods are arranged in the controllers, the method depends on the frequency of the controllers, namely clocks (Ticks), the clocks are gradually increased along with the time, and developers can calculate the time lapse according to the values of the clocks and the known frequency of the controllers; the other controllers can provide a timer function to meet the requirement of periodically executing a certain task, but the timer cannot be used arbitrarily, and resource limitation exists. Both of the above methods have some problems, and the first method, although simple and easy to use, is inconvenient in many cases. If the frequency of the controller is variable, then time cannot be calculated from the clock tick count and the controller frequency because the master frequency is unknown; in addition, logs should be stored in the running process of the SSD, so that the bug is located when the monitoring device runs and the storage device has a problem, and if the time of each log is calculated by a clock beat, it is very unfriendly and inefficient. Although the second mode is convenient to use, the second mode is more suitable for periodic tasks, cannot directly record time, and has resource limitation.
One or more embodiments of the present application will be described below with reference to the accompanying drawings.
Based on the above purpose, a first aspect of the embodiments of the present invention provides an embodiment of a time management method based on SSD master frequency conversion. Fig. 1 is a schematic diagram illustrating an embodiment of a time management method based on SSD master frequency conversion according to the present invention. As shown in fig. 1, a time management method based on SSD master frequency conversion according to an embodiment of the present invention includes the following steps:
s1, acquiring a new frequency value of SSD master control frequency conversion and an initial clock beat value facing to firmware during frequency conversion, and calculating to obtain an initial time value facing to firmware during frequency conversion;
s2, calculating to obtain the current time difference of the firmware after frequency conversion according to the current clock beat value facing the firmware after frequency conversion, the initial clock beat value facing the firmware during frequency conversion and the new frequency value;
and S3, obtaining the current time value of the backward firmware after the frequency conversion based on the sum of the initial time value facing the firmware during the frequency conversion and the current time difference of the backward firmware after the frequency conversion.
Based on the above purpose, a first aspect of the embodiments of the present invention provides an embodiment of a time management method based on SSD master frequency conversion. Fig. 2 is a schematic diagram illustrating another embodiment of the time management method based on SSD master control frequency conversion according to the present invention. As shown in fig. 2, includes:
in time management under the condition of single-core frequency conversion, namely time management of a CPU with variable main frequency, generally, the higher the frequency of the CPU is, the higher the performance is, the higher the corresponding power consumption is, and the coordination performance and the power consumption are problems to be considered by the SSD. A simple solution is that when the SSD is handling user traffic, the CPU keeps high frequency, and when the SSD is in a sleep state, the SSD is at low frequency. Calculating the time with the clock Ticks provided by the controller is the most fundamental way. For example, the controller Ticks increases 500,000,000 times for a controller frequency of 500M, i.e., one second, and 1000,000,000 times for one second when the frequency becomes 1000M. Therefore, for a controller with a fixed frequency, the time difference can be calculated by directly dividing the difference between two Ticks before and after the controller frequency, and the Ticks is recorded as the Ticks after the time difference is recorded 2 The previous Ticks is the Ticks 1 Then, the time difference of the fixed frequency controller is:
Based on the calculation mode of the time difference in the timing frequency, a Real _ time for recording the time after frequency conversion is defined and calculated on the Ticks, and when the time is needed to be used, a user can directly use the Real _ time and skip the calculation needing to be carried out by using the Ticks, so that the influence of the frequency conversion is avoided.
The calculation mode of Real _ time comprises the following steps:
the method comprises the following steps: when the controller is powered on, the controller is started at a high frequency P1, the Ticks at the moment is recorded as Ti0, and Rt0=0 is initialized. If the frequency is not changed after the electrification, real _ time can be obtained as follows:
In the above equation, ps denotes Real _ time in picoseconds, i.e., 1000, 000, 000, 000 per second.
Step two: when the controller performs frequency conversion, ti0 and Rt0 are updated, the controller frequency is changed into P2, new Ti0 is Ticks at the frequency conversion moment, and new Rt0 can be calculated by using a formula II. After the frequency conversion is P2, real _ time can be obtained as follows:
And repeating the second step every time the controller performs frequency conversion, wherein the influence of time confusion caused by frequency conversion is eliminated. Each time the acquisition time is needed, the user may call equation two or equation three to calculate the Real time.
With the improvement of the performance requirement of the SSD, the performance requirement of the SSD main control is higher and higher, so the number of cores of the main control chip is also increasing. Because each core has its own clock beat and has its own independent time system, the time of each core needs to be unified based on the above time management mode under the condition of single-core frequency conversion, so as to facilitate the unified management of upper-layer applications. When the controller is powered on, the internal cores start to work, and due to the difference of function distribution, the cores run completely different codes. In order to maintain time synchronization of each core, one of the cores needs to be selected as a reference core for time synchronization first, and generally, the core with the best performance is selected as the reference core; secondly, recording the Ticks values of the cores at a certain moment when the cores are initialized by powering onTi0 [core] Recorded by individual coresTi0 [core] Different. Using separate coresTi0 [core] Subtracting the Ti0 of the reference core, and assuming that the core number of the reference core is 0, obtainingDeviation to individual core from reference coreDiff_Ti [core] ：
In addition to the reference core, each core should be added to the original calculation in calculating timeDiff_Ti [core] If the guaranteed time is calculated based on the reference core time, then based on equation two, the Real _ time of each core becomes:
Through the mode, the time consistency of each core can be kept under the condition of multi-core.
Through the frequency conversion processing and the time synchronization, the firmware can accurately run according to the correct time sequence. However, the time at this time is firmware-oriented time, not directly user-oriented time, and the user is more familiar with the metric time such as 2022.06.01.15. For example, when a firmware log is obtained, the user only knows how many seconds after the power-on period of the command, but the user wants to know which time of day the command was executed. Thus, with the timestamp, the in-firmware time can be converted to a metric time. Based on this, a time stamp mode is provided, which converts the time facing the firmware into the time facing the user:
after the drive loading of the SSD device is finished, a command of synchronizing a TimeStamp is sent to the SSD device through the host, namely the host sends the current public time to the SSD device in a millisecond TimeStamp mode. The SSD device records the timestamp TineStamp and the firmware internal time Real _ time at this time, and the log can be recorded with the metric time thereafter:
Based on the operation, the problem of inaccurate time counting caused by frequency conversion can be solved, and the firmware can be conveniently and directly called; the multi-core time synchronization method in the method is convenient for unified scheduling of the firmware; the method adds the timestamp function, so that the time inside the SSD equipment is kept consistent with the time of display facing a user, the research, development and positioning problems are facilitated, and the method is more friendly to the user.
In a second aspect of the embodiments of the present invention, a time management apparatus based on SSD master frequency conversion is provided. Fig. 3 is a schematic diagram illustrating an embodiment of a time management apparatus based on SSD master frequency conversion according to the present invention. As shown in fig. 3, a time management device based on SSD master frequency conversion provided by the present invention includes: the first module 011 is configured to obtain a new frequency value of the SSD master control frequency conversion and an initial clock tick value facing the firmware during frequency conversion, and calculate an initial time value facing the firmware during frequency conversion; a second module 012, configured to calculate a current time difference of the firmware after frequency conversion according to the current clock tick value of the firmware after frequency conversion, the initial clock tick value of the firmware facing the firmware during frequency conversion, and the new frequency value; a third module 013, configured to obtain a current time value of the firmware after the frequency conversion based on a sum of the start time value of the firmware after the frequency conversion and a current time difference of the firmware after the frequency conversion.
In a second aspect of the embodiments of the present invention, a time management device based on SSD master frequency conversion is provided. Fig. 4 is a schematic diagram illustrating another embodiment of a time management apparatus based on SSD master frequency conversion according to the present invention. As shown in fig. 4, the time management device based on SSD master frequency conversion further includes: a fourth module 014, configured to, in response to occurrence of a new frequency conversion, update the firmware-oriented start clock tick value and the firmware-oriented start time value with a new frequency-conversion clock tick value and a new firmware-oriented time value, and calculate a new frequency-conversion firmware-oriented current time value based on the new frequency value.
In a second aspect of the embodiments of the present invention, a time management device based on SSD master frequency conversion is provided. Fig. 5 is a schematic diagram illustrating another embodiment of a time management apparatus based on SSD master frequency conversion according to the present invention. As shown in fig. 5, the time management apparatus based on SSD master control frequency conversion provided in the present invention further includes: a fifth module 015, configured to, in response to the SSD running with multiple cores, select one of the multiple cores as a reference core for time synchronization of the multiple cores; a sixth block 016, configured to calculate an offset value between each of the remaining cores and the reference core, and calculate a current time value of the firmware after frequency conversion of the remaining cores based on the offset value, so that the current time value of the firmware after frequency conversion of the remaining cores is consistent with the current time value of the firmware after frequency conversion of the reference core.
In a second aspect of the embodiments of the present invention, a time management device based on SSD master frequency conversion is provided. Fig. 6 is a schematic diagram illustrating another embodiment of a time management apparatus based on SSD master frequency conversion according to the present invention. As shown in fig. 6, the time management device based on SSD master frequency conversion further includes: and the seventh module is configured to obtain a current time value of the frequency-converted firmware-oriented device corresponding to the timestamp based on the timestamp received by the SSD, and obtain a current time value of the frequency-converted firmware-oriented device corresponding to the user based on the timestamp and the current time value of the frequency-converted firmware-oriented device corresponding to the timestamp.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device, and fig. 7 is a schematic diagram illustrating an embodiment of a computer device provided by the present invention. As shown in fig. 7, an embodiment of a computer device provided by the present invention includes the following modules: at least one processor 021; and a memory 022, the memory 022 storing computer instructions 023 executable on the processor 021, the computer instructions 023, when executed by the processor 021, implementing the steps of the method as described above.
The invention also provides a computer readable storage medium. FIG. 8 is a schematic diagram illustrating an embodiment of a computer-readable storage medium provided by the present invention. As shown in fig. 8, the computer readable storage medium 031 stores a computer program 032 which, when executed by a processor, performs the method as described above.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the method for setting system parameters can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods as described above. The storage medium of the program may be a magnetic disk, an optical disk, a read-only memory (ROM), or a Random Access Memory (RAM). The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
Furthermore, the methods disclosed according to embodiments of the present invention may also be implemented as a computer program executed by a processor, which may be stored in a computer-readable storage medium. Which when executed by a processor performs the above-described functions defined in the methods disclosed in embodiments of the invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, D0L, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the above embodiments of the present invention are merely for description, and do not represent the advantages or disadvantages of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (15)
1. A time management method based on SSD master control frequency conversion is characterized by comprising the following steps:
acquiring a new frequency value of SSD master control frequency conversion and an initial clock beat value facing to firmware during frequency conversion, and calculating to obtain an initial time value facing to firmware during frequency conversion;
calculating to obtain the current time difference of the firmware after frequency conversion according to the current clock beat value facing the firmware after frequency conversion, the initial clock beat value facing the firmware during frequency conversion and the new frequency value;
and obtaining the current time value of the backward firmware of the frequency conversion based on the sum of the starting time value facing the firmware during the frequency conversion and the current time difference of the backward firmware of the frequency conversion.
2. The method of claim 1, further comprising:
setting and recording an initial time value and an initial clock beat value facing the firmware when the frequency is not converted, and acquiring a frequency value when the frequency is not converted;
calculating to obtain a firmware-oriented time difference during frequency conversion according to the firmware-oriented starting clock beat value during frequency conversion, the firmware-oriented starting clock beat value during non-frequency conversion and the frequency value during non-frequency conversion;
and obtaining the initial time value facing the firmware during frequency conversion based on the sum of the initial time value facing the firmware during non-frequency conversion and the time difference facing the firmware during frequency conversion.
3. The method of claim 2, wherein the setting records a start time value and a start clock tick value for the firmware-oriented when not converted, and wherein obtaining a frequency value when not converted comprises:
initializing the start time value facing the firmware when the frequency is not converted to be 0 and recording the clock beat value corresponding to the start time value as the start clock beat value facing the firmware when the frequency is not converted.
4. The method of claim 2, wherein calculating the firmware-oriented time difference at the frequency conversion according to the firmware-oriented start clock tick value at the frequency conversion, the firmware-oriented start clock tick value at the non-frequency conversion, and the frequency value at the non-frequency conversion comprises:
obtaining a current clock difference value during frequency conversion according to the difference value of the initial clock beat value facing the firmware during frequency conversion and the initial clock beat value facing the firmware during non-frequency conversion;
and calculating the ratio of the current clock difference value during frequency conversion to the frequency value during non-frequency conversion to obtain the time difference facing the firmware during frequency conversion.
5. The method of claim 1, wherein calculating the current time difference of the firmware after the frequency conversion according to the current clock tick value of the firmware after the frequency conversion, the start clock tick value of the firmware after the frequency conversion, and the new frequency value comprises:
obtaining a current clock difference value after frequency conversion according to a difference value between a current clock beat value facing to the firmware after frequency conversion and an initial clock beat value facing to the firmware during frequency conversion;
and calculating the ratio of the current clock difference value after frequency conversion to the new frequency value to obtain the current time difference of the backward firmware after frequency conversion.
6. The method of claim 1, further comprising:
in response to the occurrence of a new frequency conversion, updating the firmware-oriented start clock beat value and the firmware-oriented start time value with the new frequency conversion clock beat value and the new firmware-oriented start time value, and calculating a new frequency conversion firmware-oriented current time value based on the new frequency conversion frequency value.
7. The method of claim 1, further comprising:
in response to the SSD operating with multiple cores, selecting one of the multiple cores as a reference core for time synchronization of the multiple cores;
and respectively calculating deviation values of the residual cores and the reference core, and calculating the current time values of the frequency-converted firmware-oriented residual cores based on the deviation values so as to keep the current time values of the frequency-converted firmware-oriented residual cores consistent with the current time values of the frequency-converted firmware-oriented reference cores.
8. The method of claim 7, wherein selecting one of the multiple cores as a reference core for time synchronization of the multiple cores in response to the SSD being operated in multiple cores comprises:
and selecting a core with the optimal performance in the multiple cores as a reference core of the time synchronization of the multiple cores.
9. The method of claim 7, wherein calculating the offset values for the remaining cores and the reference core, respectively, and calculating the current time values for the frequency-converted firmware-oriented state of the remaining cores based on the offset values to keep the current time values for the frequency-converted firmware-oriented state of the remaining cores consistent with the current time values for the frequency-converted firmware-oriented state of the reference core comprises:
obtaining an offset value of the residual core and the reference core based on a difference between a start clock beat value of the residual core facing the firmware when the residual core is not frequency converted and a start clock beat value of the reference core facing the firmware when the residual core is not frequency converted;
calculating to obtain the current time difference of the frequency-converted firmware-oriented residual cores according to the current clock beat values of the frequency-converted firmware-oriented residual cores, the initial clock beat values of the frequency-converted firmware-oriented residual cores, the deviation values and the frequency values of the frequency-converted residual cores;
and obtaining the current time value of the variable-frequency firmware facing the residual core based on the sum of the starting time value of the variable-frequency firmware facing the reference core and the current time difference of the variable-frequency firmware facing the residual core, so as to keep the current time value consistent with the current time value of the variable-frequency firmware facing the reference core.
10. The method of claim 9, wherein obtaining the offset values for the remaining cores and the reference core based on a difference between a non-translated firmware-oriented start clock tick value for the remaining cores and a non-translated firmware-oriented start clock tick value for the reference core comprises:
initializing the initial time value of the reference core facing the firmware when the frequency is not converted to be 0 and recording the corresponding clock beat value as the initial clock beat value of the reference core facing the firmware when the frequency is not converted.
11. The method of claim 9, wherein calculating the current time difference of the frequency-converted firmware-oriented clock beat values of the remaining cores according to the current frequency beat values of the frequency-converted firmware-oriented clock beat values of the remaining cores, the initial frequency beat values of the frequency-converted firmware-oriented clock beat values of the remaining cores, the offset values, and the frequency-converted frequency values of the remaining cores comprises:
adding the deviation value based on the difference between the firmware-oriented current clock beat value after the frequency conversion of the residual cores and the firmware-oriented initial clock beat value during the frequency conversion of the residual cores to obtain the frequency-converted current clock beat value of the residual cores;
and calculating the ratio of the current clock difference value of the residual cores after frequency conversion to the frequency value of the residual cores after frequency conversion to obtain the current time difference of the residual cores after frequency conversion and facing the firmware.
12. The method of claim 1, further comprising:
and obtaining a current time value of the frequency-converted firmware-oriented device corresponding to the timestamp based on the timestamp received by the SSD, and obtaining a current time value of the frequency-converted firmware-oriented device oriented to the user based on the timestamp and the current time value of the frequency-converted firmware-oriented device corresponding to the timestamp.
13. The utility model provides a time management device based on SSD master control frequency conversion which characterized in that includes:
the system comprises a first module, a second module and a third module, wherein the first module is configured to acquire a new frequency value of SSD master frequency conversion and an initial clock beat value facing to firmware during frequency conversion, and calculate to obtain an initial time value facing to firmware during frequency conversion;
the second module is configured to calculate and obtain a current time difference of the backward firmware after frequency conversion according to a current clock beat value of the backward firmware after frequency conversion, an initial clock beat value of the backward firmware during frequency conversion and the new frequency value;
and the third module is configured to obtain the current time value of the backward firmware after the frequency conversion based on the sum of the start time value facing the firmware during the frequency conversion and the current time difference of the backward firmware after the frequency conversion.
14. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 12.
15. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 12.
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Citations (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW389328U (en) * | 1998-10-28 | 2000-05-01 | Winbond Electronics Corp | A device stringing along the frequency of stylization |
| CN101960770A (en) * | 2008-03-27 | 2011-01-26 | 日本电气株式会社 | Clock synchronization system, node, clock synchronization method, and program |
| CN102104475A (en) * | 2011-01-31 | 2011-06-22 | 上海交通大学 | IEEE 1588-based synchronization system and synchronization method thereof |
| CN102243506A (en) * | 2010-05-14 | 2011-11-16 | 杭州华三通信技术有限公司 | Method and device for acquiring system time |
| CN102687096A (en) * | 2009-12-16 | 2012-09-19 | 高通股份有限公司 | System and method for asynchronously and independently controlling core clocks in a multicore central processing unit |
| CN102707765A (en) * | 2012-05-15 | 2012-10-03 | 江苏中科梦兰电子科技有限公司 | Timekeeping method using mixed clock source |
| US20140019793A1 (en) * | 2011-03-29 | 2014-01-16 | Claudio Luis De Amorim | Strictly increasing virtual clock for high-precision timing of programs in multiprocessing systems |
| CN107436839A (en) * | 2017-07-17 | 2017-12-05 | 广东欧珀移动通信有限公司 | Process load acquisition methods, electric terminal and computer-readable recording medium |
| CN107992391A (en) * | 2017-11-13 | 2018-05-04 | 福州瑞芯微电子股份有限公司 | A kind of method and apparatus of polycaryon processor frequency conversion |
| CN109586691A (en) * | 2018-11-19 | 2019-04-05 | 珠海市杰理科技股份有限公司 | Clock correcting method, device, system, storage medium and computer equipment |
| CN109976966A (en) * | 2017-12-27 | 2019-07-05 | 阿里巴巴集团控股有限公司 | A kind of application program launching time counting method, apparatus and system |
| CN110347563A (en) * | 2019-04-29 | 2019-10-18 | 网易（杭州）网络有限公司 | The determination method, apparatus and storage medium of multi-core processor performance |
| CN110609777A (en) * | 2018-06-15 | 2019-12-24 | 伊姆西Ip控股有限责任公司 | Method, apparatus and computer program product for managing logs |
| CN111475115A (en) * | 2020-04-03 | 2020-07-31 | 苏州浪潮智能科技有限公司 | SSD flash life prediction method, device, equipment and readable medium |
| CN111752335A (en) * | 2020-05-23 | 2020-10-09 | 苏州浪潮智能科技有限公司 | Time synchronization method, system, terminal and storage medium based on hard disk multi-core CPU |
| CN115098190A (en) * | 2022-06-30 | 2022-09-23 | 苏州浪潮智能科技有限公司 | Method, device, terminal and storage medium for improving starting speed of SSD (solid State disk) system |
-
2022
- 2022-10-10 CN CN202211231964.8A patent/CN115309347B/en active Active
Patent Citations (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW389328U (en) * | 1998-10-28 | 2000-05-01 | Winbond Electronics Corp | A device stringing along the frequency of stylization |
| CN101960770A (en) * | 2008-03-27 | 2011-01-26 | 日本电气株式会社 | Clock synchronization system, node, clock synchronization method, and program |
| CN102687096A (en) * | 2009-12-16 | 2012-09-19 | 高通股份有限公司 | System and method for asynchronously and independently controlling core clocks in a multicore central processing unit |
| CN102243506A (en) * | 2010-05-14 | 2011-11-16 | 杭州华三通信技术有限公司 | Method and device for acquiring system time |
| CN102104475A (en) * | 2011-01-31 | 2011-06-22 | 上海交通大学 | IEEE 1588-based synchronization system and synchronization method thereof |
| US20140019793A1 (en) * | 2011-03-29 | 2014-01-16 | Claudio Luis De Amorim | Strictly increasing virtual clock for high-precision timing of programs in multiprocessing systems |
| CN102707765A (en) * | 2012-05-15 | 2012-10-03 | 江苏中科梦兰电子科技有限公司 | Timekeeping method using mixed clock source |
| CN107436839A (en) * | 2017-07-17 | 2017-12-05 | 广东欧珀移动通信有限公司 | Process load acquisition methods, electric terminal and computer-readable recording medium |
| CN107992391A (en) * | 2017-11-13 | 2018-05-04 | 福州瑞芯微电子股份有限公司 | A kind of method and apparatus of polycaryon processor frequency conversion |
| CN109976966A (en) * | 2017-12-27 | 2019-07-05 | 阿里巴巴集团控股有限公司 | A kind of application program launching time counting method, apparatus and system |
| CN110609777A (en) * | 2018-06-15 | 2019-12-24 | 伊姆西Ip控股有限责任公司 | Method, apparatus and computer program product for managing logs |
| CN109586691A (en) * | 2018-11-19 | 2019-04-05 | 珠海市杰理科技股份有限公司 | Clock correcting method, device, system, storage medium and computer equipment |
| CN110347563A (en) * | 2019-04-29 | 2019-10-18 | 网易（杭州）网络有限公司 | The determination method, apparatus and storage medium of multi-core processor performance |
| CN111475115A (en) * | 2020-04-03 | 2020-07-31 | 苏州浪潮智能科技有限公司 | SSD flash life prediction method, device, equipment and readable medium |
| CN111752335A (en) * | 2020-05-23 | 2020-10-09 | 苏州浪潮智能科技有限公司 | Time synchronization method, system, terminal and storage medium based on hard disk multi-core CPU |
| CN115098190A (en) * | 2022-06-30 | 2022-09-23 | 苏州浪潮智能科技有限公司 | Method, device, terminal and storage medium for improving starting speed of SSD (solid State disk) system |
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