CN115296795A - System and method for processing hybrid encryption information and on communication chip - Google Patents

System and method for processing hybrid encryption information and on communication chip Download PDF

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Publication number
CN115296795A
CN115296795A CN202210761754.3A CN202210761754A CN115296795A CN 115296795 A CN115296795 A CN 115296795A CN 202210761754 A CN202210761754 A CN 202210761754A CN 115296795 A CN115296795 A CN 115296795A
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Prior art keywords
encryption
communication
file
decryption
algorithm
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CN202210761754.3A
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Chinese (zh)
Inventor
李圣龙
刘波
高瑛珂
彭宇
赵云富
刘奇
孙川川
杨正
华更新
王骕
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Beijing Institute of Control Engineering
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Beijing Institute of Control Engineering
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Application filed by Beijing Institute of Control Engineering filed Critical Beijing Institute of Control Engineering
Priority to CN202210761754.3A priority Critical patent/CN115296795A/en
Publication of CN115296795A publication Critical patent/CN115296795A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
    • H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
    • H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
    • H04L63/045—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload wherein the sending and receiving network entities apply hybrid encryption, i.e. combination of symmetric and asymmetric encryption
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L63/00—Network architectures or network communication protocols for network security
    • H04L63/12—Applying verification of the received information
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L67/00—Network arrangements or protocols for supporting network services or applications
    • H04L67/01—Protocols
    • H04L67/06—Protocols specially adapted for file transfer, e.g. file transfer protocol [FTP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0816—Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H04L9/0869—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving random numbers or seeds
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S40/00—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them
    • Y04S40/20—Information technology specific aspects, e.g. CAD, simulation, modelling, system security

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)

Abstract

A system and a method for processing mixed encryption information and a communication chip are designed based on a hardware mixed encryption idea, adopt an SM2/SM3/SM4 encryption and decryption calculation method which accords with the national encryption standard, and have the characteristics of high encryption and decryption operation speed, no increase of the task burden of a processor, difficulty in being broken by violence and the like compared with the traditional information encryption method based on software. The method solves the problems that the task load of a processor is increased, the processor is easy to be attacked and cracked by hardware violence and the like in the traditional software-based information encryption method, is suitable for being applied to intelligent control systems in key fields of aerospace, intelligent power grids, high-speed rail ships and the like, and can also be popularized and applied to the commercial information security fields of intelligent gateways, intelligent door locks and the like.

Description

System and method for processing hybrid encryption information and on communication chip
Technical Field
The invention relates to a system and a method for processing mixed encryption information and a communication chip, belonging to the technical field of information security.
Background
The development trend of networking, informatization and intellectualization of modern control systems brings new potential safety hazards to information safety, and once the information systems are attacked and damaged by lawless persons or even taken over, no matter the information systems are satellite-borne control systems or intelligent power grid control systems, high-speed railway control systems and the like, the safe operation of the whole system is seriously threatened and even huge physical damage is caused. Therefore, an encrypted information identity authentication mechanism and a file verification mechanism must be added into the information system to enhance the information security protection capability of the control system.
The traditional information encryption method based on software has the characteristics of flexible design and low cost, but also has the defects of heavy task load of a processor, high possibility of being attacked and cracked by hardware violence and the like. The invention provides an information security-oriented system on chip based on a hardware hybrid encryption algorithm and a method thereof, which have the characteristics of high encryption and decryption operation speed, no increase of the task load of a processor, difficulty in being attacked by violence and the like.
Disclosure of Invention
The invention solves the technical problems that: the defects of the prior art are overcome, and the system and the method for processing the hybrid encryption information and the communication chip are provided, and the system and the method have the characteristics of high encryption and decryption operation speed, no increase of the task burden of a processor, difficulty in being broken by violence and the like. Furthermore, the invention solves the problems that the task load of the processor is increased, the processor is easy to be attacked and cracked by hardware violence and the like in the traditional information encryption method based on software.
The technical solution of the invention is as follows: a mixed encryption information processing and communication system-on-chip comprises a heterogeneous multi-core processor, a memory controller, a communication system, an encryption and decryption coprocessor and a system bus;
the heterogeneous multi-core processor realizes the process control and task scheduling of system hybrid encryption information processing and communication through software for executing a preset design step;
the memory controller is used for storing the transmitted or received data and file information;
the communication system is used for sending or receiving data and file information which are subjected to encryption processing among different modules;
the encryption and decryption coprocessor comprises a true random number generator and an encryption and decryption module; the true random number generator is used for randomly generating an initial communication key, and the encryption and decryption module is used for calculating the encryption and decryption specification of the commercial password in information processing;
and the system bus is used for transmitting data and file information among the modules.
Further, the true random number generator generates the initial key by adopting a physical thermal noise method.
Furthermore, the encryption and decryption modules are provided with a plurality of modules, and are all realized by adopting independent hardware logic which accords with the national commercial cryptographic algorithm standard.
Furthermore, the system bus adopts an implementation mechanism supporting a system internal security access mode.
According to the identity authentication and data encryption communication method realized by the hybrid encryption information processing and communication system on chip, the method comprises the following steps:
the sending node randomly generates a communication KEY KEY1 by using a true random number generator;
preparing identity authentication information, and encrypting communication data ID1 by using a first encryption and decryption algorithm and a communication KEY KEY1 to obtain encrypted identity authentication information ID2;
encrypting the communication KEY KEY1 by adopting a second encryption and decryption algorithm to obtain KEY2;
sending the encrypted identity ID2 and the KEY KEY2 to a receiving node through a communication system;
after receiving the identity authentication information, the receiving node decrypts KEY2 by adopting a second encryption and decryption algorithm to obtain a communication KEY KEY1;
decrypting the encrypted identity ID2 by using a first encryption and decryption algorithm by using a communication KEY KEY1 to obtain communication data ID1;
and judging that the ID1 is a valid identity, and adding the ID into the communication network node.
Further, the first encryption and decryption algorithm is an SM4 algorithm, and the second encryption and decryption algorithm is an SM2 algorithm.
According to the data file validity communication and verification method realized by the hybrid encryption information processing and communication system on chip, the method comprises the following steps:
randomly generating a communication KEY KEY1 by using a true random number generator;
preparing a communication FILE FILE, and generating a HASH value HASH1 of the FILE by adopting a third encryption and decryption algorithm;
encrypting the HASH value HASH1 by using a first encryption and decryption algorithm and using a communication KEY KEY1 to obtain an encrypted HASH value HASH2;
encrypting the communication KEY KEY1 by adopting a second encryption and decryption algorithm to obtain KEY2;
sending the communication FILE FILE, the encrypted HASH value HASH2 and the key HASH2 to a receiving node through a communication system;
after receiving the communication file, the receiving node decrypts the KEY2 by adopting a second encryption and decryption algorithm to obtain a communication KEY KEY1;
decrypting the encrypted HASH value HASH2 by using a first encryption and decryption algorithm by using a communication KEY KEY1 to obtain a HASH value HASH1;
and checking the received communication FILE FILE and the HASH value HASH1 by adopting a third encryption and decryption algorithm, if the received communication FILE FILE and the HASH value HASH1 are consistent, judging that the communication FILE is valid and can be adopted, and if the received communication FILE and the HASH value HASH are inconsistent, judging that the communication FILE is invalid and cannot be adopted.
Further, the first encryption and decryption algorithm is an SM4 algorithm, the second encryption and decryption algorithm is an SM2 algorithm, and the third encryption and decryption algorithm is an SM3 algorithm.
A computer-readable storage medium, in which a computer program is stored, which, when being executed by a processor, carries out the steps of the authentication and data encryption communication method or data file validity communication and verification method.
A hybrid encrypted information processing and communication device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: when the processor executes the computer program, the steps of the identity authentication and data encryption communication method or the data file validity communication and verification method are realized.
Compared with the prior art, the invention has the advantages that:
(1) The hardware hybrid encryption and decryption coprocessor is integrated on a system-on-chip architecture, the encryption and decryption coprocessor comprises a true random number generator, the true randomness of key generation is ensured, and meanwhile, the universality of a product is also ensured by adopting an SM2/SM3/SM4 encryption and decryption calculation method which meets the national encryption standard;
(2) In the information security implementation method, the true random number generator and the SM2/SM3/SM4 encryption and decryption algorithm which accords with the national password standard are orderly scheduled, so that tasks such as identity authentication, data encryption communication, data file validity verification and the like are realized.
Drawings
FIG. 1 is a schematic diagram of a hybrid cryptographic information processing and communication system on a chip and method of the present invention;
FIG. 2 is a flow chart of the task of identity authentication and data encryption communication of a hybrid cryptographic information processing and communication system-on-chip and method of the present invention;
FIG. 3 is a flow chart of a data file validity check task for a hybrid encryption information processing and communication system-on-chip and method of the present invention.
Detailed Description
In order to better understand the technical solutions, the technical solutions of the present application are described in detail below with reference to the drawings and specific embodiments, and it should be understood that the specific features in the embodiments and examples of the present application are detailed descriptions of the technical solutions of the present application, and are not limitations of the technical solutions of the present application, and the technical features in the embodiments and examples of the present application may be combined with each other without conflict.
The following describes in further detail a hybrid encryption information processing and communication system on a chip and a method provided in the embodiments of the present application with reference to the drawings of the specification, and specific implementations may include (as shown in fig. 1 to 3): the system comprises a heterogeneous multi-core processor, a memory controller, a communication system, an encryption and decryption coprocessor and a system bus;
the heterogeneous multi-core processor realizes the process control and task scheduling of system hybrid encryption information processing and communication through software for executing a preset design step; the memory controller is used for storing the transmitted or received data and file information; the communication system is used for sending or receiving data and file information which are subjected to encryption processing among different modules; the encryption and decryption coprocessor comprises a true random number generator and an encryption and decryption module; the true random number generator is used for randomly generating an initial communication key, and the encryption and decryption module is used for calculating the encryption and decryption specification of the commercial password in information processing; and the system bus is used for transmitting data and file information among the modules.
Further, in a possible implementation manner, the true random number generator adopts a physical thermal noise method to realize the initial key satisfying independence and randomness.
Optionally, in a possible implementation manner, the number of the encryption and decryption modules is multiple, and the encryption and decryption modules are all implemented by using autonomous hardware logic conforming to the national commercial cryptographic algorithm standard.
Further, in a possible implementation manner, the system bus adopts an implementation mechanism supporting a system internal security access manner.
In the solution provided in the embodiment of the present application, as shown in fig. 1, the principle schematic diagram of the system on chip and the method for hybrid encrypted information processing and communication of the present invention is provided, and the method of the present invention integrates a true random number generator and an SM2/SM3/SM4 encryption/decryption module that meet the national encryption standard in the system on chip, and can complete the information security task of identity authentication, data encryption communication and data file validity check. The method of the present invention is described in detail below with reference to the accompanying drawings, and as shown in fig. 2, the task of authentication and data encryption communication of the present invention includes the following steps:
step 1, a sending node randomly generates a communication KEY KEY1 by using a true random number generator;
step 2, identity authentication information (the data encryption communication process is the same) is prepared, and the SM4 algorithm is adopted to encrypt the communication data ID1 by using the communication KEY KEY1 to obtain encrypted identity authentication information ID2;
step 3, encrypting the communication KEY KEY1 by adopting an SM2 algorithm to obtain KEY2;
step 4, sending the encrypted identity ID2 and the KEY KEY2 to a receiving node through a communication system;
step 5, after receiving the identity authentication information, the receiving node decrypts the KEY2 by adopting an SM2 algorithm to obtain a communication KEY KEY1;
step 6, decrypting the encrypted identity ID2 by using a communication KEY KEY1 by adopting an SM4 algorithm to obtain communication data ID1;
and 7, judging that the ID1 is a valid identity, and adding the valid identity into the communication network node.
As shown in fig. 3, the data file validity checking task of the present invention includes the following steps:
step 1, randomly generating a communication KEY KEY1 by using a true random number generator;
step 2, preparing a communication FILE (communication command, data, image, FILE and the like, which are collectively referred to as a FILE), and generating a HASH value HASH1 of the FILE by adopting an SM3 HASH algorithm;
step 3, encrypting the HASH value HASH1 by using a communication KEY KEY1 by adopting an SM4 algorithm to obtain an encrypted HASH value HASH2;
step 4, encrypting the communication KEY KEY1 by adopting an SM2 algorithm to obtain KEY2;
step 5, sending the communication FILE FILE, the encrypted HASH value HASH2 and the key HASH2 to a receiving node through a communication system;
step 6, after receiving the communication file, the receiving node decrypts the KEY2 by adopting an SM2 algorithm to obtain a communication KEY KEY1;
step 7, decrypting the encrypted HASH value HASH2 by using the communication KEY KEY1 by adopting an SM4 algorithm to obtain a HASH value HASH1;
and 8, checking the received communication FILE FILE and the HASH value HASH1 by adopting an SM3 algorithm, judging that the communication FILE is valid and can be adopted if the communication FILE is consistent, and judging that the communication FILE is invalid and cannot be adopted if the communication FILE is inconsistent.
The system and the method on the hybrid encryption information processing and communication chip adopt the SM2/SM3/SM4 encryption and decryption calculation method which accords with the national encryption standard, can be applied to intelligent control systems in key fields of aerospace, intelligent power grids, high-speed rail ships and the like, and can also be popularized and applied to the commercial information safety fields of intelligent gateways, intelligent door locks and the like.
A computer readable storage medium is provided that stores computer instructions that, when executed on a computer, cause the computer to perform the method described in fig. 1.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It should be noted that, in this document, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Those skilled in the art will appreciate that those matters not described in detail in the present specification are well known in the art.

Claims (10)

1. A hybrid encryption information processing and communication system-on-a-chip, comprising: the system comprises a heterogeneous multi-core processor, a memory controller, a communication system, an encryption and decryption coprocessor and a system bus;
the heterogeneous multi-core processor realizes the process control and task scheduling of system hybrid encryption information processing and communication through software for executing a preset design step;
the memory controller is used for storing the transmitted or received data and file information;
the communication system is used for sending or receiving data and file information which are subjected to encryption processing among different modules;
the encryption and decryption coprocessor comprises a true random number generator and an encryption and decryption module; the true random number generator is used for randomly generating an initial communication key, and the encryption and decryption module is used for calculating the encryption and decryption specification of the commercial password in information processing;
and the system bus is used for transmitting data and file information among the modules.
2. The system-on-chip for hybrid cryptographic information processing and communication of claim 1, wherein: the true random number generator generates an initial key by adopting a physical thermal noise method.
3. The system-on-chip for hybrid cryptographic information processing and communication of claim 1, wherein: the encryption and decryption modules are provided with a plurality of modules and all are realized by adopting independent hardware logic which accords with the national commercial cryptographic algorithm standard.
4. The system-on-chip for hybrid cryptographic information processing and communication of claim 1, wherein: the system bus adopts an implementation mechanism supporting a system internal security access mode.
5. The method for hybrid encrypted information processing and communication system-on-a-chip identity authentication and data encryption communication according to claim 1, comprising:
the sending node randomly generates a communication KEY KEY1 by using a true random number generator;
preparing identity authentication information, and encrypting communication data ID1 by using a first encryption and decryption algorithm and a communication KEY KEY1 to obtain encrypted identity authentication information ID2;
encrypting the communication KEY KEY1 by adopting a second encryption and decryption algorithm to obtain KEY2;
sending the encrypted identity ID2 and the KEY KEY2 to a receiving node through a communication system;
after receiving the identity authentication information, the receiving node decrypts KEY2 by adopting a second encryption and decryption algorithm to obtain a communication KEY KEY1;
decrypting the encrypted identity ID2 by using a first encryption and decryption algorithm through a communication KEY KEY1 to obtain communication data ID1;
and judging that the ID1 is a valid identity, and adding the ID into the communication network node.
6. The method of claim 5, wherein: the first encryption and decryption algorithm is an SM4 algorithm, and the second encryption and decryption algorithm is an SM2 algorithm.
7. The method for communicating and verifying the validity of the data file, which is implemented by the hybrid encryption information processing and communication system on chip, according to claim 1, comprises:
randomly generating a communication KEY KEY1 by using a true random number generator;
preparing a communication FILE FILE, and generating a HASH value HASH1 of the FILE by adopting a third encryption and decryption algorithm;
encrypting the HASH value HASH1 by using a communication KEY KEY1 by adopting a first encryption and decryption algorithm to obtain an encrypted HASH value HASH2;
encrypting the communication KEY KEY1 by adopting a second encryption and decryption algorithm to obtain KEY2;
sending the communication FILE FILE, the encrypted HASH value HASH2 and the key HASH2 to a receiving node through a communication system;
after receiving the communication file, the receiving node decrypts the KEY2 by adopting a second encryption and decryption algorithm to obtain a communication KEY KEY1;
decrypting the encrypted HASH value HASH2 by adopting a first encryption and decryption algorithm by using a communication KEY KEY1 to obtain a HASH value HASH1;
and checking the received communication FILE FILE and the HASH value HASH1 by adopting a third encryption and decryption algorithm, if the received communication FILE FILE and the HASH value HASH1 are consistent, judging that the communication FILE is valid and can be adopted, and if the received communication FILE and the HASH value HASH are inconsistent, judging that the communication FILE is invalid and cannot be adopted.
8. The method of claim 7, wherein: the first encryption and decryption algorithm is an SM4 algorithm, the second encryption and decryption algorithm is an SM2 algorithm, and the third encryption and decryption algorithm is an SM3 algorithm.
9. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 5 to 8.
10. A hybrid encrypted information processing and communication device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: the processor, when executing the computer program, performs the steps of the method according to any one of claims 5 to 8.
CN202210761754.3A 2022-06-29 2022-06-29 System and method for processing hybrid encryption information and on communication chip Pending CN115296795A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117278337A (en) * 2023-11-23 2023-12-22 北京航空航天大学 Data security transmission and consistency check system based on block chain

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117278337A (en) * 2023-11-23 2023-12-22 北京航空航天大学 Data security transmission and consistency check system based on block chain

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