CN115290966A - Electronic load digital current monitoring method and device - Google Patents

Abstract

The invention discloses an electronic load digital current monitoring method and a device, wherein the method comprises the steps of constructing a current correction mapping table according to calibration parameters and storing the current correction mapping table into a first data processing module; acquiring sampling current of the electronic load through the current sampling ADC, converting the sampling current into an AD output signal to be corrected and outputting the AD output signal to the first data processing module; substituting the AD output signal Di to be corrected into a current correction mapping table by the first data processing module to obtain a corrected DA input signal; the first data processing module converts the DA input signal input current monitoring output DAC into a voltage signal output. The invention can improve the monitoring precision of the electronic load electricity and current, ensure the consistency of the output range, save an operational amplifier circuit, improve the stability, avoid the adjustment of a hardware circuit and save worry and labor.

Description

Electronic load digital current monitoring method and device

Technical Field

The invention relates to the field of current monitoring, in particular to an electronic load digital current monitoring method and device.

Background

The current monitoring output of the traditional electronic load is processed by an analog circuit, firstly, the input current is sampled and converted into a voltage value, the sampled voltage value is converted into output voltage which can be used for user monitoring by an operational amplifier circuit after sampling, for example, the full-scale current of 0-120A is converted into the monitoring voltage of 0-10V, and the current actual current of the electronic load can be known by a user by measuring the output voltage by an instrument.

The mode of monitoring the output current of the electronic load by adopting the analog circuit is greatly influenced by the precision and consistency of the electronic elements. The electronic loads produced by the same hardware are not completely consistent in the sampling voltage values of the same current, so that the accuracy of current monitoring output is low, the consistency of the output range is poor, if the current monitoring output exceeds the index range, a hardware circuit needs to be adjusted, and when the current monitoring output is produced in large batch, more manpower and material resources need to be consumed.

Disclosure of Invention

The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides an electronic load digital current monitoring method and device, which can solve the problem of poor consistency of output precision and output range of the conventional electronic load current monitoring device.

The electronic load digital current monitoring method according to the embodiment of the first aspect of the invention comprises the following steps:

establishing a current correction mapping table according to the calibration parameters and storing the current correction mapping table into a first data processing module;

acquiring a sampling current of an electronic load through a current sampling ADC and converting the sampling current into an AD output signal to be corrected;

substituting the AD output signal Di to be corrected into a current correction mapping table by the first data processing module to obtain a corrected DA input signal;

the first data processing module converts the DA input signal input current monitoring output DAC into a voltage signal output.

The electronic load digital current monitoring method according to the embodiment of the first aspect of the invention has at least the following beneficial effects:

according to the embodiment of the invention, a current correction mapping table is constructed through correction parameters, a current sampling ADC obtains sampling current of an electronic load and converts the sampling current into an AD output signal to be corrected and sends the AD output signal to a first data processing module, the first data processing module substitutes the AD output signal into the current correction mapping table, and a corrected DA input signal is obtained according to the mapping relation and is converted into a voltage signal through a current monitoring output DAC. The sampling current signal is converted into a digital signal, then the error caused by hardware in the conversion process is revised through a current correction mapping table, and finally the revised digital signal is converted into a voltage signal through a current monitoring output DAC and is output. The electronic load current and current monitoring precision can be improved, the consistency of an output range is ensured, an operational amplifier circuit can be omitted, the stability is improved, a hardware circuit is not required to be adjusted, and the electronic load current and current monitoring precision is labor-saving and worry-saving.

According to some embodiments of the invention, the calibration parameters comprise an ADC calibration parameter for calibrating a conversion error of the current sampling ADC and a DAC calibration parameter for calibrating a conversion error of the current monitoring output DAC.

According to some embodiments of the invention, the step of obtaining the ADC correction parameter comprises:

constructing a relational expression of an actual sampling current value Iout and an AD output signal value Di of the current sampling ADC: iout = ka × Di + ba, where ka, ba are ADC correction parameters;

the method comprises the steps that an electronic load, an ammeter and a current sampling ADC are connected in series to form a test circuit, wherein the ammeter is used for obtaining an actual sampling current value Iout, and the current sampling ADC is used for obtaining an AD output signal value Di;

different values of Iout and Di are obtained by changing the output current of the electronic load, and then substituted into Iout = ka × Di + ba to obtain the values of ADC correction parameters ka and ba.

According to some embodiments of the invention, the DAC correction parameters are obtained by:

constructing a relational expression of DAC correction parameters kd and bd and a DA input signal value Da: vout = kd × Da + bd, where Vout is an actual output voltage value of the current monitoring output DAC;

inputting different DA input signal values Da into the current monitoring DAC, and obtaining the output voltage Vout of the current monitoring DAC under the corresponding DA input signal values through a voltmeter;

substituting Vout = kd × Da + bd results in the values of DAC correction parameters kd, bd.

According to some embodiments of the present invention, the specific steps of constructing the current correction mapping table by checking the parameters are as follows:

acquiring ADC correction parameters ka and ba and DAC correction parameters kd and bd;

constructing a conversion relation between a sampling current digital signal Di to be corrected and a corrected DA input signal value Da by using ADC correction parameters ka and ba and DAC correction parameters kd and bd, wherein r is a specification parameter of an electronic load, and Da = ((ka × Di + ba) × r-bd)/kd;

and converting all the Di values into all corresponding Da values through the conversion relation by taking the Di values as indexes to obtain a current correction mapping table.

According to the second aspect of the invention, the electronic load digital current monitoring device comprises: the current sampling ADC is used for acquiring sampling current of the electronic load and converting the sampling current into an AD output signal to be corrected; the current sampling ADC is connected with the input end of the first data processing module and used for inputting an AD output signal to be corrected and obtaining a corrected DA input signal according to the current correction mapping table; and the current monitoring output DAC is connected with the output end of the first data processing module and is used for converting the DA input signal into a voltage signal to be output.

The electronic load digital current monitoring device according to the embodiment of the second aspect of the invention has at least the following beneficial effects:

according to the embodiment of the invention, a current correction mapping table is constructed through correction parameters, a current sampling ADC obtains sampling current of an electronic load and converts the sampling current into an AD output signal to be corrected and sends the AD output signal to a first data processing module, the first data processing module substitutes the AD output signal into the current correction mapping table, and a corrected DA input signal is obtained according to the mapping relation and is converted into a voltage signal through a current monitoring output DAC. The sampling current signal is converted into a digital signal, then the error caused by hardware in the conversion process is revised through a current correction mapping table, and finally the revised digital signal is converted into a voltage signal through a current monitoring output DAC and is output. The electronic load current monitoring precision can be improved, the consistency of an output range is guaranteed, an operational amplifier circuit can be omitted, the stability is improved, a hardware circuit does not need to be adjusted, and the electronic load current monitoring precision is labor-saving and worry-saving.

Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.

Drawings

The invention is further described with reference to the following figures and examples, in which:

FIG. 1 is a flow chart of a digital current monitoring method for an electronic load according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of the device connection in the step of acquiring ADC calibration parameters according to the embodiment of the present invention;

FIG. 3 is a schematic diagram of the connection of the device in the DAC correction parameter obtaining step according to the embodiment of the present invention;

fig. 4 is a schematic block diagram of an electronic load digital current monitoring device according to an embodiment of the present invention.

Detailed Description

Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention and are not to be construed as limiting the present invention.

In the description of the present invention, it should be understood that the orientation or positional relationship referred to, for example, the upper, lower, etc., is indicated based on the orientation or positional relationship shown in the drawings, and is only for convenience of description and simplification of description, but does not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present invention.

In the description of the present invention, a plurality means two or more. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.

In the description of the present invention, unless otherwise explicitly limited, terms such as arrangement, installation, connection and the like should be understood in a broad sense, and those skilled in the art can reasonably determine the specific meanings of the above terms in the present invention in combination with the specific contents of the technical solutions.

Referring to fig. 1, a digital current monitoring method for an electronic load includes the following steps:

s100, constructing a current correction mapping table according to the calibration parameters and storing the current correction mapping table into a first data processing module;

it should be understood that the current correction mapping table is constructed by checking parameters to correct errors caused when the current sampling ADC performs analog-to-digital conversion and the current monitoring output DAC performs digital-to-analog conversion.

S200, acquiring sampling current of an electronic load through a current sampling ADC, converting the sampling current into an AD output signal to be corrected and outputting the AD output signal to a first data processing module;

it should be understood that, the current sampling ADC obtains the sampling current at the output terminal of the electronic load, performs analog-to-digital conversion on the sampling current, and then converts the sampling current into an AD output signal, where the AD output signal is an AD output signal, but because the current sampling ADC has an error in hardware, the AD output signals output by different current sampling ADCs under the same sampling current are different, and therefore, if the current sampling ADC is not corrected, the obtained current measurement value is different from the actual value, and therefore, the current sampling ADC outputs the AD output signal to be corrected to the first data processing module.

S300, substituting the AD output signal Di to be corrected into a current correction mapping table by the first data processing module to obtain a corrected DA input signal;

it should be understood that the current correction mapping table is pre-stored in the first data processing module, and the first data processing module substitutes Di into the current correction mapping table after receiving the value Di of the AD output signal of the current sampling ADC, so as to obtain a value DA of the error-corrected DA input signal;

s400, the first data processing module converts the DA input signal input current monitoring output DAC into a voltage signal to be output.

The sampling current signal is converted into a digital signal, then the error caused by hardware in the conversion process is revised through a current correction mapping table, and finally the revised digital signal is converted into a voltage signal through a current monitoring output DAC and is output. The electronic load current monitoring precision can be improved, the consistency of an output range is guaranteed, an operational amplifier circuit can be omitted, the stability is improved, a hardware circuit does not need to be adjusted, and the electronic load current monitoring device is labor-saving and labor-saving.

It should be understood that the DA input signal corrected by the first data processing module is a digital signal, and needs to be converted into a voltage signal output through the current monitoring output DAC, and the third-party device can obtain the current output current value of the electronic load by directly reading the output voltage.

It should be noted that, in the embodiment of the present invention, the first data processing module uses an FPGA, the DA input signal is output in the FPGA through mapping of the AD output signal, and the processing speed is good in real-time through the parallel operation characteristic of the FPGA, and certainly, a DSP, an MCU, or another type of processor may also be used.

In addition to the hardware error caused by the current sampling ADC, the hardware error caused by the current monitoring output DAC needs to be considered in the correction parameters in order to further improve the accuracy of current monitoring. Therefore, in this embodiment, the calibration parameters include an ADC calibration parameter for calibrating a conversion error of the current sampling ADC and a DAC calibration parameter for calibrating a conversion error of the current monitoring output DAC. The DA input signal corrected by the current correction mapping table considers the error of the current sampling ADC and the error of the current monitoring output DAC, and the accuracy of the current monitoring output is improved.

It should be noted that, in the embodiment of the present invention, the ADC correction parameters are obtained by an ADC correction method, and with reference to fig. 2, an ADC correction test environment is first set up, where an ADC correction hardware test device includes an electronic load, a current sampling ADC, and an ammeter, the electronic load, the ammeter, and the current sampling ADC are sequentially connected in series to form a loop, an FPGA is connected to a signal output end of the current sampling ADC, and the ADC correction method using the above ADC correction hardware test device specifically includes:

s101, constructing a relational expression between an actual sampling current value Iout of the current sampling ADC and an AD output signal value Di: i = ka × Di + ba, where ka, ba are ADC correction parameters;

s102, connecting an electronic load, an ammeter and a current sampling ADC in series to form a test circuit, wherein the ammeter is used for obtaining an actual sampling current value I, and the current sampling ADC is used for obtaining an AD output signal value Di;

it is understood that the ammeter in the embodiment of the present invention may be a multimeter, a current divider, or other high-precision current measurement device.

And S103, obtaining different values of I and Di by changing the output current of the electronic load, and substituting I = ka and Di + ba to obtain the values of ADC correction parameters ka and ba.

Illustratively, the specific steps of step S103 in the embodiment of the present invention are:

firstly, acquiring a maximum current Imax output by an electronic load (generally, the rated current of the load is determined by the design specification of the load, and can be acquired by consulting the specification of the electronic load or in other ways), adjusting the output of the electronic load at least twice within the range of the maximum current Imax, acquiring an actual current value I of a line and an AD output signal value Di output by a current sampling ADC read by an FPGA (field programmable gate array) through an ammeter: and the values of two of them are recorded.

Illustratively, taking the maximum load output Imax =100A as an example, the output current of the electronic load is set to 20% of Imax, that is, 20A, the actual current value I1 displayed by the current meter at this time is recorded, and the AD output signal value Di1 output by the current sampling ADC at this time is read by the FPGA. Then, the output current of the electronic load is set to be 80% of Imax, namely 20A, the actual current value I2 displayed by the current meter at the moment is recorded, and the AD output signal value Di2 output by the current sampling ADC at the moment is read by the FPGA.

As shown in table 1 below

	AD output signal value Di	Actual current value I
			First recording	Di1	I1
Second recording	Di2	I2

TABLE 1

Constructing a relational expression I = ka × Di + ba between the AD output signal value Di and the actual current value I, and substituting the numerical values recorded in the two experiments in the table 1 into the relational expression to obtain:

I1＝ka*Di1+ba；

I2＝ka*Di2+ba。

the values of the ADC correction parameters ka and ba can be calculated by the above two equations:

ka＝(I1-I2)/(Di1-Di2)；

ba＝(I2*Di1-I1*Di2)/(Di1-Di2)。

it should be noted that, in the embodiment of the present invention, the DAC correction parameters are obtained by a DAC correction method, referring to fig. 3, a DAC correction test environment is first set up, a DAC correction hardware test device includes an FPGA, a current monitoring output DAC, and a voltmeter, the FPGA is connected to a digital signal input terminal of the current monitoring output DAC, and a voltage output terminal of the current monitoring output DAC is connected to the voltmeter. It can be understood that, the voltmeter in the embodiment of the present invention may adopt a multimeter, or may adopt a table meter or other high-precision voltage measurement device, and the DAC correction method that adopts the DAC correction hardware test device described above includes the specific steps of:

s111, constructing a relational expression of DAC correction parameters kd and bd and a DA input signal value Da: v = kd Da + bd, where V is the actual output voltage value of the current monitoring output DAC;

s112, inputting different DA input signal values Da into the current monitoring DAC, and obtaining the output voltage V of the current monitoring DAC under the corresponding DA input signal values through a voltmeter;

illustratively, the FPGA inputs DA input signals to the DAC twice, the values of the DA input signals are DA1 and DA2, respectively, and the voltage output corresponding to the DA value is measured by using a voltmeter, so as to obtain voltage output values V1 and V2 corresponding to DA1 and DA2, as shown in table 2:

TABLE 2

And S113, substituting the voltage output values V and Da value recorded twice into V = kd × Da + bd to obtain the values of the DAC correction parameters kd and bd.

Exemplarily, substituting the numerical values in table 2 into the relation of step S111, the following can be obtained:

V1＝kd*Da1+bd；

V2＝kd*Da2+bd。

the values of the DAC correction parameters kd and bd can be calculated by the above two equations:

kd＝(V1-V2)/(Da1-Da2)；

bd＝(V2*Da1-V1*Da2)/(Da1-Da2)。

it should be noted that the values of Da1 and Da2 are required to be: taking a 12-bit DAC as an example, the Da value of the 12-bit DAC ranges from 0 to 4095, da1 equals 20% of the maximum range, da2 equals 80% of the maximum range, then

Da1＝4095*0.2＝819；

Da2＝4095*0.8＝3276。

The specific steps of constructing the current correction mapping table through the verification parameters are as follows:

s121, obtaining ADC correction parameters ka and ba and DAC correction parameters kd and bd;

s122, constructing a conversion relation Da = ((ka: + ba) × r-bd)/kd between a sampling current digital signal Di to be corrected and the DA input signal value Da after correction through ADC correction parameters ka and ba and DAC correction parameters kd and bd, wherein r is a specification parameter of the electronic load, and a calculation formula of the specification parameter r is as follows

r＝Vrate/Imax，

It should be understood that where Vrate represents the voltage output corresponding to the maximum output current Imax of the electronic load, then the following equation holds true

V＝I*Vrate/Imax；

It should be understood that, where Vrate and Imax are constants, determined by the design specifications of the electronic load, they can be obtained by referring to the specification of the electronic load, and the ratio thereof is represented by r, i.e., r = Vrate/Imax, for example, vrate =10v, imax =100a, it indicates that the voltage specification of the electronic load is 0V to 10V, the load current output range is 0 to 100A, and the specification parameter r =10/100=0.1 of the electronic load.

It should be understood that, replacing the present voltage output value V of the electronic load with the actual current value I by a calibration expression, we can obtain (kd × Da + bd) = (ka × Di + ba) × r;

it should be understood that, by scaling the above equation, a scaling relation between the sampling current digital signal Di to be corrected and the corrected DA input signal value DA can be obtained:

Da＝((ka*Di+ba)*r-bd)/kd。

and S123, taking the value of Di as an index, and converting all corresponding Da values of all the values of Di through a conversion relation to obtain a current correction mapping table.

For example, assuming that the number of bits of the current sampling ADC is m, the maximum Dimax of Di is 2m-1, such as the maximum output of a 16-bit current sampling ADC is 216-1; di ranges from 0 to 2m < -1 >. Then, the values of Di are used as indexes, and all values of Di are converted into corresponding Da values through a formula and are sequentially written into the RAM with continuous addresses of the FPGA. The mapping is shown in table 3:

TABLE 3

It should be understood that, when receiving a sampling current digital signal Di sent by a current sampling ADC, the FPGA with the current correction mapping table inputs the sampling current digital signal Di into table 3, so as to output a corresponding DA input signal value DA. The correction of current monitoring output is realized, and the defects of low output precision and inconsistent output range caused by hardware errors in analog-to-digital conversion and digital-to-analog conversion are corrected.

Referring to fig. 4, an embodiment of the present invention further relates to an electronic load digital current monitoring apparatus, including: the current sampling ADC is connected with the output end of the electronic load, the signal output end of the current sampling ADC is connected with the input end of the first data processing module, the output end of the first data processing module is connected with the current monitoring output DAC, and the second data processing module is connected with the first data processing module.

It should be noted that, in the embodiment of the present invention, the first data processing module employs an FPGA, the second data processing module employs an MCU, the MCU calculates a current correction mapping table according to the correction parameters and sends the current correction mapping table to the FPGA, and the current sampling ADC is configured to obtain a sampling current of the electronic load and convert the sampling current into an AD output signal to be corrected; the FPGA substitutes the AD output signal to be corrected into a current correction mapping table to obtain a corrected DA input signal, and then the corrected DA input signal is converted into a voltage signal through a current monitoring output DAC to be output.

The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.

Claims (8)

1. A digital current monitoring method for an electronic load is characterized by comprising the following steps:

establishing a current correction mapping table according to the calibration parameters and storing the current correction mapping table into a first data processing module;

acquiring sampling current of the electronic load through the current sampling ADC, converting the sampling current into an AD output signal to be corrected and outputting the AD output signal to the first data processing module;

the first data processing module substitutes the AD output signal to be corrected into a current correction mapping table to obtain a corrected DA input signal;

the first data processing module converts the DA input signal input current monitoring output DAC into a voltage signal output.

2. The electronic load digital current monitoring method according to claim 1, characterized in that: the calibration parameters comprise ADC calibration parameters and DAC calibration parameters, the ADC calibration parameters are used for calibrating conversion errors of the current sampling ADC, and the DAC calibration parameters are used for calibrating conversion errors of the current monitoring output DAC.

3. The electronic load digital current monitoring method according to claim 2, characterized in that: the acquisition steps of the ADC correction parameters are as follows:

constructing a relational expression of an actual sampling current value Iout and an AD output signal value Di of the current sampling ADC: iout = ka × Di + ba, where ka, ba are ADC correction parameters;

the method comprises the steps that an electronic load, an ammeter and a current sampling ADC are connected in series to form a test circuit, wherein the ammeter is used for obtaining an actual sampling current value Iout, and the current sampling ADC is used for obtaining an AD output signal value Di;

different values of Iout and Di are obtained by changing the output current of the electronic load, and then substituted into Iout = ka × Di + ba to obtain the values of ADC correction parameters ka and ba.

4. The electronic load digital current monitoring method according to claim 2, characterized in that: the DAC correction parameter acquisition step comprises the following steps:

constructing a relational expression of DAC correction parameters kd and bd and a DA input signal value Da: vout = kd Da + bd, where Vout is the actual output voltage value of the current monitoring output DAC;

inputting different DA input signal values Da into the current monitoring DAC, and obtaining the output voltage Vout of the current monitoring DAC under the corresponding DA input signal values through a voltmeter;

substituting Vout = kd × Da + bd results in the values of DAC correction parameters kd, bd.

5. The electronic load digital current monitoring method of claim 1, wherein: the specific steps of establishing the current correction mapping table through the verification parameters are as follows:

acquiring ADC correction parameters ka and ba and DAC correction parameters kd and bd;

constructing a conversion relation between a sampling current digital signal Di to be corrected and a corrected DA input signal value Da by using ADC correction parameters ka and ba and DAC correction parameters kd and bd, wherein r is a specification parameter of an electronic load, and Da = ((ka × Di + ba) × r-bd)/kd;

and converting all the AD output signal values Di into all corresponding DA input signal values Da through the conversion relation by taking the values of the AD output signal values Di as indexes, and obtaining a current correction mapping table.

6. An electronic load digital current monitoring device, comprising:

the current sampling ADC is used for acquiring sampling current of the electronic load and converting the sampling current into an AD output signal to be corrected;

the current sampling ADC is connected with the input end of the first data processing module and used for inputting an AD output signal to be corrected and obtaining a corrected DA input signal according to the current correction mapping table;

and the current monitoring output DAC is connected with the output end of the first data processing module and is used for converting the DA input signal into a voltage signal to be output.

7. The electronic load digital current monitoring method of claim 6, wherein: the first data processing module is an FPGA.

8. The electronic load digital current monitoring method of claim 6, wherein: the second data processing module is an MCU.

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