CN115276029A - UPQC (unified Power quality conditioner) topological structure and control method - Google Patents

UPQC (unified Power quality conditioner) topological structure and control method Download PDF

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CN115276029A
CN115276029A CN202210553670.0A CN202210553670A CN115276029A CN 115276029 A CN115276029 A CN 115276029A CN 202210553670 A CN202210553670 A CN 202210553670A CN 115276029 A CN115276029 A CN 115276029A
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voltage
upqc
value
current
output
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Inventor
蔡重凯
俞永军
赵越
王轩
陈晓宇
洪金琪
付永生
金百荣
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State Grid Zhejiang Electric Power Co Ltd
Shaoxing Power Supply Co of State Grid Zhejiang Electric Power Co Ltd
China EPRI Science and Technology Co Ltd
Shengzhou Power Supply Co of State Grid Zhejiang Electric Power Co Ltd
Original Assignee
State Grid Zhejiang Electric Power Co Ltd
Shaoxing Power Supply Co of State Grid Zhejiang Electric Power Co Ltd
China EPRI Science and Technology Co Ltd
Shengzhou Power Supply Co of State Grid Zhejiang Electric Power Co Ltd
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Priority to CN202210553670.0A priority Critical patent/CN115276029A/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/12—Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load
    • H02J3/16—Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load by adjustment of reactive power
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01—Arrangements for reducing harmonics or ripples
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/18—Arrangements for adjusting, eliminating or compensating reactive power in networks
    • H02J3/1807—Arrangements for adjusting, eliminating or compensating reactive power in networks using series compensators
    • H02J3/1814—Arrangements for adjusting, eliminating or compensating reactive power in networks using series compensators wherein al least one reactive element is actively controlled by a bridge converter, e.g. unified power flow controllers [UPFC]
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/18—Arrangements for adjusting, eliminating or compensating reactive power in networks
    • H02J3/1821—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators
    • H02J3/1835—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control
    • H02J3/1842—Arrangements for adjusting, eliminating or compensating reactive power in networks using shunt compensators with stepless control wherein at least one reactive element is actively controlled by a bridge converter, e.g. active filters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30—Reactive power compensation

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  • Power Engineering (AREA)
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Abstract

The UPQC topological structure comprises an APF part and a DVR part, wherein the APF part comprises a diode clamp type three-level converter, a midpoint grounding type direct current bus and a low-pass filter, the DVR part comprises a three-phase bridge converter, a direct current bus, a low-pass filter and a high-speed switch consisting of a bidirectional diode parallel mechanical switch, when the high-speed switch is in a closed state, a power distribution network supplies power to a load, the UPQC is responsible for filtering current harmonics in a circuit, and when the high-speed switch is in an open state, the UPQC provides electric energy with the same frequency and phase as a power grid. The compensation strategy of the UPQC is an alternate compensation mode, and real-time compensation is not needed, so that the capacity of the required direct current bus can be reduced, and the cost is reduced.

Description

UPQC (unified Power quality conditioner) topological structure and control method
The invention is a divisional application based on the Chinese patent number 202010322062X, the patent name "a unified power quality regulator control method", which is filed by the applicant on 22.4.2020.
Technical Field
The invention belongs to the technical field of power systems, and particularly relates to a power quality control technology of a power distribution network.
Background
With the rapid development of the modern society, precise instruments and sensitive users are gradually increased, and the requirement on the power supply quality is greatly improved; meanwhile, with the rapid development of smart power grids in recent years, a large number of devices such as power electronic devices and asynchronous motors are connected into the power grids, so that the problems of harmonic waves and reactive power are increased day by day. The problems of voltage rise and drop and voltage current harmonic waves caused by instantaneous faults of the power distribution network seriously affect the safety and reliability of power application and even cause a great deal of economic loss. The unified power quality regulator (UPQC) couples the series Active Power Filter (APF) and the parallel active power filter (DVR) through a direct current bus, thereby solving the power quality problem in the aspects of voltage and current.
The traditional UPQC consists of two APFs in parallel connection and in series connection, and is divided into a left parallel-to-right series structure and a left parallel-to-right series structure according to the positions of the series connection side and the parallel connection side.
In recent years, scholars at home and abroad make various improvements on the topology of the conventional UPQC, for example, in journal "report of electrotechnical science" 2016 (1 month, 31 st volume, 2 nd period, 215 th to 220 th pages, "a series side three-phase decoupling type unified power quality controller", a sentence (the author wanhao, liu cheng jun, etc.) proposes an MMC-UPQC with a new topology structure, the series side of the MMC-UPQC can compensate the unbalanced voltage temporary rise/fall containing the negative sequence and the zero sequence components, and can reduce the alternating current flowing through the series side converter, thereby improving the safety and reliability of the system. Chinese patent No. CN103280798A proposes a topology circuit and a control and regulation method for load capacity increase, so that after the load capacity increase is modified, the compensation function can be fully utilized, and the device will not quit operation due to excessive current. The topology still does not jump out of the traditional UPQC structure, the structure is characterized by real-time compensation, and therefore a large-capacity direct current bus is needed, and the cost is greatly increased.
The problem of high cost caused by real-time compensation of the UPQC based on the traditional topological structure is that a novel UPQC which aims at reducing cost and meeting voltage requirements is provided as shown in figure 1, and meanwhile, a coordination control method of the novel UPQC is required to be provided for the novel UPQC topology.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides a UPQC topological structure and a control method, so that the voltage requirement can be met under the condition of greatly reducing the cost.
In order to solve the technical problems, the invention adopts the following technical scheme:
on one hand, the UPQC topological structure comprises an APF part and a DVR part, wherein the APF part comprises a diode clamp type three-level converter, a midpoint grounding type direct current bus and a low-pass filter, the DVR part comprises a three-phase bridge converter, a direct current bus, a low-pass filter and a high-speed switch consisting of a bidirectional diode parallel mechanical switch, when the high-speed switch is in a closed state, a power distribution network supplies power to a load, the UPQC is used for filtering current harmonics in a circuit, and when the high-speed switch is in an open state, the UPQC is used for supplying electric energy with the same frequency and the same phase as the power grid.
In addition, on the other hand, a UPQC control method is provided, which is used in cooperation with the UPQC topological structure, and is used for judging whether a problem occurs on the network side or not by detecting a voltage effective value, a voltage harmonic total distortion rate and a current effective value in a line, so that the state of a high-speed switch is selected, and two parts of the UPQC are switched, and the method comprises the following steps:
step 1: generating a current compensation signal and a voltage compensation signal, and respectively generating control signals of an APF (active power filter) and a DVR (digital video recorder) according to the current compensation signal and the voltage compensation signal;
and 2, step: respectively calculating a power supply voltage effective value, a power supply voltage harmonic total distortion rate and a line current value;
and step 3: comparing the three values obtained by calculation in the step 2 with a set response threshold value, and judging whether related problems occur or not;
and 4, step 4: selecting to switch the APF and the DVR according to the judgment result in the step 3, if one or more of the problems of voltage drop, overlarge voltage THD and circuit break occur in the system, disconnecting the high-speed switch, stopping APF output, starting DVR output, and if no problem occurs in the system, closing the high-speed switch, starting APF output and stopping DVR output;
the step 1 comprises the following steps:
step 1.1: detecting line current harmonic waves by a dq0 method to obtain a current compensation signal;
step (ii) of1.2: generating APF control signal g by triangular wave comparison method for the current compensation signal obtained in step 1.1APF；
Step 1.3: tracking the network frequency and phase by a method based on a reactive power theory to generate a voltage compensation signal;
step 1.4: for the voltage compensation signal obtained in 1.3, a DVR control signal g is generated by a triangular wave comparison methodDVR；
The step 2 comprises the following steps:
step 2.1: calculating the effective value of the power voltage, and multiplying the input signal by the square, the low-pass filter, the product of 2 and the square to obtain the effective value U of the power voltagex；
Step 2.2: calculating the total distortion of the harmonic wave of the power supply voltage, and respectively obtaining the effective values v of the input signalsrmsAverage value vdcAnd Fourier decomposition v1rmsAfter the three are squared, the square of the average value and the square of Fourier decomposition are subtracted from the square of the effective value to obtain a numerical value, and v is obtained after the obtained numerical value is squaredhrmsFinally with vhrmsDivided by v1rmsObtaining the total distortion rate THD of the power supply voltage harmonicx；
Step 2.3: calculating the line current value, squaring the input signal, multiplying by frequency, integrating, translating the integral value to the right for a period, and subtracting the value after translating for a period and the square from the integral value to obtain the line current value Ix；
The step 3 comprises the following steps:
step 3.1: will UxAnd threshold value UminComparing and judging UxWhether or not it is less than UmIf yes, output LUx= "1", otherwise output LUx= 0", the 3-way result obtained is passed through an and gate to obtain LU；
Step 3.2: will THDxAnd threshold value THDmaxComparing to determine THDxWhether greater than THDmaxIf yes, output LTHDx= "1", otherwise output LTHDx= 0", the obtained 3-way result is passed through an and gate to obtain LTHD；
Step 3.3:will IxAnd a threshold value IminComparing and judging IxWhether or not less than IminIf yes, output LIx= "1", otherwise output LIx= 0", the obtained 3-way result is passed through an and gate to obtain LI；
In step 4, performing AND operation on the 3 result signals in the step 3 to obtain a final judgment result L, and if L =1, considering that one or more of voltage drop, excessive voltage THD and open circuit problems occur in the system; if L =0, the system is considered to have no problem.
Preferably, the voltage angular frequency, three-phase current i, is obtained by a phase-locked loop PLLa,b,cBy varying abc/dq0 to obtain idAnd iqThen obtained through a low pass filter LPF
Figure BDA0003651519940000041
And with
Figure BDA0003651519940000042
Then obtaining a current fundamental wave signal i through dq0/abcaf,bf,cfBy i usinga,b,cMinus iaf,bf,cfA current compensation signal i can be obtainedah,bh,ch。
Preferably, the voltage angular frequency, the three-phase voltage v is obtained by a phase-locked loop PLLa,b,cV is obtained after Park transformationdAnd vqThen passes through a low pass filter LPF to obtain
Figure BDA0003651519940000043
And
Figure BDA0003651519940000044
then the A phase voltage positive sequence initial phase angle is obtained by calculation of formula (1)
Figure BDA0003651519940000045
Generating a voltage compensation signal v by PWM modulation wave of formula (2)af,bf,cf，
Figure BDA0003651519940000046
Figure BDA0003651519940000047
Wherein the content of the first and second substances,
Figure BDA0003651519940000048
vcmis the peak value of the carrier wave, UomIs the peak value of the output voltage, UdcIs the dc bus voltage.
Preferably, the theoretical basis for calculating the effective value of the power supply voltage is to assume that the A-phase voltage is
Figure BDA0003651519940000049
Squaring the two sides and converting the two sides by a double angle formula to obtain
Figure BDA00036515199400000410
Preferably, the filtering frequency of the low-pass filter is 50-100Hz.
Preferably, the theoretical basis for the calculation of the total harmonic distortion of the power supply voltage is defined as THD
Figure BDA00036515199400000411
Figure BDA00036515199400000412
Preferably, the theoretical basis for calculating the effective value of the power supply current is defined as the effective value
Figure BDA00036515199400000413
Taking the range of integrationOne power cycle, then tn-tn-1= T =1/f =1/50, whereby the formula (5) becomes
Figure BDA0003651519940000051
After being changed to obtain
Figure BDA0003651519940000052
The frequency is 50Hz and the period is 0.02s.
By adopting the technical scheme, whether the network side has a problem or not is judged by detecting the voltage effective value, the voltage harmonic total distortion (THD) and the current effective value in the line, and then the state of a high-speed switch is selected to switch two parts of the UPQC, so that the functions of current filtering and voltage supporting are realized, and the novel electric energy quality control of the UPQC is realized.
Therefore, the following beneficial effects are achieved:
the compensation strategies of the traditional UPQC are real-time compensation modes, namely, the harmonic wave of the current is offset, and the voltage drop is compensated. This means that a large dc bus is required to meet this compensation strategy, which is not necessary for loads with low dc voltage requirements.
The compensation strategy of the UPQC is an alternate compensation mode, wherein an APF part is unique from the traditional UPQC, but a DVR part is not compensated in real time. Because the load has low requirements on voltage, the DVR does not compensate when the voltage drops within the amplitude allowed by the load; when the voltage drops beyond the allowable amplitude, the DVR is put into use as a three-phase inverter to supply power for the load.
Because the compensation strategy of the novel UPQC does not need real-time compensation, the capacity of a required direct current bus can be reduced, and therefore the cost is reduced.
The following detailed description of the present invention and the advantages thereof will be described with reference to the accompanying drawings.
Drawings
The invention is further described with reference to the accompanying drawings and the detailed description below:
fig. 1 is a topology used in a control method of a novel UPQC according to the present invention.
Fig. 2 is a control general flowchart of a control method of the novel UPQC of the present invention.
Fig. 3 is a flow chart of a current compensation signal link of the control method of the novel UPQC of the present invention.
Fig. 4 is a flow chart of a voltage compensation signal link of the control method of the novel UPQC of the present invention.
Fig. 5 is a general flow chart of switching of the control method of the novel UPQC of the present invention.
Fig. 6 is a flow chart of the relevant numerical calculation of the control method of the novel UPQC of the present invention.
Fig. 7 is a flow chart of threshold comparison of the control method of the novel UPQC of the present invention.
Fig. 8 is a switching logic link block diagram of the control method of the novel UPQC of the present invention.
The method comprises the following steps of 1, a correlation numerical value calculation link, 2, a voltage effective value calculation link, 3, a voltage THD calculation link, 4, a current effective value calculation link, 5, a voltage drop judgment link, 6, an overlarge voltage THD judgment link, 7, a broken circuit judgment link and 8, a switching logic generation link.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses. All other embodiments, which can be obtained by a person skilled in the art without inventive step based on the embodiments of the present invention, are within the scope of protection of the present invention.
The UPQC real-time compensation based on the traditional topological structure causes the problem of high cost, and a novel UPQC which aims to reduce the cost and meet the requirement of a load with low voltage quality is provided.
The novel UPQC topology shown in FIG. 1 includes an APF part and a DVR part. The APF part comprises a diode clamp type three-level converter, a midpoint grounding type direct current bus and a low-pass filter. The DVR part comprises a three-phase bridge converter, a direct current bus, a low-pass filter and a high-speed switch consisting of a bidirectional diode parallel mechanical switch. When the high-speed switch is in a closed state, the power distribution network supplies power to the load at the moment, and the UPQC is responsible for filtering current harmonics in the line. When the high-speed switch is in an off state, the UPQC provides electric energy with the same frequency and phase as the power grid.
The invention also provides a control method of the unified power quality regulator based on the novel UPQC topological structure. The novel UPQC topology shown in the figure 1 is matched for use, whether a problem occurs on the network side is judged by detecting a voltage effective value, a voltage harmonic total distortion (THD) and a current effective value in a line, and then the state of a high-speed switch is selected to switch two parts of the UPQC, so that the functions of current filtering and voltage supporting are realized.
Fig. 2 is a general control flow chart of the control method of the novel UPQC of the present invention. The control comprises four main links, namely a compensation strategy link, a numerical calculation link, a problem judgment link and a switching logic link. The system generates compensation signals of voltage and current immediately after starting, and generates control signals of an APF part and a DVR part according to the compensation signals. Then, judging problems, if the problems exist, disconnecting the high-speed switch, enabling the left APF part not to output and enabling the right DVR part to output; if no problem exists, the high-speed switch is closed, the APF part on the left side outputs, and the DVR part on the right side does not output.
The APF and the DVR are in an alternative working mode, namely the DVR does not work when the APF works, and the APF does not work when the DVR works. The DVR part has the function that when the DVR part is put into use, the DVR part is used as an inverter to generate standard sinusoidal voltage with the same frequency and phase as the network side to supply power for a load.
Fig. 3 is a flow chart of a current compensation signal link of the control method of the novel UPQC of the present invention. In the figure, the voltage angular frequency and the three-phase current i are obtained by a phase-locked loop PLLa,b,cObtaining i by variation of abc/dq0dAnd iqThen obtained through a low pass filter LPF
Figure BDA0003651519940000071
And
Figure BDA0003651519940000072
then obtaining a current fundamental wave signal i through dq0/abcaf,bf,cfBy ia,b,cSubtract iaf,bf,cfA current compensation signal i can be obtainedah,bh,ch。
Fig. 4 is a flow chart of a voltage compensation signal link of the control method of the novel UPQC of the present invention. In the figure, the voltage angular frequency, the three-phase voltage v, is obtained by a phase-locked loop PLLa,b,cObtaining v after Park transformationdAnd vqThen passes through a low pass filter LPF to obtain
Figure BDA0003651519940000073
And
Figure BDA0003651519940000074
then the A phase voltage positive sequence initial phase angle is obtained by calculation of formula (1)
Figure BDA0003651519940000075
Generating a voltage compensation signal v by PWM modulation wave of formula (2)af,bf,cf。
Figure BDA0003651519940000076
Figure BDA0003651519940000081
Wherein the content of the first and second substances,
Figure BDA0003651519940000082
vcmis the peak value of the carrier wave, UomIs the peak value of the output voltage, UdcIs the dc bus voltage.
Fig. 5 is a general control flow chart of the control method of the novel UPQC of the present invention. In the figure, a related numerical value calculating link 1 generates a power supply voltage effective value U by a voltage effective value calculating link 2, a voltage THD calculating link 3 and a current effective value calculating link 4x(wherein subscript x = a, b, c, representing a, b, c three phases, the same below), total distortion rate THD of power supply voltage harmonicxAnd line current Ix. Respectively sending the signals into a voltage threshold value comparison link 5, a voltage THD comparison link 6 and a current threshold value comparison link 7, and obtaining a signal L after comparisonU、LTHDAnd LI. The result obtained after comparison is passed through switching logic link 8 to determine final output signal L.
FIG. 6 is a related numerical calculation link of the control method of the novel UPQC of the present invention. Wherein:
step 1.1: the effective value of the power supply voltage is calculated by a step 2 of squaring an input signal, a low-pass filter, multiplying by 2 and squaring. The theoretical basis is that the A phase voltage is assumed to be
Figure BDA0003651519940000083
Squaring the two sides and converting the two sides by a double angle formula to obtain
Figure BDA0003651519940000084
It can be seen from formula (4) that after the square processing of the voltage value of the a-phase, the voltage value of the a-phase is converted into the superposition of a direct current component and a frequency multiplication component 2, and the amplitude U of the voltage can be obtained only by filtering the frequency multiplication component 2 and multiplying the frequency multiplication component 2 by the squarem。
The filtering frequency of the low-pass filter is 50-100Hz.
Step 1.2: the power supply voltage THD calculation link 3 respectively calculates the effective values v of the input signalsrmsAverage value ofvdcAnd Fourier decomposition v1rmsAfter the three are squared, the square of the mean value and the square of Fourier decomposition are subtracted by the square of the effective value to obtain a numerical value, and v is obtained after the obtained numerical value is subjected to evolutionhrmsFinally using vhrmsDivided by v1rms. The theoretical basis is the definition of THD
Figure BDA0003651519940000085
Figure BDA0003651519940000086
Step 1.3: the power supply current effective value calculation link 4 squares, multiplies the frequency by the input signal, integrates, translates the integral value to the right for one period, and subtracts the value after translating for one period and the evolution by the integral value.
The theoretical basis is effective value definition
Figure BDA0003651519940000091
Taking the integral range as a power supply period, tn-tn-1= T =1/f =1/50, whereby the formula (5) becomes
Figure BDA0003651519940000092
After the change is obtained
Figure BDA0003651519940000093
The frequency is 50Hz and the period is 0.02s.
Fig. 7 is a flow chart of threshold comparison of the control method of the novel UPQC of the present invention. Wherein:
step 2.1: a voltage threshold value comparison link 5 compares UxAnd threshold value UminThe comparison is carried out in such a way that,judge UxWhether or not less than UmIf yes, output LUx= "1", otherwise output LUx= 0", L obtainedUxThe result is passed through an AND gate to obtain LU；
Step 2.2: THD threshold value comparison link 6 compares THDxAnd threshold value THDmaxComparing to determine THDxWhether greater than THDmaxIf yes, output LTHDx= "1", otherwise output LTHDx= 0", obtained LTHDxThe result is passed through an AND gate to obtain LTHD；
Step 2.3: current threshold value comparison link 7 will IxAnd a threshold value IminComparing and judging IxWhether or not less than IminIf yes, output LIx= "1", otherwise output LIx= 0", L obtainedIxThe result is passed through an AND gate to obtain LI。
In the above step, the voltage threshold comparison step compares the three input signals with the set voltage thresholds respectively, and the output three signals pass through the and gate. And the THD threshold value comparison link compares the three input signals with the set THD threshold values respectively, and the output three signals pass through an AND gate. And the current threshold comparison link compares the three input signals with the set current thresholds respectively, and the output three signals pass through an AND gate.
Fig. 8 is a switching logic link block diagram of the control method of the novel UPQC of the present invention. Wherein:
step 3.1: first, for L in FIG. 2UMaking a judgment if LUIf the signal is equal to 1, a final signal L = '1' is output, and if not, the next step is carried out;
step 3.2: for L in FIG. 2THDNew type of judgment, if LTHDIf the signal is equal to 1, a final signal L = '1' is output, and if not, the next step is carried out;
step 3.3: for L in FIG. 2INew type of judgment, if LIEqual to "1", the final signal L = "1" is output, otherwise the final signal L = "0" is output.
Therefore, the switching logic link needs to compare the results of the voltage threshold comparison link, the THD threshold comparison link and the current threshold comparison link with "1", respectively, and if one is equal to "1", the output is 1, and if none is equal to "1", the output is 0.
If L =1, the system is considered to have one or more of voltage sag, excessive voltage THD and open circuit problems; if L =0, the system is considered to have no problem. If the system has one or more of voltage drop, excessive voltage THD and disconnection problems, the high-speed switch is disconnected, APF output is stopped, and DVR output is started, and if the system has no problems, the high-speed switch is closed, APF output is started, and DVR output is stopped.
While the invention has been described with reference to specific embodiments, it will be understood by those skilled in the art that the invention is not limited thereto, and may be embodied in other forms without departing from the spirit or essential characteristics thereof. Any modification which does not depart from the functional and structural principles of the present invention is intended to be included within the scope of the claims.

Claims (8)

1. A UPQC topological structure is characterized by comprising an APF part and a DVR part, wherein the APF part comprises a diode clamp type three-level converter, a midpoint grounding type direct current bus and a low-pass filter, the DVR part comprises a three-phase bridge converter, a direct current bus, a low-pass filter and a high-speed switch composed of a bidirectional diode parallel mechanical switch, when the high-speed switch is in a closed state, a power distribution network supplies power to a load, a UPQC is used for filtering current harmonics in a circuit, and when the high-speed switch is in an open state, the UPQC is used for providing electric energy with the same frequency and the same phase as the power grid.
2. A UPQC control method is used together with the UPQC topological structure of claim 1, judges whether a network side has a problem or not by detecting a voltage effective value, a voltage harmonic total distortion rate and a current effective value in a line, further selects a state of a high-speed switch, and switches two parts of the UPQC, and is characterized by comprising the following steps of:
step 1: generating a current compensation signal and a voltage compensation signal, and respectively generating control signals of an APF (active power filter) and a DVR (digital video recorder) according to the current compensation signal and the voltage compensation signal;
and 2, step: respectively calculating a power supply voltage effective value, a power supply voltage harmonic total distortion rate and a line current value;
and step 3: comparing the three values obtained in the step 2 with a set response threshold value, and judging whether relevant problems occur or not;
and 4, step 4: according to the judgment result in the step 3, APF and DVR are selectively switched, if one or more of the problems of voltage drop, overlarge voltage THD and open circuit occur in the system, the high-speed switch is disconnected, APF output is stopped, DVR output is started, and if no problem occurs in the system, the high-speed switch is closed, APF output is started, and DVR output is stopped;
the step 1 comprises the following steps:
step 1.1: detecting line current harmonics by a dq0 method to obtain a current compensation signal;
step 1.2: generating APF control signal g by triangular wave comparison method for the current compensation signal obtained in step 1.1APF；
Step 1.3: tracking the network frequency and phase by a method based on a reactive power theory to generate a voltage compensation signal;
step 1.4: for the voltage compensation signal obtained in 1.3, a DVR control signal g is generated by a triangular wave comparison methodDVR；
The step 2 comprises the following steps:
step 2.1: calculating the effective value of the power voltage, and multiplying the input signal by the square, the low-pass filter, the product of 2 and the square to obtain the effective value U of the power voltagex；
Step 2.2: calculating the total harmonic distortion of the power supply voltage, and respectively calculating the effective values v of the input signalsrmsAverage value vdcAnd Fourier decomposition v1rmsAfter the three are squared, the square of the average value and the square of Fourier decomposition are subtracted from the square of the effective value to obtain a numerical value, and v is obtained after the obtained numerical value is squaredhrmsFinally with vhrmsDivided by v1rmsObtaining the total harmonic distortion rate TH of the power supply voltageDx；
Step 2.3: calculating the line current value, squaring the input signal, multiplying by frequency, integrating, translating the integral value to the right for a period, and subtracting the value after translating for a period and the square from the integral value to obtain the line current value Ix；
The step 3 comprises the following steps:
step 3.1: will UxAnd threshold value UminComparing and judging UxWhether or not less than UmIf yes, output LUx= "1", otherwise output LUx= 0", the obtained 3-way result is passed through an and gate to obtain LU；
Step 3.2: will THDxAnd threshold value THDmaxComparing and judging THDxWhether greater than THDmaxIf yes, output LTHDx= "1", otherwise output LTHDx= 0", the obtained 3-way result is passed through an and gate to obtain LTHD；
Step 3.3: will IxAnd a threshold value IminComparing and judging IxWhether or not less than IminIf yes, output LIx= "1", otherwise output LIx= 0", the obtained 3-way result is passed through an and gate to obtain LI；
In step 4, performing and operation on the 3 result signals in the step 3 to obtain a final judgment result L, and if L =1, considering that one or more of voltage drop, overlarge voltage THD and open circuit problems occur in the system; if L =0, the system is considered to have no problem.
3. The UPQC control method according to claim 2, characterized by: obtaining the angular frequency of the voltage, three-phase current i, by means of a phase-locked loop PLLa,b,cBy obtaining i after abc/dq0 variationdAnd iqThen obtained through a low pass filter LPF
Figure FDA0003651519930000024
And
Figure FDA0003651519930000025
then obtaining a current fundamental wave signal i through dq0/abcaf,bf,cfBy i usinga,b,cMinus iaf,bf,cfA current compensation signal i can be obtainedah,bh,ch。
4. The UPQC control method according to claim 2, characterized by: obtaining angular frequency of voltage, three-phase voltage v by phase-locked loop PLLa,b,cV is obtained after Park transformationdAnd vqThen passes through a low pass filter LPF to obtain
Figure FDA0003651519930000021
And
Figure FDA0003651519930000022
then the A phase voltage positive sequence initial phase angle is obtained by calculation of formula (1)
Figure FDA0003651519930000023
Generating a voltage compensation signal v by PWM modulation wave of formula (2)af,bf,cf，
Figure FDA0003651519930000031
Figure FDA0003651519930000032
Wherein, the first and the second end of the pipe are connected with each other,
Figure FDA0003651519930000033
vcmis the peak value of the carrier wave, UomIs the peak value of the output voltage, UdcIs the dc bus voltage.
5. The UPQC control method according to claim 2, characterized by: the theoretical basis of the calculation of the effective value of the power supply voltage is to assume that the A phase voltage is
Figure FDA0003651519930000034
Squaring two sides and converting by a double angle formula to obtain
Figure FDA0003651519930000035
6. The UPQC control method according to claim 2, characterized in that: the filtering frequency of the low-pass filter is 50-100Hz.
7. The UPQC control method according to claim 2, characterized in that: the theoretical basis for calculating the total distortion rate of the harmonic wave of the power supply voltage is defined as THD
Figure FDA0003651519930000036
Figure FDA0003651519930000037
8. The UPQC control method according to claim 2, characterized by: the theoretical basis for calculating the effective value of the power supply current is defined as the effective value
Figure FDA0003651519930000038
Taking the integral range as a power supply period, tn-tn-1= T =1/f =1/50, whereby the formula (5) becomes
Figure FDA0003651519930000039
After being changed to obtain
Figure FDA00036515199300000310
The frequency is 50Hz and the period is 0.02s.
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