CN115274488B - Silicon carbide bare chip and silicon carbide mask layer etching depth selection ratio prediction method - Google Patents
Silicon carbide bare chip and silicon carbide mask layer etching depth selection ratio prediction method Download PDFInfo
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
Abstract
The invention relates to a method for predicting the etching depth selection ratio of a silicon carbide bare chip and a silicon carbide mask layer in the technical field of semiconductors, which comprises the following steps: acquiring first etching depth change data I of a silicon carbide bare chip and second etching depth change data I of a silicon carbide mask layer at a first etching temperature, and acquiring first etching depth change data II of the silicon carbide bare chip and second etching depth change data II of the silicon carbide mask layer at a second etching temperature; fitting the relation between the etching depth and the etching temperature of the silicon carbide bare chip, and fitting the relation between the etching depth and the etching temperature of the silicon carbide mask layer; based on the relationship between the etching depth of the silicon carbide bare chip and the etching temperature and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature, the etching depths of the silicon carbide bare chip and the silicon carbide mask layer are predicted at different etching temperatures, and the prediction selection ratio is calculated, so that the bottleneck that a worker has a high load in the debugging process of the plasma etching process is broken through.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for predicting the etching depth selection ratio of a silicon carbide bare chip and a silicon carbide mask layer.
Background
Plasma etching is an important process for removing material from the surface of a material. The plasma etch process can be chemically selective, i.e., only one material is removed from the surface without affecting the other materials, or can be anisotropic, i.e., only the material at the bottom of the trench is removed without affecting the same material on the sidewalls.
Because the research of the etching mechanism is the result of integrating chemical etching and physical etching, the single-factor change has larger influence on the etching result, and because the factors influencing the plasma etching process are numerous, in the chip manufacturing process, a large amount of complex process debugging is needed to obtain the ideal required plasma etching selection ratio, and the etching debugging load of workers is greatly increased.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a method for predicting the etching depth selection ratio of a silicon carbide bare chip and a silicon carbide mask layer, and breaks through the bottleneck that the load of workers is higher in the debugging process of the plasma etching process.
In order to solve the technical problem, the invention is solved by the following technical scheme:
a silicon carbide bare chip and silicon carbide mask layer etching depth selection ratio prediction method comprises the following steps:
acquiring first etching depth change data I of a silicon carbide bare chip and second etching depth change data I of a silicon carbide mask layer at a first etching temperature, and
acquiring first etching depth change data II of the silicon carbide bare chip and second etching depth change data II of the silicon carbide mask layer at a second etching temperature;
fitting the relation between the etching depth and the etching temperature of the silicon carbide bare chip, and fitting the relation between the etching depth and the etching temperature of the silicon carbide mask layer;
and predicting the etching depths of the silicon carbide bare chip and the silicon carbide mask layer at different etching temperatures based on the relationship between the etching depth and the etching temperature of the silicon carbide bare chip and the relationship between the etching depth and the etching temperature of the silicon carbide mask layer, and calculating a prediction selection ratio.
Optionally, the obtaining first etching depth change data of the silicon carbide bare chip and second etching depth change data of the silicon carbide mask layer includes the following steps:
measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a first etching temperature at multiple points, and obtaining a first average value of the film thickness of the silicon carbide bare chip and a first average value of the film thickness of the silicon carbide mask at each moment;
and calculating the etching depth of the first silicon carbide bare chip and the etching depth of the first silicon carbide mask at each moment to respectively obtain first etching depth change data I and second etching depth change data I.
Optionally, the obtaining of the second data of the first etching depth change of the silicon carbide bare chip and the second data of the second etching depth change of the silicon carbide mask layer includes the following steps:
measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a second etching temperature at multiple points, and obtaining the film thickness mean value two of the silicon carbide bare chip and the film thickness mean value two of the silicon carbide mask at each moment;
and calculating the etching depth of the second silicon carbide bare chip and the etching depth of the second silicon carbide mask at each moment to respectively obtain first etching depth change data II and second etching depth change data II.
Optionally, the fitting the relationship between the etching depth and the etching temperature of the silicon carbide bare chip includes the following steps:
generating a first function relation between the etching depth of the silicon carbide bare chip and time according to each moment and the corresponding etching depth of the first silicon carbide bare chip;
generating a second function relation between the etching depth of the silicon carbide bare chip and time according to each moment and the corresponding etching depth of the second silicon carbide bare chip;
and adding a temperature model in the first functional relation and the second functional relation according to an energy equation to obtain a functional relation between the etching depth of the silicon carbide bare chip and the etching temperature.
Optionally, the fitting of the relationship between the etching depth and the etching temperature of the silicon carbide mask layer includes the following steps:
generating a third functional relation between the etching depth of the silicon carbide mask and time according to each moment and the corresponding etching depth of the first silicon carbide mask;
generating a fourth functional relation between the etching depth of the silicon carbide mask and time according to each moment and the corresponding etching depth of the second silicon carbide mask;
and adding a temperature model in the third functional relation and the fourth functional relation according to an energy equation to obtain a functional relation between the etching depth of the silicon carbide mask and the etching temperature.
Optionally, the method further includes obtaining an initial silicon carbide bare chip film thickness and an initial silicon carbide mask film thickness of the silicon carbide substrate before etching, and includes the following steps:
and measuring the film thickness value of the silicon carbide bare chip and the film thickness value of the silicon carbide mask layer at multiple points, and calculating the initial film thickness of the silicon carbide bare chip and the initial film thickness of the silicon carbide mask.
Optionally, verifying the accuracy of the predicted selection ratio is further included.
Optionally, verifying the accuracy of the predicted selection ratio includes the following steps:
selecting a third etching temperature to etch the silicon carbide bare chip and the silicon carbide mask layer, and measuring an actual etching selection ratio;
calculating a prediction selection ratio according to the relation between the etching depth and the etching temperature of the silicon carbide bare chip and the relation between the etching depth and the etching temperature of the silicon carbide mask layer;
setting an error threshold, calculating a relative deviation value of the actual etching selection ratio and the predicted selection ratio, and if the relative deviation value is less than or equal to the error threshold, determining that the predicted selection ratio is accurate.
Optionally, when the silicon carbide bare chip and the silicon carbide mask layer are etched, the cavity pressure, the gas flow and the power of the upper electrode are controlled to be unchanged, the power of the lower electrode is controlled to be 0, and only the etching temperature and the etching time are changed.
Optionally, the silicon carbide bare chip and the silicon carbide mask layer are subjected to plasma chemical etching by using a dry etching technology.
Compared with the prior art, the technical scheme provided by the invention has the following beneficial effects:
by obtaining the etching depth change of the silicon carbide bare chip and the silicon carbide mask layer at different etching temperatures, the relation between the etching depth and the etching time of the silicon carbide bare chip and the relation between the etching depth and the etching time of the silicon carbide mask layer are obtained, and temperature fitting is introduced on the basis of pure chemical etching, so that the relation between the etching depth and the etching temperature of the silicon carbide bare chip and the relation between the etching depth and the etching temperature of the silicon carbide mask layer are respectively obtained, a worker only needs to control the etching temperature and the chemical energy change during etching, the required etching depth of the silicon carbide bare chip and the etching depth of the silicon carbide mask layer can be obtained, the worker does not need to spend a large amount of time on repeated measurement and repeated adjustment of the etching depth, and the work load of the worker is reduced.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a flowchart of a method for predicting an etching depth selection ratio between a silicon carbide bare chip and a silicon carbide mask layer according to the first embodiment, and a flowchart of verifying the predicted selection ratio according to the second embodiment.
Detailed Description
The present invention will be described in further detail with reference to examples, which are illustrative of the present invention and are not to be construed as being limited thereto.
Example one
It should be noted that, in this embodiment, the silicon carbide bare chip refers to a silicon carbide film layer on a silicon carbide substrate, where the silicon carbide film layer on the silicon carbide substrate refers to a film of a silicon carbide substance, and the silicon carbide mask layer refers to a film of a silicon oxide or a silicon nitride material, and the silicon carbide mask layer is used as an etching-stop layer for etching the silicon carbide film layer on the silicon carbide substrate.
As shown in fig. 1, a method for predicting the etching depth selectivity ratio of a silicon carbide bare chip and a silicon carbide mask layer includes the following steps: the method comprises the steps of obtaining the initial film thickness of a silicon carbide bare chip and the initial film thickness of a silicon carbide mask of a silicon carbide substrate before etching, specifically, measuring the film thickness value of the silicon carbide bare chip and the film thickness value of the silicon carbide mask layer by adopting multiple points, so as to calculate the initial film thickness of the silicon carbide bare chip and the initial film thickness of the silicon carbide mask layer, further, measuring the silicon carbide bare chip and the silicon carbide mask layer by using equipment for measuring the film thickness, such as a white light interferometer, an ellipsometer or a film thickness meter, in multiple points, and specifically measuring the film thickness values Hi of the multiple points of the silicon carbide bare chip by using film thickness measuring equipment Bare chip Then, the film thickness of the silicon carbide bare chip before etching, namely the film thickness Hb of the initial silicon carbide bare chip is obtained by calculating the average value, wherein the specific average value calculation formula is
Wherein i is the number of the measuring points, i is more than or equal to 1, the initial silicon carbide mask film thickness Hc is calculated in the same way, and the calculation formula is
。
Further, the silicon carbide bare chip and the silicon carbide mask layer are subjected to plasma chemical etching by using a dry etching technology, and when the silicon carbide bare chip and the silicon carbide mask layer are etched, the cavity pressure, the gas flow and the upper electrode power are controlled to be unchanged, the lower electrode power is controlled to be 0, and the etching temperature and the etching time are only changed, wherein the lower electrode power is 0, which indicates that no external force is applied in the etching process, and the etching is pure chemical etching in plasma.
Then, acquiring first etching depth change data I of the silicon carbide bare chip and second etching depth change data I of the silicon carbide mask layer at a first etching temperature based on the initial film thickness of the silicon carbide bare chip and the initial film thickness of the silicon carbide mask, and specifically comprising the following steps: measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a first etching temperature at multiple points, and obtaining a first average value of the film thickness of the silicon carbide bare chip and a first average value of the film thickness of the silicon carbide mask at each moment; and calculating the etching depth of the first silicon carbide bare chip and the etching depth of the first silicon carbide mask at each moment to respectively obtain first etching depth change data I and second etching depth change data I, wherein the first etching depth change data I comprises a plurality of etching times and the etching depths of the silicon carbide bare chips corresponding to the etching times, and the second etching depth change data I comprises a plurality of etching times and the etching depths of the silicon carbide masks corresponding to the etching times.
Specifically, at a first etching temperature T 1 Lower, and T 1 Etching the silicon carbide bare chip and the silicon carbide mask layer at the temperature of more than or equal to-20 ℃, wherein the etching time is more than 1 second, and the etching depths of the silicon carbide bare chip and the silicon carbide mask layer are continuously increased along with the change of the etching time at the moment and at a certain moment t 1 For example, the average film thickness of the SiC bare chips is calculated
And average film thickness of silicon carbide mask
In the same manner as the initial silicon carbide bare chip film thickness and the initial silicon carbide mask film thickness method, i.e.
，
Wherein j is the number of the measuring points, and j is more than or equal to 1, and then the value obtained by calculation at t 1 At time, the first silicon carbide die etch depth D Bare chip And a first silicon carbide mask etch depth D Mask film The calculation formula is as follows:
， 
thus obtaining a signal at T 1 And under the temperature, the change relation data of the etching depth of the silicon carbide bare chip along with the etching time, and the change relation data of the etching depth of the silicon carbide mask layer along with the etching time, namely the first etching depth change data I and the second etching depth change data I.
Similarly, acquiring the second data of the change of the first etching depth of the silicon carbide bare chip and the second data of the change of the second etching depth of the silicon carbide mask layer at the second etching temperature specifically comprises the following steps: measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a second etching temperature at multiple points, and obtaining the film thickness mean value two of the silicon carbide bare chip and the film thickness mean value two of the silicon carbide mask at each moment; and calculating the second etching depth of the second silicon carbide bare chip and the second etching depth of the second silicon carbide mask at each moment to respectively obtain first etching depth change data II and second etching depth change data II, wherein the first etching depth change data II comprises a plurality of etching times and the etching depths of the silicon carbide bare chips corresponding to the etching times, and the second etching depth change data II comprises a plurality of etching times and the etching depths of the silicon carbide masks corresponding to the etching times.
Specifically, at a first etching temperature T 2 Lower, and T 2 ≥-20℃，T 1 And T 2 Unequal, the silicon carbide bare chip and the silicon carbide mask layer are etched for more than 1 second, and the etching depths of the silicon carbide bare chip and the silicon carbide mask layer are continuously increased along with the change of the etching time at the moment and at a certain moment t 2 For example, the average film thickness of the SiC bare chips is calculated
And average film thickness of silicon carbide mask
In the same manner as the initial silicon carbide bare chip film thickness and the initial silicon carbide mask film thickness method, i.e.
，
Then calculated to be at t 2 At time, the second silicon carbide die is etched to a depth D Bare chip And a second silicon carbide mask etch depth D Mask film The calculation formula is as follows:
， 
thus obtaining a signal at T 2 And under the temperature, the change relation data of the etching depth of the silicon carbide bare chip along with the etching time and the change relation data of the etching depth of the silicon carbide mask layer along with the etching time, namely the first etching depth change data II and the second etching depth change data II.
Further, based on the first etching depth change data I and the first etching depth change data II, the relation between the etching depth and the etching temperature of the silicon carbide bare chip is fitted, and based on the second etching depth change data I and the second etching depth change data II, the relation between the etching depth and the etching temperature of the silicon carbide mask layer is fitted, because pure physical etching has energy change, but energy dimensionality for measuring the energy change is quite large, such as the influence of power applied by a lower electrode, the difference of bonding of different materials and the like, the related physical changes are atomic scales and too microscopic, and all influence factors are difficult to sum up, therefore, the embodiment starts from the angle of pure chemical etching, and because chemical etching is equivalent to chemical reaction which is most intuitive and is energy change, and the energy change can be directly reflected through heat absorption and heat release, and therefore, the embodiment fits the relation between the etching depth and the etching temperature of the silicon carbide bare chip through a method of adding a temperature model, the relation between the etching depth and the etching temperature of the silicon carbide mask layer is obtained, and the relation between the etching depth and the etching temperature and the silicon carbide etching temperature is fitted, and the relation between the etching depth and the silicon carbide bare chip is obtained.
Specifically, fitting the relationship between the etching depth and the etching temperature of the silicon carbide mask layer comprises the following steps: generating a third functional relation between the etching depth of the silicon carbide mask and time according to each moment and the corresponding etching depth of the first silicon carbide mask; generating a fourth functional relation between the etching depth of the silicon carbide mask and time according to each moment and the corresponding etching depth of the second silicon carbide mask; and adding a temperature model in the third functional relation and the fourth functional relation according to an energy equation to obtain the functional relation between the etching depth of the silicon carbide mask and the etching temperature.
According to the change relation data of the etching depth of the silicon carbide mask layer along with the etching time at different temperatures, logarithmic processing is carried out, and the obtained three formulas of the function relation are
The four formula of the functional relationship is
Wherein t selects more than 3 time points, a and b are constants, and then the logarithm processing is carried out on the three sides and the logarithm processing is carried out on the four sides of the functional relation to respectively obtain
；
Then, the temperature model is added by adopting an Arrhenius formula in an energy equation, and fitting is carried out to obtain
Wherein A, n is constant, R is the molar gas constant, Q 1 An energy value generated by chemical etching of the silicon carbide mask layer, wherein in the energy equation, the energy in any chemical change follows the Arrhenius formula, and the sufficient condition that the fitting is established is that the etching depth of the silicon carbide bare chip in the relation of the etching time change is satisfied
The requirement is satisfied
。
More specifically, on the premise that the sufficient condition and the necessary condition are satisfied, it can be determined that the functional relation formulas obtained at the two temperatures are the same trend, and the temperature model can be added to the two functional relations to perform fitting processing, so as to obtain the two functional relations
To is that
Derived from
Where k, g, l are constants due to logD Mask film The relationship with logt is linear, from which logD is known Mask film Relationship with temperature T thermodynamics Interim logD Mask film And
is linearly related, so that
And
on the basis of the formula, the temperature model is directly added, and the formula can be directly obtained
Then will be
By log removal processing to obtain
And finishing the fitting of the silicon carbide mask layer.
In another aspect, fitting the relationship between the etching depth and the etching temperature of the silicon carbide bare chip comprises the following steps: generating a first function relation of the etching depth of the silicon carbide bare chip and time according to each moment and the corresponding etching depth of the first silicon carbide bare chip; generating a second function relation of the etching depth of the silicon carbide bare chip and time according to each moment and the corresponding etching depth of the second silicon carbide bare chip; and adding a temperature model in the first functional relation and the second functional relation according to an energy equation to obtain a functional relation between the etching depth of the silicon carbide bare chip and the etching temperature.
According to the change relation data of the etching depth of the silicon carbide bare chip along with the etching time at different temperatures, logarithmic processing is carried out, namely the obtained functional relation has a formula of
The functional relationship is expressed as
Wherein t is selected from more than 3 time points, c and d are constants, and then logarithm is removed from both sides of the first functional relation and the second functional relation to respectively obtain
；
Then, the temperature model is added by adopting an Arrhenius formula in an energy equation, and fitting is carried out to obtain
Wherein B, m is constant, R is the molar gas constant, Q 2 Energy values generated for chemical etching of silicon carbide dies, wherein it is noted that in the energy equation, the energy in any chemical change follows the Arrhenius equation, and the sufficient condition for the fit to be established is the relationship between the etching depth of the silicon carbide die and the etching time
The requirement is satisfied
。
More specifically, on the premise that the sufficient condition and the necessary condition are satisfied, it can be determined that the functional relation formulas obtained at the two temperatures are the same trend, and the temperature model can be added to the two functional relations to perform fitting processing, so as to obtain the two functional relations
To do so
Derived from
Wherein
、
、
Are all constant due to logD Bare chip The relationship with logt is linear, from which logD is known Bare chip Relationship with temperature T thermodynamics Interim logD Bare chip And
is linearly related, so that
And
on the basis of the formula, the temperature model is directly added, and the formula can be directly obtained
Then will be
By log removal processing to obtain
And completing the fitting of the silicon carbide bare chips.
And finally, predicting the etching depths of the silicon carbide bare chip and the silicon carbide mask layer at different etching temperatures based on the relationship between the etching depth of the silicon carbide bare chip and the etching temperature and the relationship between the etching depth of the silicon carbide mask layer and the etching temperature, and calculating the predicted selection ratio.
After the fitting is completed, when workers carry out chemical etching, the etching depths of the silicon carbide bare chip and the silicon carbide mask layer can be predicted through the relational expression obtained through the fitting, and the predicted selection ratio S is obtained through the formula Prediction And the calculation formula of the prediction selection ratio is as follows: s. the Prediction =D Bare chip /D Mask film Therefore, the control of the etching depth of the silicon carbide bare chip and the silicon carbide mask layer can be realized through the control of the etching temperature, the control of adjusting the etching depth of the silicon carbide bare chip and the silicon carbide mask layer through continuous actual measurement by workers is not needed, and the workload of the workers is greatly reduced.
In this embodiment, a chemical etching process is performed on a plurality of 4-inch SiC substrates, so as to ensure that the etching parameters are not changed, the etching time is respectively 2.5min, 5min, 10min, 16.6min, and 25min, and the etching temperatures of the silicon carbide pickling film layer and the silicon carbide bare chip are respectively 10 ℃ and 150 ℃. The data of the etching depth of the silicon carbide pickling film layer at 10 ℃ and 150 ℃ along with the time are obtained as shown in the following table 1, and the data of the etching depth of the silicon carbide bare chip at 10 ℃ and 150 ℃ along with the time are obtained as shown in the following table 2.
Wherein, the relationship of the etching depth of the silicon carbide pickling film layer along with the etching time can be established as follows from table 1: log D at 10 ℃ Mask film =2.01+0.90logt; log D at 150 ℃ Mask film =2.02+0.87logt, and the relationship of the etching depth of the silicon carbide bare chip with the etching time can be established from the table 2 as follows: log D at 10 ℃ Bare chip 1.08logt is 1.85; lo at 150 ℃gD Bare chip =2.07+1.05logt
At this time, the sufficient condition of the change of the etching depth of the silicon carbide pickling film layer with the etching time is
And the requirements are met, so that a relational expression among the etching depth, the etching temperature and the energy value of the silicon carbide pickling film layer after temperature fitting can be obtained:
and satisfy the necessary conditions
It is also found that the sufficient condition of the variation of the etching depth of the silicon carbide bare chip with the etching time is
And the requirements are met, so that a relational expression among the etching depth, the etching temperature and the energy value of the silicon carbide bare chip after temperature fitting can be obtained:
and satisfy the necessary conditions
。
Then the predicted etching selection ratio is calculated as follows:
therefore, the control of the etching depth of the silicon carbide bare chip and the silicon carbide mask layer in pure chemical etching can be realized by controlling the etching temperature.
TABLE 1
TABLE 2
Example two
As shown in fig. 1, a method for predicting the etching depth selection ratio of a silicon carbide bare chip and a silicon carbide mask layer further includes verifying the accuracy of the predicted selection ratio, and specifically includes the following steps: selecting a third etching temperature to etch the silicon carbide bare chip and the silicon carbide mask layer, and measuring an actual etching selection ratio; calculating a prediction selection ratio according to the relation between the etching depth and the etching temperature of the silicon carbide bare chip and the relation between the etching depth and the etching temperature of the silicon carbide mask layer; and setting an error threshold, calculating a relative deviation value of the actual etching selection ratio and the predicted selection ratio, and if the relative deviation value is less than or equal to the error threshold, determining that the predicted selection ratio is accurate.
After the predicted selection ratio is obtained by the method in the first embodiment, the accuracy verification can be carried out on the predicted selection ratio, and the etching temperature T can be selectively verified according to the judgment basis 3 And T is 3 At T 1 And T 2 Between, etching time t 3 The silicon carbide bare chip etching depth and the silicon carbide mask etching depth are obtained through calculation by the same multipoint measurement method as the first embodiment, and then the actual selection ratio S is obtained through calculation by the selection ratio calculation formula In fact Is then obtained at T 3 Temperature and etching time t 3 Lower prediction selection ratio S Prediction Setting the error threshold value to 20%, calculating a relative deviation value, and determining whether the relative deviation value is less than or equal to 20%, wherein if the relative deviation value is less than or equal to 20%, the predicted selection ratio obtained by the method of the first embodiment is reliable, otherwise, the predicted selection ratio is unreliable, and the calculation formula of the relative deviation value is as follows:
thereby realizing the reliability verification of the prediction selection ratio.
In this embodiment, taking the experimental data in the first embodiment as an example, when the reliability of the predicted selectivity in the first embodiment is verified, it can be obtained that when the third etching temperature is 100 ℃ and the etching time is 5min, the etching depth of the silicon carbide mask layer obtained by the experiment is 361nm,the etching depth of the silicon carbide bare chip is 520nm, and S can be obtained Practice of Is 1.44, calculate S Prediction Is 1.29, and then the relative deviation value = is obtained
Namely, the predicted selection ratio is accurate and reliable, the etching time can be adjusted to obtain the same result, when the third etching temperature is 100 ℃ and the etching time is 16.6min, the etching depth of the silicon carbide mask layer is 1011nm and the etching depth of the silicon carbide bare chip is 1522nm through experiments, and S can be obtained Practice of Is 1.50, calculate S Prediction Is 1.58, and then the relative deviation value =is obtained
The accuracy of the resulting predicted selection ratio was also verified.
It will be understood by those skilled in the art that all or part of the processes of the above-described embodiments may be implemented by computer programs instructing associated hardware, and the above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention in any form or nature. Those skilled in the art can make various changes, modifications and equivalent arrangements, which are equivalent to the embodiments of the present invention, without departing from the spirit and scope of the present invention, and which may be made by utilizing the techniques disclosed above; meanwhile, any equivalent changes, modifications and evolutions of the above embodiments according to the essential technology of the present invention are still within the scope of the technical solution of the present invention.
Claims (8)
1. A silicon carbide bare chip and silicon carbide mask layer etching depth selection ratio prediction method is characterized by comprising the following steps:
ensuring other etching parameters to be unchanged, and acquiring first etching depth change data I of the silicon carbide bare chip and second etching depth change data I of the silicon carbide mask layer at a first etching temperature, wherein the first etching depth change data I is data of the etching depth of the silicon carbide bare chip changing along with etching time, and the second etching depth change data I is data of the etching depth of the silicon carbide mask layer changing along with etching time, and
ensuring other etching parameters to be unchanged, and acquiring first etching depth change data II of the silicon carbide bare chip and second etching depth change data II of the silicon carbide mask layer at a second etching temperature, wherein the first etching depth change data II is data of the etching depth of the silicon carbide bare chip changing along with etching time, and the second etching depth change data II is data of the etching depth of the silicon carbide mask layer changing along with etching time;
fitting the relation between the etching depth and the etching temperature of the silicon carbide bare chip specifically comprises the following steps:
generating a silicon carbide die etch depth as a function of time from the first etch depth variation data:
wherein, in the process,
is the first etching temperature T 1 The etching depth of the lower silicon carbide bare chip is one, t is more than 3 time points, and c and d are constants;
generating a second function relation of the etching depth of the silicon carbide bare chip and time according to the second first etching depth change data:
wherein, in the step (A),
is the second etching temperature T 2 The etching depth of the lower silicon carbide bare chip is two, t is more than 3 time points, and c and d are constants;
according to the Arrhenius formula in the energy equation, the function relationship is IAnd adding a temperature model in the second functional relation to obtain the functional relation between the etching depth and the etching temperature of the silicon carbide bare chip:
wherein B, m is constant, R is the molar gas constant, Q 2 The energy value generated by the chemical etching of the silicon carbide bare chip and the sufficient condition that the functional relation between the etching depth and the etching temperature of the silicon carbide bare chip is established are
The essential condition is that
；
Fitting the relation between the etching depth and the etching temperature of the silicon carbide mask layer, and specifically comprising the following steps:
generating a third function relation of the etching depth of the silicon carbide mask and time according to the second etching depth change data:
wherein, in the step (A),
is the first etching temperature T 1 Etching depth I of the lower silicon carbide mask, t is more than 3 selected time points, and a and b are constants;
generating a fourth functional relation between the etching depth of the silicon carbide mask and time according to the second etching depth change data:
wherein, in the process,
is the second etching temperature T 2 Etching depth of the lower silicon carbide mask is two, t is more than 3 selected time points, and a and b are constants;
according toAdding a temperature model in the third functional relation and the fourth functional relation to an Arrhenius formula in an energy equation to obtain a functional relation between the etching depth of the silicon carbide mask and the etching temperature:
wherein A, n is constant, R is the molar gas constant, Q 1 The method comprises the steps of generating an energy value for chemical etching of a silicon carbide mask layer, wherein a sufficient condition that the functional relation between the etching depth of the silicon carbide mask and the etching temperature is established is that
With the proviso that
；
Predicting the etching depths of the silicon carbide bare chip and the silicon carbide mask layer at different etching temperatures based on the relationship between the etching depth and the etching temperature of the silicon carbide bare chip and the relationship between the etching depth and the etching temperature of the silicon carbide mask layer, and calculating a prediction selection ratio;
the silicon carbide bare chip is a silicon carbide film layer on a silicon carbide substrate, the silicon carbide mask layer is a film layer of silicon oxide and silicon nitride materials, and the silicon carbide mask layer is used for blocking the silicon carbide film layer on the silicon carbide substrate from etching during an etching process.
2. The method of claim 1, wherein the step of obtaining first etching depth variation data one of the silicon carbide bare chip and second etching depth variation data one of the silicon carbide mask layer comprises the steps of:
measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a first etching temperature at multiple points, and obtaining a first average value of the film thickness of the silicon carbide bare chip and a first average value of the film thickness of the silicon carbide mask at each moment;
and calculating the first etching depth of the silicon carbide bare chip and the first etching depth of the silicon carbide mask at each moment to respectively obtain first etching depth change data I and second etching depth change data I.
3. The method of claim 2, wherein obtaining the second data of the first etching depth variation of the silicon carbide bare chip and the second data of the second etching depth variation of the silicon carbide mask layer comprises the steps of:
measuring the film thickness of the silicon carbide bare chip and the film thickness of the silicon carbide mask layer at each moment at a second etching temperature at multiple points, and obtaining a second film thickness average value of the silicon carbide bare chip and a second film thickness average value of the silicon carbide mask at each moment;
and calculating the second etching depth of the silicon carbide bare chip and the second etching depth of the silicon carbide mask at each moment to respectively obtain second first etching depth change data and second etching depth change data.
4. The method of predicting the etching depth selection ratio of the silicon carbide bare chip to the silicon carbide mask layer according to claim 1, further comprising obtaining an initial silicon carbide bare chip film thickness and an initial silicon carbide mask film thickness of the silicon carbide substrate before etching, comprising the steps of:
and measuring the film thickness value of the silicon carbide bare chip and the film thickness value of the silicon carbide mask layer at multiple points, and calculating the initial film thickness of the silicon carbide bare chip and the initial film thickness of the silicon carbide mask.
5. The method of claim 1, further comprising verifying an accuracy of the predicted selectivity ratio.
6. The method of claim 5, wherein verifying the accuracy of the predicted selectivity comprises:
selecting a third etching temperature to etch the silicon carbide bare chip and the silicon carbide mask layerEtching is performed, and an actual etching selection ratio S is measured Practice of ；
Calculating and predicting selection ratio S according to the relation between the etching depth and the etching temperature of the silicon carbide bare chip and the relation between the etching depth and the etching temperature of the silicon carbide mask layer Prediction ；
Setting an error threshold, calculating a relative deviation value of the actual etching selection ratio and the predicted selection ratio, and if the relative deviation value is less than or equal to the error threshold, determining that the predicted selection ratio is accurate, wherein the calculation formula of the relative deviation value is as follows: relative deviation value =
。
7. The method of any one of claims 1 to 6, wherein during etching of the silicon carbide bare chip and the silicon carbide mask layer, the chamber pressure, the gas type, the gas flow and the power of the upper electrode are controlled to be unchanged, the power of the lower electrode is controlled to be 0, and only the etching temperature and the etching time are changed.
8. The method of any one of claims 1 to 6, wherein the silicon carbide bare chip and the silicon carbide mask layer are subjected to plasma chemical etching by using a dry etching technique.
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