CN115269169A - Memory recovery method and electronic equipment - Google Patents

Memory recovery method and electronic equipment Download PDF

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Publication number
CN115269169A
CN115269169A CN202110481547.8A CN202110481547A CN115269169A CN 115269169 A CN115269169 A CN 115269169A CN 202110481547 A CN202110481547 A CN 202110481547A CN 115269169 A CN115269169 A CN 115269169A
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application
current
recovery rate
processed
memory
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俞熠
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN202110481547.8A priority Critical patent/CN115269169A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5016Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5011Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
    • G06F9/5022Mechanisms to release resources

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  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

The application provides a memory recovery method and electronic equipment, the method is applied to the electronic equipment comprising a processor, memory equipment and switching equipment, the application run by the processor comprises an application to be processed, and the method comprises the following steps: determining the current background activity of the application to be processed according to the swap-in rate of the application to be processed and a first mapping relation, wherein the swap-in rate is the percentage of the number of anonymous pages corresponding to the application to be processed in the switching equipment swapped into the memory equipment to the total number of the anonymous pages corresponding to the application to be processed, and the first mapping relation comprises the corresponding relation between a plurality of swap-in rates and a plurality of background activities; updating a current recovery rate threshold of the application to be processed according to the activity of the current background, wherein the recovery rate is the percentage of the anonymous pages corresponding to the application to be processed in the exchange equipment in the total number of the anonymous pages corresponding to the application to be processed; and according to the updated current recovery rate threshold value, performing memory recovery on the application to be processed. And further reducing the waste of memory recovery and reducing the overhead of memory recovery.

Description

Memory recovery method and electronic equipment
Technical Field
The present application relates to the field of electronic devices, and in particular, to a method for recycling a memory and an electronic device.
Background
As the usage rate of the electronic device by the user is higher, the number of applications installed on the electronic device by the user is also higher. With the development of data analysis technology and electronic equipment technology, the activity of the application of the electronic equipment in the background is obviously different. In the process of memory recovery, due to the different activity of each application, an active background application can be pulled up again within a short time after a large amount of memory is recovered, so that anonymous pages which are just recovered are returned to the memory again, and recovery waste is caused; inactive applications can reclaim almost all anonymous pages, freeing up a large amount of free memory for the system.
In order to balance the memory recovery of the active application and the inactive application, when the system memory is insufficient, the memory recovery of each application can be performed based on a weighted average recovery strategy, that is, the memory size of each application is used as a weight to calculate the recovery amount of each application, and the memory recovery of each application is performed according to the recovery amount of each application. Because the activity of each application is different, if memory recovery is performed on each application based on the weighted average recovery policy, "over-recovery" of the active application and "under-recovery" of the inactive application may be caused.
Disclosure of Invention
The application provides a memory recovery method and electronic equipment, and the method can dynamically adjust a current recovery rate threshold of an application to be processed according to the current background activity of the application to be processed running by the electronic equipment, so that the waste of memory recovery is reduced, and the memory recovery overhead is reduced.
In a first aspect, a method for memory reclamation is provided, where the method is applied to an electronic device including a processor, a memory device, and a switching device, an application run by the processor includes an application to be processed, and the method includes: determining the current background activity of the application to be processed according to a swap-in rate of the application to be processed and a first mapping relation, wherein the swap-in rate is the percentage of the number of anonymous pages corresponding to the application to be processed in a swap device swapped into a memory device in the total number of anonymous pages corresponding to the application to be processed, and the first mapping relation comprises the corresponding relation between a plurality of swap-in rates and a plurality of background activities; updating the current recovery rate threshold of the application to be processed according to the current background liveness, wherein the recovery rate is the percentage of the anonymous pages corresponding to the application to be processed in the exchange equipment in the total number of the anonymous pages corresponding to the application to be processed; and according to the updated current recovery rate threshold, performing memory recovery on the application to be processed.
The current background activity of the application to be processed is determined based on the swap-in rate of the application to be processed and the first mapping relation, and the current recovery rate threshold of the application to be processed is dynamically adjusted based on the current background activity of the application to be processed, so that the waste of memory recovery can be reduced, and the cost of memory recovery is reduced.
With reference to the first aspect, in certain implementations of the first aspect, the updating the current reclamation threshold for the pending application according to the current background activity includes: determining historical background activity of the application to be processed; and updating the current recovery rate threshold of the application to be processed according to the current background activity and the historical background activity.
For example, the historical background activity of the to-be-processed application may be the background activity of the last memory reclamation of the to-be-processed application.
Illustratively, the historical background activity of the pending application may be an initial background activity of the pending application.
In some embodiments, the initial background activity corresponding to the application to be processed may be configured by a large amount of historical swap-in rate data corresponding to the application to be processed.
And dynamically adjusting the current recovery rate threshold of the application to be processed according to the historical background activity and the current background activity, so that the waste of memory recovery can be reduced, and the memory recovery overhead can be reduced.
With reference to the first aspect, in certain implementations of the first aspect, the updating the current reclamation threshold of the pending application according to the current background activity and the historical background activity includes: determining that the current background liveness is greater than the historical background liveness; and determining a first recovery rate threshold as the updated current recovery rate threshold, wherein the first recovery rate threshold is smaller than the current recovery rate threshold.
The recovery rate threshold value can be understood as an upper limit value of the recovery rate.
Wherein the current threshold recovery rate may be understood as a historical threshold recovery rate of the pending application.
For example, the historical recovery rate threshold of the pending application may be a recovery rate threshold of the pending application for performing memory recovery last time.
Illustratively, the historical recovery threshold for the pending application may be an initial recovery threshold for the pending application.
Illustratively, the current reclamation threshold for the pending application is related to the historical background activity of the pending application. For example, in the second mapping relationship, the recovery rate threshold corresponding to the historical background activity of the application to be processed is the current recovery rate threshold of the application to be processed.
When the activity of the current background is greater than the activity of the historical background, namely the activity of the application to be processed is increased, the current recovery rate threshold of the application to be processed is adjusted downwards, so that the phenomenon of 'over recovery' of the application to be processed can be inhibited, the waste of memory recovery is reduced, and the cost of memory recovery is reduced.
With reference to the first aspect, in certain implementations of the first aspect, the updating the current reclamation threshold of the pending application according to the current background activity and the historical background activity includes: determining that the current background liveness is less than the historical background liveness; determining a current recovery rate of the application to be processed, wherein the current recovery rate is a percentage of the number of the anonymous pages in the exchange device to the total number of the anonymous pages; determining that the current recovery rate is greater than or equal to the current recovery rate threshold; determining a second threshold recovery rate as the updated current threshold recovery rate, the second threshold recovery rate being greater than the current threshold recovery rate.
When the activity of the current background is smaller than the activity of the historical background, namely the activity of the application to be processed is reduced, and the current recovery rate of the application to be processed is greater than or equal to the current recovery rate threshold, the current recovery rate threshold of the application to be processed is adjusted upwards, so that the phenomenon of 'under recovery' of the application to be processed can be inhibited, and the memory recovery strength of the application to be processed is increased.
With reference to the first aspect, in certain implementations of the first aspect, the memory control subsystem corresponding to the to-be-processed application includes an anonymous page statistics field, and the determining the current recovery rate of the to-be-processed application includes: and determining the current recovery rate according to the anonymous page statistical field.
The anonymous page statistical field is set in the memory control subsystem corresponding to the application to be processed, and the current recovery rate of the application to be processed is determined according to the anonymous page statistical field, so that the process of recovering the memory of the application to be processed is simplified, and the efficiency of recovering the memory of the application to be processed is improved.
With reference to the first aspect, in certain implementations of the first aspect, the background activity and the recovery threshold are in a negative correlation.
If the background activity of the application is higher, the recovery rate threshold of the application is lower, so that the phenomenon of 'over recovery' of the application can be inhibited, the waste of memory recovery is reduced, and the expenditure of memory recovery is reduced.
If the background activity of the application is lower, the higher the recovery rate threshold of the application is, so that the phenomenon of 'under recovery' of the application can be inhibited, and the memory recovery strength of the application to be processed is increased.
With reference to the first aspect, in certain implementations of the first aspect, the background activity and the swap-in rate are in a positive correlation.
The background activeness of the application to be processed is represented through the swap-in rate of the application to be processed, and the application to be processed with a large swap-in rate can be marked as the active application to be processed, so that the current recovery rate threshold of the application to be processed is dynamically adjusted from the actual situation of the application to be processed, the waste of memory recovery can be reduced, and the cost of memory recovery is reduced.
With reference to the first aspect, in certain implementation manners of the first aspect, the memory control subsystem corresponding to the application to be processed includes a swap-in amount statistics field, and the method further includes: and determining the swap-in rate according to the swap-in amount statistic field.
The swap-in rate of the application to be processed is determined by setting the swap-in amount statistical field in the memory control subsystem corresponding to the application to be processed, so that the process of memory recovery of the application to be processed is simplified, and the efficiency of memory recovery of the application to be processed is improved.
In a second aspect, an electronic device is provided, where the electronic device includes a processing unit, a memory device, and a switching device, an application run by the processing unit includes an application to be processed, and the processing unit is configured to: determining the current background activity of the application to be processed according to a swap-in rate of the application to be processed and a first mapping relation, wherein the swap-in rate is the percentage of the number of anonymous pages corresponding to the application to be processed in a swap device swapped into a memory device in the total number of anonymous pages corresponding to the application to be processed, and the first mapping relation comprises the corresponding relation between a plurality of swap-in rates and a plurality of background activities; updating the current recovery rate threshold of the application to be processed according to the current background liveness, wherein the recovery rate is the percentage of the anonymous pages corresponding to the application to be processed in the exchange equipment in the total number of the anonymous pages corresponding to the application to be processed; and according to the updated current recovery rate threshold value, performing memory recovery on the application to be processed.
The processing unit of the electronic device can determine the current background activity of the application to be processed based on the swap-in rate of the application to be processed and the first mapping relation, and dynamically adjust the current recovery rate threshold of the application to be processed based on the current background activity of the application to be processed, so that the waste of memory recovery of the electronic device can be reduced, and the cost of memory recovery of the electronic device can be reduced.
With reference to the second aspect, in some implementations of the second aspect, the processing unit is specifically configured to: determining historical background activity of the application to be processed; and updating the current recovery rate threshold of the application to be processed according to the current background activity and the historical background activity.
With reference to the second aspect, in some implementations of the second aspect, the processing unit is further specifically configured to: determining that the current background liveness is greater than the historical background liveness; determining a first recovery rate threshold as the updated current recovery rate threshold, wherein the first recovery rate threshold is smaller than the current recovery rate threshold.
With reference to the second aspect, in some implementations of the second aspect, the processing unit is further specifically configured to: determining that the current background liveness is less than the historical background liveness; determining a current recovery rate of the application to be processed, the current recovery rate being a percentage of a number of anonymous pages in the exchange device to a total number of total anonymous pages; determining that the current recovery rate is greater than or equal to the current recovery rate threshold; determining a second recovery rate threshold as the updated current recovery rate threshold, the second recovery rate threshold being greater than the current recovery rate threshold.
With reference to the second aspect, in certain implementations of the second aspect, the processing unit is further specifically configured to: and determining the current recovery rate according to the anonymous page statistical field.
With reference to the second aspect, in certain implementations of the second aspect, the background activity and the recovery threshold are in a negative correlation.
With reference to the second aspect, in certain implementations of the second aspect, the background liveness and the swap-in rate are in a positive correlation.
With reference to the second aspect, in some implementations of the second aspect, the processing unit is further specifically configured to: and determining the swap-in rate according to the swap-in amount statistic field.
In a third aspect, an electronic device is provided, including: one or more processors; a memory; a memory device and a switching device; a module installed with a plurality of applications; and one or more programs, wherein the one or more programs are stored in the memory, which when executed by the processor, cause the electronic device to perform the method of memory reclamation of the first aspect and any of its certain implementations.
It should be understood that a program may also be referred to as program code, computer instructions, a computer program, program instructions, or the like.
In a fourth aspect, there is provided an electronic system comprising: a memory device, a switching device, a processor and an interface, the processor storing one or more programs that, when executed by the processor, cause the electronic system to perform the method of memory reclamation as described in the first aspect and in any one of certain implementations of the first aspect.
In a fifth aspect, a computer-readable storage medium is provided, which includes computer instructions that, when executed on an electronic device, cause the electronic device to perform the method for memory reclamation described in the first aspect and any one of certain implementations of the first aspect.
In a sixth aspect, a chip system is provided, which includes at least one processor and an interface circuit, where the interface circuit is configured to provide program instructions or data for the at least one processor, and the at least one processor is configured to execute the program instructions to implement the method for memory reclamation described in any one of the first aspect and the certain implementations of the first aspect.
Optionally, as an implementation manner, the chip system may further include a memory, where the memory stores a program, and the processor is configured to execute the program stored in the memory, and when the program is executed, the processor is configured to execute the method for memory reclamation described in any one of the first aspect and some implementation manners of the first aspect.
In a seventh aspect, a computer program product is provided, the computer program product comprising a computer program that, when executed by a computer, performs the method for memory reclamation of the first aspect and any one of the certain implementations of the first aspect.
Drawings
Fig. 1 is a schematic structural diagram of an electronic system according to an embodiment of the present disclosure.
Fig. 2 is a schematic structural diagram of a RAM provided in an embodiment of the present application.
Fig. 3 is a schematic flowchart of an example of a method for memory reclamation according to an embodiment of the present application.
Fig. 4 is an exemplary flowchart illustrating swapping of an anonymous page in a swap device into a memory device according to an embodiment of the present disclosure.
Fig. 5 is an exemplary flowchart illustrating swapping out an anonymous page in a memory device to a swap device according to an embodiment of the present disclosure.
Fig. 6 is a schematic flowchart of an example of a method for performing memory reclamation on n applications according to an embodiment of the present application.
FIG. 7 is a graph showing a set of ratios of feed rate to recovery rate provided by an example of the present application.
Fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The technical solution in the present application will be described below with reference to the accompanying drawings.
The terminology used in the following examples is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification of this application and the appended claims, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, such as "one or more", unless the context clearly indicates otherwise. It should also be understood that in the following embodiments of the present application, "at least one", "one or more" means one, two or more. The term "and/or" is used to describe an association relationship that associates objects, meaning that three relationships may exist; for example, a and/or B, may represent: a exists singly, A and B exist simultaneously, and B exists singly, wherein A and B can be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.
An electronic system to which the technical solution of the embodiment of the present application can be applied is described below with reference to fig. 1.
For example, fig. 1 is a schematic structural diagram of an electronic system 100 according to an embodiment of the present disclosure, and as shown in fig. 1, the electronic system 100 may include a processor 10, a memory device 20, and a switch device 30.
The processor 10 is illustratively a control center or core component of the electronic system 100, and may also be a control center of an electronic device that contains the electronic system. Alternatively, the processor 10 may connect various portions of the entire electronic device using various interfaces and lines, perform various functions of the electronic device and process data by running or executing software programs and/or modules stored in the memory, and calling up data stored in the memory, thereby monitoring the electronic device as a whole. In the present application, the processor 10 may control the data processing processes, such as a page exchange process and a data reading and writing process.
Alternatively, the processor 10 may correspond to a Central Processing Unit (CPU) of the electronic device, and the processor 10 may include one or more processing units. The processor 10 may optionally include an operator and a controller for fetching instructions and processing data. It is specifically applicable to control of instruction execution sequence, operation control, timing control, arithmetic operation and logical operation of data, or processing of other information.
The memory device 20 is the most common system memory and may also be referred to as "memory" or "system memory". The memory device 20 may hold the data for a short time. To retain data, the memory device 20 may use a capacitive charge for storage, so must be refreshed once at intervals. In addition, if the electronic device is powered off, the data stored in the memory device 20 is lost.
Optionally, the memory device 20 includes a memory manager therein, and the memory manager stores a memory index table, where the memory index table is used to indicate a partitioning management principle of the memory device 20. The memory index table may include the page table described above, and is used to indicate the mapping relationship between the virtual page and the physical page and the file of the hard disk storage device.
Illustratively, the memory device 20 may be a Dynamic Random Access Memory (DRAM), taking a mobile phone as an example.
The switching device 30 is also called a "switching area" and stores processes, data, and the like that are swapped out from the memory device 20. Under the scheduling principle of the processor 10, a part of the process or data in the memory device 20 may be migrated to the switching device 30, thereby freeing up the memory device 20 space, which is referred to as a "swap-out process". Similarly, under the scheduling principle of the processor 10, part of the processes or data of the switching device 30 is migrated to the memory device 20, which is called "swap-in process".
It should be understood that the switching device 30 may be a storage device separate from the memory device 20 or may be a switching region formed as part of the memory device 20.
For example, in the case of a mobile phone, when the memory device 20 is a DRAM, the switching device 30 may be a region in the DRAM; alternatively, the switching device may be a separate storage device, such as a flash memory (NAND) or the like. When page exchange is carried out, partial pages can be compressed and then placed in a mobile phone memory through the zRAM technology introduced above; when the user needs to use the swapped-out page, the system generates a page missing exception and requests to decompress the compressed page back to the memory.
Alternatively, taking a Personal Computer (PC) as an example, the switching device 30 is an external storage device independent of the memory device 20. When page swapping is performed, partial pages may be swapped out to the PC's external storage device. When the user needs to use the swapped out page, the system generates a page missing exception and requests to swap the swapped out page into the memory again, which is not limited in the present application.
For example, when the user switches the application a to the foreground and switches the application B to the background, the processor 10 may write the relevant process or data of the application a into the memory device 20, and migrate the relevant process or data of the application B in the memory device 20 to the switching device 30. When the user runs the application B again, the processor 10 may migrate the process or data related to the application B in the switching device 30 to the memory device 20 again.
In addition, it should be understood that electronic system 100 may also include one or more of a variety of different interfaces or lines, which may include internal interfaces or external interfaces, which may include a system bus, a memory bus, an input/output (I/O) bus, or the like, that may be used to connect the various modules of the electronic system. Fig. 1 is a schematic diagram of an electronic system, and for simplicity, no interfaces or lines are shown in fig. 1.
It should also be understood that electronic system 100 may also employ different interface connection manners or a combination of interface connection manners, and the type and connection manner of the interface are not limited in the embodiments of the present application.
It should also be understood that the illustrated structure of the embodiments of the present application does not constitute a specific limitation to the electronic system 100. In other embodiments of the present application, electronic system 100 may include more or fewer components than shown, or some components may be combined, some components may be split, or a different arrangement of components may be used. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
Alternatively, the electronic device including the electronic system 100 may be a mobile phone, a tablet computer, a wearable device, an in-vehicle device, an Augmented Reality (AR)/Virtual Reality (VR) device, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a Personal Digital Assistant (PDA), or the like. Exemplary embodiments of the electronic device include, but are not limited to, a mount
Figure BDA0003048707810000061
Or other operating system. The embodiment of the application does not set any limit to the specific type of the electronic device.
It should be understood that for the electronic devices listed above, further components may be included in addition to the electronic system 100 described above. For example, the electronic device may further include one or more of a charging management module, a power management module, a battery, an antenna, a mobile communication module, a wireless communication module, an audio module, a speaker, a receiver, a microphone, an earphone interface, a sensor module, a button, a motor, an indicator, a camera, a display screen, and a Subscriber Identity Module (SIM) card interface. The sensor module may include a pressure sensor, a gyroscope sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, a bone conduction sensor, and the like. The embodiment of the present application does not set any limit to the number and kinds of components included in the electronic device.
For ease of understanding, the following description is provided to concepts related to memory management mechanisms of an electronic system that may be involved in embodiments of the present application.
1. Page
In memory management, a page is the smallest unit of address space, typically a page of 4 Kilobytes (KB) or 64KB.
2. Logical memory and logical address space, physical memory and physical address space
The memory space of a process is only virtual memory, i.e., "logical memory," and what is needed for the running of a program is real physical memory, i.e., random Access Memory (RAM). If necessary, the operating system can map the logical memory applied in the program running to the RAM, so that the process can use the physical memory.
The memory space of the logical memory is called "logical address space", and the logical address space may be divided into a plurality of Virtual Pages (VPs) with fixed size, and the size of the virtual page may be 4 Kilobytes (KB). The memory space of the physical memory is called "physical address space", and the physical address space can be divided into a plurality of Physical Pages (PP) with fixed size, and the size of the physical page can be 4KB.
The virtual pages are mapped to the file of the hard disk storage device and then cached to the physical pages. For processes, logical addresses are used, and each process maintains a separate page table. The page table has a structure of a group, and stores state information of each virtual page, for example, whether each virtual page is mapped or cached.
3. Virtual memory compression (zRAM) techniques
The zRAM technology can provide a swap space for a system by paging on a system memory (RAM) instead of a hard disk storage device, and better utilize the system memory until the swap space of the hard disk storage device must be used, so as to avoid paging on the hard disk storage device, thereby improving performance.
Specifically, an area is allocated from a system memory (RAM) to be used as a swap area, and if the system memory space is insufficient, memory data occupied by an application program is compressed and then copied to the swap area. When the application program needs to be switched back, the compressed data of the application program can be directly restored to the memory, and the time required for restarting the application program is saved. Moreover, after the data in the exchange area is compressed, more data of different application programs can be stored, and the size of a system memory (RAM) is changed and expanded.
4. Process execution procedure
When a process is executed and needs to access a value stored in a logical address, a system first finds a Virtual Page (VP) where the logical address is located, and finds a Physical Page (PP) corresponding to the Virtual Page (VP) in a page table according to the page table.
And if the page fault exception occurs, calling a page fault exception handling program of the kernel. For example, the anonymous page that is missing is cached from the switching device 30 as shown in FIG. 1 to the memory device 20 as shown in FIG. 2.
5. Page exchange procedure
In order to relieve the memory pressure of the terminal device, during the use of the application, the system may recycle the partial pages to other spaces based on a page swapping technique, for example, a process heap, a stack, a data segment, a page used by a shared memory (shmem) mapping, and the like. Wherein, the page is the minimum unit of the address space in the memory management process.
In the page swapping process, it is generally implemented based on a least used (LRU) linked list. Specifically, a system kernel maintains an active linked list (active anon list) and an inactive linked list (inactive anon list), and pages judged to be cold by a kernel algorithm are changed from the active linked list (active anon list) to the inactive linked list (inactive anon list); when the system performs memory recovery, pages in an inactive chain list (inactive anon list) are sequentially swapped out of the memory until memory requirements are met. The swapped out pages are swapped into memory again when used by the user.
Currently, an operating system of an electronic device may create a memcg for each application program through a memory group (memory cg) mechanism for memory management. I.e. one memcg per application, comprising an LRU linked list. All anonymous pages corresponding to the memcg can be found through the LRU linked list corresponding to the memcg.
For example, fig. 2 is a schematic structural diagram of a RAM provided in an embodiment of the present application.
As shown in fig. 2, the RAM may store anonymous pages (Anon), free memory (Free), file pages (File), and slab cache, among others. Wherein the stored anonymous page may comprise a plurality of memcgs. One memcg corresponds to an anonymous page of an application. Each memcg includes an LRU linked list.
With the development of data analysis technology and electronic device technology, the activity of the application program of the electronic device in the background is obviously different, wherein the activity of the application program in the background can be used for identifying the activity of the application program in the background. In the process of memory recovery, because the activity of each application program is different, the active background application program can be pulled up again within a short time after a large amount of memory is recovered, so that anonymous pages which are just recovered are returned to the memory again, and recovery waste is caused; inactive applications can reclaim almost all anonymous pages, freeing up a large amount of free memory for the system.
For example, to balance memory reclamation of active and inactive applications, when the system memory is insufficient, memory reclamation may be performed for each memcg based on a weighted average reclamation policy, that is, the memory size of each memcg is used as a weight to calculate a reclamation amount for each memcg, and memory reclamation is performed for each memcg according to the reclamation amount for each memcg. Because the activity of each application program is different, if memory recovery is performed on each application program based on the weighted average recovery policy, over recovery of the active application program and under recovery of the inactive application program are caused.
Therefore, the present embodiment provides a method 200 for memory reclamation, where the method 200 may be applied to the electronic system 100 as described in fig. 1, and the method can dynamically adjust the current reclamation threshold of the to-be-processed application according to the current background activity of the to-be-processed application running on the processor 10 of the electronic system 100, so as to reduce the waste of memory reclamation and reduce the overhead of memory reclamation.
Hereinafter, the method for memory reclamation according to the embodiment of the present application will be described in detail with reference to fig. 3 to 6.
For example, fig. 3 is a schematic flow chart of a method 200 for memory reclamation according to an embodiment of the present application. The method 200 comprises:
s210, determining a swap-in rate (wppin _ ratio) of the application to be processed.
The swap-in rate is a percentage of the number of the anonymous pages corresponding to the application to be processed in the swap device 30 swapped into the memory device 20, which is the total number of the anonymous pages corresponding to the application to be processed.
Illustratively, the embodiment of the present application adds a swap amount (wpin) statistics field in the memcg data structure, where the wpin statistics field is used to count the number of anonymous pages in the switching device 30 that are swapped into the memory device 20 by applying corresponding anonymous pages. That is, when the corresponding anonymous page is swapped into the memory device 20 in the swap device 30, the electronic system 100 maintains the pswpin statistics field count.
For example, as shown in FIG. 2, each memcg includes a swap-in (pswpin) statistics field.
Illustratively, the embodiment of the present application also adds a total _ anon statistics field to the memcg data structure. The total anonymous page (total _ anon) statistics field is used to count the total number of anonymous pages for each memcg.
For example, as shown in FIG. 2, each memcg includes a total _ anon statistics field.
In some embodiments, the swap-in statistics field referred to in the embodiments of the present application may also be replaced with a missing page amount (faultcnt) read-in field. The swap-in amount can be replaced by the page missing amount.
Further, an anonymous page count (swapcnt) field in the switching device 30 may be added to the memcg data structure.
For example, as shown in FIG. 2, each memcg includes a swapcnt statistics field.
Further, the processor 10 may determine a swap-in amount according to the pswpin statistical field, determine the number of anonymous pages in the switch device 30 according to the swapcnt statistical field, determine the number of active pages in the anonymous pages and the number of inactive pages in the anonymous pages according to the total _ anon statistical field, and calculate pswpin _ ratio according to formula (1):
Figure BDA0003048707810000091
wherein pswpin is the swap-in amount, lru _ active _ anon is the number of active pages in the anonymous page, lru _ inactive _ anon is the number of inactive pages in the anonymous page, and swapcnt is the number of anonymous pages in the swap device 30.
In the following, a schematic flow chart of the anonymous page swapping in the swap device 30 to the memory device 20 will be described by taking fig. 4 as an example.
S211, while the application 1 is being executed, determines that a page fault exception has occurred, and the page fault is an anonymous page.
S212, the anonymous page missing in S211 is read from the switching device 30.
S213, maintaining the count of the swap-in amount statistic field of the current application 1.
Alternatively, S213 may be replaced with S214.
S214, maintaining the missing page statistical field count of the current application 1.
S215, maintaining the count of the anonymous page statistics field of the current application 1.
The order of execution of the steps S213 to S215 is not limited.
S216, the anonymous page of the missing page swapped in the S212 is processed.
Illustratively, the anonymous page of the swapped-in missing page may be reverse mapped into the memory device 20.
Illustratively, the subject performing S211 to S217 may be the processor 10.
And S220, determining the current background activity of the application to be processed according to the swap-in rate determined in the S210 and the first mapping relation. The first mapping relation comprises a corresponding relation between a plurality of swap-in rates and a plurality of background liveness.
Wherein, the activity is used for identifying the activity degree of the application to be processed, and the activity level is positively correlated with the activity degree.
The number of the corresponding relations between the plurality of swap-in rates and the plurality of background activeness included in the first mapping relation is not limited in the embodiment of the present application.
The embodiment of the application does not limit the way in which the first mapping relationship indicates the corresponding relationship between the multiple swap-in rates and the multiple background liveness.
In some embodiments, the first mapping relationship may include a correspondence of a plurality of swap-in rate levels to a plurality of background activity levels.
Wherein the grade of the swap-in rate and the swap-in rate have positive correlation. I.e. the larger the swap-in rate, the higher the rank of the swap-in rate.
Illustratively, table 1 lists the correspondence of 6 swap-in rate levels to 6 background activity levels.
For example, as shown in table 1, when the swap-in rate is less than or equal to 10%, the rank of the swap-in rate is 0; when the swap-in rate is greater than or equal to 10% and is less than 20%, the grade of the swap-in rate is 1 grade; when the swap-in rate is greater than or equal to 20% and less than 30%, the grade of the swap-in rate is 2 grade; when the swap-in rate is greater than or equal to 30% and is less than 40%, the grade of the swap-in rate is 3 grade; when the swap-in rate is greater than or equal to 40% and is less than 50%, the grade of the swap-in rate is 4 grade; when the swap-in rate is greater than or equal to 50%, the rank of the swap-in rate is 5. Wherein the rank of the swap-in rate increases in order from 0 rank to 5 rank.
The swap-in rate grade and the background activity grade are in positive correlation, namely the higher the swap-in rate grade is, the higher the background activity grade is.
For example, as shown in table 1, when the swap-in rate level is 0 level, the background activity level is 0 level; when the swap-in rate grade is 1 grade, the background activity grade is 1 grade; when the swap-in rate grade is 2 grades, the background activity grade is 2 grades; when the swap-in rate grade is 3 grades, the background activity grade is 3 grades; when the swap-in rate grade is 4 grades, the activity grade of the background is 4 grades; and when the swap-in rate grade is 5 grades, the background activity grade is 5 grades. Wherein the activity level of the background is increased from 0 level to 5 levels in sequence.
TABLE 1
Figure BDA0003048707810000101
Exemplarily, if the application running in the background comprises the application a, determining that the swap-in rate of the application a is 32% according to S210; then, according to the first mapping relationship (for example, as shown in table 1), the swap-in rate (32%) belongs to 3 levels, and the corresponding background activity level is 3 levels, so that the current background activity level of the application a is 3 levels.
In some embodiments, the first mapping relationship may include a correspondence between a plurality of swap-in rates and a plurality of background liveness.
The swap-in rate and the background activity degree are in a positive correlation relationship, namely the higher the swap-in rate is, the higher the background activity is.
Illustratively, table 2 lists the correspondence of 6 swap-in rates to 6 background liveness.
For example, as shown in table 2, when the swap-in rate is less than or equal to 10%, the background activity is 0; when the swap-in rate is more than or equal to 10% and the swap-in rate is less than 20%, the activity of the background is 1; when the swap-in rate is more than or equal to 20% and the swap-in rate is less than 30%, the activity of the background is 2; when the swap-in rate is greater than or equal to 30% and the swap-in rate is less than 40%, the background activity is 3; when the swap-in rate is greater than or equal to 40% and the swap-in rate is less than 50%, the background activity is 4; and when the swap-in rate is greater than or equal to 50%, the background activity is 5. Wherein, the activity of the background is increased from 0 to 5.
TABLE 2
Rate of change in Background liveness Threshold of recovery
The replacement rate is less than or equal to 10 percent 0 100%
The replacement rate is more than or equal to 10 percent and less than 20 percent 1 80%
The replacement rate is more than or equal to 20 percent and less than 30 percent 2 60%
The replacement rate is more than or equal to 30 percent and less than 40 percent 3 40%
The replacement rate is more than or equal to 40 percent and less than 50 percent 4 20%
The replacement rate is more than or equal to 50 percent 5 0%
And S230, updating the current recovery rate threshold of the application to be processed according to the activity of the current background.
The recovery rate in this embodiment of the present application is a percentage of the number of the anonymous pages corresponding to the application to be processed in the memory device 20 that are swapped out to the exchange device 30, where the number of the anonymous pages corresponds to the application to be processed accounts for the total number of the anonymous pages corresponding to the application to be processed.
The recovery rate threshold value can be understood as an upper limit value of the recovery rate.
Wherein the current recovery threshold may be understood as a historical recovery threshold of the pending application.
For example, the historical recovery rate threshold of the pending application may be the recovery rate threshold of the pending application for the last memory recovery. As another example, the historical recovery threshold for the pending application may be an initial recovery threshold for the pending application.
Specifically, the historical background activity of the application to be processed may be determined first, and then the current recovery rate threshold of the application to be processed may be updated according to the historical background activity and the current background activity of the application to be processed.
Illustratively, the current threshold recovery rate of the pending application is related to the historical background activity of the pending application. For example, in the second mapping relationship, the recovery rate threshold corresponding to the historical background activity of the application to be processed is the current recovery rate threshold of the application to be processed.
For example, the historical background activity of the application to be processed may be the background activity of the application to be processed that has performed memory reclamation last time.
As another example, the historical background activity of the pending application may be an initial background activity of the pending application.
In some embodiments, the initial background activity corresponding to the application may be configured by a large amount of historical swap-in rate data corresponding to the application.
The embodiment of the application does not limit how to configure the mode of the initial background activity corresponding to the application through a large amount of historical swap-in rate data corresponding to the application. For example, an average of a number of historical swap-in rates corresponding to the application may be used as the initial swap-in rate corresponding to the application. And according to the first mapping relation, taking the background activity corresponding to the initial swap-in rate as the initial background activity.
Illustratively, the initial recovery threshold for each application is related to the initial background activity.
In some embodiments, the initial recovery rate threshold corresponding to the application may be configured by a large amount of historical background activity data corresponding to the application.
The embodiment of the application does not limit how to configure the initial recovery rate threshold value corresponding to the application through a large amount of historical background activity data corresponding to the application. For example, an average value of a large number of historical background liveness corresponding to the application may be used as the initial background liveness corresponding to the application. And determining the recovery rate threshold corresponding to the initial background activity as the initial recovery rate threshold according to the second mapping relation. For the second mapping relationship, reference may be made to the description related to case 1 below, which is not described herein again.
Hereinafter, S230 will be described in detail in case 1 and case 2. Wherein, in case 1, the current background liveness is greater than the historical background liveness. In case 2, the current background activity is less than the historical activity. In case 3, the current background activity is equal to the historical background activity.
And in case 1, the activity of the current background is greater than that of the historical background, and the first recovery rate threshold is determined as the updated current recovery rate threshold. The current recovery rate threshold is a recovery rate threshold corresponding to the activity of the historical background, and the first recovery rate threshold is smaller than the recovery rate threshold. I.e. to consider the current recovery threshold for the pending application down.
For example, the current recovery rate threshold may be determined according to a second mapping relationship, where the second mapping relationship includes a correspondence relationship between a plurality of background liveness levels and a plurality of recovery rate thresholds.
The number of the corresponding relations between the plurality of background activeness and the plurality of recovery rate thresholds included in the second mapping relation is not limited in the embodiment of the present application.
The embodiment of the application does not limit the way in which the second mapping relationship indicates the corresponding relationship between the multiple background liveness degrees and the multiple recovery rate thresholds.
In some embodiments, the second mapping may include a correspondence of a plurality of background activity levels to a plurality of recovery threshold levels.
Wherein the background activity level and the recovery rate threshold level are in a negative correlation relationship. I.e., the higher the background activity level, the lower the level of the recovery threshold.
Illustratively, table 1 lists the correspondence of 6 background activity levels to 6 recovery threshold levels.
For example, as shown in table 1, when the background activity level is 0 level, the recovery rate threshold level is 5 levels; when the activity level of the background is 1 level, the threshold value level of the recovery rate is 4 levels; when the activity level of the background is 2, the threshold value level of the recovery rate is 3; when the activity level of the background is 3 level, the threshold value level of the recovery rate is 2 level; when the activity level of the background is 4, the threshold level of the recovery rate is 1; and when the background activity level is 5, the recovery rate threshold level is 0. Wherein the threshold recovery rate level increases in order from a level of 0 to a level of 5.
Wherein the recovery rate threshold level and the recovery rate threshold are in positive correlation. I.e., the higher the threshold recovery rate level, the greater the threshold recovery rate.
For example, as shown in table 1, the threshold recovery rate level may be 100% when the threshold recovery rate level is 5; when the threshold recovery rate level is 4, the threshold recovery rate may be 80%; when the recovery threshold level is 3 level, the recovery threshold value can be 60%; when the recovery threshold level is 2, the recovery threshold may be 40%; when the threshold recovery rate level is 1 level, the threshold recovery rate value can be 20%; the threshold recovery rate may be 0% when the threshold recovery rate level is 0.
Illustratively, if the applications running in the background include application a, the current background activity level of application a is 3 levels. The current background activity level of the application a corresponds to a recovery threshold level of 2 (corresponding to a recovery threshold of 40%).
In other embodiments, the second mapping may include a correspondence of a plurality of background liveness levels to a plurality of recovery rate thresholds.
The background activity and the recovery rate threshold value are in a negative correlation relationship, namely the higher the background activity is, the lower the recovery rate threshold value is.
For example, as shown in table 2, when the background activity is 0, the recovery threshold is 100%; when the activity degree at the background is 1, the recovery rate threshold value is 80 percent; when the activity degree in the background is 2, the recovery rate threshold value is 60 percent; when the activity degree at the background is 3, the recovery rate threshold value is 40 percent; when the activity degree in the background is 4, the recovery rate threshold value is 20 percent; at a background activity of 5, the recovery threshold was 0%. Wherein the activity of the background is increased from 0 to 5.
And 2, determining the current recovery rate of the application to be processed when the current background activity is less than the historical background activity, and determining the second recovery rate threshold as the updated current recovery rate threshold when the current recovery rate is greater than or equal to the current recovery rate threshold. Wherein the second recovery threshold is greater than the current recovery threshold. I.e., the current recovery threshold for the pending application is deemed to be adjusted upward.
Specifically, the number of anonymous pages in the switching device 30 may be determined according to the swapcnt statistical field, the number of active pages in the anonymous pages and the number of inactive pages in the anonymous pages may be determined according to the total _ anon statistical field, and the current recovery rate swapcnt _ ratio of the application to be processed may be calculated according to the formula (2):
Figure BDA0003048707810000121
illustratively, the current recovery rate threshold may be determined according to the second mapping.
For the related description of the second mapping relationship, reference may be made to the corresponding description in case 1 above, which is not described herein again.
Optionally, in some embodiments, the current recovery rate threshold may not be updated if the current recovery rate is equal to the current recovery rate threshold. And in S240, performing memory reclamation on the application to be processed according to the current reclamation rate threshold.
Alternatively, in the event that the current recovery rate is less than the current recovery rate threshold, the recovery rate threshold may not be updated. And in S240, memory recovery is performed on the application to be processed according to the current recovery rate threshold.
Case 3, in some embodiments, where the current background activity is equal to the historical background activity, the current recovery threshold may not be updated. And in S240, memory recovery is performed on the application to be processed according to the current recovery rate threshold.
In other embodiments, the current background activity is equal to the historical background activity, and the first recovery rate threshold is determined to be the updated current recovery rate threshold. At this point, the same way as the current recovery rate threshold of the pending application is updated as in case 1 above. For specific related descriptions, see the related description of case 1 above, and are not described here again.
And S240, according to the updated current recovery rate threshold, performing memory recovery on the application to be processed.
Specifically, according to the current recovery rate threshold, the anonymous page in the memory device 20 is swapped out to the exchange device 30, and then the memory recovery of the application to be processed is completed.
In the following, a schematic flow chart of the anonymous page swapping in the swap device 30 to the memory device 20 will be described in detail by taking fig. 5 as an example.
For example, as shown in fig. 5, S241 includes:
and S241, judging whether all applications are traversed.
And if all the applications are traversed, directly ending.
If not, S242 is executed.
S242, determine whether the application is a foreground application.
If the application is the foreground application, S243 is executed.
If the application is not a foreground application, S244 is performed.
S243, clearing the count of the swap-in amount (or page fault amount) statistics field of the current application.
After S243, the steps of S240 are re-executed until all applications are traversed as determined in S241, and the loop ends.
S244, the anonymous page in the memory device 20 is swapped out of the swap device 30.
S245, maintaining the count of the anonymous page statistics field of the memcg currently applied.
And S246, calculating the swap-in rate of the current application.
Optionally, in some embodiments, S246 may be replaced with S247.
And S247, calculating the page missing rate of the current application.
After S246 or S247, the respective steps of S240 are re-executed until it is determined in S221 that all applications are traversed, and the loop is ended.
Optionally, the applications run by the processor 10 include n applications, where n is greater than 0 and n is a positive integer. I.e., there are n applications to be processed, the method 200 may be performed for each application until the n applications are traversed.
Illustratively, the n applications may include foreground applications. The foreground application may be understood as an application that the processor 10 is running in the foreground.
Fig. 6 is a schematic flow chart of a method 500 for performing memory reclamation on n applications according to an embodiment of the present application. For example, as shown in fig. 6, method 500 includes:
s501, initializing the swap-in rate, the background activity and the recovery rate threshold of each application.
The initialization of the swap-in rate, the background activity and the recovery rate threshold of each application can be understood as configuring the corresponding swap-in rate, the background activity and the recovery rate threshold for each application.
S502, judging whether all applications are traversed.
And if all the applications are traversed, directly ending.
If not, S503 is executed.
S503, anonymous page recovery is started to be carried out on the nth application to be processed.
The anonymous page eviction referred to in the embodiments of the present application may be understood as memory eviction.
For example, the kernel may scan the memcg corresponding to each application one by one, and start to reclaim the anonymous pages in the LRU of the memcg corresponding to the nth application to be processed.
S504, judging whether the nth application to be processed is a foreground application.
If the nth application to be processed is the foreground application, S505 is executed.
If the nth application to be processed is not the foreground application, S506 is executed.
And S505, clearing the count of the swap-in amount statistic field.
Clearing the count of the swap-in amount statistics field may be understood as zeroing the count of the swap-in amount statistics field.
After S505, the steps are executed from S503 again until S503 determines that all applications are traversed, and the loop ends.
S506, judging whether the background activity degree is increased.
Background liveness rising can be understood as the current background liveness being greater than or equal to the historical background liveness.
If the background activity degree is increased, S507 is executed. At this time, this case may be understood as some of the embodiments of case 1, case 3 described above.
In some embodiments, the current background activity is equal to the historical background activity, and the steps may be executed again from S503 without executing S507 until all applications are traversed in S503, and the loop is ended.
If the background activity level is not increased, S508 is executed. At this time, this case may be understood as the case 2 described above.
And S507, adjusting the current recovery rate threshold value downwards. I.e. the first recovery rate threshold is determined as the updated current recovery rate threshold.
For specific related description, reference may be made to the related description of case 1 above, and details are not repeated here.
After S507, S510 is performed.
And S508, judging whether the current recovery rate is greater than or equal to the current recovery rate threshold value.
If the current recovery rate is greater than or equal to the current recovery rate threshold, S509 is performed.
In some embodiments, the current recovery rate is equal to the current recovery rate threshold, and S510 may be performed directly without performing S509.
If the current recovery rate is smaller than the current recovery rate threshold, S510 is performed.
And S509, adjusting the current recovery rate threshold value. I.e., the second recovery rate threshold is determined to be the updated current recovery rate threshold.
For specific relevant description, reference may be made to the above relevant description of case 2, and details are not described here again.
After S509, S510 is performed.
And S510, carrying out anonymous page recovery flow on the nth application to be processed according to the final current recovery rate threshold.
After S510, the execution of the steps is resumed from S503 on the (n + 1) th application to be processed, until all applications are determined to be traversed in S503, and the loop is ended.
For parts not described in the method 500, reference may be made to the related description in the method 200, and details are not described here.
The method 500 is a procedure for performing memory reclamation once. If memory reclamation is required multiple times, the method 500 may be repeated.
The execution subject of both the above-described method 200 and the above-described method 500 may be the processor 10 shown in fig. 1.
The method 200 or the method 500 for memory recovery provided in the embodiment of the present application may determine the current background activity of the application to be processed based on the swap-in rate and the first mapping relationship of the application to be processed, and dynamically adjust the current recovery rate threshold of the application to be processed based on the current background activity of the application to be processed, thereby reducing the waste of memory recovery and reducing the overhead of memory recovery.
The statistical ratio of the swap-in amount to the recovery amount in the memory recovery process is described below with reference to fig. 7. The recycling amount may be understood as the number of the anonymous pages corresponding to the application to be processed in the memory device 20 swapped out to the switching device 30.
FIG. 7 is a diagram illustrating a set of ratios of swap-in amount to reclaim amount provided by an embodiment of the present application.
For example, as shown in fig. 7, the ratio of the swap-in amount to the recovery amount in six times of memory recovery is counted. The first time to the third time are ratios of the swap-in amount and the recovery amount obtained in the memory recovery process of the memory recovery method provided by the embodiment of the application. The fourth time to the sixth time are ratios of the swap-in amount and the recovery amount obtained in the memory recovery process of the existing memory recovery method.
From fig. 7, it can be derived: generally, in the ratio of the swap-in amount to the recovery amount obtained in the memory recovery process by the memory recovery method provided in the embodiment of the present application and the ratio of the swap-in amount to the recovery amount obtained in the memory recovery process by the existing memory recovery method, the ratio of the swap-in amount to the recovery amount obtained in the memory recovery process by the memory recovery method provided in the embodiment of the present application is lower.
Therefore, the memory recovery method provided by the embodiment of the application can select a proper current recovery rate threshold value for the application to be processed according to the current background activity of the application to be processed determined based on the swap-in rate of the application to be processed, so that the waste of memory recovery can be reduced, and the cost of memory recovery can be reduced.
In the above, the method for memory reclamation provided in the embodiment of the present application is described with reference to fig. 1 to fig. 7. Hereinafter, an electronic device provided in an embodiment of the present application will be described with reference to fig. 8.
Fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present application. As shown in fig. 8, the electronic device 700 includes a processing unit 710, a memory device 20, and a switching device 30. The applications run by the processing unit 710 include applications to be processed.
The processing unit 710 is configured to: determining the current background activity of the application to be processed according to a swap-in rate of the application to be processed and a first mapping relation, wherein the swap-in rate is the percentage of the number of anonymous pages corresponding to the application to be processed in a swap device swapped into a memory device in the total number of anonymous pages corresponding to the application to be processed, and the first mapping relation comprises the corresponding relation between a plurality of swap-in rates and a plurality of background activities; updating the current recovery rate threshold of the application to be processed according to the current background liveness, wherein the recovery rate is the percentage of the anonymous pages corresponding to the application to be processed in the exchange equipment in the total number of the anonymous pages corresponding to the application to be processed; and according to the updated current recovery rate threshold value, performing memory recovery on the application to be processed.
Optionally, the processing unit 710 is specifically configured to: determining historical background activity of the application to be processed; and updating the current recovery rate threshold of the application to be processed according to the current background activity and the historical background activity.
Optionally, the processing unit 710 is further specifically configured to: determining that the current background liveness is greater than the historical background liveness; and determining a first recovery rate threshold as the updated current recovery rate threshold, wherein the first recovery rate threshold is smaller than the current recovery rate threshold.
Optionally, the processing unit 710 is further specifically configured to: determining that the current background liveness is less than the historical background liveness; determining a current recovery rate of the application to be processed, wherein the current recovery rate is a percentage of the number of the anonymous pages in the exchange device to the total number of the anonymous pages; determining that the current recovery rate is greater than or equal to the current recovery rate threshold; determining a second recovery rate threshold as the updated current recovery rate threshold, the second recovery rate threshold being greater than the current recovery rate threshold.
Optionally, the processing unit 710 is further specifically configured to: and determining the current recovery rate according to the anonymous page statistical field.
Optionally, the background activity and the recovery threshold are in a negative correlation relationship.
Optionally, the background liveness and the swap-in rate are in a positive correlation.
Optionally, the processing unit 710 is further specifically configured to: and determining the swap-in rate according to the swap-in amount statistic field.
It is to be understood that the electronic device 700 may also comprise more functional modules, or two or more functions may be integrated in one processing unit. Each functional module may implement the method 300 for memory recovery in fig. 3 or the method 500 for memory recovery in fig. 6, and is used to execute corresponding steps in the method 300 or the method 500, which is not described herein again for brevity.
An embodiment of the present application further provides another electronic device, including: one or more treatments; a memory; a memory device and a switching device; a module installed with a plurality of applications; and one or more programs, where the one or more programs are stored in the memory, and when the one or more programs are executed by the processor, the electronic device is caused to execute the method for memory reclamation provided by the embodiment of the present application.
An embodiment of the present application further provides an electronic system, including: the memory device, the switching device, the processor and the interface, wherein the processor stores one or more programs, and when the one or more programs are executed by the processor, the electronic system is enabled to execute the memory reclamation method provided by the embodiment of the application.
The embodiment of the present application further provides a computer-readable storage medium, which includes computer instructions, and when the computer instructions are run on an electronic device, the electronic device is enabled to execute the method for memory recovery provided in the embodiment of the present application.
The embodiment of the present application further provides a chip system, which includes at least one processor and an interface circuit, where the interface circuit is configured to provide program instructions or data for the at least one processor, and the at least one processor is configured to execute the program instructions, so as to implement the method for memory reclamation provided in the embodiment of the present application.
The embodiment of the present application further provides a computer program product, where the computer program product includes a computer program, and when the computer program product is executed by a computer, the computer executes the method for memory reclamation provided in the embodiment of the present application.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
It can be clearly understood by those skilled in the art that, for convenience and simplicity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (20)

1. A method for memory recovery is applied to an electronic device including a processor, a memory device and a switching device, wherein an application run by the processor includes an application to be processed, and the method includes:
determining the current background activity of the application to be processed according to a swap-in rate of the application to be processed and a first mapping relation, wherein the swap-in rate is the percentage of the number of anonymous pages corresponding to the application to be processed in a swap device swapped into a memory device in the total number of anonymous pages corresponding to the application to be processed, and the first mapping relation comprises the corresponding relation between a plurality of swap-in rates and a plurality of background activities;
updating the current recovery rate threshold of the application to be processed according to the current background liveness, wherein the recovery rate is the percentage of the anonymous pages corresponding to the application to be processed in the exchange equipment in the total number of the anonymous pages corresponding to the application to be processed;
and according to the updated current recovery rate threshold value, performing memory recovery on the application to be processed.
2. The method of claim 1, wherein updating the current reclamation threshold for the pending application based on the current background activity comprises:
determining historical background activity of the application to be processed;
and updating the current recovery rate threshold of the application to be processed according to the current background activity and the historical background activity.
3. The method of claim 2, wherein updating the current reclamation threshold for the pending application based on the current background activity and the historical background activity comprises:
determining that the current background liveness is greater than the historical background liveness;
and determining a first recovery rate threshold as the updated current recovery rate threshold, wherein the first recovery rate threshold is smaller than the current recovery rate threshold.
4. The method of claim 2, wherein updating the current reclamation threshold for the pending application as a function of the current background activity and the historical background activity comprises:
determining that the current background liveness is less than the historical background liveness;
determining a current recovery rate of the application to be processed, the current recovery rate being a percentage of a number of anonymous pages in the exchange device to a total number of total anonymous pages;
determining that the current recovery rate is greater than or equal to the current recovery rate threshold;
determining a second recovery rate threshold as the updated current recovery rate threshold, the second recovery rate threshold being greater than the current recovery rate threshold.
5. The method of claim 4, wherein the memory control subsystem corresponding to the application to be processed comprises an anonymous page statistics field, and wherein the determining the current recovery rate of the application to be processed comprises:
and determining the current recovery rate according to the anonymous page statistical field.
6. The method of any of claims 2 to 5, wherein the background activity level and the recovery threshold are inversely related.
7. The method of any one of claims 1 to 6, wherein the background liveliness and the swap-in rate are in a positive correlation.
8. The method according to any one of claims 1 to 7, wherein the memory control subsystem corresponding to the application to be processed includes a swap-in amount statistics field, the method further comprising:
and determining the swap-in rate according to the swap-in amount statistic field.
9. An electronic device, comprising a processing unit, a memory device and a switching device, wherein an application run by the processing unit comprises an application to be processed,
the processing unit is configured to: determining the current background activity of the application to be processed according to the swap-in rate of the application to be processed and a first mapping relation, wherein the swap-in rate is the percentage of the number of anonymous pages corresponding to the application to be processed in the switching device swapped into the memory device in the total number of the anonymous pages corresponding to the application to be processed, and the first mapping relation comprises the corresponding relation between a plurality of swap-in rates and a plurality of background activities;
updating the current recovery rate threshold of the application to be processed according to the current background liveness, wherein the recovery rate is the percentage of the anonymous pages corresponding to the application to be processed in the exchange equipment in the total number of the anonymous pages corresponding to the application to be processed;
and according to the updated current recovery rate threshold, performing memory recovery on the application to be processed.
10. The electronic device of claim 9, wherein the processing unit is specifically configured to:
determining historical background activity of the application to be processed;
and updating the current recovery rate threshold of the application to be processed according to the current background activity and the historical background activity.
11. The electronic device of claim 10, wherein the processing unit is further specifically configured to:
determining that the current background liveness is greater than the historical background liveness;
and determining a first recovery rate threshold as the updated current recovery rate threshold, wherein the first recovery rate threshold is smaller than the current recovery rate threshold.
12. The electronic device of claim 10, wherein the processing unit is further specifically configured to:
determining that the current background liveness is less than the historical background liveness;
determining a current recovery rate of the application to be processed, the current recovery rate being a percentage of a number of anonymous pages in the exchange device to a total number of total anonymous pages;
determining that the current recovery rate is greater than or equal to the current recovery rate threshold;
determining a second threshold recovery rate as the updated current threshold recovery rate, the second threshold recovery rate being greater than the current threshold recovery rate.
13. The electronic device of claim 12, wherein the processing unit is further specifically configured to:
and determining the current recovery rate according to the anonymous page statistical field.
14. The electronic device of any of claims 10-13, wherein the background activity level and the reclamation threshold are in a negative correlation.
15. The electronic device of any of claims 9-14, wherein the background liveness and the swap-in rate are in a positive correlation.
16. The electronic device of any of claims 9-15, wherein the processing unit is further specifically configured to:
and determining the swap-in rate according to the swap-in amount statistic field.
17. An electronic device, comprising: one or more processors; a memory; memory devices and switching devices; a module in which a plurality of applications are installed; and one or more programs, wherein the one or more programs are stored in the memory, which when executed by the processor, cause the electronic device to perform the method of memory reclamation of any of claims 1-8.
18. An electronic system, comprising: a memory device, a switching device, a processor and an interface, the processor storing one or more programs that, when executed by the processor, cause the electronic system to perform the method of memory reclamation of any of claims 1 to 8.
19. A computer readable storage medium comprising computer instructions which, when run on an electronic device, cause the electronic device to perform the method of memory reclamation of any of claims 1 to 8.
20. A chip system comprising at least one processor and interface circuitry, the interface circuitry being configured to provide program instructions or data to the at least one processor, the at least one processor being configured to execute the program instructions to implement the method of memory reclamation as claimed in any one of claims 1 to 8.
CN202110481547.8A 2021-04-30 2021-04-30 Memory recovery method and electronic equipment Pending CN115269169A (en)

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