CN115241041A - Bonded substrate comprising polycrystalline diamond film - Google Patents
Bonded substrate comprising polycrystalline diamond film Download PDFInfo
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- CN115241041A CN115241041A CN202210419514.5A CN202210419514A CN115241041A CN 115241041 A CN115241041 A CN 115241041A CN 202210419514 A CN202210419514 A CN 202210419514A CN 115241041 A CN115241041 A CN 115241041A
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- 239000000758 substrate Substances 0.000 title claims abstract description 77
- 229910003460 diamond Inorganic materials 0.000 title claims abstract description 60
- 239000010432 diamond Substances 0.000 title claims abstract description 60
- 239000000463 material Substances 0.000 claims abstract description 36
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 25
- 239000010703 silicon Substances 0.000 claims abstract description 25
- 238000001994 activation Methods 0.000 claims abstract description 18
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims abstract description 13
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 13
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 12
- 229910002601 GaN Inorganic materials 0.000 claims abstract description 11
- WSMQKESQZFQMFW-UHFFFAOYSA-N 5-methyl-pyrazole-3-carboxylic acid Chemical compound CC1=CC(C(O)=O)=NN1 WSMQKESQZFQMFW-UHFFFAOYSA-N 0.000 claims abstract description 9
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims abstract description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 4
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims abstract description 4
- 238000004519 manufacturing process Methods 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 46
- 230000008569 process Effects 0.000 claims description 27
- 238000005498 polishing Methods 0.000 claims description 16
- 230000003746 surface roughness Effects 0.000 claims description 16
- 239000000126 substance Substances 0.000 claims description 12
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 6
- 230000006911 nucleation Effects 0.000 claims description 6
- 238000010899 nucleation Methods 0.000 claims description 6
- 238000000678 plasma activation Methods 0.000 claims description 6
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- 238000005304 joining Methods 0.000 claims description 4
- 238000000992 sputter etching Methods 0.000 claims description 4
- 238000005411 Van der Waals force Methods 0.000 claims description 3
- 238000004140 cleaning Methods 0.000 claims description 3
- 239000011261 inert gas Substances 0.000 claims description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 239000007789 gas Substances 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- 239000001301 oxygen Substances 0.000 claims description 2
- 229910052760 oxygen Inorganic materials 0.000 claims description 2
- 235000012431 wafers Nutrition 0.000 description 61
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 12
- 235000012239 silicon dioxide Nutrition 0.000 description 6
- 239000000377 silicon dioxide Substances 0.000 description 6
- 230000004913 activation Effects 0.000 description 5
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 230000007704 transition Effects 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- 229910017083 AlN Inorganic materials 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 229910013641 LiNbO 3 Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 150000007513 acids Chemical class 0.000 description 1
- 239000012814 acoustic material Substances 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000002585 base Substances 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000003750 conditioning effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000007800 oxidant agent Substances 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02527—Carbon, e.g. diamond-like carbon
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
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Abstract
A wafer has a silicon-containing layer, a polycrystalline diamond layer deposited on the silicon-containing layer, and a bow compensation layer on the other side of the silicon-containing layer for reducing wafer bow. A method of manufacturing a bonded structure includes an activation process for creating dangling bonds on a surface of one substrate, followed by contact bonding the surface to a second substrate at a low temperature. The bonded structure may comprise two substrates bonded in contact with each other, one substrate comprising a silicon-containing layer, a polycrystalline diamond layer, a bow compensation layer for reducing wafer bow of the first substrate, and the other substrate comprising gallium nitride, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, indium phosphide or another suitable material other than diamond.
Description
Cross Reference to Related Applications
Applicant claims priority from U.S. provisional patent application No. 63/014,163, filed on 23/4/2020. The present application is a continuation-in-part application of U.S. patent application nos. 16/874,164 and 16/037,499, filed on 14/5/2020 and 17/7/2018, respectively. The entire disclosures of U.S. provisional patent application No. 63/014,163 and U.S. patent application Nos. 16/874,164 and 16/037,499 are incorporated herein by reference.
Disclosure of Invention
The present disclosure relates to a wafer comprising a silicon-containing layer, a polycrystalline diamond layer deposited on the silicon-containing layer, and a bow compensation layer on the other side of the silicon-containing layer for reducing bow of the wafer. The reduced or eliminated wafer bow may be caused by a mismatch between the coefficients of thermal expansion of the respective materials of the silicon-containing layer and the polycrystalline diamond layer.
According to a preferred embodiment, the wafer bow (defined below) may be less than 50 microns. According to other preferred embodiments, one or more layers may be formed on or over the layer of polycrystalline diamond, such as a polished layer of deposited material other than polycrystalline diamond, and/or a deposited acoustic mirror layer having alternating low and high acoustic impedance.
The present disclosure also relates to a method of manufacturing a bonded structure, which includes performing an activation process on a surface of a first substrate to generate dangling bonds at least on the surface, and then bringing the surface of the first substrate into contact bonding with a surface of a second substrate. The activation process may be, for example, a plasma activation process. The bonding may be performed at room temperature, or the bonded structure may be thermally annealed at a low temperature.
According to a preferred embodiment, a material other than diamond is deposited on the polycrystalline diamond layer and then the surface roughness of the material other than diamond is reduced. This method is particularly useful where it is difficult to polish the polycrystalline diamond layer to a surface roughness suitable for contact bonding. The surface roughness of materials other than diamond is reduced by chemical mechanical polishing, ion milling and/or magnetorheological finishing, if desired.
According to another preferred embodiment, a water treatment process may be performed at least on the surface of the first substrate in order to create dangling bonds required for chemical bonds between the two substrates. The dangling bonds promote chemical activity in a manner similar to that of free radicals. Contact bonding of substrates may initially be established by Van der Waals forces. The water may be provided from a suitable source, such as a megasonic cleaning process or ambient moisture.
The present disclosure also relates to a bonded structure comprising a first substrate and a second substrate, wherein the first substrate comprises a silicon-containing layer, a polycrystalline diamond layer, a bow compensation layer for reducing wafer bow of the first substrate, and a bonding surface, and the second substrate comprises gallium nitride, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, indium phosphide, or another suitable material and a bonding surface, and wherein the bonding surfaces of the two substrates are bonded in contact with each other.
According to a preferred embodiment, the second substrate comprises a removable carrier layer which can be used for processing the second substrate before the two substrates are joined to each other.
Drawings
FIG. 1 is a cross-sectional view of a wafer structure constructed in accordance with the present disclosure;
FIG. 2 is a cross-sectional view of another wafer structure constructed in accordance with the present disclosure;
FIG. 3 is a schematic view of a method of bonding a first wafer structure and a second wafer structure to one another;
FIG. 4 is a cross-sectional view of a joining structure constructed in accordance with the present disclosure;
fig. 5 is a cross-sectional view of a diamond-free layered structure constructed according to the present disclosure;
FIG. 6 is a cross-sectional view of yet another wafer structure constructed in accordance with the present disclosure;
FIG. 7 is a cross-sectional view of a bonded structure including the layered structure and wafer structure of FIGS. 5 and 6; and is provided with
Fig. 8 is a cross-sectional view of the bonded structure of fig. 7 at a subsequent stage of production.
Detailed Description
Referring now to the drawings, in which like elements are designated by like reference numerals, there is shown in FIG. 1 an example of a wafer structure 10 constructed in accordance with the present disclosure. The wafer structure 10 includes a wafer 12 comprising silicon (Si), a diamond layer 14 formed of polycrystalline diamond deposited on a front side 16 of the wafer 12, and a bow compensation layer 18 deposited on a back side 20 of the wafer 12. Wafer 12 may be formed of elemental silicon, if desired. The bend compensation layer 18 may be a film or layer of high compressive strength material.
A mismatch between the Coefficients of Thermal Expansion (CTE) of the materials of the silicon-containing wafer 12 and the diamond layer 14 tends to cause undesirable wafer bowing within the wafer structure 10. Bow compensation layer 18 prevents or at least reduces the extent of such wafer bow by providing wafer backside compensation. The bow compensation layer 18 may be a film of a high compressive strength material such as aluminum nitride (AlN), silicon nitride (SiN), or some other suitable dielectric material. Alternatively, the bend-compensating layer 18 may comprise a high compressive strength metal or some other high compressive strength material.
As used herein, the term "wafer bow" means the degree to which the central portion 22 of the back side 20 of the wafer 12 is deflected upward (as viewed in fig. 1) from the respective central portions of the plane 24 extending through the back side edges 26, 28 of the wafer 12. In other words, as used herein, the term "wafer bow" means the distance between (a) the back center portion 22 of the wafer 12 and (B) the plane 24 in a direction perpendicular to the plane 24. If desired, the wafer structure 10 may have a wafer bow of <50 μm, more preferably <35 μm, even more preferably <25 μm, and even more preferably <15 μm.
In the example shown in fig. 1, the diamond layer 14 is formed by depositing or bonding polycrystalline diamond onto the front side 16 of the wafer 12 and then polishing the front side 30 of the diamond layer 14. If the surface roughness of the diamond layer front side 30 is too rough for surface bonding despite such polishing, one or more foreign materials may be deposited on the diamond layer front side 30 and polished to a surface roughness low enough and suitable for wafer bonding.
The one or more foreign materials deposited on the diamond layer front side 30 may comprise, for example, a dielectric material such as silicon dioxide (SiO) 2 ) A metal layer or a semiconductor layer such as silicon (Si). Chemical Mechanical Polishing (CMP) may be performed on one or more foreign materials to provide a surface roughness that is sufficiently low and suitable for wafer bonding. If chemical mechanical polishing results in undesirable intra-wafer non-uniformity (WWNU), polishing may be supplemented or replaced by magnetorheological finishing (MRF) or ion milling.
According to one aspect of the disclosure, a chemical mechanical polishing processIs optional. If desired, one or more foreign materials may be deposited or otherwise applied to the diamond layer front side 30 having a sufficiently smooth surface, depending on the process not requiring chemical mechanical polishing. For example, siO 2 The layer may be deposited or otherwise applied to the diamond layer front side 30 with a sufficiently smooth surface that no SiO is required 2 Chemical mechanical polishing of the layer. According to another embodiment of the present disclosure, a spin-on-glass process may be applied over the diamond layer, for example, to provide a sufficiently smooth surface for the desired bonding process so that chemical-mechanical polishing is not required.
A suitable process for forming wafer structure 10 is as follows: polycrystalline diamond is grown on the front side 16 of a silicon-containing wafer 12 (one example of a substrate) to produce a diamond layer 14 (but with a rough surface). The rough surface of the diamond layer 14 is then polished to a mirror finish, along with other processing steps to achieve the desired wafer gauge. A compensation process is then performed by depositing an aluminium nitride layer 18 on the back side 20 of the wafer 12 to prevent or at least reduce bowing caused by the mismatch between the coefficients of thermal expansion of the wafer 12 and the polycrystalline diamond layer 14.
Fig. 2 shows a wafer structure 100 with a suitably low surface roughness on the front side 102. The wafer structure 100 includes a stack of acoustic mirror layers 104, 106, 108 in sequence on the diamond layer front side 30 of the wafer structure 10 of fig. 1. The first layer 104 may comprise SiO 2 . The second layer 106 may comprise W, alN or SiC. The third layer 108 may comprise SiO 2 Or Si. The wafer structure 100 may be fabricated by depositing acoustic mirror layers 104, 106, 108 or other combinations of low acoustic/high acoustic materials, or by alternately depositing low acoustic impedance layers and high acoustic impedance layers in the same order or in a different order to construct an effective acoustic mirror for reflecting acoustic waves. Additional layers (not shown) similar to the layers 104, 106, 108 shown may be deposited on the wafer structure 10 in a repeating pattern to achieve desired physical, acoustic, thermal or other benefits and characteristics, if desired.
The topmost layer 108 of the wafer structure 100 may be tens of microns thick, or less than ten microns thick, if desiredOr less than one micron thick. The topmost layer 108 may be, for example, a low acoustic impedance material (SiO) of about 1.5 μm 2 Or Si, preferably amorphous silicon). The surface 102 of the topmost layer 108 may be chemically mechanically polished to achieve a desired surface roughness, which may be Ra ≦ 2nm, or more preferably ≦ 1nm. If the polishing surface 102 has unacceptable within-wafer non-uniformity, ion finishing or magnetorheological finishing may be employed to apply SiO 2 the/Si topmost layer 108 is further reduced to a uniform thickness.
In an alternative embodiment, at least a transition layer (not shown) may be deposited on the wafer structure 10 to achieve an acceptable surface roughness.
The process of preparing a bonded substrate comprising a layer of polycrystalline diamond material to produce the device 100 shown in fig. 2 may include surface preparation to achieve the low surface roughness required for wafer-to-wafer bonding, as follows: first, at least one layer of foreign material 108 is deposited on the front side 30 of the polycrystalline diamond layer 14. The foreign material used to achieve the desired low surface roughness may be one or more of a variety of different materials or devices, including but not limited to dielectric, metallic, or semiconductor materials, such as PECVD silicon dioxide. The surface 102 of the foreign material is then polished to a surface roughness suitable for wafer-to-wafer bonding. The polished foreign layer 108 is then reduced to a uniform desired thickness as an optional step by a suitable method, such as ion milling or magnetorheological finishing.
The process shown in fig. 3 may be used to bond one or more layers comprising gallium nitride (GaN), silicon carbide (SiC), lithium niobate (LiNbO 3), lithium tantalate (LiTaO 3), or another suitable material to a layered structure 100 comprising polycrystalline diamond, where bonding is performed at low temperatures (e.g., at bonding temperatures <250 ℃). First, in a plasma activation step 202, the surface 102 of the topmost layer 108 of the wafer structure 100 is plasma activated to create dangling bonds on the wafer surface 102. The plasma may comprise nitrogen, oxygen, a chemically reactive gas, or an inert gas. A similar or suitable surface activation process may also be used to activate the surface of the other substrate, if desired.
According to other embodiments of the present disclosure, the surface activation processes described herein may be used in conjunction with materials other than diamond, if desired. Generally, one or more activation processes may be used to facilitate contact bonding of substrates that do not contain diamond.
Plasma activated surface 102 is then further activated by water, which may be provided by a megasonic cleaning process, or by moisture in the environment, in an optional water treatment step 206. The surfaces of the two substrates to be bonded together may be activated by water or moisture in the air, if desired.
The wafer is then aligned as desired in an optional alignment step 208. Then, during a bonding step 210, the wafers are bonded in contact with each other by, for example, van der waals forces to establish a bond therebetween, and then, during an annealing step 212, the bonded wafers are thermally annealed at a low temperature. The annealing temperature may be, for example, 300 ℃ or less, or 450 ℃ or less, or 600 ℃ or less. The bonded structure can then be further processed into a desired device, which can be a passive device or an active device.
According to another aspect of the present invention, to achieve low or room temperature wafer-to-wafer bonding, the surface 102 of the substrate comprising diamond may be activated by a Fast Atomic Beam (FAB) process under vacuum. The required activation produces dangling bonds on the activated surface. The surface of another substrate (a substrate not including diamond) may be activated by a similar process. After one or both surfaces are activated, they may be aligned under high vacuum and then bonded to each other. The bonding process may optionally be performed under pressure.
If desired, gaN, siC, liNbO 3 Or LiTaO 3 The bonding of the layers to a substrate comprising diamond, the bonding process may be performed at even lower temperatures (e.g., room temperature). The wafer surface preparation for the room temperature bonding process may be the same as for the low temperature process; however, if desired, the wafer surface may be activated by fast atomic beam processing, and the bonding pressure may be<1.0×10 -5 Pa。
FIG. 4 shows a device according toAnother example of a wafer structure constructed in accordance with the present disclosure, where substrate 300 includes polycrystalline diamond layer 14 and lithium niobate (LiNbO) 3 ) Layer 302. The substrate 300 shown in fig. 4 includes the wafer structure 10 shown in fig. 1. As shown in fig. 4, siO deposited on the diamond layer 14 2 The polished front surface 102 of layer 108 may be bonded to lithium niobate layer 302. Bonding to SiO in the lithium niobate layer 302, if desired 2 Before layer 108, siO 2 The thickness of layer 108 may be reduced to less than 2 microns, more preferably less than 1 micron.
Fig. 5 shows an example of a layered structure 400 containing a channel layer 402 of gallium nitride (GaN) epitaxially deposited on an epitaxially deposited substrate. Although layer 402 comprises gallium nitride in the example shown, epitaxially deposited layer 402 may alternatively comprise silicon carbide, lithium niobate, lithium tantalate, or another suitable material. The illustrated structure 400 has an aluminum nitride (AlN) nucleation layer 404 deposited on a silicon or silicon carbide substrate 406. An AlGaN transition layer 408 is deposited on the nucleation layer 404.A GaN buffer layer 410 is deposited on the buffer layer 408 and a GaN layer 402 is deposited on the buffer layer 410.
A barrier layer 412, which may be formed of AlGaN, may be deposited on the GaN channel layer 402, and then a SiN passivation layer 414 may be deposited on the barrier layer 412. The carrier substrate 416 may be deposited on or bonded to the passivation layer 414, and then the Si or SiC substrate 406 may be removed. If desired, the nucleation layer 404, transition layer 408, and/or some or all of the buffer layer 410 may be removed along with or after the Si or SiC substrate 406 is removed.
Fig. 6 shows a layered structure 500 comprising diamond and adapted for bonding to a GaN-containing layered structure 400 (fig. 5). The layered structure 500 of fig. 6 has an uppermost film 502 comprising aluminum nitride. The layered structure 500 is prepared by depositing an aluminium nitride film 502 on the surface of the polycrystalline diamond layer 14. The deposited film 502 may also be a dielectric layer, a metal layer, or a semiconductor layer. The deposited film 502 can be subjected to chemical mechanical polishing, ion conditioning, and/or magnetorheological finishing to achieve a desired low surface roughness, which can be, for example, ra ≦ 1nm. After polishing, the thickness of the aluminum nitride layer 502, i.e., as shown in FIG. 6, may be in the range of 40nm to 50 nm.
Fig. 7 shows the result of joining the layered structures of fig. 5 and 6. After activation by fast atomic beam processing, bonding can be performed using the room temperature process described above. However, the present disclosure is not limited to the examples described herein. Thus, the process can be used not only to bond a gallium nitride-containing layered structure to a diamond-containing layered structure deposited on a silicon wafer, but also to bond a layered structure containing silicon carbide, lithium niobate, lithium tantalate, or another suitable material to a diamond-containing layered structure deposited on a silicon wafer. In addition, the nucleation, transition, and buffer layers 404, 408, 410 shown in fig. 5 and 7 may be removed to obtain improved physical, thermal, electrical, or electromagnetic benefits. Carrier substrate 416 may be used to process layered structure 400 prior to bonding layered structure 400 to layered structure 500 (fig. 6). After the bonding process, the carrier substrate 416 may be removed (fig. 8).
In the example shown in fig. 8, the joining structure comprises a bending compensation layer 18. However, in accordance with other preferred embodiments of the present disclosure, the bow compensation layer 18 may not be included if the bonded substrates do not cause a significant amount of wafer bow, for example, because the substrates are small enough, or for some other reason.
The present disclosure provides a method of bonding a first substrate (such as a wafer) to a second substrate (e.g., another wafer) at low or even lower room temperature. The first substrate may comprise a layer of polycrystalline diamond deposited on silicon. The second substrate may comprise gallium nitride, silicon nitride, lithium niobate, lithium tantalate, and/or another suitable material. Such low or room temperature bonding of substrates may be particularly advantageous where it is desired to overcome the mismatch between the coefficients of thermal expansion of diamond, silicon, lithium niobate, lithium tantalate, and other related materials that may be in a stack of deposited or bonded materials.
Wafer-to-wafer bonding at low temperatures according to the present disclosure may be achieved by bonding a wafer with N 2 、O 2 And/or a plasma of an inert gas, on one or more wafer surfaces to create dangling bonds on the activated surfaces and subsequently bond the surfaces to each other. The surface may be, if desiredAfter plasma activation and before bonding, further activation by atmospheric moisture or clean water.
Wafer-to-wafer bonding at room temperature can be achieved by performing a surface activation process on one or more wafer surfaces by rapid atomic beam activation or ion beam milling to create dangling bonds on the activated surfaces, and then bonding the surfaces to each other under vacuum and at room temperature. If desired, the activation process may be supplemented or replaced by a chemical activation process using suitable materials to effect activation of the surfaces of one or more substrates to be bonded, where suitable materials are oxidants, acids, bases, and the like.
The above description is all examples. The present disclosure is intended to embrace alterations, modifications, and variations of the subject matter described herein that fall within the scope of the application, including the appended claims. As used herein, the term "including" means including but not limited to. The term "based on" means based at least in part on. Furthermore, where the disclosure or claims recite "a/an," "a first," or "another" element or the equivalent thereof, it should be interpreted to include one or more than one such element, neither requiring nor excluding two or more such elements.
The new matter requiring protection of the U.S. patent certificate is:
Claims (24)
1. a wafer, comprising:
a silicon-containing layer;
a polycrystalline diamond layer deposited on the silicon-containing layer; and
a bow compensation layer for reducing wafer bow of the silicon-containing layer and the polycrystalline diamond layer; and is provided with
Wherein the silicon-containing layer is between the polycrystalline diamond layer and the bend compensation layer.
2. The wafer of claim 1, wherein the wafer bow is less than 50 microns.
3. The wafer of claim 1, further comprising a polishing layer of a material other than polycrystalline diamond, wherein the polycrystalline diamond layer is located between the polishing layer and the silicon-containing layer.
4. The wafer of claim 1, further comprising an acoustic mirror layer deposited on the polycrystalline diamond layer.
5. The wafer of claim 4, wherein the acoustic mirror layer has alternating low and high acoustic impedances.
6. A method of manufacturing a bonded structure, comprising:
performing an activation process on a surface of a first substrate; and
bringing a surface of the first substrate into contact bonding with a surface of a second substrate;
wherein the bonding is performed at room temperature, or the bonded structure is thermally annealed at a low temperature.
7. The method of claim 6, wherein the activation process comprises a plasma activation process.
8. The method of claim 6, wherein the activation process comprises a chemical activation process.
9. The method of claim 7, further comprising forming the first substrate by: depositing a material other than diamond on the polycrystalline diamond layer and then reducing the surface roughness of the material other than diamond.
10. The method of claim 9, wherein the surface roughness of the material other than diamond is reduced by chemical mechanical polishing.
11. The method of claim 9, wherein the surface roughness of the material other than diamond is reduced by ion milling or magnetorheological finishing.
12. The method of claim 7, wherein the plasma used for the plasma activation process comprises nitrogen, oxygen, a chemically reactive gas, or an inert gas, and is used to generate dangling bonds on the surface of the first substrate.
13. The method of claim 12, further comprising performing a plasma activation process on the surface of the second substrate to create dangling bonds on the surface of the second substrate.
14. The method of claim 7, further comprising performing a water treatment process on a surface of the first substrate.
15. The method of claim 14 wherein the water treatment process comprises a megasonic cleaning process.
16. The method of claim 7, further comprising aligning the first substrate and the second substrate.
17. The method of claim 7, wherein the bonding of the first and second substrates is achieved by van der waals forces between surfaces of the first and second substrates.
18. The method of claim 17, wherein the contacting bonding of the surface of the first substrate to the surface of the second substrate is performed at room temperature.
19. The method of claim 17, wherein the bonded structure is thermally annealed at a low temperature, and wherein the low temperature is ≦ 300 ℃.
20. The method of claim 17, wherein the bonded structure is thermally annealed at a low temperature, and wherein the low temperature is ≦ 450 ℃.
21. The method of claim 17, wherein the bonded structure is thermally annealed at a low temperature, and wherein the low temperature is ≦ 600 ℃.
22. A joining structure, comprising:
a first substrate comprising a silicon-containing layer, a polycrystalline diamond layer, a bow compensation layer for reducing wafer bow of the first substrate, and a bonding surface; and
a second substrate including gallium nitride, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, or indium phosphide, and a bonding surface, and wherein the bonding surface of the first substrate and the bonding surface of the second substrate are brought into contact bonding.
23. The bonded structure of claim 22, wherein the second substrate comprises a removable carrier substrate, and wherein the gallium nitride, silicon carbide, lithium niobate, lithium tantalate, gallium arsenide, or indium phosphide of the second substrate is located between the carrier substrate and the bonding surface of the second substrate.
24. The bonded structure of claim 22, wherein the first substrate comprises an aluminum nitride layer, the second substrate comprises an aluminum nitride nucleation layer, and the aluminum nitride layer and the nucleation layer comprise bonding surfaces of the first substrate and the second substrate.
Applications Claiming Priority (2)
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US17/302,081 US11738539B2 (en) | 2018-07-17 | 2021-04-23 | Bonded substrate including polycrystalline diamond film |
US17/302,081 | 2021-04-23 |
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CN115241041A true CN115241041A (en) | 2022-10-25 |
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