CN115206249A - Drive control circuit and display device - Google Patents
Drive control circuit and display device Download PDFInfo
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- CN115206249A CN115206249A CN202210900644.0A CN202210900644A CN115206249A CN 115206249 A CN115206249 A CN 115206249A CN 202210900644 A CN202210900644 A CN 202210900644A CN 115206249 A CN115206249 A CN 115206249A
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- 238000010586 diagram Methods 0.000 description 8
- 239000010409 thin film Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 2
- 230000032683 aging Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/3406—Control of illumination source
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/04—Maintaining the quality of display appearance
- G09G2320/043—Preventing or counteracting the effects of ageing
- G09G2320/046—Dealing with screen burn-in prevention or compensation of the effects thereof
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Abstract
The application provides a drive control circuit and display device relates to and shows technical field, and wherein, this drive control circuit is used for M row N row light emitting device on the drive control lamp plate, and M, N are positive integer, and drive control circuit includes: a drive circuit and a control circuit; the input end of the driving circuit is electrically connected with the driving power supply, the output end of the driving circuit is electrically connected with the anodes of the M rows of light-emitting devices, the driving circuit is used for sequentially outputting driving signals to the M rows of light-emitting devices, and the target time length is spaced between the driving time periods of the driving signals of two adjacent rows of light-emitting devices; the output end of the control circuit is electrically connected with the cathodes of the N columns of light-emitting devices, and the control circuit is used for outputting low-potential voltage in each driving period and outputting high-potential voltage in the interval period of each driving period. The application provides a technical scheme can reduce the luminance change of the luminescent device that TFT's leakage current leads to, improves backlight unit's luminance stability, promotes display device's display effect.
Description
Technical Field
The application relates to the technical field of display, in particular to a driving control circuit and a display device.
Background
With the rapid development of the sub-millimeter Light Emitting Diode (Mini-LED) display technology, the Mini-LED driving structure is used as the display panel of the backlight module, and the display panel has the characteristics of high dynamic contrast, light weight, high brightness, and the like, so that the display panel is more and more widely applied to products such as televisions, mobile phones, and the like.
However, the Thin Film Transistor (TFT) in the Mini-LED driving structure may have leakage due to aging, so that the brightness of the backlight module is unstable, and the display effect is affected.
Disclosure of Invention
In view of this, the present application provides a driving control circuit and a display device, so as to reduce the luminance variation of the light emitting device caused by the leakage current of the TFT, thereby improving the luminance stability of the backlight module and improving the display effect of the display device.
In order to achieve the above object, in a first aspect, an embodiment of the present application provides a driving control circuit, configured to drive and control M rows and N columns of light emitting devices on a lamp panel, where M and N are positive integers, and the driving control circuit includes: a drive circuit and a control circuit;
the input end of the driving circuit is electrically connected with a driving power supply, the output end of the driving circuit is electrically connected with the anodes of the light emitting devices in the M rows, the driving circuit is used for sequentially outputting driving signals to the light emitting devices in the M rows, and the target time length is spaced between the driving time periods of the driving signals of the light emitting devices in two adjacent rows;
the output end of the control circuit is electrically connected with the cathodes of the N columns of light emitting devices, and the control circuit is used for outputting a low potential voltage in each driving period and outputting a high potential voltage in the interval period between the driving periods.
As an optional implementation manner of this embodiment of the present application, the control circuit includes N sub-control circuits, and an output terminal of each sub-control circuit is electrically connected to a cathode of a corresponding column of light emitting devices.
As an optional implementation manner of the embodiment of the present application, the nth sub-control circuit includes: the power supply comprises a first switch circuit, a second switch circuit, a switch control circuit, a first power supply and a second power supply, wherein the first power supply outputs a high-level signal, the second power supply outputs a low-level signal, and n belongs to [1, N ];
the input end of the first switch circuit is electrically connected with the first power supply, and the output end of the first switch circuit is electrically connected with the cathode of the nth column of light-emitting devices;
the input end of the second switch circuit is electrically connected with the cathode of the nth column of light-emitting devices, and the output end of the second switch circuit is electrically connected with the second power supply;
the output end of the switch control circuit is respectively electrically connected with the control ends of the first switch circuit and the second switch circuit, and the switch control circuit is used for: in each driving period, the first switch circuit is turned off, and the second switch circuit is turned on; and in the interval time between the driving time intervals, the first switch circuit is switched on, and the second switch circuit is switched off.
As an optional implementation manner of the embodiment of the present application, the switch control circuit includes a level signal line, the first switch circuit includes a first switch tube, and the second switch circuit includes a second switch tube;
the control electrode of the first switch tube is electrically connected with the input end of the level signal line, the first electrode of the first switch tube is electrically connected with the first power supply, and the second electrode of the first switch tube is electrically connected with the cathode of the nth row of light-emitting devices;
the control electrode of the second switch tube is electrically connected with the input end of the level signal line, the first electrode of the second switch tube is electrically connected with the second power supply, and the second electrode of the second switch tube is electrically connected with the cathode of the nth row of light-emitting devices.
As an optional implementation manner of this embodiment, the first switch tube is an N-Metal-Oxide-Semiconductor (NMOS), and the second switch tube is a P-Metal-Oxide-Semiconductor (PMOS);
the level signal line outputs a low level signal in each driving period; in an interval period of each of the driving periods, a high level signal is output.
As an optional implementation manner of the embodiment of the present application, the first switch tube is a PMOS, and the second switch tube is an NMOS;
the level signal line outputs a high level signal in each driving period; in an interval period of each of the driving periods, a low level signal is output.
As an optional implementation manner of this embodiment, a voltage of the driving power supply is less than or equal to a voltage of the first power supply and greater than a voltage of the second power supply.
As an optional implementation manner of this embodiment, the driving power source and the first power source are the same power source.
As an optional implementation manner of this embodiment, the driving control circuit further includes: the time sequence control circuit comprises M sub-driving circuits, and each sub-driving circuit is electrically connected with the anode of a corresponding row of light-emitting devices;
the time sequence control circuit is used for outputting clock signals to the M sub-driving circuits in sequence, and each sub-driving circuit outputs driving signals to the corresponding row of light-emitting devices in the duration period of the received clock signals.
In a second aspect, an embodiment of the present application provides a display device, including a display panel and a backlight module, the display panel set up in backlight module's light-emitting side, backlight module includes a lamp plate and a drive control circuit as described in the first aspect or any one of the embodiments of the first aspect, the lamp plate includes M rows and N columns of light emitting devices.
The embodiment of the application provides a drive control circuit and display device for M row N row light emitting device on drive control lamp plate, M, N are positive integer, and drive control circuit includes: a drive circuit and a control circuit; the input end of the driving circuit is electrically connected with the driving power supply, the output end of the driving circuit is electrically connected with the anodes of the M rows of light-emitting devices, the driving circuit is used for sequentially outputting driving signals to the M rows of light-emitting devices, and the target time length is spaced between the driving time periods of the driving signals of two adjacent rows of light-emitting devices; the output end of the control circuit is electrically connected with the cathodes of the N columns of light-emitting devices, the control circuit outputs low-potential voltage in each driving period, so that the anode voltage of the corresponding row of light-emitting devices is higher than the cathode voltage, current flows from the anodes to the cathodes of the light-emitting devices, and the light-emitting devices emit light normally; the control circuit outputs high potential voltage at the interval time of each driving time, so that no forward current exists at each row of the light-emitting devices, and the light-emitting devices do not emit light, thereby reducing the brightness change of the light-emitting devices caused by the leakage current of the TFT, further improving the brightness stability of the backlight module and improving the display effect of the display panel.
Drawings
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a backlight module according to an embodiment of the present disclosure;
FIG. 3 is a schematic circuit diagram of the driving control circuit shown in FIG. 2;
fig. 4 is an operation timing diagram of a driving control circuit according to an embodiment of the present application.
Detailed Description
The embodiments of the present application are described below with reference to the drawings. The terminology used in the description of the embodiments herein is for the purpose of describing particular embodiments herein only and is not intended to be limiting of the application. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
The Light Emitting device in the embodiment of the present application may be a Mini-LED, or a Micro-Light Emitting Diode (Micro-LED) or other Light Emitting diodes; the present embodiment will be exemplified by taking the light emitting device as a Mini-LED as an example.
Fig. 1 is a schematic structural diagram of a display device provided in an embodiment of the present application, and as shown in fig. 1, the display device may include a display panel 1 and a backlight module 2, the display panel 1 is disposed on a light emitting side of the backlight module 2, the backlight module 2 includes a lamp panel (not shown), and the backlight module 2 is configured to provide a backlight source for the display panel 1.
Fig. 2 is a schematic structural diagram of the backlight module 2 according to the embodiment of the present disclosure, and as shown in fig. 2, the backlight module 2 may include a lamp panel 20, a driving control circuit, and a driving power VLED.
The lamp panel 20 may include M rows and N columns of light emitting devices, where M and N are positive integers.
The drive control circuit may include a drive circuit 30, a control circuit 40, and a timing control circuit 50.
The input end of the driving circuit 30 is electrically connected to the driving power VLED, the output end of the driving circuit 30 is electrically connected to the anodes of the M rows of light emitting devices, the driving circuit 30 is configured to sequentially output driving signals to the M rows of light emitting devices, and a target time interval may be provided between driving periods of the driving signals of two adjacent rows of light emitting devices.
The driving circuit 30 may include M sub-driving circuits, and the timing control circuit 50 is configured to sequentially output clock signals to the M sub-driving circuits, and each sub-driving circuit may output driving signals to the corresponding row of light emitting devices during the duration of the received clock signal.
The target duration of the interval between the driving periods of the driving signals may be the same as the interval duration of the clock signal output by the timing control circuit 50, and the interval duration of the clock signal may be adjusted according to specific requirements. Illustratively, the interval duration (i.e., the target duration) between the driving periods of the driving signals may be 1/4 of the duration of the driving periods of the driving signals, and the interval duration may also be less than 1/4 of the duration of the driving periods, which is not particularly limited in the present embodiment.
The output terminal of the control circuit 40 may be electrically connected to the cathodes of the N columns of light emitting devices, and the control circuit 40 is configured to output a low potential voltage in each driving period and output a high potential voltage in an interval period of each driving period. Thus, in each driving period, the anode voltage of the corresponding row of the light-emitting devices is higher than the cathode voltage, current flows from the anodes to the cathodes of the light-emitting devices, and the light-emitting devices emit light normally; at the interval time of each driving time, the anode voltage of each row of light emitting devices is less than or equal to the cathode voltage, no forward current exists at each row of light emitting devices, and each row of light emitting devices do not emit light, so that the brightness change of the light emitting devices caused by the leakage current of the TFT can be reduced, the stability of the brightness of the backlight module 2 is improved, and the display effect of the display panel 1 is improved.
The control circuit 40 may include N sub-control circuits, and an output terminal of each sub-control circuit may be electrically connected to a cathode of one column of light emitting devices. Therefore, in each driving period, the switching devices in the corresponding column can output smaller current, and the safety of the control circuit 40 is improved.
The nth sub-control circuit may include: a first switch circuit 41, a second switch circuit 42, a switch control circuit 43, a first power supply VDD which can output a high level signal, and a second power supply VSS which can output a low level signal, n ∈ [1, n ].
An input terminal of the first switch circuit 41 is electrically connected to the first power supply VDD, and an output terminal of the first switch circuit 41 is electrically connected to a cathode of the nth column light emitting device.
An input terminal of the second switch circuit 42 is electrically connected to a cathode of the nth column of light emitting devices, and an output terminal of the second switch circuit 42 is electrically connected to the second power source VSS.
An output end of the switch control circuit 43 may be electrically connected to control ends of the first switch circuit 41 and the second switch circuit 42, respectively, and the switch control circuit 43 is configured to turn off the first switch circuit 41 and turn on the second switch circuit 42 in each driving period; in the interval period of each driving period, the first switch circuit 41 is turned on, and the second switch circuit 42 is turned off.
The voltage of the driving power VLED may be greater than the voltage of the second power VSS, so that in each driving period, the second switch circuit 42 is turned on, the cathode voltage of the corresponding row of light emitting devices is the voltage of the second power VSS, the anode voltage of the light emitting devices (i.e., the voltage of the driving power VLED) is greater than the cathode voltage, and a current may flow from the anode to the cathode of the light emitting devices, thereby ensuring that the corresponding row of light emitting devices emit light normally.
The voltage of the driving power VLED may also be less than or equal to the voltage of the first power VDD, so that at the interval time of each driving time, the first switch circuit 41 is turned on, the cathode voltage of the corresponding row of light emitting devices is the voltage of the first power VDD, the anode voltage of the light emitting devices (i.e., the voltage of the driving power VLED) is less than or equal to the cathode voltage, no forward current exists at each row of light emitting devices, and each row of light emitting devices does not emit light, thereby reducing the influence of the leakage current of the TFT on the display effect.
The driving power VLED and the first power VDD may also be the same power, so that the voltage difference between the driving power VLED and the first power VDD can be eliminated, and the circuit is more stable.
Fig. 3 is a schematic circuit diagram of the driving control circuit in fig. 2, and as shown in fig. 3, the mth sub-driving circuit of the driving circuit 30 may include a thin film transistor Mm, anodes of the light emitting devices in the mth row are electrically connected to a drain of the thin film transistor Mm, a source of the thin film transistor Mm is electrically connected to the driving power source VLED, a gate of the thin film transistor Mm is electrically connected to the timing control circuit 50, and m e [1, m ].
The timing control circuit 50 may include a plurality of clock signal lines, each of which may be electrically connected to the gates of the thin film transistors of one or more sub-driving circuits, and the present embodiment is exemplified by the case where the timing control circuit 50 includes 8 clock signal lines. The 8 clock signal lines can be G-SW1, G-SW2, \ 8230;, G-SW8 in sequence.
The timing control circuit 50 may be integrated in an IC chip to reduce an occupied space, and the timing control circuit 50 may also be independent from the chip, which is not limited in this application.
In the nth sub-control circuit of the control circuit 40, the switch control circuit 43 may include a level signal line SWn, the first switch circuit 41 may include a first switch tube Tn1, and the second switch circuit 42 may include a second switch tube Tn2.
A control electrode of the first switching tube Tn1 may be electrically connected to an input terminal of the level signal line SWn, a first electrode of the first switching tube Tn1 may be electrically connected to the first power supply VDD, and a second electrode of the first switching tube Tn1 may be electrically connected to a cathode of the nth column of light emitting devices.
A control electrode of the second switch tube Tn2 is electrically connected to the input end of the level signal line SWn, a first electrode of the second switch tube Tn2 may be electrically connected to the second power supply VSS, and a second electrode of the second switch tube Tn2 may be electrically connected to the cathode of the nth column of light emitting devices.
The first switch tube Tn1 may be an NMOS, correspondingly, the second switch tube Tn2 may be a PMOS, the control electrode of the first switch tube Tn1 is a gate electrode, the first electrode is a drain electrode, the second electrode is a source electrode, the control electrode of the second switch tube Tn2 is a gate electrode, the first electrode is a drain electrode, the second electrode is a source electrode, and the level signal line SWn may output a low level signal at each driving time period; in the interval period of each driving period, a high level signal is output.
The first switch tube Tn1 may also be a PMOS, correspondingly, the second switch tube Tn2 may be an NMOS, the control electrode of the first switch tube Tn1 is a gate electrode, the first electrode is a source electrode, the second electrode is a drain electrode, the control electrode of the second switch tube Tn2 is a gate electrode, the first electrode is a source electrode, the second electrode is a drain electrode, and the level signal line SWn may output a high level signal in each driving period; in the interval period of each driving period, a low-level signal is output.
In the following description, the first switching tube Tn1 is taken as an NMOS, and the second switching tube Tn2 is taken as a PMOS for example.
Fig. 4 is an operation timing diagram of the driving control circuit provided in the embodiment of the present application, and as shown in fig. 4, the M sub-driving circuits sequentially output driving signals to corresponding rows of light emitting devices, and a target time interval is provided between driving periods of the driving signals of two adjacent rows of light emitting devices. In each driving period, all the PMOSs (namely T12-TN 2) in the N sub-control circuits are conducted, the cathode voltage of the corresponding row of light-emitting devices is the voltage of the second power supply VSS, the anode voltage of the light-emitting devices is higher than the cathode voltage, current flows from the anodes to the cathodes of the light-emitting devices, and the corresponding row of light-emitting devices emit light normally; in the interval time of each driving time interval, the NMOS (i.e., T11 to TN 1) in the N sub-control circuits are all turned on, the cathode voltage of each row of light emitting devices is the voltage of the first power supply VDD, the anode voltage of each row of light emitting devices is less than or equal to the cathode voltage, and each row of light emitting devices does not emit light.
The embodiment of the application provides a drive control circuit and display device for M row N row light emitting device on drive control lamp plate, M, N are positive integer, and drive control circuit includes: a drive circuit and a control circuit; the input end of the driving circuit is electrically connected with the driving power supply, the output end of the driving circuit is electrically connected with the anodes of the M rows of light-emitting devices, the driving circuit is used for sequentially outputting driving signals to the M rows of light-emitting devices, and the target time length is spaced between the driving time periods of the driving signals of two adjacent rows of light-emitting devices; the output end of the control circuit is electrically connected with the cathodes of the N columns of light-emitting devices, the control circuit outputs low-potential voltage in each driving period, so that the anode voltage of the corresponding row of light-emitting devices is higher than the cathode voltage, current flows from the anodes to the cathodes of the light-emitting devices, and the light-emitting devices emit light normally; the control circuit outputs high potential voltage at the interval time of each driving time, so that no forward current exists at each row of the light-emitting devices, and the light-emitting devices do not emit light, thereby reducing the brightness change of the light-emitting devices caused by the leakage current of the TFT, further improving the brightness stability of the backlight module and improving the display effect of the display panel.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The naming or numbering of the steps appearing in the present application does not mean that the steps in the method flow have to be executed in the chronological/logical order indicated by the naming or numbering, and the named or numbered process steps may be executed in a modified order depending on the technical purpose to be achieved, as long as the same or similar technical effects are achieved.
In the description of the present application, "/" indicates a relationship in which the objects linked before and after are "or", for example, a/B may indicate a or B; in the present application, "and/or" is only an association relationship describing an association object, and means that there may be three relationships, for example, a and/or B, and may mean: a exists alone, A and B exist simultaneously, and B exists alone, wherein A and B can be singular or plural.
Also, in the description of the present application, "a plurality" means two or more than two unless otherwise specified. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b, or c, may represent: a, b, c, a-b, a-c, b-c, or a-b-c, wherein a, b, c may be single or multiple.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Furthermore, in the description of the present application and the appended claims, the terms "first," "second," "third," and the like are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein.
Reference throughout this specification to "one embodiment" or "some embodiments," or the like, described with reference to "one embodiment" or "some embodiments" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the present application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," or the like, in various places throughout this specification are not necessarily all referring to the same embodiment, but rather mean "one or more but not all embodiments" unless specifically stated otherwise.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and these modifications or substitutions do not depart from the scope of the technical solutions of the embodiments of the present application.
Claims (10)
1. The utility model provides a drive control circuit for M row N row light emitting device on drive control lamp plate, M, N are positive integer, its characterized in that, drive control circuit includes: a drive circuit and a control circuit;
the input end of the driving circuit is electrically connected with a driving power supply, the output end of the driving circuit is electrically connected with the anodes of the M rows of light-emitting devices, the driving circuit is used for sequentially outputting driving signals to the M rows of light-emitting devices, and target time length is spaced between the driving time periods of the driving signals of two adjacent rows of light-emitting devices;
the output end of the control circuit is electrically connected with the cathodes of the N columns of light emitting devices, and the control circuit is used for outputting a low potential voltage in each driving period and outputting a high potential voltage in the interval period between the driving periods.
2. The driving control circuit according to claim 1, wherein the control circuit comprises N sub-control circuits, and an output terminal of each sub-control circuit is electrically connected to a cathode of a corresponding column of light emitting devices.
3. The drive control circuit according to claim 2, wherein the nth sub-control circuit comprises: the circuit comprises a first switch circuit, a second switch circuit, a switch control circuit, a first power supply and a second power supply, wherein the first power supply outputs a high-level signal, the second power supply outputs a low-level signal, and n belongs to [1, N ];
the input end of the first switch circuit is electrically connected with the first power supply, and the output end of the first switch circuit is electrically connected with the cathode of the nth row of light-emitting devices;
the input end of the second switch circuit is electrically connected with the cathode of the nth column of light-emitting devices, and the output end of the second switch circuit is electrically connected with the second power supply;
the output end of the switch control circuit is respectively electrically connected with the control ends of the first switch circuit and the second switch circuit, and the switch control circuit is used for: in each driving period, the first switch circuit is turned off, and the second switch circuit is turned on; and in the interval time between the driving time intervals, the first switch circuit is switched on, and the second switch circuit is switched off.
4. The driving control circuit of claim 3, wherein the switch control circuit comprises a level signal line, the first switch circuit comprises a first switch tube, and the second switch circuit comprises a second switch tube;
the control electrode of the first switch tube is electrically connected with the level signal wire, the first electrode of the first switch tube is electrically connected with the first power supply, and the second electrode of the first switch tube is electrically connected with the cathode of the nth row of light-emitting devices;
the control electrode of the second switch tube is electrically connected with the level signal wire, the first electrode of the second switch tube is electrically connected with the second power supply, and the second electrode of the second switch tube is electrically connected with the cathode of the nth row of light-emitting devices.
5. The driving control circuit according to claim 4, wherein the first switch transistor is an NMOS and the second switch transistor is a PMOS;
the level signal line outputs a low level signal in each driving period; in the interval period of each of the driving periods, a high level signal is output.
6. The driving control circuit according to claim 4, wherein the first switch transistor is PMOS, and the second switch transistor is NMOS;
the level signal line outputs a high level signal in each driving period; in the interval period of each of the driving periods, a low level signal is output.
7. The drive control circuit according to claim 3, wherein the voltage of the drive power supply is smaller than or equal to the voltage of the first power supply and larger than the voltage of the second power supply.
8. The drive control circuit according to claim 7, wherein the drive power supply and the first power supply are the same power supply.
9. The drive control circuit according to any one of claims 1 to 8, characterized by further comprising: the time sequence control circuit comprises M sub-driving circuits, and each sub-driving circuit is electrically connected with the anode of a corresponding row of light-emitting devices;
the time sequence control circuit is used for outputting clock signals to the M sub-driving circuits in sequence, and each sub-driving circuit outputs driving signals to the corresponding row of light-emitting devices in the duration period of the received clock signals.
10. A display device is characterized by comprising a display panel and a backlight module, wherein the display panel is arranged on the light emergent side of the backlight module, the backlight module comprises a lamp panel according to any one of claims 1-9, and the lamp panel comprises M rows and N columns of light-emitting devices.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202210900644.0A CN115206249A (en) | 2022-07-28 | 2022-07-28 | Drive control circuit and display device |
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| CN202210900644.0A CN115206249A (en) | 2022-07-28 | 2022-07-28 | Drive control circuit and display device |
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
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