CN115202147A - Method for establishing OPC model - Google Patents
Method for establishing OPC model Download PDFInfo
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- CN115202147A CN115202147A CN202210898557.6A CN202210898557A CN115202147A CN 115202147 A CN115202147 A CN 115202147A CN 202210898557 A CN202210898557 A CN 202210898557A CN 115202147 A CN115202147 A CN 115202147A
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/10—Geometric CAD
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
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Abstract
The invention provides a method for establishing an OPC model, which comprises the following steps: collecting focal length energy matrix data; establishing an optical model according to the focal length energy matrix data; simulating the photomask by using an optical model to obtain a simulated ADI critical dimension exposed on the chip, dividing the simulated ADI critical dimension into a first grade, a second grade and a third grade, and recording the positions of the photomask corresponding to the first grade, the second grade and the third grade as a first position, a second position and a third position respectively; calculating a photoetching process window according to the optical model, and exposing the chip under the photoetching process window; measuring the actual ADI critical dimension of the graph line exposed on the chip corresponding to the first position; and establishing an OPC model according to the actual ADI critical dimension. The range of collecting ADI critical dimension measurement is reduced, the number of measured ADI critical dimensions is reduced, the accuracy of the established OPC model is improved, and the production efficiency can also be improved.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for establishing an OPC model.
Background
In semiconductor manufacturing, as the design size is continuously reduced, the diffraction Effect of light becomes more and more obvious, and as a result, the Optical image finally generated on the design pattern is degraded, and the actual pattern finally formed on the silicon wafer through photolithography becomes different from the design pattern, which is called an OPE (Optical Proximity Effect).
In order to correct the OPE phenomenon, OPC (Optical Proximity Correction) is generated. The core idea of OPC is to create an OPC model based on consideration of cancellation of the OPE phenomenon, and design a photomask pattern based on the OPC model, so that although the photo-etched pattern has an OPC phenomenon corresponding to the photomask pattern, since cancellation of the phenomenon is already considered when designing the photomask pattern based on the OPC model, the photo-etched pattern is close to a target pattern that a user actually desires.
In the prior art, in the OPC model establishment, a CD value of a chip critical dimension corresponding to a photomask due to an optical proximity effect cannot be obtained because a light source or the photomask is a new variation factor. Therefore, data of a sample needs to be collected in advance for establishing an OPC model to establish a database, which can be displayed in a table form, where the left vertical axis is Mask CD Width (Mask CD Width), the upper horizontal axis is Mask CD Space (Mask CD Space), and the ADI CD Width (pattern Width) of a pattern line after exposure of a chip and the ADI CD Space (pattern line Space) of the pattern line after exposure of the chip are obtained in a group corresponding to the Mask CD Width and the Mask CD Space of the photomask. At the beginning of establishing the OPC model, the values of ADI critical dimension Width and ADI critical dimension Space must be measured from the chip, and before the actual values are measured, a process design rule is required to estimate the corresponding exposure range of the photomask on the chip, so as to determine the measured area range, but the measured area range is often set too large, so that some unhealthy data (ADI critical dimension) is received, so that the measurement level is reduced or the establishment of the subsequent OPC model is disturbed, and in addition, the redundant data measurement often needs to be completed by a machine occupying the production line, so as to affect the efficiency of chip production.
Disclosure of Invention
The invention aims to provide a method for establishing an OPC model, which can reduce the measuring range of ADI critical dimensions, reduce the number of the measured ADI critical dimensions, improve the accuracy of the established OPC model and also improve the production efficiency.
In order to achieve the above object, the present invention provides a method for establishing an OPC model, comprising:
collecting focal length energy matrix data during chip exposure;
establishing an optical model according to the focal length energy matrix data;
simulating the photomask by using the optical model to obtain a simulated ADI critical dimension exposed on a chip, dividing the simulated ADI critical dimension into a first grade, a second grade and a third grade, and recording the positions of the photomask corresponding to the first grade, the second grade and the third grade as a first position, a second position and a third position respectively;
calculating a photoetching process window according to the optical model, and exposing a chip under the photoetching process window;
measuring the actual ADI critical dimension of the graph line exposed on the chip corresponding to the first position; and
and establishing an OPC model according to the actual ADI critical dimension.
Optionally, in the method for establishing an OPC model, the focal length energy matrix data includes: pattern pitch, mask pattern size, chip exposure pattern size, and process window.
Optionally, in the method for establishing an OPC model, the focal length energy matrix data selects data of 50 to 100 sampling points on the chip.
Optionally, in the method for establishing the OPC model, the optical model is used to simulate the photomask, and the number of simulated samples is 1000 to 2000.
Optionally, in the method for establishing an OPC model, the method for dividing the simulated ADI critical dimension into a first level, a second level, and a third level includes:
deriving a relational expression between the optimal exposure distance focus and the imaging distance of the image under the photomask according to the optical model;
obtaining the logarithmic slope of the normalized image of the relational expression; and
if the logarithmic slope of the normalized image is larger than the first set value and smaller than the second set value, the corresponding simulated ADI critical dimension is taken as a first grade, if the logarithmic slope of the normalized image is larger than the second set value, the corresponding simulated ADI critical dimension is taken as a second grade, and if the logarithmic slope of the normalized image is smaller than the first set value, the corresponding simulated ADI critical dimension is taken as a third grade.
Optionally, in the method for establishing an OPC model, the priority order of the measured actual ADI critical dimensions is the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the first position, the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position, and the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the third position.
Optionally, in the method for establishing an OPC model, the method further includes: selectively measuring the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position, and if the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position is measured, establishing an OPC model according to the measured actual ADI critical dimension of the first position and the measured actual ADI critical dimension of the second position.
Optionally, in the method for establishing an OPC model, the method further includes: selectively measuring the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position and the third position, and if the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position and/or the third position is measured, establishing an OPC model according to the measured actual ADI critical dimension of the first position, the measured actual ADI critical dimension of the second position and the measured actual ADI critical dimension of the third position.
Optionally, in the method for establishing an OPC model, the simulated ADI critical dimension of the second level is used as control data of the OPC model; and the simulated ADI critical dimension of the third level is used as verification data of an OPC model.
Optionally, in the method for establishing an OPC model, the ADI critical dimension includes a pattern line width and a pattern line diameter gap.
Before the actual ADI critical dimension of the OPC model is collected, the optical model is established according to focal length energy matrix data, simulation is carried out according to the optical model to obtain the simulated ADI critical dimension, the simulated ADI critical dimension is divided into three levels, the first position, the second position and the third position of the photomask, which correspond to the simulated ADI critical dimension of the three levels, are found respectively, exposure is carried out on a chip, and the actual ADI critical dimension on the chip, which corresponds to the first position, is found to carry out the establishment of the OPC model. Compared with the prior art, the method has the advantages that the range for collecting ADI critical dimension measurement is reduced, the number of the measured ADI critical dimensions is reduced, the accuracy of the established OPC model is improved, and the production efficiency can be improved.
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FIG. 1 is a flow chart of a method of establishing an OPC model.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is provided for the purpose of facilitating and clearly illustrating embodiments of the present invention.
In the following, the terms "first," "second," and the like are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the terms so used are interchangeable under appropriate circumstances. Similarly, if the method described herein comprises a series of steps, the order in which these steps are presented herein is not necessarily the only order in which these steps may be performed, and some of the described steps may be omitted and/or some other steps not described herein may be added to the method.
Referring to fig. 1, the present invention provides a method for establishing an OPC model, which includes:
s11: collecting focal length energy matrix data during chip exposure;
s12: establishing an optical model according to the focal length energy matrix data;
s13: simulating the photomask by using an optical model to obtain a simulated ADI critical dimension exposed on the chip, dividing the simulated ADI critical dimension into a first grade, a second grade and a third grade, and recording the positions of the photomask corresponding to the first grade, the second grade and the third grade as a first position, a second position and a third position respectively;
s14: calculating a photoetching process window according to the optical model, and exposing the chip under the photoetching process window;
s15: measuring the actual ADI critical dimension of the graph line exposed on the chip corresponding to the first position; and
s16: and establishing an OPC model according to the actual ADI critical dimension.
Preferably, the focal length energy matrix data comprises: pattern pitch, mask pattern size mask CD, chip exposure pattern size ADI, and process window DOF. The focal length energy matrix data may be derived from previous historical data.
Preferably, the focal length energy matrix data selects data of 50-100 sampling points on the chip. The photomask is simulated by using an optical model, and the number of the simulated samples is 1000-2000. The number of samples from which the focal length energy matrix data was collected was about 5% -6% of the number of simulations of the photomask using the optical model.
Preferably, the lithography process window is calculated according to some physical properties of the optical model, which is not described herein. And dividing the simulated ADI critical dimension into a first grade, a second grade and a third grade according to the value of the logarithmic slope of the normalized image. The optical model derives a relation between an optimal exposure focus and an imaging distance of the Image under the photomask, the relation is a polynomial, a Normalized Image Log Slope NILS (Normalized Image Log Slope) of the polynomial can be used as an index for dividing the simulated ADI critical dimension into a first level, a second level and a third level, if the Normalized Image Log Slope NILS is greater than a first set value and less than a second set value, the simulated ADI critical dimension corresponding to the Normalized Image Log Slope NILS is used as the first level, if the Normalized Image Log Slope NILS is greater than the second set value, the simulated ADI critical dimension corresponding to the Normalized Image Log Slope NILS is used as the second level, and if the Normalized Image Log Slope NILS is less than the first set value, the simulated ADI critical dimension corresponding to the Normalized Image Log Slope NILS is used as the third level. The value of the first set value is smaller than that of the second set value, and both the first set value and the second set value can be set manually.
Preferably, the priority order of the measured actual ADI critical dimensions is the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the first position, the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position, and the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the third position. In an embodiment of the present invention, the method further includes: selectively measuring the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position, and if the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position is measured, establishing an OPC model according to the measured actual ADI critical dimension of the first position and the actual ADI critical dimension of the second position. In another embodiment of the present invention, the method further comprises: selectively measuring the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position and the third position, and if the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position and/or the third position is measured, establishing an OPC model according to the measured actual ADI critical dimension of the first position, the measured actual ADI critical dimension of the second position and the measured actual ADI critical dimension of the third position. That is, if time allows, the line width and line diameter gap of the pattern corresponding to that range on the exposed chip of the mask plate at the second position can also be measured. Similarly, if there is more time, the mask plate can continue to measure the line width and line diameter gap of the pattern corresponding to that range on the exposed chip at the third position. The measured data are all used to establish an OPC model, and the method for establishing the OPC model is not described herein again.
Preferably, the simulation ADI critical dimension of the second level is used as the control data of the OPC model; the third level of simulated ADI critical dimensions serves as verification data for the OPC model.
Preferably, the ADI critical dimension includes a pattern line width and a pattern line diameter gap. The pattern on the photomask has Mask CD Width and Mask CD Space, so that after the photomask is used for exposing the chip, the exposed pattern on the chip also has line Width and line diameter clearance, so that the simulation ADI critical dimension comprises the simulation pattern line Width and the simulation pattern line diameter clearance, and the actual ADI critical dimension comprises the actual pattern line Width and the actual pattern line diameter clearance.
In summary, in the method for establishing an OPC model according to the embodiments of the present invention, before the actual ADI critical dimension of the OPC model is collected, an optical model is established according to the focal length energy matrix data, a simulation is performed according to the optical model to obtain a simulated ADI critical dimension, the simulated ADI critical dimension is divided into three levels, the first position, the second position, and the third position of the photomask respectively corresponding to the simulated ADI critical dimension of the three levels are found, the chip is exposed, and the actual ADI critical dimension on the chip corresponding to the first position is found to establish the OPC model. Compared with the prior art, the method has the advantages that the measurement range of the collected ADI critical dimension is reduced, the number of the measured ADI critical dimension is reduced, the accuracy of the established OPC model is improved, and the production efficiency can be improved.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. Any person skilled in the art can make any equivalent substitutions or modifications on the technical solutions and technical contents disclosed in the present invention without departing from the scope of the technical solutions of the present invention, and still fall within the protection scope of the present invention without departing from the technical solutions of the present invention.
Claims (10)
1. A method for building an OPC model, comprising:
collecting focal length energy matrix data during chip exposure;
establishing an optical model according to the focal length energy matrix data;
simulating the photomask by using the optical model to obtain a simulated ADI critical dimension exposed on a chip, dividing the simulated ADI critical dimension into a first grade, a second grade and a third grade, and recording the positions of the photomask corresponding to the first grade, the second grade and the third grade as a first position, a second position and a third position respectively;
calculating a photoetching process window according to the optical model, and exposing a chip under the photoetching process window;
measuring the actual ADI critical dimension of the graph line exposed on the chip corresponding to the first position; and
and establishing an OPC model according to the actual ADI critical dimension.
2. The method of establishing an OPC model of claim 1 wherein the focal length energy matrix data comprises: pattern pitch, mask pattern size, chip exposure pattern size, and process window.
3. A method of establishing an OPC model in accordance with claim 1 wherein the focal length energy matrix data selects data for between 50 and 100 sampling points on the chip.
4. The method of claim 1, wherein the optical model is used to simulate a photomask, and the number of simulated samples is 1000 to 2000.
5. The method of establishing an OPC model of claim 1 wherein the method of classifying the simulated ADI critical dimensions into a first level, a second level and a third level comprises:
deriving a relational expression between the optimal exposure distance focus and the imaging distance of the image under the photomask according to the optical model;
obtaining the logarithmic slope of the normalized image of the relational expression; and
if the logarithmic slope of the normalized image is larger than the first set value and smaller than the second set value, the corresponding simulated ADI critical dimension is taken as a first grade, if the logarithmic slope of the normalized image is larger than the second set value, the corresponding simulated ADI critical dimension is taken as a second grade, and if the logarithmic slope of the normalized image is smaller than the first set value, the corresponding simulated ADI critical dimension is taken as a third grade.
6. The method of claim 1, wherein the measured ADI CD priorities are actual ADI CD of the pattern line exposed on the chip corresponding to the first position, actual ADI CD of the pattern line exposed on the chip corresponding to the second position, and actual ADI CD of the pattern line exposed on the chip corresponding to the third position.
7. The method of establishing an OPC model of claim 6 further comprising: selectively measuring the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position, and if the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position is measured, establishing an OPC model according to the measured actual ADI critical dimension of the first position and the measured actual ADI critical dimension of the second position.
8. The method of establishing an OPC model of claim 7 further comprising: selectively measuring the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position and the third position, and if the actual ADI critical dimension of the pattern line exposed on the chip corresponding to the second position and/or the third position is measured, establishing an OPC model according to the measured actual ADI critical dimension of the first position, the measured actual ADI critical dimension of the second position and the measured actual ADI critical dimension of the third position.
9. The method for creating OPC models of claim 1 wherein the simulated ADI critical dimension of the second level is used as a control data of OPC models; and the third-level simulation ADI critical dimension is used as verification data of an OPC model.
10. The method of developing an OPC model of claim 1 wherein the ADI critical dimensions comprise pattern line widths and pattern line diameter gaps.
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