CN115190741A - FPGA accelerator card - Google Patents
FPGA accelerator card Download PDFInfo
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- CN115190741A CN115190741A CN202210748241.9A CN202210748241A CN115190741A CN 115190741 A CN115190741 A CN 115190741A CN 202210748241 A CN202210748241 A CN 202210748241A CN 115190741 A CN115190741 A CN 115190741A
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- 239000000428 dust Substances 0.000 claims abstract description 43
- 230000007246 mechanism Effects 0.000 claims abstract description 31
- 230000017525 heat dissipation Effects 0.000 claims abstract description 28
- 230000001681 protective effect Effects 0.000 claims description 16
- 230000000149 penetrating effect Effects 0.000 claims description 8
- 230000000694 effects Effects 0.000 abstract description 13
- 230000008859 change Effects 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 230000002265 prevention Effects 0.000 description 6
- 230000009471 action Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 230000005012 migration Effects 0.000 description 2
- 238000013508 migration Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007405 data analysis Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
- H05K7/20009—Modifications to facilitate cooling, ventilating, or heating using a gaseous coolant in electronic enclosures
- H05K7/20136—Forced ventilation, e.g. by fans
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/46—Bases; Cases
- H01R13/52—Dustproof, splashproof, drip-proof, waterproof, or flameproof cases
- H01R13/5202—Sealing means between parts of housing or between housing part and a wall, e.g. sealing rings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/46—Bases; Cases
- H01R13/52—Dustproof, splashproof, drip-proof, waterproof, or flameproof cases
- H01R13/5213—Covers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/20—Modifications to facilitate cooling, ventilating, or heating
- H05K7/20009—Modifications to facilitate cooling, ventilating, or heating using a gaseous coolant in electronic enclosures
- H05K7/20136—Forced ventilation, e.g. by fans
- H05K7/20181—Filters; Louvers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Microelectronics & Electronic Packaging (AREA)
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- Thermal Sciences (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
Abstract
The invention relates to an FPGA accelerator card, which comprises an FPGA accelerator card base, wherein an FPGA accelerator card working block is fixed on the upper surface of the FPGA accelerator card base, a socket positioned on the left side of the FPGA accelerator card working block is fixed on the upper surface of the FPGA accelerator card base, a baffle plate penetrated by the socket is fixed on the left side of the FPGA accelerator card base, a connecting block is fixed on the right side of the FPGA accelerator card base, a heat dissipation mechanism used for dissipating heat of the FPGA accelerator card is arranged in the connecting block, and a dustproof mechanism used for preventing dust from entering the socket is arranged on the left side of the baffle plate. This FPGA accelerates card takes the heat that different work pieces produced outside by the guard box through three fan under heat dissipation mechanism's effect out, makes FPGA accelerates the card and can accelerate the scattering and disappearing of heat to improve the radiating effect, avoided simultaneously through the dust screen that the dust gets into in the guard box and piled up and make it can be with the normal scattering and disappearing of heat come and take away by the fan on FPGA accelerates the card, thereby improved the heat-sinking capability of FPGA accelerates the card.
Description
Technical Field
The invention relates to the technical field of electronic equipment, in particular to an FPGA (field programmable gate array) accelerator card.
Background
With the development of scientific technology and the progress of times, people have more and more deep research on face recognition related technologies, accelerator cards are more and more applied to genomics research, real-time video processing and big data analysis and search, and with the more and more extensive application requirements of the FPGA accelerator cards, the FPGA accelerator cards can also be used in the aspect of face recognition technology, so that the requirement on an efficient FPGA accelerator card in the market is more and more increased.
Chinese patent CN 101800237B discloses a phase change memory chip layout structure, which discloses a phase change memory chip layout structure, wherein the phase change memory chip layout includes a first layout area, a second layout area, a third layout area, a fourth layout area, a fifth layout area and a sixth layout area; the first layout area, the second layout area, the third layout area and the fourth layout area are positioned in the center of the phase change memory chip layout; the first layout area is connected with the second layout area, the second layout area is connected with the third layout area, the second layout area is connected with the fourth layout area, and the third layout area is connected with the fourth layout area; the fifth layout area covers the central blank area of the layout except the first layout area, the second layout area, the third layout area and the fourth layout area; the sixth domain area is uniformly distributed at the periphery and four corners of the phase change memory chip domain, the phase change memory chip domain structure provided by the invention has reasonable chip domain layout, the interference of noise of a voltage controlled oscillator and noise of a digital circuit to an analog circuit and a storage array is effectively reduced, but the problem of poor heat dissipation effect exists, a protection box is generally arranged on the upper side of the FPGA accelerator card, a fan which is opposite to the chip is fixed in the protection box, the chip of the FPGA accelerator card in work is dissipated through the fan, but other working modules are not dissipated, so that the internal temperature of the FPGA accelerator card can be gradually increased during work, the service life of the FPGA accelerator card is shortened, meanwhile, the fan is not provided with a dustproof mechanism, dust can enter the protection box through the fan and be accumulated on the FPGA accelerator card, the heat dissipation effect of the FPGA accelerator card is reduced, the temperature rise of the FPGA accelerator card during work is intensified, the service life of the FPGA accelerator card is accelerated and reduced, and when the temperature is too high and the dust is increased, an AI calculation accelerated solution is influenced, and a user can not be helped to flexibly finish the migration of a working load and an algorithm.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides the FPGA accelerator card which has the advantages of good heat dissipation effect and the like, and solves the problem that the service life of the FPGA accelerator card is shortened due to the fact that the heat dissipation effect is reduced because the working module does not dissipate heat and the fan does not perform dustproof treatment.
In order to achieve the purpose, the invention provides the following technical scheme: the FPGA accelerator card comprises an FPGA accelerator card base, wherein an FPGA accelerator card working block is fixed on the upper surface of the FPGA accelerator card base, a socket positioned on the left side of the FPGA accelerator card working block is fixed on the upper surface of the FPGA accelerator card base, a baffle plate penetrated through by the socket is fixed on the left side of the FPGA accelerator card base, a connecting block is fixed on the right side of the FPGA accelerator card base, a heat dissipation mechanism used for dissipating heat of the FPGA accelerator card is arranged in the connecting block, and a dustproof mechanism used for preventing dust from entering the socket is arranged on the left side of the baffle plate;
the heat dissipation mechanism comprises a positioning block inserted in the connecting block, the connecting block is inserted with a positioning rod penetrating through the positioning block, a protective box is fixed on the upper surface of the positioning rod, a fan is fixed in the protective box, a screw is connected to the upper surface of the protective box in a threaded manner, a connecting plate located on the upper side of the protective box is connected to the outer side of the screw in a threaded manner, a supporting box located on the outer side of the fan is fixed on the upper surface of the connecting plate, and a dust screen located on the upper side of the fan is fixed in the supporting box.
Further, the heat dissipation mechanism still includes the location case of fixing on the protective housing right side, the roof of location incasement chamber is fixed with first spring, the lower fixed surface of first spring has the limiting plate, the inside of limiting plate is fixed with the dead lever, the top of dead lever is fixed with the arm-tie, the last fixed surface of baffle has the top to run through the screw rod of protective housing, the outside threaded connection of screw rod has fixed storehouse, the top of fixed storehouse is fixed with the accessory plate.
Further, the shape of protective housing is the cuboid that inside cavity and left side and lower surface all lacked, the shape of supporting box is the cuboid that inside cavity and upper surface and lower surface all lacked.
Furthermore, a first positioning groove is formed in the upper surface of the connecting block, and the positioning block is inserted into the first positioning groove.
Furthermore, the right side of the connecting block is provided with a second positioning groove for the insertion of the positioning rod, and the left side of the positioning block is provided with a first positioning hole for the penetration of the positioning rod.
Further, a first fixing groove is formed in the upper surface of the fixing rod, and the fixing rod is inserted into the first fixing groove.
Furthermore, the upper surface of the protection box is provided with a second positioning hole for a screw to penetrate through, the lower surface of the fixed bin is provided with a first thread groove, and the screw is in threaded connection with the inside of the thread groove.
Further, dustproof mechanism is including fixing at the left dust prevention case of baffle, the left side of dust prevention case is fixed with the hinge, the dust prevention case articulates through the hinge has the case lid, the inside sliding connection of case lid has the slider, the left side of slider is fixed with the slide, the left side of slide is fixed with the handle, the right side of slide is fixed with the arm-lift that is located the dust prevention case upside, the lower fixed surface of arm-lift has the second spring, the lower fixed surface of arm-lift has the fixed block that is located second spring right side.
Further, the second spring is fixed on the bottom wall of the inner cavity of the box cover, a sliding groove is formed in the box cover, the sliding block is in clearance fit with the box cover through the sliding groove, and the sliding block is T-shaped.
Furthermore, a second fixing groove is formed in the upper surface of the dust-proof box, and the fixing block is inserted into the second fixing groove.
Compared with the prior art, the technical scheme of the application has the following beneficial effects:
1. this FPGA accelerating card, the heat that produces different work pieces through three fan is taken out by the inside outside of protective housing under heat dissipation mechanism's effect, make the scattering and disappearing of FPGA accelerating card can accelerate the heat, thereby the radiating effect has been improved, avoided simultaneously through the dust screen to get into in the protective housing and piled up and make it can be with the normal scattering and disappearing of heat come and take away by the fan on the FPGA accelerating card, thereby the heat-sinking capability of FPGA accelerating card has been improved, bring more advanced AI calculation solution with higher speed for the server, help the user to accomplish the migration of workload and algorithm in a flexible way.
2. This FPGA accelerating card seals the socket through dust-proof box and case lid under dustproof mechanism's effect, makes the socket can not pile up the dust when not using, has avoided piling up the condition that the dust leads to the short circuit in because of the socket, has formed the protection to the socket simultaneously, avoids the socket to expose and is pounded the damage by other objects when the outside, opens the case lid simultaneously and makes also convenient and fast, has improved the practicality of FPGA accelerating card greatly.
Drawings
FIG. 1 is a schematic view of the structure of the present invention;
FIG. 2 is a schematic view of a heat dissipation mechanism according to the present invention;
FIG. 3 is an enlarged schematic view of the structure at A in FIG. 2 according to the present invention;
FIG. 4 is a schematic view of the dust-proof mechanism of the present invention;
FIG. 5 is an enlarged view of the structure at B in FIG. 4 according to the present invention.
In the figure: the device comprises an FPGA accelerator card base, a 2 connecting block, a 3 FPGA accelerator card working block, a 4 heat dissipation mechanism, a 401 screw, a 402 fixing bin, a 403 auxiliary plate, a 404 fan, a 405 connecting plate, a 406 supporting box, a 407 dust screen, 408 screws, a 409 protection box, a 410 positioning rod, a 411 positioning block, a 412 positioning box, a 413 pulling plate, 414 fixing rods, a 415 first spring, a 416 limiting plate, a 5 dust prevention mechanism, a 501 fixing block, a 502 lifting plate, a 503 handle, a 504 box cover, a 505 hinge, a 506 dust prevention box, a 507 slider, a 508 second spring, a 509 sliding plate, a 6 baffle and a 7 socket.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, the FPGA accelerator card in the embodiment includes an FPGA accelerator card base 1, an FPGA accelerator card working block 3 fixed to an upper surface of the FPGA accelerator card base 1, a socket 7 located on a left side of the FPGA accelerator card working block 3 fixed to the upper surface of the FPGA accelerator card base 1, a baffle 6 penetrated through by the socket 7 fixed to a left side of the FPGA accelerator card base 1, a connecting block 2 fixed to a right side of the FPGA accelerator card base 1, a heat dissipation mechanism 4 for dissipating heat of the FPGA accelerator card arranged inside the connecting block 2, and a dustproof mechanism 5 for preventing dust from entering the socket 7 arranged on a left side of the baffle 6.
Referring to fig. 2-3, in order to dissipate heat of the FPGA accelerator card, the heat dissipation mechanism 4 in this embodiment includes positioning blocks 411 inserted in the connection block 2, positioning rods 410 inserted in the connection block 2 and penetrating through the positioning blocks 411, a protection box 409 is fixed on an upper surface of the positioning rods 410, fans 404 are fixed inside the protection box 409, the number of the fans 404 is three, when the FPGA accelerator card is used, the three fans 404 are started together, three fans draw heat generated by different working blocks from the inside of the protection box 409 to the outside, so as to improve the heat dissipation effect of the FPGA accelerator card, a screw 408 is screwed on an upper surface of the protection box 409, a connection plate 405 positioned on the upper side of the protection box 409 is screwed on an outside of the screw 408, a support box 406 positioned outside the fan 404 is fixed on an upper surface of the connection plate 405, a dust screen 407 positioned on the upper side of the support box 406 is fixed inside of the fan 404, dust is prevented from entering the inside of the protection box 409 through the fan 404 by the dust screen 407, so as to prevent the FPGA accelerator card from being accumulated, and the heat dissipation capability of the FPGA accelerator card itself can be fully used normally.
The heat dissipation mechanism 4 further comprises a positioning box 412 fixed on the right side of the protection box 409, a first spring 415 is fixed on the top wall of an inner cavity of the positioning box 412, a limiting plate 416 is fixed on the lower surface of the first spring 415, a fixing rod 414 is fixed inside the limiting plate 416, a pulling plate 413 is fixed at the top end of the fixing rod 414, when the limiting plate 416 is pulled into the positioning box 412, the bottom end of the fixing rod 414 does not shake, so that the fixing rod 414 can penetrate through the positioning box 412 again after the pulling plate 413 is loosened, the pulling plate 413 is L-shaped, a screw 401 with a top end penetrating through the protection box 409 is fixed on the upper surface of the baffle 6, a fixing bin 402 is in threaded connection with the outer side of the screw 401, an auxiliary plate is fixed at the top end of the fixing bin 402, the auxiliary plate 403 is used for helping a user to rotate the fixing bin 402, and the protection box 409 is in a cuboid shape that the inside is hollow and the left side and the lower surface are both absent, the supporting box 406 is a cuboid which is hollow inside and has a missing upper surface and a missing lower surface, a first positioning groove is formed in the upper surface of the connecting block 2, the positioning block 411 is inserted in the first positioning groove, a second positioning groove for inserting the positioning rod 410 is formed in the right side of the connecting block 2, a first positioning hole for penetrating the positioning rod 410 is formed in the left side of the positioning block 411, a first fixing groove is formed in the upper surface of the positioning rod 410, the fixing rod 414 is inserted in the first fixing groove, one end of the fixing rod 414, which is far away from the positioning rod 410, penetrates and extends into the positioning box 412, a second positioning hole for penetrating the screw 401 is formed in the upper surface of the protecting box 409, a first thread groove is formed in the lower surface of the fixing bin 402, the screw 401 is in the thread groove in a threaded connection manner, a second thread groove is formed in the upper surface of the protecting box 409, a threaded hole is formed in the upper surface of the connecting plate 405, the screw 408 is in the second thread groove and the threaded hole, the screw 408 extends through the threaded hole.
It can be seen that the heat dissipation mechanism 4 draws heat generated by different working blocks through the three fans 404 from the inside of the protection box 409 to the outside, so that the dissipation of the heat can be accelerated by the FPGA accelerator card, thereby improving the heat dissipation effect, and meanwhile, the dust is prevented from entering the protection box 409 through the dust screen 407 and being accumulated on the FPGA accelerator card, so that the dust can be normally dissipated and taken away by the fans 404.
Referring to fig. 4-5, in order to prevent dust from accumulating in the socket 7, the dust-proof mechanism 5 in this embodiment includes a dust-proof box 506 fixed to the left side of the baffle 6, a hinge 505 is fixed to the left side of the dust-proof box 506, the dust-proof box 506 is hinged to a box cover 504 through the hinge 505, the socket 7 is closed by the dust-proof box 506 and the box cover 504, so that dust does not accumulate in the socket 7 when not in use, so that the socket 7 is not short-circuited due to accumulated dust when in use, the dust-proof box 506 and the box cover 504 form a protective cover for the socket 7 so as not to be impacted, a slider 507 is slidably connected to the inside of the box cover 504, a slider 509 is fixed to the left side of the slider 507, a handle 503 is fixed to the left side of the slider 509, a lifting plate 502 located on the upper side of the dust-proof box 506 is fixed to the right side of the slider 509, a second spring 508 is fixed to the lower surface of the lifting plate 502, and a fixing block 501 located on the right side of the second spring 508 is fixed to the lower surface of the lifting plate 502.
The second spring 508 is fixed at the diapire of case lid 504 inner chamber, and the spout has been seted up to the inside of case lid 504, and slider 507 passes through spout and case lid 504 clearance fit, and slider 507 sliding connection is in the spout, and the shape of slider 507 is the T shape, and T shape slider 507 prevents that slide 509 from leaving case lid 504, and the second fixed slot has been seted up to the upper surface of dust proof case 506, and fixed block 501 pegs graft in the second fixed slot, and the length of case lid 504 equals the length of dust proof case 506.
Therefore, the dust-proof mechanism 5 seals the socket 7 through the dust-proof box 506 and the box cover 504, so that dust cannot accumulate on the socket 7 when the socket is not used, and meanwhile, the socket 7 is protected, and the socket 7 is prevented from being damaged by other objects when being exposed outside.
The working principle of the embodiment is as follows:
(1) Before using the FPGA accelerator card, firstly, assembling the heat dissipation mechanism 4 on the FPGA accelerator card, firstly, respectively attaching the protective box 409 to the connecting block 2 and the baffle 6, inserting the positioning block 411 into a first positioning groove in the connecting block 2, simultaneously, enabling the screw 401 on the baffle 6 to penetrate through the protective box 409, aligning a first thread groove on the lower side of the fixed bin 402 with the screw 401, enabling the screw 401 to be inserted into the first thread groove, rotating the auxiliary plate 403, enabling the auxiliary plate 403 to drive the fixed bin 402 to rotate outside the screw 401 until the protective box 409 of the fixed bin 402 is attached, then, grasping the pulling plate 413 to lift upwards, enabling the pulling plate 413 to drive the fixing rod 414 to move upwards, enabling the fixing rod 414 to drive the limiting plate 416 to move upwards and extrude the first spring 415, then, inserting the positioning rod 410 into a second positioning groove on the right side of the connecting block 2 and penetrating through the positioning block 411, enabling the first fixing groove on the positioning rod 410 to move upwards, and enabling the pulling plate 413 when the positioning rod 410 can not continuously release the movement towards the second positioning groove, the first spring 415 pushes the limit plate 416 to move downwards and drives the fixed rod 414 to move downwards through the limit plate 416, so that the fixed rod 414 is inserted into the first fixed groove, and the installation of the heat dissipation mechanism 4 can be completed, when the FPGA accelerator card is used, the three fans 404 are started together, three heat generated by different working blocks is extracted from the inner side of the protection box 409 to the outer side, so that the heat dissipation effect of the FPGA accelerator card is improved, dust is prevented from entering the inner side of the protection box 409 through the fans 404 through the dust screen 407, the FPGA accelerator card is prevented from being accumulated by dust, the heat dissipation capability of the FPGA accelerator card can be completely and normally used, when the dust screen 407 needs to be cleaned or replaced, the screws 408 are screwed out of the connecting plate 405, so that the dust screen 407 can be taken out, the heat generated by different working blocks is extracted from the inner side of the protection box 409 through the three fans 404 by the heat dissipation mechanism 4, the dissipation of heat can be accelerated by the FPGA accelerator card, so that the heat dissipation effect is improved, and meanwhile, dust is prevented from entering the protective box 409 and being accumulated on the FPGA accelerator card through the dustproof net 407, so that the heat can be normally dissipated and taken away by the fan 404.
(2) When the socket 7 needs to be used, firstly, the handle 503 is grasped, then the handle 503 is pulled upwards, the handle 503 drives the sliding plate 509 to slide upwards, the sliding plate 509 drives the sliding block 507 to slide upwards, meanwhile, the lifting plate 502 moves upwards along with the sliding plate 509, the lifting plate 502 stretches the second spring 508 and drives the fixing block 501 to move upwards to leave a second fixing groove on the dust-proof box 506, when the fixing block 501 moves away from the second fixing groove, the handle 503 is pulled leftwards, the handle 503 drives the box cover 504 to rotate, the socket 7 is exposed, and then the socket can be used, the dust-proof mechanism 5 seals the socket 7 through the dust-proof box 506 and the box cover 504, so that dust cannot be accumulated in the socket 7 when the socket 7 is not used, meanwhile, the socket 7 is protected, and the socket 7 is prevented from being damaged by other objects when being exposed to the outside.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrases "comprising a," "8230," "8230," or "comprising" does not exclude the presence of additional like elements in a process, method, article, or apparatus that comprises the element.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (10)
- FPGA accelerator card, including FPGA accelerator card base (1), its characterized in that: an FPGA accelerator card working block (3) is fixed on the upper surface of the FPGA accelerator card base (1), a socket (7) positioned on the left side of the FPGA accelerator card working block (3) is fixed on the upper surface of the FPGA accelerator card base (1), a baffle (6) penetrated through by the socket (7) is fixed on the left side of the FPGA accelerator card base (1), a connecting block (2) is fixed on the right side of the FPGA accelerator card base (1), a heat dissipation mechanism (4) used for dissipating heat of the FPGA accelerator card is arranged inside the connecting block (2), and a dustproof mechanism (5) used for preventing dust from entering the socket (7) is arranged on the left side of the baffle (6);heat dissipation mechanism (4) are including pegging graft locating piece (411) inside connecting block (2), the grafting of connecting block (2) has locating lever (410) of running through locating piece (411), the upper surface mounting of locating lever (410) has protection box (409), the inside of protection box (409) is fixed with fan (404), the upper surface threaded connection of protection box (409) has screw (408), the outside threaded connection of screw (408) has connecting plate (405) that is located protection box (409) upside, the upper surface mounting of connecting plate (405) has and is located fan (404) outside supporting box (406), the inside mounting of supporting box (406) has dust screen (407) that is located fan (404) upside.
- 2. The FPGA accelerator card of claim 1, wherein: the heat dissipation mechanism (4) further comprises a positioning box (412) fixed on the right side of the protection box (409), a first spring (415) is fixed to the top wall of an inner cavity of the positioning box (412), a limiting plate (416) is fixed to the lower surface of the first spring (415), a fixing rod (414) is fixed to the inside of the limiting plate (416), a pulling plate (413) is fixed to the top end of the fixing rod (414), a screw (401) with the top end penetrating through the protection box (409) is fixed to the upper surface of the baffle (6), a fixed bin (402) is connected to the outer side of the screw (401) in a threaded mode, and an auxiliary plate (403) is fixed to the top end of the fixed bin (402).
- 3. The FPGA accelerator card of claim 1, wherein: the shape of protective housing (409) is the cuboid that inside cavity and left side and lower surface all lacked, the shape of supporting box (406) is the cuboid that inside cavity and upper surface and lower surface all lacked.
- 4. The FPGA accelerator card of claim 1, wherein: the upper surface of the connecting block (2) is provided with a first positioning groove, and the positioning block (411) is inserted in the first positioning groove.
- 5. The FPGA accelerator card of claim 1, wherein: the right side of the connecting block (2) is provided with a second positioning groove for inserting the positioning rod (410), and the left side of the positioning block (411) is provided with a first positioning hole for penetrating through the positioning rod (410).
- 6. The FPGA accelerator card of claim 2, wherein: a first fixing groove is formed in the upper surface of the positioning rod (410), and the fixing rod (414) is inserted into the first fixing groove.
- 7. The FPGA accelerator card of claim 2, wherein: the upper surface of the protective box (409) is provided with a second positioning hole for a screw (401) to penetrate through, the lower surface of the fixed bin (402) is provided with a first thread groove, and the screw (401) is in threaded connection with the thread groove.
- 8. The FPGA accelerator card of claim 1, wherein: dustproof mechanism (5) are including fixing dust proof box (506) on baffle (6) left side, the left side of dust proof box (506) is fixed with hinge (505), dust proof box (506) articulates through hinge (505) has case lid (504), the inside sliding connection of case lid (504) has slider (507), the left side of slider (507) is fixed with slide (509), the left side of slide (509) is fixed with handle (503), the right side of slide (509) is fixed with arm-lift (502) that are located dust proof box (506) upside, the lower fixed surface of arm-lift (502) has second spring (508), the lower fixed surface of arm-lift (502) has fixed block (501) that are located second spring (508) right side.
- 9. The FPGA accelerator card of claim 8, wherein: the second spring (508) is fixed on the bottom wall of the inner cavity of the box cover (504), a sliding groove is formed in the box cover (504), the sliding block (507) is in clearance fit with the box cover (504) through the sliding groove, and the sliding block (507) is T-shaped.
- 10. The FPGA accelerator card of claim 8, wherein: and a second fixing groove is formed in the upper surface of the dust-proof box (506), and the fixing block (501) is inserted into the second fixing groove.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202210748241.9A CN115190741A (en) | 2022-06-29 | 2022-06-29 | FPGA accelerator card |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN202210748241.9A CN115190741A (en) | 2022-06-29 | 2022-06-29 | FPGA accelerator card |
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CN115190741A true CN115190741A (en) | 2022-10-14 |
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CN202210748241.9A Pending CN115190741A (en) | 2022-06-29 | 2022-06-29 | FPGA accelerator card |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN211702858U (en) * | 2020-05-07 | 2020-10-16 | 深圳市菲德越科技有限公司 | Wireless network card chip protection structure |
CN212484220U (en) * | 2020-08-18 | 2021-02-05 | 深圳市杰星通科技有限公司 | High-efficient dirt-proof industry control mainboard |
CN216163122U (en) * | 2021-09-16 | 2022-04-01 | 陈新民 | 5G accelerator card with heat dissipation function |
CN216290952U (en) * | 2021-09-18 | 2022-04-12 | 深圳市智博通电子有限公司 | Intelligent industrial gateway based on RS485 interface |
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Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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CN211702858U (en) * | 2020-05-07 | 2020-10-16 | 深圳市菲德越科技有限公司 | Wireless network card chip protection structure |
CN212484220U (en) * | 2020-08-18 | 2021-02-05 | 深圳市杰星通科技有限公司 | High-efficient dirt-proof industry control mainboard |
CN216163122U (en) * | 2021-09-16 | 2022-04-01 | 陈新民 | 5G accelerator card with heat dissipation function |
CN216290952U (en) * | 2021-09-18 | 2022-04-12 | 深圳市智博通电子有限公司 | Intelligent industrial gateway based on RS485 interface |
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