CN115190613A - Synchronization signal block SSB determination method and related equipment - Google Patents
Synchronization signal block SSB determination method and related equipment Download PDFInfo
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Abstract
The embodiment of the application provides a method for determining a Synchronous Signal Block (SSB) and related equipment, which relate to the technical field of communication, and the method comprises the following steps: it is determined that no SSB or only one SSB is included in the slot. The method provided by the embodiment of the application can determine the time domain position in the SSB of the 480/960kHz subcarrier interval, thereby improving the efficiency of uplink transmission.
Description
Technical Field
The embodiment of the application relates to the technical field of communication, in particular to a method for determining a Synchronization Signal Block (SSB) and related equipment.
Background
With the rapid development of mobile communication, a fifth generation mobile communication technology (New Radio, NR, colloquially referred to as "5G") has gradually replaced a fourth generation mobile communication technology (Long Term Evolution, LTE, colloquially referred to as "4G"). 5G can provide faster rates, higher bandwidth than 4G.
In the current standard protocol of 5G, a cell primary and secondary Synchronization Signal (SS) is coupled to a Physical Broadcast Channel (PBCH) to some extent in 5G, and the coupled Signal appears in the form of SS/PBCH resource blocks, referred to as SSBs for short. In the high-band unlicensed spectrum, SSB supporting 120kHz subcarrier spacing is generally required to reduce the complexity of terminal initial access. In the high-band unlicensed spectrum, data channels typically employ 480/960kHz subcarrier spacing, which may simplify network/terminal operation if the SSB uses the same subcarrier spacing as the data channels, and thus the SSB employs 480/960kHz subcarrier spacing may simplify network/terminal operation. In addition, when the SSB with 120kHz subcarrier spacing is used for time synchronization, the sampling rate is low, and the timing resolution (resolution) is poor, which may cause the timing offset to exceed the Cyclic Prefix (CP) length of the OFDM symbol of the data channel even when the data channel adopts 480/960kHz subcarrier spacing, which may lead to the degradation of the reception performance. Currently, the time-domain location of the 480/960kHz subcarrier spacing SSB is a pending problem.
Disclosure of Invention
The embodiment of the application provides a method and related equipment for determining a Synchronization Signal Block (SSB), so as to provide a mode for determining that a time slot contains the SSB at a terminal side.
In a first aspect, an embodiment of the present application provides a method for determining a synchronization signal block SSB, including:
it is determined that no SSB or only one SSB is included in the slot.
In one possible implementation manner, it is determined that the nth timeslot does not contain the SSB; wherein n =40 × k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 32 and equal to or less than 39.
In one possible implementation manner, it is determined that the nth timeslot does not contain the SSB; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 3.
In one possible implementation, it is determined that only one SSB is contained in the lth timeslot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
In one possible implementation manner, the including of only one SSB in the lth timeslot includes: only the first SSB is included in the lth slot.
In one possible implementation manner, it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0.
In one possible implementation manner, the including of only one SSB in the lth timeslot includes: the lth slot contains only the second SSB.
In one possible implementation manner, it is determined that the nth timeslot does not contain the SSB; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
In one possible implementation, it is determined that only one SSB is contained in the lth timeslot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
In one possible implementation manner, the including of only one SSB in the lth timeslot includes: only the second SSB is included in the lth slot.
In one possible implementation manner, the SSB is an SSB with a subcarrier spacing of 480 kHz.
In one possible implementation manner, it is determined that the nth timeslot does not contain the SSB; wherein n =80 x k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 64 and equal to or less than 79.
In one possible implementation manner, it is determined that the nth timeslot does not contain the SSB; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 1 and/or 7.
In one possible implementation manner, it is determined that the nth timeslot does not contain the SSB; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 3, 4 and/or 7.
In one possible implementation, it is determined that only one SSB is contained in the lth timeslot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
In one possible implementation manner, the including of only one SSB in the lth timeslot includes: and the L-th time slot only contains the first SSB.
In one possible implementation manner, it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 4.
In one possible implementation manner, the including of only one SSB in the lth timeslot includes: only the second SSB is included in the lth slot.
In one possible implementation, it is determined that only one SSB is contained in the lth timeslot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3 and/or 7.
In one possible implementation manner, the including of only one SSB in the lth timeslot includes: only the first SSB is included in the lth slot.
In one possible implementation, the SSB is an SSB with a subcarrier spacing of 960 kHz.
In a second aspect, an embodiment of the present application provides a chip, including:
and the determining module is used for determining that the time slot does not contain the SSB or only contains one SSB.
In one possible implementation manner, the determining module is further configured to determine that the nth timeslot does not include the SSB; wherein n =40 × k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 32 and equal to or less than 39.
In one possible implementation manner, the determining module is further configured to determine that the nth timeslot does not include the SSB; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 3.
In one possible implementation manner, the determining module is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
In one possible implementation manner, the determining module is further configured to determine that only the first SSB is included in the lth timeslot.
In one possible implementation manner, the determining module is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0.
In one possible implementation manner, the determining module is further configured to include only one SSB in the lth timeslot, and includes: only the second SSB is included in the lth slot.
In one possible implementation manner, the determining module is further configured to determine that the nth timeslot does not include the SSB; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
In one possible implementation manner, the determining module is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
In one possible implementation manner, the determining module is further configured to determine that only one SSB is included in the lth timeslot, including: only the second SSB is included in the lth slot.
In one possible implementation manner, the SSB is an SSB with a subcarrier spacing of 480 kHz.
In one possible implementation manner, the determining module is further configured to determine that the nth timeslot does not include the SSB; wherein n =80 x k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 64 and equal to or less than 79.
In one possible implementation manner, the determining module is further configured to determine that the nth timeslot does not include the SSB; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 1 and/or 7.
In one possible implementation manner, the determining module is further configured to determine that the nth timeslot does not include the SSB; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 3, 4 and/or 7.
In one possible implementation manner, the determining module is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
In one possible implementation manner, the determining module is further configured to determine that only the first SSB is included in the lth timeslot.
In one possible implementation manner, the determining module is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 4.
In one possible implementation manner, the determining module is further configured to determine that only the second SSB is included in the lth timeslot.
In one possible implementation manner, the determining module is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3 and/or 7.
In one possible implementation manner, the determining module is further configured to determine that only the first SSB is included in the lth timeslot.
In one possible implementation, the SSB is an SSB with a subcarrier spacing of 960 kHz.
In a third aspect, an embodiment of the present application provides an electronic device, including:
a memory for storing computer program code, the computer program code comprising instructions for causing the electronic device to perform the method according to the first aspect when the electronic device reads the instructions from the memory.
In a fourth aspect, embodiments of the present application provide a computer-readable storage medium having stored thereon a computer program, which, when run on a computer, causes the computer to perform the method according to the first aspect.
In a fifth aspect, embodiments of the present application provide a computer program, which is configured to perform the method according to the first aspect when the computer program is executed by a computer.
In a possible design, the program of the fifth aspect may be stored in whole or in part on a storage medium packaged with the processor, or in part or in whole on a memory not packaged with the processor.
Drawings
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;
FIG. 2 is a schematic time slot diagram of a 120kHz subcarrier spacing SSB provided by an embodiment of the present application;
FIG. 3 is a schematic time slot diagram of a 480kHz subcarrier spacing SSB provided by an embodiment of the present application;
FIG. 4 is a schematic time slot diagram of a 960kHz subcarrier spacing SSB provided by an embodiment of the present application;
FIGS. 5 a-5 d are schematic time domain position diagrams of an embodiment of mixed transmission of 120kHz subcarrier spacing SSB and 480/960kHz subcarrier spacing SSB provided by an embodiment of the present application;
FIGS. 6 a-6 e are schematic time-domain position diagrams of another embodiment of mixed transmission of 120kHz subcarrier spacing SSB and 480/960kHz subcarrier spacing SSB provided by the embodiment of the present application;
FIGS. 7 a-7 e are schematic time-domain position diagrams of still another embodiment of mixed transmission of 120kHz subcarrier spacing SSB and 480/960kHz subcarrier spacing SSB provided by the embodiment of the present application;
fig. 8 is a schematic structural diagram of a chip provided in an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. In the description of the embodiments herein, "/" means "or" unless otherwise specified, for example, a/B may mean a or B; "and/or" herein is merely an association describing an associated object, and means that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone.
In the following, the terms "first", "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present application, "a plurality" means two or more unless otherwise specified.
In the current standard protocol of 5G, a cell primary and secondary Synchronization Signal (SS) is coupled to a Physical Broadcast Channel (PBCH) to some extent in 5G, and the coupled Signal appears in the form of SS/PBCH resource blocks, referred to as SSBs for short. In the high-band unlicensed spectrum, SSB supporting 120kHz subcarrier spacing is generally required to reduce the complexity of terminal initial access. In the high-band unlicensed spectrum, data channels typically employ 480/960kHz subcarrier spacing, which may simplify network/terminal operation if the SSB uses the same subcarrier spacing as the data channels, and thus the SSB employs 480/960kHz subcarrier spacing may simplify network/terminal operation. In addition, when the SSB with 120kHz subcarrier spacing is used for time synchronization, the sampling rate is low, and the timing resolution (resolution) is poor, which may cause the timing offset to exceed the Cyclic Prefix (CP) length of the OFDM symbol of the data channel even when the data channel uses 480/960kHz subcarrier spacing, which may cause the degradation of the receiving performance.
Accordingly, SSB employing 480/960kHz subcarrier spacing may be considered, e.g., when the data channel employs 480kHz subcarrier spacing, SSB also employs 480kHz subcarrier spacing; when the data channel employs 960kHz subcarrier spacing, the SSB also employs 960kHz subcarrier spacing. It will be appreciated that the 480/960kHz subcarrier spacing SSB is a new type of SSB. However, for the SSB with the 480/960kHz subcarrier spacing, how to determine the time domain location protocol of the SSB is not specified, which may result in that the terminal side cannot transmit the SSB, and further may result in that the terminal side and the network side fail to communicate.
Based on the above problem, an embodiment of the present application provides an SSB sending method. The above method can be applied to User Equipment (UE).
A UE can also be called a terminal device, mobile terminal, access terminal, subscriber unit, subscriber station, mobile, remote station, remote terminal, mobile device, user terminal, wireless communication device, user agent, or user equipment. The UE may be a Station (ST) in a WLAN, and may be a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA) device, a handheld device with Wireless communication capability, a computing device or other processing device connected to a Wireless modem, a vehicle-mounted device, a vehicle networking terminal, a computer, a laptop computer, a handheld communication device, a handheld computing device, a satellite radio device, a Wireless modem card, a Set Top Box (STB), a Customer Premises Equipment (CPE), and/or other devices for communicating over a Wireless system as well as next generation communication systems, such as a Mobile terminal in a 5G Network or a Mobile terminal in a future-evolution Public Land Mobile Network (PLMN) Network, and the like. The UE may also be a wearable device. Wearable equipment can also be called wearable intelligent equipment, is the general term of equipment that uses wearable technique to carry out intelligent design, develop can dress to daily wearing, such as glasses, gloves, wrist-watch, dress and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the clothing or accessories of the user. The wearable device is not only a hardware device, but also realizes powerful functions through software support, data interaction and cloud interaction. The generalized wearable intelligent device has the advantages that the generalized wearable intelligent device is complete in function and large in size, can realize complete or partial functions without depending on a smart phone, such as a smart watch or smart glasses, and only is concentrated on a certain application function, and needs to be matched with other devices such as the smart phone for use, such as various smart bracelets for monitoring physical signs, smart jewelry and the like.
Fig. 1 schematically shows a structure of an electronic device 100. The electronic device 100 may be the UE described above.
The electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a Universal Serial Bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a key 190, a motor 191, an indicator 192, a camera 193, a display screen 194, a Subscriber Identity Module (SIM) card interface 195, and the like. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor 180B, an air pressure sensor 180C, a magnetic sensor 180D, an acceleration sensor 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, and the like.
It is to be understood that the illustrated structure of the embodiment of the present application does not specifically limit the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or combine certain components, or split certain components, or arrange different components. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.
The controller can generate an operation control signal according to the instruction operation code and the timing signal to complete the control of instruction fetching and instruction execution.
A memory may also be provided in processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. The memory may hold instructions or data that have just been used or recycled by the processor 110. If the processor 110 needs to reuse the instruction or data, it can be called directly from the memory. Avoiding repeated accesses reduces the latency of the processor 110, thereby increasing the efficiency of the system.
In some embodiments, processor 110 may include one or more interfaces. The interface may include an integrated circuit (I2C) interface, an integrated circuit built-in audio (I2S) interface, a Pulse Code Modulation (PCM) interface, a universal asynchronous receiver/transmitter (UART) interface, a mobile industry processor interface (mobile industry processor interface, MIPI), a general-purpose-input/output (GPIO) interface, a Subscriber Identity Module (SIM) interface, and/or a Universal Serial Bus (USB) interface, etc.
The I2C interface is a bidirectional synchronous serial bus including a serial data line (SDA) and a Serial Clock Line (SCL). In some embodiments, processor 110 may include multiple sets of I2C buses. The processor 110 may be coupled to the touch sensor 180K, the charger, the flash, the camera 193, etc. through different I2C bus interfaces, respectively. For example: the processor 110 may be coupled to the touch sensor 180K through an I2C interface, so that the processor 110 and the touch sensor 180K communicate through an I2C bus interface to implement a touch function of the electronic device 100.
The I2S interface may be used for audio communication. In some embodiments, processor 110 may include multiple sets of I2S buses. The processor 110 may be coupled to the audio module 170 through an I2S bus to enable communication between the processor 110 and the audio module 170. In some embodiments, the audio module 170 may transmit the audio signal to the wireless communication module 160 through the I2S interface, so as to implement a function of receiving a call through a bluetooth headset.
The PCM interface may also be used for audio communication, sampling, quantizing and encoding analog signals. In some embodiments, the audio module 170 and the wireless communication module 160 may be coupled by a PCM bus interface. In some embodiments, the audio module 170 may also transmit the audio signal to the wireless communication module 160 through the PCM interface, so as to implement the function of answering a call through the bluetooth headset. Both the I2S interface and the PCM interface may be used for audio communication.
The UART interface is a universal serial data bus used for asynchronous communications. The bus may be a bidirectional communication bus. It converts the data to be transmitted between serial communication and parallel communication. In some embodiments, a UART interface is generally used to connect the processor 110 and the wireless communication module 160. For example: the processor 110 communicates with a bluetooth module in the wireless communication module 160 through a UART interface to implement a bluetooth function. In some embodiments, the audio module 170 may transmit the audio signal to the wireless communication module 160 through a UART interface, so as to realize the function of playing music through a bluetooth headset.
The MIPI interface may be used to connect the processor 110 with peripheral devices such as the display screen 194, the camera 193, and the like. The MIPI interface includes a Camera Serial Interface (CSI), a Display Serial Interface (DSI), and the like. In some embodiments, processor 110 and camera 193 communicate through a CSI interface to implement the capture functionality of electronic device 100. The processor 110 and the display screen 194 communicate through the DSI interface to implement the display function of the electronic device 100.
The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal and may also be configured as a data signal. In some embodiments, a GPIO interface may be used to connect the processor 110 with the camera 193, the display 194, the wireless communication module 160, the audio module 170, the sensor module 180, and the like. The GPIO interface may also be configured as an I2C interface, I2S interface, UART interface, MIPI interface, and the like.
The USB interface 130 is an interface conforming to the USB standard specification, and may specifically be a Mini USB interface, a Micro USB interface, a USB Type C interface, or the like. The USB interface 130 may be used to connect a charger to charge the electronic device 100, and may also be used to transmit data between the electronic device 100 and a peripheral device. And the earphone can also be used for connecting an earphone and playing audio through the earphone. The interface may also be used to connect other electronic devices, such as AR devices and the like.
It should be understood that the connection relationship between the modules according to the embodiment of the present invention is only illustrative, and is not limited to the structure of the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection manners or a combination of multiple interface connection manners in the above embodiments.
The charging management module 140 is configured to receive charging input from a charger. The charger may be a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 may receive charging input from a wired charger via the USB interface 130. In some wireless charging embodiments, the charging management module 140 may receive a wireless charging input through a wireless charging coil of the electronic device 100. The charging management module 140 may also supply power to the electronic device through the power management module 141 while charging the battery 142.
The power management module 141 is used to connect the battery 142, the charging management module 140 and the processor 110. The power management module 141 receives input from the battery 142 and/or the charge management module 140, and supplies power to the processor 110, the internal memory 121, the display 194, the camera 193, the wireless communication module 160, and the like. The power management module 141 may also be used to monitor parameters such as battery capacity, battery cycle count, battery state of health (leakage, impedance), etc. In some other embodiments, the power management module 141 may also be disposed in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 may also be disposed in the same device.
The wireless communication function of the electronic device 100 may be implemented by the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, a modem processor, a baseband processor, and the like.
The antennas 1 and 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 may be used to cover a single or multiple communication bands. Different antennas can also be multiplexed to improve the utilization of the antennas. For example: the antenna 1 may be multiplexed as a diversity antenna of a wireless local area network. In other embodiments, the antenna may be used in conjunction with a tuning switch.
The mobile communication module 150 may provide a solution including wireless communication of 2G/3G/4G/5G, etc. applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a Low Noise Amplifier (LNA), and the like. The mobile communication module 150 may receive the electromagnetic wave from the antenna 1, filter, amplify, etc. the received electromagnetic wave, and transmit the electromagnetic wave to the modem processor for demodulation. The mobile communication module 150 may also amplify the signal modulated by the modem processor, and convert the signal into electromagnetic wave through the antenna 1 to radiate the electromagnetic wave. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be disposed in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 may be disposed in the same device as at least some of the modules of the processor 110.
The modem processor may include a modulator and a demodulator. The modulator is used for modulating a low-frequency baseband signal to be transmitted into a medium-high frequency signal. The demodulator is used for demodulating the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then passes the demodulated low frequency baseband signal to a baseband processor for processing. The low frequency baseband signal is processed by the baseband processor and then transferred to the application processor. The application processor outputs a sound signal through an audio device (not limited to the speaker 170A, the receiver 170B, etc.) or displays an image or video through the display screen 194. In some embodiments, the modem processor may be a stand-alone device. In other embodiments, the modem processor may be provided in the same device as the mobile communication module 150 or other functional modules, independent of the processor 110.
The wireless communication module 160 may provide a solution for wireless communication applied to the electronic device 100, including Wireless Local Area Networks (WLANs) (e.g., wireless fidelity (Wi-Fi) networks), bluetooth (bluetooth, BT), global Navigation Satellite System (GNSS), frequency Modulation (FM), near Field Communication (NFC), infrared (IR), and the like. The wireless communication module 160 may be one or more devices integrating at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, performs frequency modulation and filtering processing on electromagnetic wave signals, and transmits the processed signals to the processor 110. The wireless communication module 160 may also receive a signal to be transmitted from the processor 110, perform frequency modulation and amplification on the signal, and convert the signal into electromagnetic waves through the antenna 2 to radiate the electromagnetic waves.
In some embodiments, antenna 1 of electronic device 100 is coupled to mobile communication module 150 and antenna 2 is coupled to wireless communication module 160 so that electronic device 100 can communicate with networks and other devices through wireless communication techniques. The wireless communication technology may include global system for mobile communications (GSM), general Packet Radio Service (GPRS), code division multiple access (code division multiple access, CDMA), wideband Code Division Multiple Access (WCDMA), time-division code division multiple access (time-division code division multiple access, TD-SCDMA), long Term Evolution (LTE), BT, GNSS, WLAN, NFC, FM, and/or IR technologies, etc. The GNSS may include a Global Positioning System (GPS), a global navigation satellite system (GLONASS), a beidou satellite navigation system (BDS), a quasi-zenith satellite system (QZSS), and/or a Satellite Based Augmentation System (SBAS).
The electronic device 100 implements display functions via the GPU, the display screen 194, and the application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs that execute program instructions to generate or alter display information.
The display screen 194 is used to display images, video, and the like. The display screen 194 includes a display panel. The display panel may be a Liquid Crystal Display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (active-matrix organic light-emitting diode, AMOLED), a flexible light-emitting diode (FLED), a miniature, a Micro-oeld, a quantum dot light-emitting diode (QLED), or the like. In some embodiments, the electronic device 100 may include 1 or N display screens 194, N being a positive integer greater than 1.
The electronic device 100 may implement a photographing function through the ISP, the camera 193, the video codec, the GPU, the display screen 194, and the application processor, etc.
The ISP is used to process the data fed back by the camera 193. For example, when a photo is taken, the shutter is opened, light is transmitted to the camera photosensitive element through the lens, the optical signal is converted into an electrical signal, and the camera photosensitive element transmits the electrical signal to the ISP for processing and converting into an image visible to naked eyes. The ISP can also carry out algorithm optimization on the noise, brightness and skin color of the image. The ISP can also optimize parameters such as exposure, color temperature and the like of a shooting scene. In some embodiments, the ISP may be provided in camera 193.
The camera 193 is used to capture still images or video. The object generates an optical image through the lens and projects the optical image to the photosensitive element. The photosensitive element may be a Charge Coupled Device (CCD) or a complementary metal-oxide-semiconductor (CMOS) phototransistor. The light sensing element converts the optical signal into an electrical signal, which is then passed to the ISP where it is converted into a digital image signal. And the ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into image signal in standard RGB, YUV and other modes. In some embodiments, electronic device 100 may include 1 or N cameras 193, N being a positive integer greater than 1.
The digital signal processor is used for processing digital signals, and can process digital image signals and other digital signals. For example, when the electronic device 100 selects a frequency bin, the digital signal processor is used to perform fourier transform or the like on the frequency bin energy.
Video codecs are used to compress or decompress digital video. The electronic device 100 may support one or more video codecs. In this way, the electronic device 100 can play or record video in multiple encoding modes, such as: moving Picture Experts Group (MPEG) 1, MPEG2, MPEG3, MPEG4, and the like.
The NPU is a neural-network (NN) computing processor that processes input information quickly by using a biological neural network structure, for example, by using a transfer mode between neurons of a human brain, and can also learn by itself continuously. Applications such as intelligent recognition of the electronic device 100 can be implemented by the NPU, for example: image recognition, face recognition, speech recognition, text understanding, and the like.
The external memory interface 120 may be used to connect an external memory card, such as a Micro SD card, to extend the memory capability of the electronic device 100. The external memory card communicates with the processor 110 through the external memory interface 120 to implement a data storage function. For example, files such as music, video, etc. are saved in an external memory card.
The internal memory 121 may be used to store computer-executable program code, which includes instructions. The internal memory 121 may include a program storage area and a data storage area. The storage program area may store an operating system, an application program (such as a sound playing function, an image playing function, etc.) required by at least one function, and the like. The storage data area may store data (such as audio data, phone book, etc.) created during use of the electronic device 100, and the like. In addition, the internal memory 121 may include a high speed random access memory, and may also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, a Universal Flash Storage (UFS), and the like. The processor 110 executes various functional applications of the electronic device 100 and data processing by executing instructions stored in the internal memory 121 and/or instructions stored in a memory provided in the processor.
The electronic device 100 may implement audio functions via the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone interface 170D, and the application processor. Such as music playing, recording, etc.
The audio module 170 is used to convert digital audio information into an analog audio signal output and also to convert an analog audio input into a digital audio signal. The audio module 170 may also be used to encode and decode audio signals. In some embodiments, the audio module 170 may be disposed in the processor 110, or some functional modules of the audio module 170 may be disposed in the processor 110.
The speaker 170A, also called a "horn", is used to convert the audio electrical signal into an acoustic signal. The electronic apparatus 100 can listen to music through the speaker 170A or listen to a handsfree call.
The receiver 170B, also called "earpiece", is used to convert the electrical audio signal into a sound signal. When the electronic apparatus 100 receives a call or voice information, it can receive voice by placing the receiver 170B close to the ear of the person.
The microphone 170C, also referred to as a "microphone," is used to convert sound signals into electrical signals. When making a call or transmitting voice information, the user can input a voice signal to the microphone 170C by speaking near the microphone 170C through the mouth. The electronic device 100 may be provided with at least one microphone 170C. In other embodiments, the electronic device 100 may be provided with two microphones 170C to achieve a noise reduction function in addition to collecting sound signals. In other embodiments, the electronic device 100 may further include three, four or more microphones 170C to collect sound signals, reduce noise, identify sound sources, perform directional recording, and so on.
The earphone interface 170D is used to connect a wired earphone. The headset interface 170D may be the USB interface 130, or may be a 3.5mm open mobile electronic device platform (OMTP) standard interface, a cellular telecommunications industry association (cellular telecommunications industry association of the USA, CTIA) standard interface.
The pressure sensor 180A is used for sensing a pressure signal, and can convert the pressure signal into an electrical signal. In some embodiments, the pressure sensor 180A may be disposed on the display screen 194. The pressure sensor 180A can be of a wide variety, such as a resistive pressure sensor, an inductive pressure sensor, a capacitive pressure sensor, and the like. The capacitive pressure sensor may be a sensor comprising at least two parallel plates having an electrically conductive material. When a force acts on the pressure sensor 180A, the capacitance between the electrodes changes. The electronic device 100 determines the strength of the pressure from the change in capacitance. When a touch operation is applied to the display screen 194, the electronic apparatus 100 detects the intensity of the touch operation according to the pressure sensor 180A. The electronic apparatus 100 may also calculate the touched position from the detection signal of the pressure sensor 180A. In some embodiments, the touch operations that are applied to the same touch position but have different touch operation intensities may correspond to different operation instructions. For example: and when the touch operation with the touch operation intensity smaller than the first pressure threshold value acts on the short message application icon, executing an instruction for viewing the short message. And when the touch operation with the touch operation intensity larger than or equal to the first pressure threshold value acts on the short message application icon, executing an instruction of newly building the short message.
The gyro sensor 180B may be used to determine the motion attitude of the electronic device 100. In some embodiments, the angular velocity of electronic device 100 about three axes (i.e., the x, y, and z axes) may be determined by gyroscope sensor 180B. The gyro sensor 180B may be used for photographing anti-shake. For example, when the shutter is pressed, the gyro sensor 180B detects a shake angle of the electronic device 100, calculates a distance to be compensated for by the lens module according to the shake angle, and allows the lens to counteract the shake of the electronic device 100 through a reverse movement, thereby achieving anti-shake. The gyroscope sensor 180B may also be used for navigation, somatosensory gaming scenes.
The air pressure sensor 180C is used to measure air pressure. In some embodiments, electronic device 100 calculates altitude from barometric pressure values measured by barometric pressure sensor 180C to assist in positioning and navigation.
The magnetic sensor 180D includes a hall sensor. The electronic device 100 may detect the opening and closing of the flip holster using the magnetic sensor 180D. In some embodiments, when the electronic device 100 is a flip phone, the electronic device 100 may detect the opening and closing of the flip according to the magnetic sensor 180D. And then according to the opening and closing state of the leather sheath or the opening and closing state of the flip cover, the automatic unlocking of the flip cover is set.
The acceleration sensor 180E may detect the magnitude of acceleration of the electronic device 100 in various directions (typically three axes). The magnitude and direction of gravity may be detected when the electronic device 100 is stationary. The method can also be used for identifying the posture of the electronic equipment, and is applied to horizontal and vertical screen switching, pedometers and the like.
A distance sensor 180F for measuring a distance. The electronic device 100 may measure the distance by infrared or laser. In some embodiments, taking a picture of a scene, electronic device 100 may utilize range sensor 180F to range for fast focus.
The proximity light sensor 180G may include, for example, a Light Emitting Diode (LED) and a light detector, such as a photodiode. The light emitting diode may be an infrared light emitting diode. The electronic device 100 emits infrared light to the outside through the light emitting diode. The electronic device 100 detects infrared reflected light from nearby objects using a photodiode. When sufficient reflected light is detected, it can be determined that there is an object near the electronic device 100. When insufficient reflected light is detected, the electronic device 100 may determine that there are no objects near the electronic device 100. The electronic device 100 can utilize the proximity light sensor 180G to detect that the user holds the electronic device 100 close to the ear for talking, so as to automatically turn off the screen to achieve the purpose of saving power. The proximity light sensor 180G may also be used in a holster mode, a pocket mode automatically unlocks and locks the screen.
The ambient light sensor 180L is used to sense the ambient light level. Electronic device 100 may adaptively adjust the brightness of display screen 194 based on the perceived ambient light level. The ambient light sensor 180L may also be used to automatically adjust the white balance when taking a picture. The ambient light sensor 180L may also cooperate with the proximity light sensor 180G to detect whether the electronic device 100 is in a pocket to prevent accidental touches.
The fingerprint sensor 180H is used to collect a fingerprint. The electronic device 100 can utilize the collected fingerprint characteristics to unlock the fingerprint, access the application lock, photograph the fingerprint, answer an incoming call with the fingerprint, and so on.
The temperature sensor 180J is used to detect temperature. In some embodiments, electronic device 100 implements a temperature processing strategy using the temperature detected by temperature sensor 180J. For example, when the temperature reported by the temperature sensor 180J exceeds a threshold, the electronic device 100 performs a reduction in performance of a processor located near the temperature sensor 180J, so as to reduce power consumption and implement thermal protection. In other embodiments, the electronic device 100 heats the battery 142 when the temperature is below another threshold to avoid the low temperature causing the electronic device 100 to shut down abnormally. In other embodiments, when the temperature is lower than a further threshold, the electronic device 100 performs boosting on the output voltage of the battery 142 to avoid abnormal shutdown due to low temperature.
The touch sensor 180K is also called a "touch device". The touch sensor 180K may be disposed on the display screen 194, and the touch sensor 180K and the display screen 194 form a touch screen, which is also called a "touch screen". The touch sensor 180K is used to detect a touch operation acting thereon or nearby. The touch sensor can communicate the detected touch operation to the application processor to determine the touch event type. Visual output associated with the touch operation may be provided through the display screen 194. In other embodiments, the touch sensor 180K may be disposed on a surface of the electronic device 100, different from the position of the display screen 194.
The bone conduction sensor 180M can acquire a vibration signal. In some embodiments, the bone conduction sensor 180M may acquire a vibration signal of the human vocal part vibrating the bone mass. The bone conduction sensor 180M may also contact the human body pulse to receive the blood pressure pulsation signal. In some embodiments, bone conduction sensor 180M may also be provided in a headset, integrated into a bone conduction headset. The audio module 170 may analyze a voice signal based on the vibration signal of the bone mass vibrated by the sound part acquired by the bone conduction sensor 180M, so as to implement a voice function. The application processor can analyze heart rate information based on the blood pressure beating signal acquired by the bone conduction sensor 180M, so as to realize the heart rate detection function.
The keys 190 include a power-on key, a volume key, and the like. The keys 190 may be mechanical keys. Or may be touch keys. The electronic apparatus 100 may receive a key input, and generate a key signal input related to user setting and function control of the electronic apparatus 100.
The motor 191 may generate a vibration cue. The motor 191 may be used for incoming call vibration cues, as well as for touch vibration feedback. For example, touch operations applied to different applications (e.g., photographing, audio playing, etc.) may correspond to different vibration feedback effects. The motor 191 may also respond to different vibration feedback effects for touch operations applied to different areas of the display screen 194. Different application scenes (such as time reminding, receiving information, alarm clock, game and the like) can also correspond to different vibration feedback effects. The touch vibration feedback effect may also support customization.
Indicator 192 may be an indicator light that may be used to indicate a state of charge, a change in charge, or a message, missed call, notification, etc.
The SIM card interface 195 is used to connect a SIM card. The SIM card can be brought into and out of contact with the electronic apparatus 100 by being inserted into the SIM card interface 195 or being pulled out of the SIM card interface 195. The electronic device 100 may support 1 or N SIM card interfaces, N being a positive integer greater than 1. The SIM card interface 195 may support a Nano SIM card, a Micro SIM card, a SIM card, etc. Multiple cards can be inserted into the same SIM card interface 195 at the same time. The types of the plurality of cards may be the same or different. The SIM card interface 195 may also be compatible with different types of SIM cards. The SIM card interface 195 may also be compatible with external memory cards. The electronic device 100 interacts with the network through the SIM card to implement functions such as communication and data communication. In some embodiments, the electronic device 100 employs esims, namely: an embedded SIM card. The eSIM card can be embedded in the electronic device 100 and cannot be separated from the electronic device 100.
Since the UE can typically use 120kHz subcarrier spacing SSBs for initial cell selection or search, the 120kHz subcarrier spacing SSBs are sent by the base station to the UE within the carrier. Thus, when the 480/960kHz subcarrier spacing SSB is also transmitted within the carrier, the 120kHz subcarrier spacing SSB co-exists with the 480/960kHz subcarrier spacing SSB within the carrier.
In addition, in order to reduce the duty ratio of SSB transmission, if the SSB of 120kHz subcarrier spacing and the SSB of 480/960kHz subcarrier spacing can be frequency division multiplexed within 5 milliseconds, the base station can simultaneously complete the transmission of the SSB of 120kHz subcarrier spacing and the transmission of the SSB of 480/960kHz subcarrier spacing within one 5 milliseconds. It is understood that 1 millisecond (or a subframe) may comprise 8 time slots at 120kHz subcarrier spacing, and thus, 5 milliseconds may comprise 40 time slots at 120kHz subcarrier spacing.
In order to improve the uplink transmission efficiency, the SSBs of the 120kHz subcarrier spacing and the SSBs of the 480/960kHz subcarrier spacing may be aligned in time as much as possible, that is, transmitted within the same time interval as much as possible, so that gaps (gaps) between the SSBs of the 120kHz subcarrier spacing may be used for uplink transmission by the UE.
The above-described manner of determining the synchronization signal block SSB is explained below with reference to fig. 2 to 7. Hereinafter, 0/1/… or n/m/… indicates that the index starts from 0, that is, when an x in the x is a number or a letter, the index starts from 0. Hereinafter, the first/second/… indicates that the index starts from 1, i.e., when one of the first x is chinese, it indicates that the index starts from 1.
Fig. 2 is a schematic diagram of the time domain positions within 5 milliseconds of SSB at 120kHz subcarrier spacing. As shown in fig. 2, the 120kHz subcarrier spacing SSB includes 40 slots within 5 milliseconds. In a specific implementation, the above 40 time slots may be numbered, for example, the number may be 0 to 39. The 40 slots may be divided into 4 groups, each group containing 10 slots. Illustratively, the first group may contain slots numbered 0-9, the second group may contain slots numbered 10-19, the third group may contain slots numbered 20-29, and the fourth group may contain slots numbered 30-39. The last two slots of each group in the sub-frame of the 120kHz subcarrier-spaced SSB described above do not contain a 120kHz subcarrier-spaced SSB. Illustratively, it can be characterized by the following formula:
n =10 × k + m; wherein n is the number of the slot in the sub-frame of the SSB at the 120kHz sub-carrier interval, k is an integer greater than or equal to 0 and less than 4, and m is 8 or 9. That is, the slots numbered 8 and 9 in the first group, the slots numbered 18 and 19 in the second group, the slots numbered 28 and 29 in the third group, and the slots numbered 38 and 39 in the fourth group do not include SSB of 120kHz subcarrier spacing, so that the last two slots in each group may be used as a gap, which may be used to transmit uplink data, and thus, uplink transmission efficiency may be improved.
Fig. 3 is a schematic diagram of the time domain position within one 5 msec of the SSB for a 480kHz subcarrier spacing. As shown in fig. 3, the 480kHz subcarrier spacing SSB includes 160 slots within one 5 msec. In particular implementations, the 160 slots may be numbered, for example, the number may be 0-159. The 160 slots may be divided into 4 groups, each group containing 40 slots. Illustratively, the first group may contain slots numbered 0-39, the second group may contain slots numbered 40-79, the third group may contain slots numbered 80-119, and the fourth group may contain slots numbered 120-159. In this case, in order to improve the efficiency of uplink transmission, the last 8 slots of each group in the subframe may not include SSB of a 480kHz subcarrier spacing, so that the last 8 slots of each group may be used to transmit uplink data, thereby improving the efficiency of uplink transmission. Illustratively, it can be characterized by the following formula:
n =40 × k +m; wherein n is the number of the time slot in the subframe, k is an integer greater than or equal to 0 and less than 4, and m is an integer from 32 to 39. That is, neither the numbers 32 and 39 in the first set, 72 and 79 in the second set, 112 and 119 in the third set, nor 152 and 159 in the fourth set contain SSBs for 480kHz subcarrier spacing.
Fig. 4 is a schematic diagram of the time domain position within 5 milliseconds of SSB for a 960kHz subcarrier spacing. As shown in fig. 4, the 960kHz subcarrier spacing SSB includes 320 slots within 5 milliseconds. In a specific implementation, the 320 time slots may be numbered, for example, the number may be 0 to 319. The 320 slots may be divided into 4 groups, each group containing 80 slots. Illustratively, the first group may contain slots numbered 0-79, the second group may contain slots numbered 80-159, the third group may contain slots numbered 160-239, and the fourth group may contain slots numbered 240-319. At this time, in order to improve the efficiency of uplink transmission, the last 16 slots of each group in the subframe may not include SSB of 960kHz subcarrier spacing, so that the last 16 slots of each group may be used to transmit uplink data, thereby improving the efficiency of uplink transmission. Illustratively, it can be characterized by the following formula:
n =80 + k + m; wherein n is the number of the time slot in the subframe, k is an integer greater than or equal to 0 and less than 4, and m is an integer from 64 to 79. That is, neither the slots numbered 64 and 79 in the first set, 144 and 159 in the second set, 224 and 239 in the third set, nor 304 and 319 in the fourth set contain the SSB of the 480kHz subcarrier spacing.
The above manner of determining the synchronization signal block SSB is explained with the dimensions of the time slot by using fig. 2 to fig. 4. Next, the manner of determining the synchronization signal block SSB described above is described below with reference to the symbol dimension in fig. 5 to 7.
Since the time domain position of the slots of the 120kHz subcarrier spacing SSB may have various forms, when the 120kHz subcarrier spacing SSB and the 480/960kHz subcarrier spacing SSB coexist to be transmitted in one carrier, there may be various combinations, which will be described below in terms of different combinations.
Fig. 5a is a time domain position diagram of one form of a slot of SSB at 120kHz subcarrier spacing. As shown in fig. 5a, the above-mentioned slot of the SSB of 120kHz subcarrier spacing includes 14 Orthogonal Frequency Division Multiplexing (OFDM) symbols. Wherein, the 14 OFDM symbols may be arranged in sequence, and are the first 4 OFDM symbols, and the first 4 OFDM symbols may be non-SSB symbols; the middle 8 OFDM symbols, which may be SSB symbols; and a tail 2 OFDM symbols, which may be non-SSB symbols. It is understood that the middle 8 SSB symbols may contain 2 SSBs, that is, 4 SSB symbols may contain 1 SSB.
Based on the time domain position of one timeslot of the SSB of the 120kHz subcarrier spacing shown in fig. 5a, if the SSB of the 120kHz subcarrier spacing and the SSB of the 480/960kHz subcarrier spacing coexist in one carrier to be transmitted, the time domain position diagram of 4 consecutive timeslots of the SSB of the 480kHz subcarrier spacing shown in fig. 5b and the time domain position diagram of 8 consecutive timeslots of the SSB of the 960kHz subcarrier spacing shown in fig. 5c can be obtained. Wherein one time slot of the 120kHz subcarrier spaced SSB may correspond to 4 time slots of the 480kHz subcarrier spaced SSB, and one time slot of the 120kHz subcarrier spaced SSB may correspond to 8 time slots of the 960kHz subcarrier spaced SSB.
As shown in fig. 5b, the 4 consecutive slots 500 of the SSB at the 480kHz subcarrier spacing may respectively include a slot 501, a slot 502, a slot 503 and a slot 504, and the 4 consecutive slots 500 may include 56 OFDM symbols. The 56 OFDM symbols may be arranged in order, and are the first 16 non-SSB symbols, the middle 32 SSB symbols, and the last 8 non-SSB symbols. The middle 32 SSB symbols may contain a plurality of SSBs, and for example, the slot 502 may contain 2 SSBs and the slot 503 may contain 2 SSBs. It is understood that the middle 32 SSB symbols are merely exemplary in a scenario of 4 SSBs, and do not constitute a limitation to the embodiment of the present application, and in some embodiments, the middle 32 SSB symbols may include more SSBs (e.g., 5 SSBs).
Since the first 16 OFDM symbols in the 4 consecutive slots 500 of the SSB of the 480kHz subcarrier spacing and the first 4 OFDM symbols in the slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the first 16 OFDM symbols in the 4 consecutive slots 500 of the SSB of the 480kHz subcarrier spacing may be selected as the gap, and thus the gap may be used to transmit uplink data. Illustratively, the first 14 OFDM symbols of the first 16 OFDM symbols in the 4 consecutive slots 500 of the SSB with the above 480kHz subcarrier spacing may be selected as the gap, that is, the slot 501 may be used as the gap, and the SSB with the 480kHz subcarrier spacing is not included in the slot 501.
Next, since the last 8 OFDM symbols in the 4 consecutive slots 500 of the SSB of the 480kHz subcarrier spacing and the last 2 OFDM symbols in the slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the last 8 OFDM symbols in the 4 consecutive slots 500 of the SSB of the 480kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. Illustratively, the last 8 OFDM symbols in the time slot 504 may be regarded as gap, that is, SSB of 480kHz subcarrier spacing is not included in the last 8 OFDM symbols in the time slot 504.
Optionally, since the time slot 504 includes 14 OFDM symbols, the first 6 OFDM symbols in the time slot 504 may include an SSB with a sub-carrier spacing of 480kHz, that is, the last 8 OFDM symbols of the time slot 504 may be used to transmit uplink data, and the first 6 OFDM symbols may be used to transmit SSBs; the first 6 OFDM symbols in the time slot 504 may not include SSBs with a 480kHz subcarrier spacing, that is, the time slot 504 is only used for transmitting uplink data. From this, a plot of the SSB time domain position for the 480kHz subcarrier spacing shown in figure 5d can be obtained.
Since the SSB of the 480kHz subcarrier spacing includes 160 slots within 5 msec, that is, 40 sets of 4 consecutive slots of the SSB of the 480kHz subcarrier spacing may be included within 5 msec. Within the above 5 ms, the time slot available for gap in the SSB of the above 480kHz subcarrier spacing can be characterized by the following formula:
n =4 + p + q; wherein n is the number of the time slot, p is an integer of 0 or more and less than 40, and q is 0 or 3. It will be appreciated that when q =0, the first slot of every 4 consecutive slots is indicated; when q =3, the fourth slot of every 4 consecutive slots, that is, the last slot of every 4 consecutive slots, is indicated. In the nth slot, SSBs at 480kHz subcarrier spacing are not included.
Further, within the above 5 milliseconds, the time slots available for gap and for SSB in the SSB of the above 480kHz subcarrier spacing can be characterized by the following formula:
l =4 + p + q; wherein, L is the number of the time slot, p is an integer which is more than or equal to 0 and less than 40, and q is 3. It will be appreciated that when q =3, the fourth slot of every 4 consecutive slots is indicated. In the L-th time slot, except for the first 6 OFDM symbols in the L-th time slot containing SSBs at intervals of 480kHz subcarriers, the last 8 OFDM symbols do not contain SSBs at intervals of 480kHz subcarriers; that is, the first 6 OFDM symbols in the L-th slot have SSBs of the first 480kHz subcarrier spacing, and the last 8 OFDM symbols have no SSBs of the second 480kHz subcarrier spacing. It is understood that there may be two SSBs in a timeslot, where the first SSB refers to the first SSB in the timeslot and the second SSB refers to the last SSB in the timeslot. Hereinafter, the first SSB and the second SSB may refer to the description herein and will not be described in detail.
As shown in fig. 5c, the consecutive 8 slots 510 of the SSB of the 960kHz subcarrier spacing may include a slot 511, a slot 512, a slot 513, a slot 514, a slot 515, a slot 516, a slot 517 and a slot 518, respectively, and the consecutive 8 slots 510 may include 112 OFDM symbols. The 112 OFDM symbols may be arranged in sequence, and are the first 32 non-SSB symbols, the middle 64 SSB symbols, and the last 16 non-SSB symbols. The middle 64 SSB symbols may include a plurality of SSBs, and for example, the slot 513 may include 2 SSBs, the slot 514 may include 2 SSBs, the slot 515 may include 2 SSBs, the slot 516 may include 2 SSBs, and the slot 517 may include 2 SSBs.
Since the first 32 OFDM symbols in the consecutive 8 slots 510 of the SSB of the 960kHz subcarrier spacing and the first 4 OFDM symbols in the slot of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the first 32 OFDM symbols in the consecutive 8 slots 510 of the SSB of the 960kHz subcarrier spacing may be selected as gap, and thus the gap may be used to transmit uplink data. Illustratively, the first 28 OFDM symbols of the first 32 OFDM symbols in the continuous 8 slots 510 of the SSB of the above 960kHz subcarrier spacing may be chosen as 2 gaps, that is, the slots 511 and 512 may be considered as gaps, and the slots 511 and 512 do not contain the SSB of the 960kHz subcarrier spacing within the slots 512.
Next, since the last 16 OFDM symbols in the continuous 8 time slots 510 of the SSB of the 960kHz subcarrier spacing and the last 2 OFDM symbols in the time slot of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the last 16 OFDM symbols in the continuous 8 time slots 510 of the SSB of the 960kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. Illustratively, 14 OFDM symbols in the time slot 518 may be referred to as gap, that is, the 14 OFDM symbols in the time slot 518 do not include SSB of 960kHz subcarrier spacing.
Since the SSB of the 960kHz subcarrier spacing contains 320 time slots within 5 msec, that is, 40 sets of consecutive 8 time slots of the SSB of the 960kHz subcarrier spacing can be contained within 5 msec. And within the above 5 milliseconds, the time slot available for gap in the SSB of the above 960kHz subcarrier spacing can be characterized by the following formula:
n =8 × p +q; wherein n is the number of the time slot, p is an integer greater than or equal to 0 and less than 40, and p is 0, 1 or 7. It will be appreciated that when p =0, the first slot of every 8 consecutive slots is indicated; when p =1, the second of every 8 consecutive slots is indicated; when p =7, the eighth slot of every 8 consecutive slots, that is, the last slot of every 8 consecutive slots, is indicated.
Figure 6a is a schematic diagram of the time domain position of another form of one slot of a SSB at 120kHz subcarrier spacing. As shown in fig. 6a, the slot of the above-mentioned 120kHz subcarrier spacing SSB includes 14 OFDM symbols. Wherein, the 14 OFDM symbols may be arranged in sequence, and are the first 2 OFDM symbols, and the first 2 OFDM symbols may be non-SSB symbols; the next 4 consecutive OFDM symbols, which may be SSB symbols; next 2 OFDM symbols, which may be non-SSB symbols; then 4 consecutive OFDM symbols, which may be SSB symbols; the last 2 OFDM symbols, which 2 OFDM symbols may be non-SSB symbols. It is understood that the first set of 4 consecutive SSB symbols may comprise 1 SSB, and the second set of 4 consecutive SSB symbols may comprise 1 SSB.
Based on the time domain position of one timeslot of the SSB of the 120kHz subcarrier spacing shown in fig. 6a, if the SSB of the 120kHz subcarrier spacing and the SSB of the 480/960kHz subcarrier spacing coexist in one carrier to be transmitted, the time domain position diagram of 4 consecutive timeslots of the SSB of the 480kHz subcarrier spacing shown in fig. 6b and the time domain position diagram of 8 consecutive timeslots of the SSB of the 960kHz subcarrier spacing shown in fig. 6c can be obtained. Wherein one time slot of the 120kHz subcarrier spacing SSB may correspond to 4 time slots of the 480kHz subcarrier spacing SSB, and one time slot of the 120kHz subcarrier spacing SSB may correspond to 8 time slots of the 960kHz subcarrier spacing SSB.
As shown in fig. 6b, the 4 consecutive slots 600 of the SSB of the above 480kHz subcarrier spacing may respectively include a slot 601, a slot 602, a slot 603, and a slot 604, and the 4 consecutive slots 600 may include 56 OFDM symbols. The 56 OFDM symbols may be arranged in sequence, and are the first 8 non-SSB symbols, the first 16 SSB symbols, the middle 8 non-SSB symbols, the last 16 SSB symbols, and the last 8 non-SSB symbols, respectively. The first 16 SSB symbols may include a plurality of SSBs, and the last 16 SSB symbols may include a plurality of SSBs, for example, the slot 602 may include 2 SSBs, and the slot 603 may include 2 SSBs. It is to be understood that the first 16 SSB symbols and the last 16 SSB symbols are merely illustrative of a scenario of 4 SSBs, and do not constitute a limitation to the embodiment of the present application, and in some embodiments, the first 16 SSB symbols and the last 16 SSB symbols may include more SSBs (for example, 6 SSBs).
Since the first 8 OFDM symbols in the 4 consecutive slots 600 of the SSB of the 480kHz subcarrier spacing and the first 2 OFDM symbols in the slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the first 8 OFDM symbols in the 4 consecutive slots 600 of the SSB of the 480kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. Illustratively, the first 8 OFDM symbols in the time slot 601 may be regarded as gap, and the SSB of the 480kHz subcarrier spacing is not included in the time slot 601.
Next, since the last 8 OFDM symbols in the 4 consecutive slots 600 of the SSB at the 480kHz subcarrier spacing and the last 2 OFDM symbols in the slots of the SSB at the 120kHz subcarrier spacing are both non-SSB symbols, the last 8 OFDM symbols in the 4 consecutive slots 600 of the SSB at the 480kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. For example, the last 8 OFDM symbols in the slot 604 may be referred to as gap, that is, the SSB of the 480kHz subcarrier spacing is not included in the last 8 OFDM symbols in the slot 604.
Optionally, since the time slot 601 includes 14 OFDM symbols, the last 6 OFDM symbols in the time slot 601 may include an SSB with a sub-carrier spacing of 480kHz, that is, the first 8 OFDM symbols of the time slot 601 may be used to transmit uplink data, and the last 6 OFDM symbols may be used to transmit an SSB. Similarly, since the slot 604 includes 14 OFDM symbols, the last 6 OFDM symbols in the slot 604 may also include an SSB with a sub-carrier spacing of 480kHz, that is, the first 8 OFDM symbols of the slot 604 may be used to transmit uplink data, and the last 6 OFDM symbols may be used to transmit SSBs. This results in a plot of the SSB time domain location for the 480kHz subcarrier spacing shown in figure 6 d.
Since the SSB of the 480kHz subcarrier spacing contains 160 slots within 5 msec, that is, 40 sets of 4 consecutive slots of the SSB of the 480kHz subcarrier spacing can be contained within 5 msec. Within the above 5 ms, the time slot available for gap in the SSB of the above 480kHz subcarrier spacing can be characterized by the following formula:
n =4 + p + q; wherein n is the number of the time slot, p is an integer of 0 or more and less than 40, and q is 0 or 3. It will be appreciated that when q =0, the first slot of every 4 consecutive slots is indicated; when q =3, the fourth slot of every 4 consecutive slots, that is, the last slot of every 4 consecutive slots, is indicated. In the nth slot, SSBs at 480kHz subcarrier spacing are not included.
Further, within the above 5 milliseconds, the time slots available for gap and for SSB in the SSB of the above 480kHz subcarrier spacing can be characterized by the following formula:
l =4 + p + q; wherein, L is the number of the time slot, p is an integer which is more than or equal to 0 and less than 40, and q is 0 or 3. It will be appreciated that when q =0, the first slot of every 4 consecutive slots is indicated; in the above-mentioned L-th time slot, except for the SSB of 480kHz subcarrier spacing included in the last 6 OFDM symbols in the L-th time slot, the SSB of 480kHz subcarrier spacing is not included in the first 8 OFDM symbols; that is, in the L-th slot, the first 8 OFDM symbols do not have SSB of the first 480kHz subcarrier spacing, and the last 6 OFDM symbols have SSB of the first 480kHz subcarrier spacing.
When q =3, the fourth slot of every 4 consecutive slots is indicated. In the L-th time slot, except for the first 6 OFDM symbols in the L-th time slot containing SSBs at intervals of 480kHz subcarriers, the last 8 OFDM symbols do not contain SSBs at intervals of 480kHz subcarriers; that is, the first 6 OFDM symbols in the L-th slot have SSBs of the first 480kHz subcarrier spacing, and the last 8 OFDM symbols have no SSBs of the second 480kHz subcarrier spacing.
As shown in fig. 6c, the 8 consecutive slots 610 of the SSB of the 960kHz subcarrier spacing may respectively include a slot 611, a slot 612, a slot 613, a slot 614, a slot 615, a slot 616, a slot 617, and a slot 618, and the 8 consecutive slots 610 may include 112 OFDM symbols. The 112 OFDM symbols may be arranged in sequence, and are the first 16 non-SSB symbols, the first 32 SSB symbols, the middle 16 non-SSB symbols, the last 32 SSB symbols, and the last 16 non-SSB symbols. The first 32 SSB symbols and the last 32 SSB symbols may include a plurality of SSBs, for example, the slot 612 may include 2 SSBs, the slot 613 may include 2 SSBs, the slot 616 may include 2 SSBs, and the slot 617 may include 2 SSBs. It is to be understood that the first 32 SSB symbols and the last 32 SSB symbols are merely illustrative of a scenario of 8 SSBs, and do not constitute a limitation to the embodiment of the present application, and in some embodiments, the first 32 SSB symbols and the last 32 SSB symbols may include more SSBs (for example, 10 SSBs).
Since the first 16 OFDM symbols in the consecutive 8 slots 610 of the SSB of the 960kHz subcarrier spacing and the first 2 OFDM symbols in the slot of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the first 16 OFDM symbols in the consecutive 8 slots 610 of the SSB of the 960kHz subcarrier spacing may be selected as the gap, and thus the gap may be used to transmit uplink data. Illustratively, the time slot 611 may be referred to as a gap, and the SSB of the 960kHz subcarrier spacing is not included in the time slot 611.
Next, since the middle 16 OFDM symbols in the continuous 8 slots 610 of the SSB of the 960kHz subcarrier spacing and the middle 2 OFDM symbols in the slot of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the middle 16 OFDM symbols in the continuous 8 slots 610 of the SSB of the 960kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. Illustratively, since the middle 16 OFDM symbols in the consecutive 8 slots 610 of the above-described 960kHz subcarrier-spaced SSB are distributed in two slots, e.g., the slot 614 and the slot 615, the last 8 OFDM symbols in the slot 614 may be referred to as gap, and the first 8 OFDM symbols in the slot 615 may be referred to as gap; wherein the SSB of 960kHz subcarrier spacing is not included in time slots 614 and 615. Optionally, since the time slot 614 includes 14 OFDM symbols, the first 6 OFDM symbols in the time slot 614 may include an SSB with a sub-carrier spacing of 480kHz, that is, the last 8 OFDM symbols of the time slot 614 may be used to transmit uplink data, and the first 6 OFDM symbols may be used to transmit SSBs. Likewise, the first 8 OFDM symbols of slot 615 may be used to transmit uplink data and the last 6 OFDM symbols may be used to transmit SSBs. From this, a schematic diagram of the SSB time domain position for the 960kHz subcarrier spacing as shown in fig. 6e can be obtained.
Then, since the last 16 OFDM symbols in the 8 consecutive slots 610 of the SSB of the 960kHz subcarrier spacing and the last 2 OFDM symbols in the slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the last 16 OFDM symbols in the 8 consecutive slots 610 of the SSB of the 960kHz subcarrier spacing may be selected as the gap, and thus the gap may be used to transmit uplink data. Illustratively, 14 OFDM symbols in the time slot 618 may be regarded as gap, that is, the 14 OFDM symbols in the time slot 618 do not include SSB of 960kHz subcarrier spacing.
Since the SSB of the 960kHz subcarrier spacing contains 320 time slots within 5 msec, that is, 40 sets of consecutive 8 time slots of the SSB of the 960kHz subcarrier spacing can be contained within 5 msec. Within the above 5 ms, the time slot available for gap in the SSB of the above 960kHz subcarrier spacing can be characterized by the following formula:
n =8 p + q; wherein n is the number of the time slot, p is an integer of 0 or more and less than 40, and q is 0, 3, 4 or 7. It will be appreciated that when q =0, the first slot of every 8 consecutive slots is indicated; when q =3, the fourth slot of every 8 consecutive slots is indicated; when q =4, the fifth slot of every 8 consecutive slots is indicated; when p =7, the eighth slot of every 8 consecutive slots, that is, the last slot of every 8 consecutive slots, is indicated. In the nth slot, SSBs at 480kHz subcarrier spacing are not included.
Further, within the above 5 milliseconds, the time slots available for gap and SSB in the SSB of the 480kHz subcarrier spacing can be further characterized by the following formula:
l =8 + p + q; wherein L is the number of the time slot, p is an integer of 0 or more and less than 40, and q is 3 or 4. It is to be understood that when q =3, the fourth slot of every 4 consecutive slots is represented; in the L-th time slot, except for the first 6 OFDM symbols in the L-th time slot containing SSBs at intervals of 480kHz subcarriers, the last 8 OFDM symbols do not contain SSBs at intervals of 480kHz subcarriers; that is, in the first 6 OFDM symbols in the L-th slot, SSB of the first 480kHz subcarrier spacing exists, and in the last 8 OFDM symbols, SSB of the second 480kHz subcarrier spacing does not exist.
When q =4, the fifth slot of every 4 consecutive slots is indicated. In the above-mentioned L-th time slot, except for the SSB of 480kHz subcarrier spacing included in the last 6 OFDM symbols in the L-th time slot, the SSB of 480kHz subcarrier spacing is not included in the first 8 OFDM symbols; that is, the SSB of the first 480kHz subcarrier spacing exists in the last 6 OFDM symbols in the above-mentioned L-th slot, and the SSB of the first 480kHz subcarrier spacing does not exist in the first 8 OFDM symbols.
Fig. 7a is a schematic time domain location diagram of yet another form of a slot of SSB at 120kHz subcarrier spacing. As shown in fig. 7a, the slot of the above-described SSB at 120kHz subcarrier spacing includes 14 OFDM symbols. Wherein, the 14 OFDM symbols may be arranged in sequence, and are the first 2 OFDM symbols, and the first 2 OFDM symbols may be non-SSB symbols; the next 4 consecutive OFDM symbols, which may be SSB symbols; then, the next 3 OFDM symbols, where the 3 OFDM symbols may be non-SSB symbols; then 4 consecutive OFDM symbols, which may be SSB symbols; the last 1 OFDM symbol, which 1 OFDM symbol may be a non-SSB symbol. It is understood that the first set of 4 consecutive SSB symbols may comprise 1 SSB, and the second set of 4 consecutive SSB symbols may comprise 1 SSB.
Based on the time domain position of one timeslot of the SSB of the 120kHz subcarrier spacing shown in fig. 7a, if the SSB of the 120kHz subcarrier spacing and the SSB of the 480/960kHz subcarrier spacing coexist in one carrier to be transmitted, the time domain position diagram of 4 consecutive timeslots of the SSB of the 480kHz subcarrier spacing shown in fig. 7b and the time domain position diagram of 8 consecutive timeslots of the SSB of the 960kHz subcarrier spacing shown in fig. 7c can be obtained. Wherein one time slot of the 120kHz subcarrier spacing SSB may correspond to 4 time slots of the 480kHz subcarrier spacing SSB, and one time slot of the 120kHz subcarrier spacing SSB may correspond to 8 time slots of the 960kHz subcarrier spacing SSB.
As shown in fig. 7b, the 4 consecutive slots 700 of the SSB of the 480kHz subcarrier spacing may respectively include a slot 701, a slot 702, a slot 703 and a slot 704, and the 4 consecutive slots 700 may include 56 OFDM symbols. The 56 OFDM symbols may be arranged in sequence, and are the first 8 non-SSB symbols, the first 16 SSB symbols, the middle 12 non-SSB symbols, the last 16 SSB symbols, and the last 4 non-SSB symbols. The first 16 SSB symbols and the last 16 SSB symbols may include a plurality of SSBs, for example, the slot 702 may include 1 SSB, and the slot 703 may include 1 SSB. It is understood that the first 16 SSB symbols and the last 16 SSB symbols are merely exemplary of a scenario of 2 SSBs, and do not limit the embodiments of the present application, and in some embodiments, the first 16 SSB symbols and the last 16 SSB symbols may include more SSBs (e.g., 4 SSBs).
Since the first 8 OFDM symbols in the 4 consecutive slots 700 of the SSB of the 480kHz subcarrier spacing and the first 2 OFDM symbols in the slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the first 8 OFDM symbols in the 4 consecutive slots 700 of the SSB of the 480kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. Illustratively, the first 8 OFDM symbols in the time slot 701 may be regarded as gap, and the SSB of the 480kHz subcarrier spacing is not included in the time slot 701.
Next, since the middle 12 OFDM symbols in the 4 consecutive slots 700 of the SSB of the 480kHz subcarrier spacing and the middle 3 OFDM symbols in the slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the middle 12 OFDM symbols in the 4 consecutive slots 700 of the SSB of the 480kHz subcarrier spacing may be selected as the gap, and thus the gap may be used to transmit uplink data. For example, the first 8 OFDM symbols in the time slot 703 may be used as a gap, that is, the time slot 703 does not include SSB of 480kHz subcarrier spacing.
Optionally, since the timeslot 701 includes 14 OFDM symbols, the last 6 OFDM symbols in the timeslot 701 may include an SSB with a sub-carrier spacing of 480kHz, that is, the first 8 OFDM symbols of the timeslot 701 may be used to transmit uplink data, and the last 6 OFDM symbols may be used to transmit the SSB. Similarly, since the slot 703 includes 14 OFDM symbols, the last 6 OFDM symbols in the slot 703 may include an SSB with a sub-carrier spacing of 480kHz, that is, the first 8 OFDM symbols of the slot 703 may be used to transmit uplink data, and the last 6 OFDM symbols may be used to transmit SSBs. From this, a plot of the SSB time domain position for the 480kHz subcarrier spacing shown in figure 7d can be obtained.
Since the SSB of the 480kHz subcarrier spacing contains 160 slots within 5 msec, that is, 40 sets of 4 consecutive slots of the SSB of the 480kHz subcarrier spacing can be contained within 5 msec. Within the 5 ms, the time slot available for gap in the SSB of the 480kHz subcarrier spacing can be characterized by the following formula:
n =4 + p + q; wherein n is the number of the time slot, p is an integer of 0 or more and less than 40, and q is 0 or 2. It will be appreciated that when q =0, the first slot of every 4 consecutive slots is indicated; when q =2, the third slot of every 4 consecutive slots is indicated. In the nth slot, SSBs at 480kHz subcarrier spacing are not included.
Further, within the above 5 milliseconds, the time slots available for gap and for SSB in the SSB of the above 480kHz subcarrier spacing can be characterized by the following formula:
l =4 + p + q; wherein, L is the number of the time slot, p is an integer which is more than or equal to 0 and less than 40, and q is 0 or 2. It will be appreciated that when q =0, the first slot of every 4 consecutive slots is indicated; in the above-mentioned L-th time slot, except for the SSB of 480kHz subcarrier spacing included in the last 6 OFDM symbols in the L-th time slot, the SSB of 480kHz subcarrier spacing is not included in the first 8 OFDM symbols; that is, in the L-th slot, the first 8 OFDM symbols do not have SSB of the first 480kHz subcarrier spacing, and the last 6 OFDM symbols have SSB of the first 480kHz subcarrier spacing.
When q =2, the third slot of every 4 consecutive slots is indicated. In the L-th time slot, SSBs at 480kHz subcarrier spacing are not included in the first 8 OFDM symbols, except for SSBs at 480kHz subcarrier spacing included in the last 6 OFDM symbols in the L-th time slot; that is, the SSB of the first 480kHz subcarrier spacing exists in the last 6 OFDM symbols in the above-mentioned L-th slot, and the SSB of the first 480kHz subcarrier spacing does not exist in the first 8 OFDM symbols.
As shown in fig. 7c, the consecutive 8 slots 710 of the SSB of the 960kHz subcarrier spacing may include a slot 711, a slot 712, a slot 713, a slot 714, a slot 715, a slot 716, a slot 717, and a slot 718, respectively, and the consecutive 8 slots 710 may include 112 OFDM symbols. The 112 OFDM symbols may be arranged in sequence, and are the first 16 non-SSB symbols, the first 32 SSB symbols, the middle 24 non-SSB symbols, the last 32 SSB symbols, and the last 8 non-SSB symbols. The first 32 SSB symbols and the last 32 SSB symbols may include a plurality of SSBs, for example, slot 712 may include 2 SSBs, slot 713 may include 2 SSBs, slot 716 may include 2 SSBs, and slot 717 may include 2 SSBs. It is understood that the first 32 SSB symbols and the last 32 SSB symbols are merely exemplary of a scenario of 8 SSBs, and do not limit the present application, and in some embodiments, the first 32 SSB symbols and the last 32 SSB symbols may include more SSBs (e.g., 10 SSBs).
Since the first 16 OFDM symbols in the 8 consecutive slots 710 of the SSB of the 960kHz subcarrier spacing and the first 2 OFDM symbols in the slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the first 16 OFDM symbols in the 8 consecutive slots 710 of the SSB of the 960kHz subcarrier spacing may be selected as the gap, and thus the gap may be used to transmit uplink data. Illustratively, the time slot 711 may be referred to as a gap, and the SSB of the 960kHz subcarrier spacing is not included in the time slot 711.
Next, since the middle 24 OFDM symbols in the continuous 8 time slots 710 of the SSB of the 960kHz subcarrier spacing and the middle 3 OFDM symbols in the time slots of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the OFDM symbols in the middle 24 OFDM symbols in the continuous 8 time slots 710 of the SSB of the 960kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. Illustratively, since the middle 24 OFDM symbols in the continuous 8 slots 710 of the above-described SSB of 960kHz subcarrier spacing are distributed in two slots, e.g., the slot 714 and the slot 715, the last 8 OFDM symbols in the slot 714 may be regarded as gap, and the slot 715 may be regarded as gap; where slot 714 and slot 715 do not contain the SSB for the 960kHz subcarrier spacing.
Then, since the last 8 OFDM symbols in the continuous 8 time slots 710 of the SSB of the 960kHz subcarrier spacing and the last 1 OFDM symbol in the time slot of the SSB of the 120kHz subcarrier spacing are both non-SSB symbols, the last 8 OFDM symbols in the continuous 8 time slots 710 of the SSB of the 960kHz subcarrier spacing may be selected as a gap, and thus the gap may be used to transmit uplink data. Illustratively, the last 8 OFDM symbols in the time slot 718 may be referred to as gap, that is, the time slot 718 does not include SSB of 960kHz subcarrier spacing.
Optionally, since the time slot 714 includes 14 OFDM symbols, the first 6 OFDM symbols in the time slot 714 may include an SSB at a 480kHz subcarrier spacing, that is, the last 8 OFDM symbols of the time slot 714 may be used to transmit uplink data, and the first 6 OFDM symbols may be used to transmit an SSB. Likewise, since the slot 718 includes 14 OFDM symbols, the first 6 OFDM symbols in the slot 718 may include an SSB with a sub-carrier spacing of 480kHz, that is, the last 8 OFDM symbols of the slot 718 may be used for transmitting uplink data, and the first 6 OFDM symbols may be used for transmitting SSBs. From this, a plot of the SSB time domain position for the 960kHz subcarrier spacing shown in fig. 7e can be obtained.
Since the SSB of the 960kHz subcarrier spacing contains 320 time slots within 5 msec, that is, 40 sets of consecutive 8 time slots of the SSB of the 960kHz subcarrier spacing can be contained within 5 msec. Within the above 5 ms, the time slot available for gap in the SSB of the above 960kHz subcarrier spacing can be characterized by the following formula:
n =8 × p +q; wherein n is the number of the time slot, p is an integer of 0 or more and less than 40, and q is 0, 3, 4 or 7. It will be appreciated that when q =0, the first slot of every 8 consecutive slots is indicated; when q =3, the fourth slot of every 8 consecutive slots is indicated; when q =4, the fifth slot of every 8 consecutive slots is indicated; when p =7, the eighth slot of every 8 consecutive slots, that is, the last slot of every 8 consecutive slots, is indicated. In the nth slot, the SSB of the 480kHz subcarrier spacing is not included.
Further, within the above 5 milliseconds, the time slots available for gap and for SSB in the SSB of the above 480kHz subcarrier spacing can be characterized by the following formula:
l =8 + p + q; wherein L is the number of the time slot, p is an integer of 0 or more and less than 40, and q is 3 or 7. It is to be understood that when q =3, the fourth slot of every 4 consecutive slots is represented; in the above-mentioned L-th time slot, except for the first 6 OFDM symbols in the L-th time slot containing SSBs at 480kHz subcarrier spacing, the last 8 OFDM symbols do not contain SSBs at 480kHz subcarrier spacing; that is, in the first 6 OFDM symbols in the L-th slot, there is a first SSB in the interval of 480kHz subcarriers, and in the last 8 OFDM symbols, there is no SSB in the interval of 480kHz subcarriers.
When q =7, the eighth slot of every 8 consecutive slots is indicated. In the L-th time slot, except for the first 6 OFDM symbols in the L-th time slot containing SSBs at intervals of 480kHz subcarriers, the last 8 OFDM symbols do not contain SSBs at intervals of 480kHz subcarriers; that is, the first 6 OFDM symbols in the L-th slot have SSBs of the first 480kHz subcarrier spacing, and the last 8 OFDM symbols have no SSBs of the first 480kHz subcarrier spacing.
Fig. 8 is a schematic structural diagram of a chip provided in an embodiment of the present application, and as shown in fig. 8, the chip 800 may include: a determination module 810; wherein,
a determining module 810, configured to determine that no SSB or only one SSB is included in the timeslot.
In one possible implementation manner, the determining module 810 is further configured to determine that the nth timeslot does not include the SSB; wherein n =40 × k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 32 and equal to or less than 39.
In one possible implementation manner, the determining module 810 is further configured to determine that the nth timeslot does not include the SSB; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 3.
In one possible implementation manner, the determining module 810 is further configured to determine that only one SSB is included in the lth timeslot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
In one possible implementation manner, the determining module 810 is further configured to determine that only the first SSB is included in the lth timeslot.
In one possible implementation manner, the determining module 810 is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0.
In a possible implementation manner, the determining module 810 is further configured to include, in the lth timeslot, only one SSB, and includes: only the second SSB is included in the lth slot.
In one possible implementation manner, the determining module 810 is further configured to determine that the nth timeslot does not include the SSB; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
In one possible implementation manner, the determining module 810 is further configured to determine that only one SSB is included in the lth timeslot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
In a possible implementation manner, the determining module 810 is further configured to include, in the lth timeslot, only one SSB, and includes: the lth slot contains only the second SSB.
In one possible implementation manner, the SSB is an SSB with a subcarrier spacing of 480 kHz.
In one possible implementation manner, the determining module 810 is further configured to determine that the nth timeslot does not include the SSB; wherein n =80 x k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 64 and equal to or less than 79.
In one possible implementation manner, the determining module 810 is further configured to determine that the nth timeslot does not include the SSB; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 1 and/or 7.
In one possible implementation manner, the determining module 810 is further configured to determine that the nth timeslot does not include the SSB; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 3, 4 and/or 7.
In one possible implementation manner, the determining module 810 is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
In one possible implementation manner, the determining module 810 is further configured to determine that only the first SSB is included in the lth timeslot.
In one possible implementation manner, the determining module 810 is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 4.
In one possible implementation manner, the determining module 810 is further configured to determine that only the second SSB is included in the lth timeslot.
In one possible implementation manner, the determining module 810 is further configured to determine that only one SSB is included in the lth timeslot, and L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3 and/or 7.
In one possible implementation manner, the determining module 810 is further configured to determine that only the first SSB is included in the lth timeslot.
In one possible implementation manner, the SSB is an SSB with a subcarrier spacing of 960kHz
It should be understood that the division of the modules of the chip 800 shown in fig. 8 is merely a logical division, and the actual implementation may be wholly or partially integrated into one physical entity or may be physically separated. And these modules can be realized in the form of software called by processing element; or may be implemented entirely in hardware; and part of the modules can be realized in the form of calling by the processing element in software, and part of the modules can be realized in the form of hardware. In addition, all or part of the modules can be integrated together or can be independently realized. In implementation, each step of the above method or each module above may be implemented by an integrated logic circuit of hardware in a processor element or an instruction in the form of software.
For example, the above modules may be one or more integrated circuits configured to implement the above methods, such as: one or more Application Specific Integrated Circuits (ASICs), one or more microprocessors (DSPs), one or more Field Programmable Gate Arrays (FPGAs), etc. For another example, these modules may be integrated together and implemented in the form of a System-On-a-Chip (SOC).
In the above embodiments, the processors may include, for example, a CPU, a DSP, a microcontroller, or a digital Signal processor, and may further include a GPU, an embedded Neural Network Processor (NPU), and an Image Signal Processing (ISP), and the processors may further include necessary hardware accelerators or logic Processing hardware circuits, such as an ASIC, or one or more integrated circuits for controlling the execution of the program according to the technical solution of the present application. Further, the processor may have the functionality to operate one or more software programs, which may be stored in the storage medium.
The embodiments of the present specification provide a non-transitory computer-readable storage medium storing computer instructions that, when executed on a computer, cause the computer to perform the method provided by the embodiments of fig. 1-7 of the present specification.
The non-transitory computer readable storage medium described above may take any combination of one or more computer readable media. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a Read Only Memory (ROM), an Erasable Programmable Read Only Memory (EPROM), a flash Memory, an optical fiber, a portable compact disc Read Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present description may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of Network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The foregoing description has been directed to specific embodiments of this disclosure. Other embodiments are within the scope of the following claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve desirable results. In addition, the processes depicted in the accompanying figures do not necessarily require the particular order shown, or sequential order, to achieve desirable results. In some embodiments, multitasking and parallel processing may also be possible or may be advantageous.
In the description of the specification, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the specification. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of this specification, "plurality" means at least two, e.g., two, three, etc., unless explicitly specified otherwise.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing steps of a custom logic function or process, and alternate implementations are included within the scope of the preferred embodiment of the present description in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present description.
In the several embodiments provided in this specification, it should be understood that the disclosed system, apparatus, and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions in actual implementation, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
In addition, functional units in the embodiments of the present description may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) or a Processor (Processor) to execute some steps of the methods described in the embodiments of the present disclosure. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only a preferred embodiment of the present disclosure, and should not be taken as limiting the present disclosure, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.
Claims (25)
1. A method for synchronization signal block SSB determination, the method comprising:
it is determined that no SSB or only one SSB is included in the slot.
2. The method of claim 1, wherein it is determined that no SSB is contained in the nth slot; wherein n =40 × k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 32 and equal to or less than 39.
3. The method of claim 1, wherein it is determined that no SSB is contained in the nth slot; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 3.
4. The method of claim 1, wherein it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
5. The method of claim 4, wherein the including only one SSB in the Lth slot comprises: only the first SSB is included in the lth slot.
6. The method of claim 1, wherein it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0.
7. The method of claim 6, wherein the including only one SSB in the Lth slot comprises: only the second SSB is included in the lth slot.
8. The method of claim 1, wherein it is determined that no SSB is contained in the nth slot; wherein n =4 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
9. The method of claim 1, wherein it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 0 and/or 2.
10. The method of claim 9, wherein the including only one SSB in the lth slot comprises: only the second SSB is included in the lth slot.
11. The method according to any of claims 1 to 10, wherein the SSBs are SSBs with a subcarrier spacing of 480 kHz.
12. The method of claim 1, wherein it is determined that no SSB is contained in the nth slot; wherein n =80 x k + m, k is an integer less than 4 and equal to or greater than 0, and m is an integer greater than or equal to 64 and equal to or less than 79.
13. The method of claim 1, wherein it is determined that no SSB is contained in the nth slot; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 1 and/or 7.
14. The method of claim 1, wherein it is determined that no SSB is contained in the nth slot; wherein n =8 × p +q; wherein p is an integer of less than 40 and 0 or more, and q is 0, 3, 4 and/or 7.
15. The method of claim 1, wherein it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3.
16. The method of claim 15, wherein the including only one SSB in the lth slot comprises: only the first SSB is included in the lth slot.
17. The method of claim 1, wherein it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 4.
18. The method of claim 17, wherein the including only one SSB in the lth slot comprises: only the second SSB is included in the lth slot.
19. The method of claim 1, wherein it is determined that only one SSB is contained in the lth slot, L =4 × p + q; wherein p is an integer of less than 40 and 0 or more, and q is 3 and/or 7.
20. The method of claim 19, wherein the including only one SSB in the lth slot comprises: only the first SSB is included in the lth slot.
21. The method of any of claims 12 to 20, wherein the SSB is an SSB with a subcarrier spacing of 960 kHz.
22. A chip for performing the method of any one of claims 1-21.
23. An electronic device, comprising: a memory for storing computer program code, the computer program code comprising instructions that, when read from the memory by the electronic device, cause the electronic device to perform the method of any of claims 1-21.
24. A computer-readable storage medium comprising computer instructions that, when executed on the electronic device, cause the electronic device to perform the method of any of claims 1-21.
25. A computer program, which, when run on a computer, causes the computer to perform the method of any one of claims 1-21.
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CN202110368442.1A CN115190613A (en) | 2021-04-06 | 2021-04-06 | Synchronization signal block SSB determination method and related equipment |
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