CN115187712A - Image rendering method and device for operating system - Google Patents
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Abstract
The application provides an operating system image rendering method and device, relates to the field of artificial intelligence, and can also be used in the financial field, and comprises the following steps: calling a sub-thread of an operating system to carry out convolutional coding on a storage address of an image to be rendered to obtain a corresponding convolutional coding address; and calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address. According to the method and the device, before the main thread of the operating system is called to render the image, the sub-thread of the operating system is called to carry out convolutional coding on the storage address of the image to be rendered, and therefore the image rendering efficiency is improved.
Description
Technical Field
The application relates to the field of artificial intelligence, can be used in the field of finance, and particularly relates to an image rendering optimization method and device based on thread decoding.
Background
Image Rendering (Image Rendering) refers to a process of processing an optical signal in a three-dimensional real world, converting the optical signal into a two-dimensional Image, and finally displaying the two-dimensional Image on an Image display device.
Before image rendering, three-dimensional interactive geometric modeling is required, and motion capture, motion calculation and dynamic deformation are carried out on three-dimensional animation. Through a plurality of steps such as geometric transformation, projection transformation, perspective transformation, window clipping and the like, the image to be displayed is finally generated. Finally, the image information is output to an image file or a video file to complete the image generation and display in a frame buffer of the display device. It can be seen that the amount of computation required to complete image rendering is very large, especially for operating system screens with high image rendering requirements.
In the prior art, the number and volume of images are considered, and the rendering effect of the images is ensured, so that the images are usually preprocessed in a lossless compression mode. The method for reducing the image volume by adopting the lossless compression technology is to establish an index table for different color characteristics in an image and reduce repeated color data, thereby achieving the effect of volume compression. However, this method has a drawback that when the number of images is large, the above-described operation of creating the index table is computationally intensive, and problems of index missing and index data crosstalk easily occur.
Disclosure of Invention
In order to solve the problems in the prior art, the application provides an operating system image rendering method and device, which can call a sub-thread of an operating system to perform convolutional coding on a memory address of an image to be rendered before calling a main thread of the operating system to perform image rendering, so that the image rendering efficiency is improved.
In order to solve the technical problem, the application provides the following technical scheme:
in a first aspect, the present application provides an operating system image rendering method, including:
calling a sub-thread of an operating system to carry out convolutional coding on a storage address of an image to be rendered to obtain a corresponding convolutional coding address;
and calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
Further, after the sub-thread of the operating system is called to perform convolutional coding on the storage address of the image to be rendered to obtain a corresponding convolutional coding address, the method further includes:
and sending the convolutional coding address to the main thread by utilizing a thread synchronization function.
Further, the invoking a sub-thread of the operating system performs convolutional coding on the storage address of the image to be rendered to obtain a corresponding convolutional coding address, including:
calling the sub-thread to enable the sub-thread to determine a sub-generator polynomial corresponding to the storage address;
calling the sub-thread to enable the sub-thread to determine a sub-generator corresponding to the sub-generator polynomial;
calling the sub-thread to enable the sub-thread to determine a sub-generator polynomial matrix corresponding to the storage address according to the sub-generator;
and calling the sub-thread to enable the sub-thread to determine the convolutional encoding address according to the storage address and the sub-generator polynomial matrix.
Further, the calling the child thread to enable the child thread to determine a child generator polynomial corresponding to the storage address includes:
inputting the storage address into an adder to obtain a corresponding addition expression;
and inputting the addition expression into an encoder to obtain the sub-generator polynomial.
Further, the calling the child thread to enable the child thread to determine the convolutional encoding address according to the storage address and the child generator polynomial matrix includes:
and multiplying the storage address by the sub-generator polynomial matrix to obtain the convolutional encoding address.
Further, the calling the main thread of the operating system displays the image to be rendered on the interface of the operating system according to the convolutional encoding address, including:
calling the main thread to obtain the image to be rendered according to the convolutional coding address;
and calling the main thread to send the image to be rendered to a rendering front end framework so that the rendering front end framework displays the image to be rendered on the interface.
In a second aspect, the present application provides an operating system image rendering apparatus, comprising:
the convolutional coding unit is used for calling the sub-thread of the operating system to carry out convolutional coding on the storage address of the image to be rendered to obtain a corresponding convolutional coding address;
and the image rendering unit is used for calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
Further, the operating system image rendering apparatus further includes:
and the address sending unit is used for sending the convolution coding address to the main thread by utilizing a thread synchronization function.
Further, the convolutional encoding unit includes:
the polynomial generating module is used for calling the sub-thread so that the sub-thread determines a sub-generating polynomial corresponding to the storage address;
the generating element determining module is used for calling the sub-thread so that the sub-thread determines the sub-generating element corresponding to the sub-generating polynomial;
the polynomial matrix generating module is used for calling the sub-thread so that the sub-thread determines a sub-generating polynomial matrix corresponding to the storage address according to the sub-generator;
and the convolutional coding address determining module is used for calling the sub-thread so that the sub-thread determines the convolutional coding address according to the storage address and the sub-generator polynomial matrix.
Further, the polynomial generation module includes:
the addition expression generation submodule is used for inputting the storage address into an adder to obtain a corresponding addition expression;
and the polynomial generation submodule is used for inputting the addition expression into an encoder to obtain the sub-generation polynomial.
Further, the convolutional encoding address determining module includes:
and the multiplication submodule is used for multiplying the storage address by the sub-generator polynomial matrix to obtain the convolution coding address.
Further, the image rendering unit includes:
the image acquisition module is used for calling the main thread to acquire the image to be rendered according to the convolutional coding address;
and the image display module is used for calling the main thread to send the image to be rendered to a rendering front end framework so as to enable the rendering front end framework to display the image to be rendered on the interface.
In a third aspect, the present application provides an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the operating system image rendering method when executing the program.
In a fourth aspect, the present application provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the operating system image rendering method.
In a fifth aspect, the present application provides a computer program product comprising computer programs/instructions which, when executed by a processor, implement the steps of the operating system image rendering method.
Aiming at the problems in the prior art, the operating system image rendering method and the operating system image rendering device can call the sub-thread of the operating system to carry out convolutional coding on the storage address of the image to be rendered before calling the main thread of the operating system to carry out image rendering, so that the image rendering efficiency is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flowchart of an operating system image rendering method according to an embodiment of the present application;
FIG. 2 is a flow chart of obtaining a convolution encoded address in an embodiment of the present application;
FIG. 3 is a flow chart of determining a sub-generator polynomial in an embodiment of the present application;
FIG. 4 is a flow chart shown on an interface in an embodiment of the present application;
FIG. 5 is a block diagram of an operating system image rendering apparatus according to an embodiment of the present disclosure;
FIG. 6 is a block diagram of a convolutional encoding unit in the embodiment of the present application;
FIG. 7 is a block diagram of a polynomial generation module in an embodiment of the present application;
FIG. 8 is a diagram illustrating a structure of an image rendering unit according to an embodiment of the present application;
FIG. 9 is a schematic structural diagram of an electronic device in an embodiment of the present application;
FIG. 10 is a schematic diagram of an actual data flow direction in an embodiment of the present application;
FIG. 11 is a schematic diagram of a convolutional encoding principle in an embodiment of the present application;
fig. 12 is a schematic diagram illustrating a process of determining a convolutional encoding address in an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments in the present application without making any creative effort belong to the protection scope of the present application.
It should be noted that the method and the apparatus for rendering an image of an operating system provided by the present application may be used in the financial field, and may also be used in any field other than the financial field.
According to the technical scheme, the data acquisition, storage, use, processing and the like meet the relevant regulations of national laws and regulations.
In an embodiment, referring to fig. 1, in order to perform convolutional coding on a storage address of an image to be rendered by calling a sub-thread of an operating system before calling a main thread of the operating system to perform image rendering, so as to improve image rendering efficiency, the present application provides an image rendering method for an operating system, including:
s101: calling a sub-thread of an operating system to carry out convolutional coding on a storage address of an image to be rendered to obtain a corresponding convolutional coding address;
s102: and calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
It can be understood that the program corresponding to the method provided in the present application may be run on a central processing unit (CPU for short) or a graphics processing unit (GPU for short). In the embodiments of the present application, the operating system refers to a mobile operating system (iOS). In this operating system, the class representing image objects is called UIImageView; all image classes are subclasses of the UIImageView class. An image will only be displayed after it has been converted to the UIImageView class.
The memory space of the operating system can be divided into three layers, from bottom to top: disk memory space, kernel buffer and user space. An image, if it is desired to be rendered on an operating system interface, first needs to be encoded into a Bitmap (Bitmap) format and disk memory allocated for it. And then copying the corresponding data from the disk memory to the kernel buffer. Wherein the kernel buffer is a temporary data storage area. The data is then copied from the kernel buffer to the user space. Where the user space is the visual interaction layer of the operating system. In user space, a bitmap needs to be translated into an image object such as UIImageView. In the user space, the catrun is a tool class carried by the iOS, and the tool is a program class tool when rendering pictures is submitted in the main thread and is responsible for informing the main thread to start a picture rendering process, and finally rendering is completed by the central processing unit. Which is capable of perceiving changes in the number of images. And submitting CATTransaction in the main thread for rendering, and finally, completing the rendering work by a central processing unit.
To summarize, an image is rendered from within the file system to the operating system interface by UIImageView, through the following steps:
1. and allocating memory buffer areas and other matched resources.
2. The corresponding data is copied from disk space to the kernel buffer.
3. The corresponding data is copied from the kernel buffer to the user space.
4. And generating the UIImageView, and assigning the image data to the UIImageView.
5. Encoding the compressed image data into a bitmap format; wherein, if the data is not byte-aligned, core Animation copies one more copy of the data for byte alignment.
6. The method comprises the steps that pictures exist in a program in the form of a UIImageView layer tree, when a new picture is to be rendered, the UIImageView layer tree is added with a new picture type, and a CATransaction tool senses the change of the UIImageView layer and starts to render in a main thread; the CATransaction captures the change of the UIImageView layer tree, and the main thread Runloop submits the CATransaction to start image rendering.
7. In the CPU, it recognizes that the picture is bit-format encoded, and the GPU is a rendering processor for rendering the bit-format encoded picture. And the GPU processes the bitmap data and renders the bitmap data.
It is considered that decompression of images is a work that consumes much resources of the central processor. When a large amount of images need to be rendered, the decompression of the images is directly completed in the main thread of the central processing unit, so that the response speed of the system is greatly slowed, and the running frame rate is reduced. This is a performance bottleneck for UIImageView.
In order to solve the technical problem, the application provides an operating system image rendering method. The method can carry out convolutional coding on the storage address corresponding to the original image data in the sub-thread, and then throws the address (also called convolutional coding address) subjected to convolutional coding back to the main thread to further complete the rendering process, thereby improving the response speed of the main thread.
Referring to fig. 10, the specific process is as follows:
1. assuming an image a (also called image to be rendered), the storage format of the storage address of the image is hexadecimal in the iOS system. Let us assume that the above coding sequence is C (corresponding to the memory address corresponding to the image to be rendered).
2. A Software Development Kit (SDK) responsible for performing convolutional coding is a source code encapsulated file with a file extension of ". Framework" that is well encapsulated for an iOS version of an operating system. It exposes the entry of the convolution coding method to the outside, adds the SDK into the project file in the iOS system, namely embeds the convolution coding method into the operating system, and then can directly call the method from the code level to complete the convolution coding operation. In the embodiment of the present application, this convolutional encoding method is referred to as function ().
3. Convolution coding is a digital signal coding method, and the input of the convolution algorithm is the digital signal C in hexadecimal form. At this time, C is input as convolutional code, and each bit is input to the input terminal shown in fig. 11 in turn. Wherein, b 1 、b 2 、b 3 For registers each storing 1bit symbols and having an initial value of 0, the lower 3 adders have respective inputs and output results c 1 、c 2 、c 3 . In fig. 11, the output of the register and the input data are added to the calculation corresponding to each adder, and the result corresponding to each adder can be obtained. Thus, each 1bit input corresponds to c 1 c 2 c 3 Thus 3bit output. For example, if a 1 is input, then 101 is output, then a 0 is input, then 100 is output, and so on.
In the embodiment of the present application, it is assumed that the memory address code C of the image a is represented by 0x1010,0x, which is hexadecimal and does not participate in encoding, after the operating system takes the memory address of the image a, the operating system calls the function () method to perform a convolution encoding operation, then corresponding outputs may be sequentially generated according to the order of inputting the four bits 1,0, and finally C after convolution becomes a sequence G (101100101100), that is, 12 bits. This paragraph is merely illustrative and not restrictive of the specific values.
3. The convolution result G (corresponding to the convolution coded address) is performed in the sub-thread, which does not consume and occupy the resources of the main thread, and is performed asynchronously with the main thread.
4. And throwing the G back to the main thread, performing UI rendering and displaying, and displaying on the interface.
It should be noted that the main thread and the sub-thread are the types of threads that are common in the code of the operating system. The main thread is called ThreanMain and is used for completing some UI type operations interacted with the user; the child Thread is called Thread and is used for processing time-consuming operations, such as processing network requests, completing arithmetic operations, and the like.
The convolution coding done in the sub-thread and the throwing of the result G back to the main thread is a system method provided by the operating system, which is called dispatch _ get _ main _ queue () method. In this way, the convolutionally encoded address can be sent from the child thread back to the main thread.
5. The rendering operation is performed by a graphics processor.
The convolution-encoded G is still used as an address to characterize the storage location of image a. The graphics processor reads the address G from the memory, extracts the address G, identifies the Image represented by the address, and sends the Image to a rendering front end framework (UIKit) for processing. UIKit provides a series of classes to establish and manage User Interface (UI) interfaces, application objects, event controls, drawing models, windows, views, and interfaces for controlling touch screens, etc. for applications in the operating system.
The UIKit can acquire elements such as the layout size of the image, the pixel width and the like through a CALAYER layout tool, so that the color and the size of the image are rendered, namely the color and the size of the image are output to a display.
To summarize, in an embodiment, referring to fig. 4, the step of calling the main thread of the operating system to display the image to be rendered on the interface of the operating system according to the convolutional encoding address includes:
s401: calling the main thread to acquire the image to be rendered according to the convolutional coding address;
s402: and calling the main thread to send the image to be rendered to a rendering front end framework so that the rendering front end framework displays the image to be rendered on the interface.
According to the description, the operating system image rendering method provided by the application can be used for calling the sub-thread of the operating system to carry out convolutional coding on the storage address of the image to be rendered before calling the main thread of the operating system to carry out image rendering, so that the image rendering efficiency is improved.
It should be noted that, through the above description, after the memory address of the image to be rendered is convolutionally encoded by calling the child thread of the operating system to obtain the corresponding convolutionally encoded address, the method further includes: and sending the convolution coding address G to the main thread by utilizing a thread synchronization function dispatch _ get _ main _ queue ().
In an embodiment, referring to fig. 2, invoking a child thread of an operating system to perform convolutional coding on a storage address of an image to be rendered to obtain a corresponding convolutional coding address, including:
s201: calling the sub-thread to enable the sub-thread to determine a sub-generator polynomial corresponding to the storage address;
s202: calling the sub-thread to enable the sub-thread to determine a sub-generator corresponding to the sub-generator polynomial;
s203: calling the sub-thread to enable the sub-thread to determine a sub-generator polynomial matrix corresponding to the storage address according to the sub-generator;
s204: and calling the sub-thread to enable the sub-thread to determine the convolutional encoding address according to the storage address and the sub-generator polynomial matrix.
It is understood that steps S201 to S204 are all completed on the child thread, so that the aforementioned technical effects can be achieved.
Referring to fig. 12, the convolutional encoded address G can be determined according to the following procedure:
1. the memory address C is obtained.
2. It is assumed that a circuit diagram of a convolutional code encoder used in a modulator used when convolution processing is performed is as shown in fig. 12, a (2, 1, 2) convolutional code encoder.
(1) C sequence: c =10111, increasing from 0 to the power of the order, in left-to-right order, C (x) =1 × x +0 × x 1 +1×x 2 +1×x 3 +1×x 4 The polynomial expression of which is C (x) =1+ x 2 +x 3 +x 4 。
(2) Concatenated azimuth from convolutional code encoder
The upper adder is composed of three inputs, namely a left input, a middle input and a right input, and a sub-generator polynomial: g (1, 1) (x) =1+ x +x 2 ;
The adder below is composed of a left input and a right input, and generates a polynomial in a sub-way: g (1, 2) (x) =1+ x 2 。
(3) The sub-generators g (1, 1) = (111) and g (1, 2) = (101) are obtained by writing the sub-generators in binary form according to the sub-generator polynomial.
(4) Generating a polynomial matrix G (x) = [ G (1, 1) (x), G (1, 2) (x) ]
G(x)=[1+x+x 2 ,1+x 2 ]
(5) The convolutional coder outputs a sequence output code sequence consisting of n 0 Sub-sequence composition, i.e. And C (x) = C (x) G (x),
wherein C (1) (x) = C (x) g (1, 1) (x) and C (2) (x) = C (x) g (1, 2) (x)
c(1)(x)=C(x)g(1,1)(x)=(1+x 2 +x 3 +x 4 )(1+x+x 2 )=1+x+x 4 +x 6
Written in binary form c 1 =1100101
c(2)(x)=C(x)g(1,2)(x)=(1+x 2 +x 3 +x 4 )(1+x 2 )=1+x 3 +x 5 +x 6
Written in binary form c 2 =1001011
Two paths are combined: h =11100001100111.
As can be seen from the above description, the operating system image rendering method provided in the present application can call a child thread of the operating system to perform convolutional coding on the storage address of the image to be rendered, so as to obtain a corresponding convolutional coding address.
In an embodiment, referring to fig. 3, step S201 includes:
s301: inputting the storage address into an adder to obtain a corresponding addition expression;
s302: and inputting the addition expression into an encoder to obtain the sub-generator polynomial.
In an embodiment, the step S204 includes: and multiplying the storage address by the sub-generator polynomial matrix to obtain the convolutional encoding address.
Based on the same inventive concept, the embodiment of the present application further provides an operating system image rendering apparatus, which can be used to implement the method described in the foregoing embodiment, as described in the following embodiments. Because the principle of the operating system image rendering device for solving the problem is similar to the operating system image rendering method, the implementation of the operating system image rendering device can refer to the implementation of the software performance reference determination method, and repeated details are not repeated. As used hereinafter, the term "unit" or "module" may be a combination of software and/or hardware that implements a predetermined function. While the system described in the embodiments below is preferably implemented in software, implementations in hardware, or a combination of software and hardware are also possible and contemplated.
In an embodiment, referring to fig. 5, in order to perform convolutional coding on a storage address of an image to be rendered by calling a sub-thread of an operating system before calling a main thread of the operating system to perform image rendering, so as to improve image rendering efficiency, the present application provides an operating system image rendering apparatus, including: a convolutional encoding unit 501 and an image rendering unit 502.
The convolutional coding unit 501 is configured to call a sub-thread of the operating system to perform convolutional coding on a storage address of an image to be rendered, so as to obtain a corresponding convolutional coding address;
and the image rendering unit 502 is configured to invoke a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
In one embodiment, the operating system image rendering apparatus further includes:
and the address sending unit is used for sending the convolution coding address to the main thread by utilizing a thread synchronization function.
In one embodiment, referring to fig. 6, the convolutional encoding unit 501 includes: a polynomial generating module 601, a generator determining module 602, a polynomial matrix generating module 603 and a convolutional coding address determining module 604.
A polynomial generating module 601, configured to invoke the child thread, so that the child thread determines a child generating polynomial corresponding to the storage address;
a generator determining module 602, configured to invoke the child thread, so that the child thread determines a child generator corresponding to the child generator polynomial;
a polynomial matrix generating module 603, configured to invoke the child thread, so that the child thread determines, according to the child generator, a child generator polynomial matrix corresponding to the storage address;
a convolutional coding address determining module 604, configured to invoke the child thread, so that the child thread determines the convolutional coding address according to the storage address and the sub-generator polynomial matrix.
In an embodiment, referring to fig. 7, the polynomial generating module 601 includes: an addition expression generation submodule 701 and a polynomial generation submodule 702.
The addition expression generation submodule 701 is used for inputting the storage address into an adder to obtain a corresponding addition expression;
the polynomial generating submodule 702 is configured to input the addition expression into the encoder, so as to obtain the sub-generated polynomial.
In one embodiment, the convolutional encoding address determination module includes:
and the multiplication submodule is used for multiplying the storage address by the sub-generator polynomial matrix to obtain the convolution coding address.
In an embodiment, referring to fig. 8, the image rendering unit 502 includes:
an image obtaining module 801, configured to invoke the main thread to obtain the image to be rendered according to the convolutional encoding address;
the image display module 802 is configured to invoke the main thread to send the image to be rendered to a rendering front end framework, so that the rendering front end framework displays the image to be rendered on the interface.
In order to perform convolutional coding on a storage address of an image to be rendered by calling a child thread of an operating system before calling a main thread of the operating system to perform image rendering, thereby improving image rendering efficiency, the present application provides an embodiment of an electronic device for implementing all or part of contents in the method for rendering an image of an operating system, where the electronic device specifically includes the following contents:
a Processor (Processor), a Memory (Memory), a communication Interface (Communications Interface) and a bus; the processor, the memory and the communication interface complete mutual communication through the bus; the communication interface is used for realizing information transmission between the operating system image rendering device and relevant equipment such as a core service system, a user terminal, a relevant database and the like; the logic controller may be a desktop computer, a tablet computer, a mobile terminal, and the like, but the embodiment is not limited thereto. In this embodiment, the logic controller may refer to the embodiment of the os image rendering method and the embodiment of the os image rendering apparatus in the embodiment for implementation, and the contents thereof are incorporated herein, and repeated descriptions are omitted.
It is understood that the user terminal may include a smart phone, a tablet electronic device, a network set-top box, a portable computer, a desktop computer, a Personal Digital Assistant (PDA), a vehicle-mounted device, a smart wearable device, and the like. Wherein, intelligence wearing equipment can include intelligent glasses, intelligent wrist-watch, intelligent bracelet etc..
In practical applications, part of the operating system image rendering method may be performed on the electronic device side as described above, or all operations may be performed in the client device. The selection may be specifically performed according to the processing capability of the client device, the limitation of the user usage scenario, and the like. This is not a limitation of the present application. The client device may further include a processor if all operations are performed in the client device.
The client device may have a communication module (i.e., a communication unit), and may be in communication connection with a remote server to implement data transmission with the server. The server may include a server on the side of the task scheduling center, and in other implementation scenarios, the server may also include a server on an intermediate platform, for example, a server on a third-party server platform that is communicatively linked to the task scheduling center server. The server may include a single computer device, or may include a server cluster formed by a plurality of servers, or a server structure of a distributed apparatus.
Fig. 9 is a schematic block diagram of a system configuration of an electronic device 9600 according to an embodiment of the present application. As shown in fig. 9, the electronic device 9600 can include a central processor 9100 and a memory 9140; the memory 9140 is coupled to the central processor 9100. Notably, this fig. 9 is exemplary; other types of structures may also be used in addition to or in place of the structure to implement telecommunications or other functions.
In one embodiment, the operating system image rendering method functions may be integrated into the central processor 9100. The central processor 9100 can be configured to perform the following control:
s101: calling a sub-thread of an operating system to carry out convolutional coding on a storage address of an image to be rendered to obtain a corresponding convolutional coding address;
s102: and calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
As can be seen from the above description, the operating system image rendering method provided by the application can call the sub-thread of the operating system to perform convolutional coding on the storage address of the image to be rendered before calling the main thread of the operating system to perform image rendering, so as to improve the image rendering efficiency.
In another embodiment, the os image rendering apparatus may be configured separately from the central processor 9100, for example, the os image rendering apparatus may be configured as a chip connected to the central processor 9100, and the functions of the os image rendering method may be implemented by the control of the central processor.
As shown in fig. 9, the electronic device 9600 may further include: a communication module 9110, an input unit 9120, an audio processor 9130, a display 9160, and a power supply 9170. It is noted that the electronic device 9600 also does not necessarily include all of the components shown in fig. 9; in addition, the electronic device 9600 may further include components not shown in fig. 9, which may be referred to in the prior art.
As shown in fig. 9, a central processor 9100, sometimes referred to as a controller or operational control, can include a microprocessor or other processor device and/or logic device, which central processor 9100 receives input and controls the operation of the various components of the electronic device 9600.
The memory 9140 can be, for example, one or more of a buffer, a flash memory, a hard drive, a removable media, a volatile memory, a non-volatile memory, or other suitable device. The information relating to the failure may be stored, and a program for executing the information may be stored. And the central processing unit 9100 can execute the program stored in the memory 9140 to realize information storage or processing, or the like.
The input unit 9120 provides input to the central processor 9100. The input unit 9120 is, for example, a key or a touch input device. Power supply 9170 is used to provide power to electronic device 9600. The display 9160 is used for displaying display objects such as images and characters. The display may be, for example, an LCD display, but is not limited thereto.
The memory 9140 can be a solid state memory, e.g., read Only Memory (ROM), random Access Memory (RAM), a SIM card, or the like. There may also be a memory that holds information even when power is off, can be selectively erased, and is provided with more data, an example of which is sometimes called an EPROM or the like. The memory 9140 could also be some other type of device. The memory 9140 includes a buffer memory 9141 (sometimes referred to as a buffer). The memory 9140 may include an application/function storage part 9142, the application/function storage part 9142 being used to store application programs and function programs or a flow for executing the operation of the electronic device 9600 by the central processing unit 9100.
The memory 9140 can also include a data store 9143, the data store 9143 being used to store data, such as contacts, digital data, images, sounds, and/or any other data used by an electronic device. The driver storage portion 9144 of the memory 9140 may include various drivers for the electronic device for communication functions and/or for performing other functions of the electronic device (e.g., messaging applications, contact book applications, etc.).
The communication module 9110 is a transmitter/receiver 9110 that transmits and receives signals via an antenna 9111. The communication module (transmitter/receiver) 9110 is coupled to the central processor 9100 to provide input signals and receive output signals, which may be the same as in the case of a conventional mobile communication terminal.
Based on different communication technologies, a plurality of communication modules 9110, such as a cellular network module, a bluetooth module, and/or a wireless lan module, may be disposed in the same electronic device. The communication module (transmitter/receiver) 9110 is also coupled to a speaker 9131 and a microphone 9132 via an audio processor 9130 to provide audio output via the speaker 9131 and receive audio input from the microphone 9132 to implement general telecommunications functions. The audio processor 9130 may include any suitable buffers, decoders, amplifiers and so forth. In addition, the audio processor 9130 is also coupled to the central processor 9100, thereby enabling recording locally through the microphone 9132 and enabling locally stored sounds to be played through the speaker 9131.
The embodiment of the present application further provides a computer-readable storage medium capable of implementing all the steps in the operating system image rendering method in which the execution subject in the above embodiment is a server or a client, where the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the computer program implements all the steps in the operating system image rendering method in which the execution subject in the above embodiment is a server or a client, for example, when the processor executes the computer program, the processor implements the following steps:
s101: calling a sub-thread of an operating system to carry out convolutional coding on a storage address of an image to be rendered to obtain a corresponding convolutional coding address;
s102: and calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
As can be seen from the above description, the operating system image rendering method provided by the application can call the sub-thread of the operating system to perform convolutional coding on the storage address of the image to be rendered before calling the main thread of the operating system to perform image rendering, so as to improve the image rendering efficiency.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (devices), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The principle and the implementation mode of the invention are explained by applying specific embodiments in the invention, and the description of the embodiments is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. An operating system image rendering method, comprising:
calling a sub-thread of an operating system to carry out convolutional coding on a storage address of an image to be rendered to obtain a corresponding convolutional coding address;
and calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
2. The operating system image rendering method of claim 1, wherein after the sub-thread calling the operating system performs convolutional coding on a memory address of an image to be rendered to obtain a corresponding convolutional coding address, the method further comprises:
and sending the convolutional coding address to the main thread by utilizing a thread synchronization function.
3. The operating system image rendering method of claim 1, wherein performing convolutional coding on the memory address of the image to be rendered to obtain a corresponding convolutional coding address, comprises:
determining a sub-generator polynomial corresponding to the storage address;
determining a sub generator corresponding to the sub generator polynomial;
determining a sub-generator polynomial matrix corresponding to the storage address according to the sub-generator;
and determining the convolutional encoding address according to the storage address and the sub-generator polynomial matrix.
4. The method for rendering an operating system image according to claim 3, wherein the determining the sub-generator polynomial corresponding to the storage address comprises:
inputting the storage address into an adder to obtain a corresponding addition expression;
and inputting the addition expression into an encoder to obtain the sub-generator polynomial.
5. The method for operating system image rendering according to claim 3, wherein said determining the convolutional encoding address according to the storage address and the sub-generator polynomial matrix comprises:
and multiplying the storage address by the sub-generator polynomial matrix to obtain the convolutional encoding address.
6. The method for rendering the image of the operating system according to claim 1, wherein the calling the main thread of the operating system displays the image to be rendered on the interface of the operating system according to the convolutional encoding address, and the method comprises the following steps:
calling the main thread to acquire the image to be rendered according to the convolutional coding address;
and calling the main thread to send the image to be rendered to a rendering front end framework so that the rendering front end framework displays the image to be rendered on the interface.
7. An operating system image rendering apparatus, comprising:
the convolution coding unit is used for calling a sub-thread of the operating system to carry out convolution coding on the storage address of the image to be rendered to obtain a corresponding convolution coding address;
and the image rendering unit is used for calling a main thread of the operating system to display the image to be rendered on an interface of the operating system according to the convolutional coding address.
8. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the steps of the operating system image rendering method of any of claims 1 to 6 are implemented when the program is executed by the processor.
9. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the operating system image rendering method of any one of claims 1 to 6.
10. A computer program product comprising computer programs/instructions, characterized in that the computer programs/instructions, when executed by a processor, implement the steps of the operating system image rendering method of any of claims 1 to 6.
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