Disclosure of Invention
In view of the above-mentioned deficiencies of the prior art, it is an object of the present invention to provide a cryptographic coprocessor system and a power-down protection method thereof, so as to solve the problem of loss of key information and data caused by the power-down of the existing SPU in the server.
The technical scheme of the invention is as follows:
a cryptographic coprocessor system comprising a confidential compute coprocessor and a server, said confidential compute coprocessor comprising: the power supply circuit, the energy storage circuit, the voltage detection circuit and the central processing unit; wherein,
the power supply circuit is respectively connected with the server, the energy storage circuit and the power supply circuit, and is used for accessing input voltage provided by the server and respectively inputting the input voltage to the power supply circuit and the energy storage circuit;
the power supply circuit is respectively connected with the power supply circuit, the energy storage circuit and the central processing unit, and the power supply circuit is used for supplying power to the central processing unit according to input voltage accessed by the power supply circuit or power supply voltage provided by the energy storage circuit;
the energy storage circuit is respectively connected with the power supply circuit and the power supply circuit, and is used for charging according to the input voltage provided by the power supply circuit and supplying power to the central processing unit when the server is powered off;
the voltage detection circuit is respectively connected with the power supply circuit and the central processing unit, and is used for detecting the input voltage of the power supply circuit and feeding back an interrupt signal to the central processing unit when the input voltage is lower than a threshold voltage;
and the central processor is used for controlling the energy storage circuit to supply power and storing key information and key data according to the interrupt signal.
In a further arrangement of the invention, the server comprises: an onboard power supply and an ATX power supply; wherein,
the power circuit is respectively connected with the onboard power supply and the ATX power supply and selectively connected into the onboard power supply or the ATX power supply according to load requirements.
According to a further arrangement of the present invention, the normal operating voltage of the input voltage is 12V; the voltage threshold is 10V.
A power down protection method applied to the confidential computing coprocessor system of the confidential computing coprocessor system comprises the following steps:
detecting the input voltage in real time through a voltage detection circuit, and feeding back an interrupt signal to the central processing unit when the input voltage is lower than a threshold voltage;
and when the central processing unit receives the interrupt signal, the power supply circuit is controlled to supply power to the central processing unit through the energy storage circuit, and key information and key data are stored.
In a further aspect of the present invention, the power down protection method for the confidential computing coprocessor system further comprises:
when the voltage detection circuit detects that the input voltage reaches the normal working voltage, the input voltage provided by the power supply circuit is output to the power supply circuit to supply power to the central processing unit and charge the energy storage circuit.
In a further aspect of the present invention, the step of detecting the input voltage in real time by the voltage detection circuit and feeding back the interrupt signal to the central processing unit when the input voltage is lower than the threshold voltage includes:
when the voltage detection circuit detects that the input voltage is lower than the threshold voltage, a high level signal is fed back to the central processing unit to trigger interruption.
The invention is further arranged in that when the central processing unit receives the interrupt signal, the step of controlling the power supply circuit to supply power to the central processing unit through the energy storage circuit and storing the key information and the key data comprises the following steps:
after the central processing unit is started, driving and registering an interrupt processing function of abnormal power failure;
when the central processing unit runs, the driver receives a request for increasing the callback function from the registration interface, and adds the callback function to a callback function list;
receiving a request for deleting the callback function from the unregistered interface, and deleting the target callback function from the callback function list;
and when the server is abnormally powered off, triggering the interrupt processing function to traverse and call back the functions in the function list through the interrupt signal and executing the functions.
The further arrangement of the present invention, after the step of triggering the interrupt processing function to traverse and call back the functions in the function list by the interrupt signal and executing when the server is abnormally powered off, further comprises:
and when the interrupt processing function traverses the functions in the callback function list and is executed, entering a dead loop to wait for the server to be powered off.
The invention further sets up that when the interrupt processing function traverses the function in the callback function list, the synchronous operation function traverses the mounted file system in the current system, and if the file system has a storage entity, the synchronous operation is carried out.
In a further arrangement of the present invention, the synchronization operation function is a first function on the callback function list, and is executed first in the interrupt processing function.
The invention provides a secret computing coprocessor system and a power failure protection method thereof, wherein the secret computing coprocessor system comprises a secret computing coprocessor and a server, and the secret computing coprocessor comprises: the power supply circuit, the energy storage circuit, the voltage detection circuit and the central processing unit. The power supply circuit is used for accessing an input voltage provided by the server and inputting the input voltage to the power supply circuit and the energy storage circuit respectively; the power supply circuit is used for supplying power to the central processing unit according to the input voltage accessed by the power supply circuit or the power supply voltage provided by the energy storage circuit; the energy storage circuit is used for charging according to the input voltage provided by the power supply circuit and supplying power to the central processing unit when the server is powered off; the voltage detection circuit is used for detecting the input voltage of the power supply circuit and feeding back an interrupt signal to the central processing unit when the input voltage is lower than a threshold voltage; and the central processor is used for controlling the energy storage circuit to supply power and storing key information and key data according to the interrupt signal. The invention is connected with the server through the power circuit, when the server supplies power normally, the input voltage provided by the server is accessed and respectively input to the power supply circuit and the energy storage circuit, the power supply circuit supplies power to the central processing unit through the accessed input voltage, and meanwhile, the accessed input voltage charges the energy storage circuit. Meanwhile, the voltage detection circuit detects the magnitude of the input voltage in real time, if the input voltage is detected to be lower than the threshold voltage (namely when the server is abnormally powered down), an interrupt signal is fed back to the central processing unit, the central processing unit triggers the interrupt, the energy storage circuit is controlled to supply power, and the key information and the key data are stored, so that the problem that the key data and the key information are lost under the condition that the server is powered down can be prevented.
Detailed Description
The invention provides a secret computing coprocessor system and a power failure protection method thereof, and in order to make the purpose, technical scheme and effect of the invention clearer and clearer, the invention is further described in detail below by referring to the attached drawings and taking examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In the embodiments and claims, the articles "a", "an", "the" and "the" may include plural forms as well, unless the context specifically dictates otherwise. If there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature.
It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or wirelessly coupled. As used herein, the term "and/or" includes all or any element and all combinations of one or more of the associated listed items.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.
Referring to FIG. 1, the present invention provides a preferred embodiment of a cryptographic coprocessor system.
As shown in fig. 1, the present invention provides a cryptographic coprocessor system, which comprises a secret computing coprocessor 100 and a server 200, wherein the secret computing coprocessor 100 comprises: a power supply circuit 110, a power supply circuit 120, a tank circuit 130, a voltage detection circuit 140 and a central processing unit 150; the power circuit 110 is respectively connected to the server 200, the tank circuit 130, and the power supply circuit 120, and the power circuit 110 is configured to access an input voltage provided by the server 200 and respectively input the input voltage to the power supply circuit 120 and the tank circuit 130; the power supply circuit 120 is respectively connected to the power supply circuit 110, the tank circuit 130 and the central processing unit 150, and the power supply circuit 120 is configured to supply power to the central processing unit 150 according to an input voltage accessed by the power supply circuit 110 or a power supply voltage provided by the tank circuit 130; the tank circuit 130 is connected to the power circuit 110 and the power circuit 120, respectively, and the tank circuit 130 is configured to charge according to the input voltage provided by the power circuit 110 and supply power to the central processing unit 150 when the server 200 is powered off; the voltage detection circuit 140 is respectively connected to the power circuit 110 and the central processing unit 150, and the voltage detection circuit 140 is configured to detect an input voltage of the power circuit 110 and feed back an interrupt signal to the central processing unit 150 when the input voltage is lower than a threshold voltage; the central processor 150 is configured to control the tank circuit 130 to supply power according to the interrupt signal and store key information and key data.
Specifically, the secret computing coprocessor 100 is connected to the server 200, and the server 200 supplies power to the secret computing coprocessor 100. The power supply circuit 120 is connected to the power supply circuit 110, the energy storage circuit 130 and the central processing unit 150, the power supply circuit 120 can supply power to the central processing unit 150 through the voltage provided by the power supply circuit 110 or the energy storage circuit 130, and the voltage detection circuit 140 is connected to the power supply circuit 110 and the central processing unit 150, and can detect the input voltage accessed by the power supply circuit 110 in real time.
After the power supply circuit is normally powered on, the power supply circuit 110 accesses the input voltage provided by the server 200 and respectively inputs the input voltage to the power supply circuit 120 and the tank circuit 130, and the power supply circuit 120 supplies power to the central processing unit 150 through the accessed input voltage and charges the tank circuit 130 at the same time, so that a part of electric energy is stored in the confidential calculation coprocessor 100. Because the voltage detection circuit 140 detects the input voltage of the power circuit 110 in real time, after the server 200 is abnormally powered down (or the server is abnormally shut down), the input voltage detected by the voltage detection circuit 140 will be reduced, and when the input voltage is smaller than the threshold voltage, that is, when the power supply provided by the server 200 fails, an interrupt signal will be fed back to the central processing unit 150, so that the central processing unit 150 triggers the interrupt, at this time, the energy storage circuit 130 discharges, the central processing unit 150 supplies power through the energy storage circuit 130 to support the central processing unit 150 to perform interrupt processing, and meanwhile, the central processing unit 150 performs storage work of important data and important information.
As can be seen, the present invention is connected to the server 200 through the power circuit 110, and when the server 200 is normally powered, the input voltage provided by the server 200 is accessed and respectively input to the power supply circuit 120 and the energy storage circuit 130, the power supply circuit 120 supplies power to the central processing unit 150 through the accessed input voltage, and the energy storage circuit 130 is charged through the accessed input voltage. Meanwhile, the voltage detection circuit 140 detects the magnitude of the input voltage in real time, if it is detected that the input voltage is lower than the threshold voltage (i.e., when the server has an abnormal power failure), an interrupt signal is fed back to the central processing unit 150, the central processing unit 150 triggers an interrupt to control the energy storage circuit 130 to supply power and store key information and key data, so that the server 200 has time to respond to the power failure to store the key data and key information, the system is prevented from being damaged due to the abnormal power failure, the confidential calculation coprocessor can normally operate when being restarted, and the reliability of the system is improved.
In some embodiments, the normal operating voltage of the input voltage is 12V; the voltage threshold is 10V.
Specifically, after the server 200 is powered on, the secret computing coprocessor 100 is powered on by the server 200. When the confidential calculation coprocessor 100 normally works, the voltage detection circuit 140 detects the input voltage 12V of the power supply circuit 110 in real time, if the detected input voltage is normal, that is, the detected input voltage is 12V, the voltage detection circuit 140 sets "0" to the central processing unit 150, if the voltage detection circuit 140 detects that the input voltage 12V is powered down to the threshold voltage 10V, the voltage detection circuit sends a signal "1" to the central processing unit 150 to trigger hardware interruption, at this time, the central processing unit 150 supplies power through the energy storage circuit 130 to save critical data and critical information, when the input voltage reaches 12V, the power supply circuit 110 stably outputs power to the power supply circuit 120, and supplies power to the central processing unit 150 through the power supply circuit 120, so that the central processing unit 150 is ensured to supply power stably.
Referring to fig. 1, in some embodiments, the server 200 includes: an onboard power supply 210 and an ATX power supply 220; the power circuit 110 is connected to the onboard power supply 210 and the ATX power supply 220, and selectively connects to the onboard power supply 210 or the ATX power supply 220 according to a load requirement.
Specifically, the power circuit 110 is a power selection circuit, which is respectively connected to the onboard power supply 210 (motherboard power) of the server 200 and the ATX power supply 220 (power that converts ac 220V power into dc 5V,12v,24v used inside the computer), and the power selection circuit may select whether to supply power through the onboard power supply 210 or the ATX power supply 220 according to the load requirement, for example, when the required supply voltage is 12V, the 12V supply voltage provided by the ATX power supply 220 may be accessed.
Referring to fig. 2, in some embodiments, the present invention further provides a power down protection method for a secret computing coprocessor system of the secret computing coprocessor system, which includes the steps of:
s100, detecting the input voltage in real time through a voltage detection circuit, and feeding back an interrupt signal to the central processing unit when the input voltage is lower than a threshold voltage;
specifically, after the server is powered on, the secret computing coprocessor is powered on by the server. The normal working voltage of the confidential calculation coprocessor is 12V, and when the input voltage is switched off to the threshold voltage of 10V, the power supply is considered to be abnormal. When the confidential calculation coprocessor normally works, the input voltage accessed by the power circuit is monitored in real time through the voltage detection circuit, and if the voltage detection circuit detects that the input voltage is powered down to 10V of threshold voltage, an interrupt signal is fed back to the central processing unit to trigger hardware interrupt.
S200, when the central processing unit receives the interrupt signal, the power supply circuit is controlled to supply power to the central processing unit through the energy storage circuit, and key information and key data are stored;
specifically, after the server is abnormally powered off, the central processing unit receives an interrupt signal, and at the moment, the confidential calculation coprocessor can be switched to the energy storage circuit to supply power so as to support the central processing unit to continue working. Because the central processing unit is provided with a program matched with the energy storage circuit, the central processing unit is switched to an interrupt processing program when receiving an interrupt signal under the power supply support of the energy storage circuit so as to store key data and key information.
In the technical scheme, the power supply circuit is connected with the server, when the server supplies power normally, the input voltage provided by the server is accessed and respectively input to the power supply circuit and the energy storage circuit, the power supply circuit supplies power to the central processing unit through the accessed input voltage, and meanwhile, the energy storage circuit is charged through the accessed input voltage. Meanwhile, the voltage detection circuit monitors the magnitude of the input voltage in real time, if the input voltage is detected to be lower than the threshold voltage (namely when the server has abnormal power failure), an interrupt signal is fed back to the central processing unit, the central processing unit triggers interrupt, the energy storage circuit is switched to supply power, and key information and key data are stored, so that the key data and the key information can be stored in response when the server has power failure, the system is prevented from being damaged due to abnormal power failure, the normal operation of the confidential calculation coprocessor when the confidential calculation coprocessor is restarted is guaranteed, and the reliability of the system is improved.
In some embodiments, the power down protection method of the confidential computing coprocessor system further comprises the steps of:
and S300, when the voltage detection circuit detects that the input voltage reaches the normal working voltage, outputting the input voltage provided by the power supply circuit to supply power to the central processing unit and charge the energy storage circuit.
Specifically, when the server supplies power abnormally, the energy storage circuit supplies power for the central processing unit temporarily, and when the server supplies power normally, the power supply circuit outputs power to the power supply circuit stably, and the central processing unit is supplied power through the power supply circuit. Meanwhile, the power supply circuit charges the energy storage circuit, and when abnormal power failure occurs next time, the central processing unit can be powered by the energy storage circuit.
In some embodiments, step S100 includes the steps of:
s110, when the voltage detection circuit detects that the input voltage is lower than the threshold voltage, a high level signal is fed back to the central processing unit to trigger interruption.
Specifically, if the input voltage is detected to be normal, the voltage detection circuit is set to "0", and a low level signal is fed back to the central processing unit. And if the voltage detection circuit detects that the input voltage is powered down to the threshold voltage of 10V, setting a signal to be 1 to the central processing unit, and triggering hardware interruption.
In some embodiments, step S200 includes the steps of:
s210, after the central processing unit is started, driving an interrupt processing function for registering abnormal power failure;
s220, when the central processing unit runs, the driver receives a request for increasing the callback function from the registration interface, and adds the callback function to a callback function list;
s230, receiving a request for deleting the callback function from the de-registration interface, and deleting the target callback function from the callback function list;
s240, when the server is abnormally powered off, triggering the interrupt processing function to traverse and call back functions in the function list through the interrupt signal and executing the functions;
and S250, entering endless loop to wait for the server to lose power after the interrupt processing function traverses the functions in the callback function list and is executed.
Specifically, the interrupt processing function (exception _ shutdown _ handle) is triggered and executed by an interrupt signal of abnormal power down. The register interface function (register _ exception _ shutdown _ callback) is a processing function used for providing a register interface for other drivers and service programs to register abnormal power failure, and the register interface is added into a callback function list (callback _ list). And the unregistered interface function is used for providing an interface for registration, is used by other drivers and service programs which register call backs, and deletes the corresponding processing function in the call back function list when the drivers are removed or the service programs are finished. The callback function list is executed in a traversal mode in the interrupt processing function, the first element in the callback function list is a synchronous operation function, and other drivers or services can add processing logic to the callback list through the registration interface.
And after the counting unit is started, driving and registering an interrupt processing function of abnormal power failure. In the operation process, the driver receives a request for adding a callback function from the registration interface, adds the callback function to the callback function list, receives a request for deleting the callback function from the de-registration interface, and deletes the target callback function from the callback function list. When the server is abnormally powered off, an interrupt signal fed back by the voltage detection circuit triggers an interrupt processing function to traverse functions in the callback function list and execute the functions so as to switch the energy storage circuit to supply power and store key data and key information, ensure that the confidential calculation coprocessor can normally run when being restarted, and enter a dead loop to wait for the server to be powered off after the execution is finished.
When the interrupt processing function traverses the function in the callback function list, the synchronous operation function traverses the mounted file system in the current system, and if the file system has a storage entity, the synchronous operation is carried out. And the synchronous operation function is the first function on the callback function list and is executed by the first function in the interrupt processing function so as to ensure the reliability of the file system.
In summary, the cryptographic coprocessor system and the power-down protection method thereof provided by the invention have the following beneficial effects:
after the server is abnormally powered off or is abnormally shut down, the confidential calculation coprocessor can be switched to the energy storage circuit for supplying power, and an interrupt signal is fed back to the central processing unit through the voltage detection circuit, so that the central processing unit can store important data and important information, the system is prevented from being damaged due to abnormal power failure, the confidential calculation coprocessor can normally run when being restarted, and the reliability of the system is improved.
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.