CN115176426A

CN115176426A - Radio frequency circuit, signal feedback circuit and communication system

Info

Publication number: CN115176426A
Application number: CN202080015922.3A
Authority: CN
Inventors: 郭衍; 李晓然; 李伟男; 李峰; 李鹏; 史坡
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2020-11-30
Filing date: 2020-11-30
Publication date: 2022-10-11
Also published as: WO2022110230A1

Abstract

A radio frequency circuit, a signal feedback circuit and a communication system are used for configuring a signal feedback path for the communication system. The radio frequency circuit includes: at least one radio frequency transmit channel and radio frequency circuitry; the at least one radio frequency transmission channel is connected with at least one PA, and the at least one PA is connected with at least one envelope tracking ET circuit used for supplying power for the at least one PA; the first input end of the signal feedback circuit is used for being connected with the output end of at least one PA, the second input end of the signal feedback circuit is used for being connected with the output end of at least one ET circuit, and the signal feedback circuit is used for feeding back the output signal of at least one PA and the signal output by the at least one ET circuit and outputting the output signal through the output end of the signal feedback circuit.

Description

Radio frequency circuit, signal feedback circuit and communication system

Technical Field

The present application relates to the field of wireless communication technologies, and in particular, to a radio frequency circuit, a signal feedback circuit, and a communication system.

Background

A Power Amplifier (PA) is a most important key device in a transmission link of a modern communication system as a radio frequency power amplifier. The main function is to amplify the low-power signal processed by the front-end circuit to the rated power gear specified by the communication system standard, and then feed the signal into the rear-end device, such as duplexer, antenna, etc. to perform wireless transmission.

During the operation of the PA, the PA is required to operate in a signal saturation region in order to ensure the amplification efficiency of the PA. In practical applications, due to the manufacturing problems of PA devices, the gain curve of the PA may exhibit non-linearity, and the non-linearity of the gain curve of the PA may directly degrade the signal transmission quality and affect the adjacent frequency band system.

To combat the non-linearity of PA, digital pre-distortion (DPD) technology was proposed in the last 90 th century and widely used in various wireless communication systems, including access network base stations and user terminals. The operating principle of the DPD is very simple, that is, fitting the gain nonlinearity of the PA through a DPD core (core), obtaining an inverse function of the PA distortion characteristic, and configuring a proper predistortion parameter for the DPD core according to the inverse function to perform signal compensation on a transmission signal, so that a low-power signal output by a front-end circuit passes through two nonlinear devices with opposite characteristics of the DPD core and the PA, and the distortion characteristics of the low-power signal and the low-power signal cancel each other out, thereby obtaining the final linear PA transmission characteristic.

With the development of wireless communication systems, in order to reduce the amplification loss of the PA, an envelope-tracking (ET) technology is proposed, where the ET technology is a technology for modulating a power supply port or a bias port of the PA according to the amplitude of an input signal of the PA to reduce the amplification loss of the PA, and the radio frequency PA architecture improves the PA working energy conversion efficiency. Therefore, the power consumption can be greatly reduced theoretically, and the energy conversion efficiency of the radio frequency front end is obviously improved. ET-PA is also one of the important characteristics considered by the industry to be indispensable on the 5G termination side.

At present, existing ET designs are designed for Long Term Evolution (LTE) technologies of 3G and universal mobile telecommunications technologies, and because signal transmission bandwidths of 3G and LTE are limited, when a PA applies a large-bandwidth application scenario in which 5G is located, nonlinearity may also occur in ET, which directly affects signal transmission quality of the PA.

Disclosure of Invention

The application provides a radio frequency circuit, a signal feedback circuit and a communication system, which are used for configuring a signal feedback path for the communication system so as to improve the signal transmission quality of the communication system.

It should be understood that in the solutions provided in the embodiments of the present application, the communication system may be a wireless communication device, and may also be a part of a device in the wireless communication device, for example, an integrated circuit product such as a system chip or a communication chip. The wireless communication device may be a computer device that supports wireless communication functionality.

In particular, the wireless communication device may be a terminal, such as a smartphone, or a radio access network device, such as a base station. A system-on-chip may also be referred to as a system-on-chip (SoC), or simply an SoC-chip. The communication chip can include a baseband processing chip and a radio frequency processing chip. The baseband processing chip is sometimes also referred to as a modem (modem) or baseband chip. The rf processing chip is also sometimes referred to as a radio frequency transceiver (transceiver) or rf chip. In a physical implementation, part of the communication chip or all of the communication chip may be integrated inside the SoC chip. For example, the baseband processing chip is integrated in the SoC chip, and the radio frequency processing chip is not integrated with the SoC chip.

In a first aspect, an embodiment of the present application provides a radio frequency circuit, where the radio frequency circuit includes at least one radio frequency transmission channel and a signal feedback circuit.

In particular, at least one radio frequency transmission channel is connected with at least one PA, and the at least one PA is connected with at least one envelope tracking ET circuit for powering the at least one PA; the first input end of the signal feedback circuit is used for being connected with the output end of at least one PA, the second input end of the signal feedback circuit is used for being connected with the output end of at least one ET circuit, and the signal feedback circuit is used for feeding back the output signal of at least one PA and the signal output by at least one power supply circuit and outputting the output signal through the output end of the signal feedback circuit.

By adopting the above scheme, the signal transmitted in the at least one radio frequency transmission channel is transmitted through the at least one PA, in order to reduce the nonlinear distortion of the signal output by the at least one PA, the output signal of the at least one PA causing the nonlinear distortion of the output signal and the output signal of the at least one ET circuit can be fed back to the front-end device, and the front-end device can perform signal adjustment based on the fed-back signal, so as to reduce the nonlinear distortion of the signal output by the at least one radio frequency transmission channel and ensure the quality of the at least one PA output signal.

In one possible design, the signal feedback circuit includes: a feedback circuit and an analog-to-digital conversion circuit.

Specifically, a first input end of the feedback circuit is used for being connected with an output end of at least one PA, a second input end of the feedback circuit is used for being connected with an output end of at least one ET circuit, and an output end of the feedback circuit is connected with an input end of the analog-to-digital conversion circuit; the analog-to-digital conversion circuit is used for performing analog-to-digital conversion processing on the signal output by the feedback circuit and outputting the signal through the output end of the analog-to-digital converter.

By adopting the scheme, the analog signal output by at least one PA and the analog signal output by at least one ET circuit can be fed back, and the fed back analog signal is converted into the digital signal which can be directly processed by the back-end equipment through the analog-to-digital conversion circuit.

In one possible design, the signal feedback circuit includes: a first coupler in one-to-one correspondence with the at least one PA and a second coupler in one-to-one correspondence with the at least one ET circuit.

Specifically, each first coupler is connected with the output end of the corresponding PA, and each first coupler is used for feeding back the output signal of the connected PA; each second coupler is connected with the output end of the corresponding power supply circuit, and each second coupler is used for feeding back the output signal of the connected ET circuit.

By adopting the scheme, in order to ensure the signal quality output by each PA, the output signal of each PA connected with the radio frequency circuit and the output signal of each ET circuit are fed back by adopting the first coupler and the second coupler.

In a possible embodiment, the first input of the feedback circuit is connected to the output of the at least one PA via at least one third coupler, and the second input of the feedback circuit is connected to the output of the at least one ET circuit via at least one fourth coupler. Wherein, at least one third coupler corresponds to at least one PA one-to-one, and at least one fourth coupler corresponds to at least one ET circuit one-to-one.

In a possible design, the rf circuit includes a plurality of rf transmission channels, and at least one PA is connected to the plurality of rf transmission channels in a one-to-one correspondence, and the signal feedback circuit further includes: a selection circuit.

Specifically, the feedback circuit is connected to the analog-to-digital conversion circuit through a selection circuit, and the selection circuit is configured to sequentially output signals output by the feedback circuit according to a preset output sequence.

By adopting the scheme, the radio frequency channel is connected with the PAs and the PAs are connected with the ET circuits, so that a plurality of signals fed back by the feedback circuit are provided, and in order to reduce the area of the radio frequency circuit, the selection circuit can sequentially output the signals fed back by the feedback circuit to the analog-to-digital conversion circuit for analog-to-digital conversion, thereby reducing the area of the radio frequency circuit occupied by the arrangement of the analog-to-digital conversion circuits.

In one possible design, the analog-to-digital conversion circuit includes: filters in one-to-one correspondence with each PA, and analog-to-digital converters in one-to-one correspondence with each filter.

Specifically, an input end of each filter is connected to the selection circuit, and each filter is configured to receive an output signal of a corresponding PA and an output signal of an ET circuit connected to the corresponding PA, filter the received signals, and output the filtered signals to the connected analog-to-digital converter; each analog-to-digital converter is used for receiving the signal output by the connected filter and performing analog-to-digital conversion processing on the received signal.

In one possible design, the feedback circuit further includes: combiners are in one-to-one correspondence with each PA.

Specifically, a first input end of each combiner is connected to an output end of a first coupler connected to the corresponding PA, a second input end of each combiner is connected to an output end of a second coupler connected to an ET circuit for supplying power to the corresponding PA, an output end of each combiner is connected to an analog-to-digital conversion circuit, and each combiner is configured to combine signals output by the connected first coupler and second coupler into one signal and output the signal to a converter.

By adopting the scheme, the two feedback signals can be combined into one signal through the combiner, so that the number of ports of the selection circuit is reduced, and the reduction of the volume of the signal feedback circuit is facilitated under the condition of ensuring the transmission of the complete feedback signal.

In one possible design, the signal feedback circuit further includes: a processor.

Specifically, the processor is connected with the analog-to-digital conversion circuit, and the processor is used for receiving the signals output by the analog-to-digital conversion circuit and outputting signals used for adjusting the signals received by the radio frequency circuit and the signals output by the at least one ET circuit.

By adopting the scheme, the processor processes the signal output by the analog-digital converter, determines the nonlinear distortion condition of the PA output signal according to the signal output by the analog-digital converter, and adjusts the signals received by the radio frequency circuit and the signals of at least one ET circuit output signal according to the nonlinear distortion condition of the PA output signal to carry out nonlinear distortion compensation.

In one possible design, the input end of each rf transmit channel is connected to the first digital predistortion DPD core, and the ET circuit for powering the PA connected to each rf transmit channel includes a second DPD core.

In a second aspect, embodiments of the present application provide a signal feedback circuit, which is applied in a communication system including a radio frequency circuit, at least one power amplifier connected to the radio frequency circuit, and an envelope tracking ET circuit connected to at least one PA for supplying power to the connected PA.

Specifically, a first input end of the signal feedback circuit is used for being connected with an output end of at least one PA, a second input end of the signal feedback circuit is used for being connected with an output end of at least one ET circuit, and the signal feedback circuit is used for feeding back an output signal of at least one PA and a signal output by the at least one ET circuit and outputting the output signal through the output end of the signal feedback circuit.

By adopting the scheme, the signals transmitted in the radio frequency circuit are transmitted through at least one PA, in order to reduce the nonlinear distortion of the output signals of the PAs, the output signals of the at least one PA causing the nonlinear distortion of the output signals and the output signals of the at least one power supply circuit can be fed back to the front-end equipment, and the front-end equipment can perform signal adjustment based on the fed-back signals, so that the nonlinear distortion of the signals output by at least one radio frequency transmission channel is reduced, and the quality of the output signals of the at least one PA is ensured.

In one possible design, each feedback module includes: the signal feedback circuit includes: a first coupler in one-to-one correspondence with the at least one PA and a second coupler in one-to-one correspondence with the at least one ET circuit.

Specifically, each first coupler is connected with the output end of the corresponding PA, and each first coupler is used for feeding back the output signal of the connected PA; each second coupler is connected with the output end of the corresponding ET circuit, and each second coupler is used for feeding back the output signal of the connected ET circuit.

In one possible design, the rf circuit includes a plurality of rf transmission channels, and at least one PA is connected to the plurality of rf transmission channels in a one-to-one correspondence, and the signal feedback circuit further includes: a selection circuit.

In one possible design, the analog-to-digital conversion circuit includes: a filter in one-to-one correspondence with each PA and an analog-to-digital converter in one-to-one correspondence with each filter.

In one possible design, the rf circuit to which the at least one PA is connected to at least one first digital predistortion DPD core, and each ET circuit to which the signal feedback circuit is connected includes a second DPD core.

In a third aspect, embodiments of the present application provide a communication system, which may include a baseband subsystem, a radio frequency circuit connected to the baseband subsystem, and at least one PA connected to the radio frequency circuit; at least one ET circuit connected to the at least one PA; each ET is used to power the connected PA; antennas connected in one-to-one correspondence with the at least one PA; and a signal feedback circuit provided in the second aspect of the application and in any possible design in circuit connection with the at least one PA and the at least one ET.

By adopting the communication system architecture, the signal feedback circuit provided in the second aspect and any possible design can be utilized to configure the signal feedback circuit in the communication system with the dual DPD cores, and the signal feedback circuit is used to perform signal compensation on the nonlinear distortion of the output signal of the PA for the radio frequency signal, thereby ensuring the signal quality of the communication system transmission.

In one possible design, the signal feedback circuit is fixedly connected with a plurality of radio frequency signal transmitting circuits.

Drawings

Fig. 1 is a schematic structural diagram of a wireless communication system according to an embodiment of the present application;

fig. 2 is a first schematic structural diagram of a communication system according to an embodiment of the present application;

fig. 3 is a schematic structural diagram of a communication system according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of a signal feedback circuit according to an embodiment of the present disclosure;

fig. 5 is a first circuit structure diagram of a signal feedback circuit according to an embodiment of the present disclosure;

fig. 6 is a circuit structure diagram of a signal feedback circuit according to an embodiment of the present disclosure;

fig. 7 is a schematic circuit structure diagram of a signal feedback circuit according to an embodiment of the present disclosure;

FIG. 8 is a schematic diagram illustrating a voltage waveform of an output signal of a feedback module according to an embodiment of the present disclosure;

FIG. 9 is a schematic diagram illustrating an output signal voltage waveform of another feedback circuit according to an embodiment of the present application;

fig. 10 is a schematic circuit structure diagram of a signal feedback circuit according to an embodiment of the present disclosure;

fig. 11 is a schematic structural diagram of a radio frequency circuit according to an embodiment of the present application;

fig. 12 is a schematic structural diagram of a communication system according to an embodiment of the present application.

Detailed Description

Embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

The technical scheme of the embodiment of the application can be applied to various communication systems, for example: a Long Term Evolution (LTE) system, an LTE Frequency Division Duplex (FDD) system, an LTE Time Division Duplex (TDD), a fifth generation (5 th generation,5 g) system, or a New Radio (NR), etc., which are not limited herein.

The technical solutions provided in the present application are further described below with reference to the accompanying drawings and examples. It should be understood that the system structure and the service scenario provided in the embodiments of the present application are mainly for explaining some possible implementations of the technical solutions of the present application, and should not be interpreted as the only limitations of the technical solutions of the present application. As can be appreciated by those skilled in the art, as the system evolves and newer service scenarios arise, the technical solution provided in the present application may still be applicable to the same or similar technical problems.

It should be understood that, in the following description of the specific embodiments, some repeated points may not be repeated, but these specific embodiments are referred to and may be combined with each other.

In a wireless communication system, devices can be divided into devices that provide wireless network services and devices that use wireless network services. The devices providing wireless network services refer to devices forming a wireless communication network, and may be referred to as network devices (network elements) for short. Network devices are typically assigned to and operated or maintained by operators or infrastructure providers. The network devices may be further classified into Radio Access Network (RAN) devices and Core Network (CN) devices. A typical RAN apparatus includes a Base Station (BS).

It should be understood that a base station may also sometimes be referred to as a wireless Access Point (AP), or a Transmission Reception Point (TRP). Specifically, the base station may be a general Node B (gNB) in a 5G New Radio (NR) system, or an evolved Node B (eNB) in a 4G Long Term Evolution (LTE) system. The base station may be classified as a macro base station (macro base station) or a micro base station (micro base station) according to a physical form or transmission power of the base station. A micro base station is sometimes also referred to as a small base station or small cell (small cell).

Devices using wireless network services may be referred to simply as terminals (terminals). The terminal can establish connection with the network equipment and provide specific wireless communication services for users based on the services of the network equipment. It should be understood that the terminal is also sometimes referred to as a User Equipment (UE), or Subscriber Unit (SU), because of the tighter relationship between the terminal and the user. In addition, the terminal tends to move with the user, sometimes referred to as a Mobile Station (MS), relative to a base station, which is typically located at a fixed location. Some network devices, such as Relay Nodes (RNs) or wireless routers, may also be considered as terminals due to their UE identities or due to their affiliations with users.

In particular, the terminal may be a mobile phone (mobile phone), a tablet computer (tablet computer), a laptop computer (laptop computer), a wearable device (such as a smart watch, a smart bracelet, a smart helmet, and smart glasses), and other devices with wireless access capability, such as a smart car, various internet of things (IOT) devices, including various smart home devices (such as a smart meter and smart home appliances), and smart city devices (such as security and security devices or monitoring devices, and smart road traffic facilities), and the like.

Fig. 1 is a schematic structural diagram of a communication system provided in an embodiment of the present application, where the communication system may be a terminal or a base station in the embodiment of the present application, and as shown in fig. 1, the communication system may include multiple components, for example: an application subsystem, a memory (memory), a mass storage (mass storage), a baseband subsystem, a Radio Frequency Integrated Circuit (RFIC), a Radio Frequency Front End (RFFE) device, and an antenna (antenna, ANT). These components may be coupled by various interconnection buses or other electrical connections.

In fig. 1, ANT _1 denotes a first antenna, ANT _ N denotes an nth antenna, and N is a positive integer greater than 1. Tx denotes a transmit path, rx denotes a receive path, and different numbers denote different paths. Each path may represent a signal processing channel. Where FBRx denotes a feedback reception path, PRx denotes a main reception path, and DRx denotes a diversity reception path. HB denotes high frequency, LB denotes low frequency, and both mean relatively high and low frequencies. BB denotes baseband. It should be understood that the labels and components in fig. 3 are for illustrative purposes only, as only one possible implementation, and that other implementations are also encompassed by the present embodiments. For example, a communication system may include more or fewer paths, including more or fewer components.

The application subsystem can be used as a main control system or a main computing system of the communication system, is used for running a main operating system and application programs, manages software and hardware resources of the whole communication system, and can provide a user operation interface for a user. In addition, driver software associated with other subsystems (e.g., baseband subsystem) may also be included in the application subsystem.

The application subsystem may include one or more processors. The plurality of processors may be a plurality of processors of the same type or may comprise a combination of processors of multiple types. In this application, the processor may be a general-purpose processor or a processor designed for a specific field. For example, the processor may be a Central Processing Unit (CPU), a Digital Signal Processor (DSP), or a Micro Control Unit (MCU). The processor may also be a Graphics Processing Unit (GPU), an image signal processing unit (ISP), an Audio Signal Processor (ASP), and an AI processor specifically designed for Artificial Intelligence (AI) applications. AI processors include, but are not limited to, neural Network Processing Units (NPUs), tensor Processing Units (TPUs), and processors known as AI engines.

In fig. 1, a radio frequency integrated circuit (including RFIC 1, and one or more optional RFICs 2) and a radio frequency front end device may collectively comprise a radio frequency subsystem. The RF subsystem can be divided into an RF receive path (RF receive path) and an RF transmit path (RF transmit path) according to the receiving or transmitting circuit of the signal. The rf transmitting channel may transmit an rf signal through the antenna, and the rf receiving channel may receive the rf signal through the antenna, process (e.g., amplify, filter, and downconvert) the rf signal to obtain a baseband signal, and transmit the baseband signal to the baseband subsystem. The rf transmit channel may receive the baseband signal from the baseband subsystem, process (e.g., upconvert, amplify, and filter) the baseband signal to obtain an rf signal, and finally radiate the rf signal into space via an antenna. The radio frequency integrated circuit may be referred to as a radio frequency processing chip or a radio frequency chip.

In particular, the rf subsystem may include an antenna switch, an antenna tuner, a Low Noise Amplifier (LNA), a Power Amplifier (PA), a mixer (mixer), a Local Oscillator (LO), a filter (filter), and other electronic devices, which may be integrated into one or more chips as desired. The radio frequency integrated circuit may be referred to as a radio frequency processing chip or a radio frequency chip. The rf front-end device may also be a separate chip. The radio frequency chip is sometimes also referred to as a receiver, transmitter, or transceiver. As technology evolved, antennas may sometimes also be considered part of the rf subsystem and may be integrated into the chip of the rf subsystem. The antenna, the rf front-end device and the rf chip may all be manufactured and sold separately. Of course, the rf subsystem may also be implemented with different devices or integrated in different ways based on power consumption and performance requirements. For example, some devices belonging to the rf front end are integrated into a rf chip, and even an antenna and the rf front end device are integrated into a rf chip, which may also be referred to as a rf antenna module or an antenna module.

In addition, since the rf signal is usually an analog signal, the signal processed by the baseband subsystem is mainly a digital signal, and an analog-to-digital conversion device is also required in the communication system. In the embodiment of the present application, the analog-to-digital conversion device may be disposed in the baseband subsystem, and may also be disposed in the radio frequency subsystem. The analog-to-digital conversion device includes an analog-to-digital converter (ADC) that converts an analog signal into a digital signal, and a digital-to-analog converter (DAC) that converts a digital signal into an analog signal.

Similar to the application subsystem, the baseband subsystem may also include one or more processors. In addition, the baseband subsystem may also include one or more Hardware Accelerators (HACs). The hardware accelerator can be used for specially completing sub-functions with large processing overhead, such as assembly and analysis of data packets (data packets), encryption and decryption of the data packets, and the like. These sub-functions may also be implemented using a general-purpose processor, but for performance or cost considerations, it may be more appropriate to use a hardware accelerator. In a specific implementation, the hardware accelerator is mainly implemented by an Application Specific Integrated Circuit (ASIC). Of course, one or more relatively simple processors, such as MCUs, may also be included in the hardware accelerator.

In the embodiment of the application, the baseband subsystem and the radio frequency subsystem jointly form a communication subsystem, and a wireless communication function is provided for the communication system. In general, the baseband subsystem is responsible for managing the software and hardware resources of the communication subsystem and may configure the operating parameters of the radio frequency subsystem. The processor of the baseband subsystem may run therein a sub-operating system of the communication subsystem, which is often an embedded operating system or a real time operating system (real time operating system), such as a VxWorks operating system or a QuRT system of the kowtthrough company.

The baseband subsystem may be integrated into one or more chips, which may be referred to as baseband processing chips or baseband chips. The baseband subsystem may be implemented as a stand-alone chip, which may be referred to as a modem (modem) or modem chip. The baseband subsystem may be manufactured and sold in units of modem chips. modem chips are also sometimes referred to as baseband processors or mobile processors. In addition, the baseband subsystem may be further integrated into a larger chip, and manufactured and sold in units of larger chips. This larger chip may be referred to as a system-on-chip, system-on-a-chip or system-on-a-chip (SoC), or simply as an SoC chip. The software components of the baseband subsystem may be built in the hardware components of the chip before the chip leaves factory, or may be imported into the hardware components of the chip from other nonvolatile memories after the chip leaves factory, or may be downloaded and updated in an online manner through a network.

In addition, the communication system also includes a storage, such as the memory and mass storage in fig. 1. In addition, one or more buffers may be included in the application subsystem and the baseband subsystem, respectively. In a specific implementation, the memory can be divided into a volatile memory (NVM) and a non-volatile memory (NVM). Volatile memory refers to memory in which data stored therein is lost when power supply is interrupted. Currently, volatile memory is mainly Random Access Memory (RAM), including Static RAM (SRAM) and Dynamic RAM (DRAM). The nonvolatile memory refers to a memory in which data stored inside is not lost even if power supply is interrupted. Common non-volatile memories include Read Only Memories (ROMs), optical disks, magnetic disks, and various memories based on flash memory technology, etc. Generally, the memory and cache may be volatile memory, and the mass storage may be non-volatile memory, such as flash memory.

Fig. 2 is a schematic structural diagram of another communication system according to an embodiment of the present application. Fig. 2 shows some common components used for radio frequency signal processing in a communication system. It should be understood that, although only one rf receiving channel and one rf transmitting channel are shown in fig. 2, the communication system in the embodiment of the present application is not limited thereto, and the communication system may include one or more rf receiving channels and one or more rf transmitting channels. Each rf transmitting channel may include devices such as a DAC and a mixer, and before the output signal of each rf transmitting channel is transmitted through the antenna, the output signal of the rf signal transmitting channel is further subjected to power adjustment processing through the PA. The rf receiving channel may include a mixer, a filter, and an ADC, and an antenna received by the rf receiving channel from the antenna may also be processed by a Low Noise Amplifier (LNA). Fig. 2 is an example, and the embodiments of the present application do not list the devices included in the rf receiving channel and the rf transmitting channel.

In an embodiment of the present application, the communication system further includes an ET circuit for supplying power to the PA, where the ET circuit supplies power to the PA. The ET circuit can comprise a power supply and an ET device, and the ET device can adjust the voltage value output by the power supply to the PA according to the transmission signal of the PA.

It should be noted that the ET device is set based on a single frequency point, and when the communication system is applied to an application scenario with a large bandwidth such as 5G in the embodiment of the present application, the design of the existing ET device cannot meet the requirement of the radio frequency subsystem, and may cause signal distortion to a power supply signal sent to the PA.

In conjunction with the foregoing description, as shown in fig. 3, a possible structure of the communication system according to the embodiment of the present application is shown.

Referring to fig. 3, the communication system may include radio frequency circuitry including at least one radio frequency transmit channel and at least one radio frequency receive channel (not shown). Each radio frequency transmitting channel comprises a mixer, a DAC (digital-to-analog converter), a Low-pass filter (LPF) and other devices, and each radio frequency receiving channel comprises a mixer, a DAC, an LPF and other devices. It should be noted that, although only two radio frequency transmission channels are shown in fig. 3, the communication system in the embodiment of the present application is not limited thereto.

In practical applications, other devices may be included in the communication system shown in fig. 3 to implement the transmission of the radio frequency signal. For example, in fig. 3, the output of each rf transmit channel is connected to a PA.

In practical use, in order to avoid output signal distortion caused by PA production and manufacturing reasons, the input end of each rf transmission channel may be further connected to the first DPD core, and the first DPD core may be configured to perform signal compensation according to a signal nonlinear distortion condition caused by the connected PA. The first DPD core may be located in the rf transmission channel or may be independent of the rf transmission channel.

In the embodiment of the application, each PA needs an external power supply to supply power to work when amplifying the radio frequency signal, so that the voltage input end of the PA can be further connected with the ET circuit, that is, the ET circuit can supply power to the PA. The ET circuit may include a second DPD core, a power supply, and an ET device, where the ET device may adjust a voltage value output by the power supply to the PA according to a transmission signal of the PA, and the second DPD core may be configured to perform signal compensation according to a nonlinear distortion condition of a signal output by the power supply. In practice, the communication system may also comprise other components, which are not listed here.

In practical use, the power supply usually can only receive the digital control signal and adjust the magnitude of the voltage output to the PA according to the digital control signal, while the signal of the second DPD core is usually an analog signal, and the ET circuit further includes a DAC connected between the second DPD core and the power supply.

At present, only a signal feedback path for performing signal compensation on a first DPD core is designed in the prior art, and for a structure in which the first DPD core and a second DPD core exist simultaneously in a communication system, a scheme how to configure a signal feedback circuit is not provided.

Based on this, an embodiment of the present application provides a signal feedback circuit, which is used in a communication system, where the communication system may be the communication system structure provided in the foregoing, and is used to configure a signal feedback path for the communication system, and a backend device may adjust a signal input to a PA according to a signal fed back by the signal feedback circuit, so as to improve the working efficiency and the signal transmission quality of the communication system.

Referring to fig. 4, in the embodiment of the present application, a first input terminal of the signal feedback circuit 400 is configured to be connected to an output terminal of at least one PA, a second input terminal of the signal feedback circuit 400 is configured to be connected to an output terminal of at least one ET circuit, and the signal feedback circuit 400 is configured to feed back an output signal of at least one PA and a signal output by at least one ET circuit and output the signals through an output terminal of the signal feedback circuit.

The signal feedback circuit 400 may include a feedback circuit 401 and an analog-to-digital conversion circuit 402.

Specifically, a first input terminal of the feedback circuit 401 is configured to be connected to an output terminal of at least one PA, a second input terminal of the feedback circuit 401 is configured to be connected to an output terminal of at least one ET circuit, and an output terminal of the feedback circuit 401 is connected to an input terminal of the analog-to-digital conversion circuit; the analog-to-digital conversion circuit is used for performing analog-to-digital conversion processing on the signal output by the feedback circuit and outputting the signal through the output end of the analog-to-digital converter.

In an optional manner, the communication system further includes a baseband subsystem, and the signal feedback circuit 400 provided in this embodiment of the present application may be connected to the baseband subsystem, and the baseband subsystem outputs, after receiving the signal output by the signal feedback circuit 400, a signal for adjusting a signal received by the radio frequency circuit and a signal output by the at least one ET circuit according to the received signal.

In another optional manner, the signal feedback circuit 400 provided in the embodiment of the present application further includes a processor 403 (not shown).

Specifically, the processor 403 is connected to the analog-to-digital conversion circuit 402, and the processor 403 may be configured to receive the signal output by the analog-to-digital conversion circuit 402 and output a signal for adjusting the rf circuit receiving signal and the at least one ET circuit output signal.

In practical use, the signal feedback circuit 400 provided in the embodiment of the present application may be located in the rf circuit, and may be independent of the rf circuit. When the signal feedback circuit 400 is independent of the rf circuit, the signal feedback circuit 400 and the at least one PA and the at least one ET circuit may be connected through a data transmission line and an interface provided on the signal feedback circuit 400.

The specific structures of the feedback circuit 401, the analog-to-digital conversion circuit 202, and the processor 203 in the signal feedback circuit 400 are described below.

1. Feedback circuit 401

A first input of the feedback circuit 401 is adapted to be connected to an output of the at least one PA, a second input of the feedback circuit 401 is adapted to be connected to an output of the at least one ET circuit, and an output of the feedback circuit 401 is connected to an input of the analog-to-digital conversion circuit 402.

The feedback circuit 401 includes a first coupler corresponding to at least one PA and a second coupler corresponding to at least one ET circuit.

Specifically, an input end of each first coupler is connected with an output end of the corresponding PA, and each first coupler is used for feeding back an output signal of the connected PA; the input end of each second coupler is connected with the output end of the corresponding ET circuit, and each second coupler is used for feeding back the output signal of the connected ET circuit.

Optionally, the feedback circuit 401 may further include a combiner in one-to-one correspondence with each PA. A first input end of each combiner is connected to an output end of a first coupler connected to the corresponding PA, a second input end of each combiner is connected to an output end of a second coupler connected to an ET circuit for supplying power to the corresponding PA, an output end of each combiner is connected to the analog-to-digital conversion circuit 402, and each combiner is configured to combine signals output by the connected first coupler and second coupler into one signal and output the signal to the analog-to-digital conversion circuit 402.

In one implementation, a first input terminal of the feedback circuit 401 is connected to an output terminal of the at least one PA through at least one third coupler, and a second input terminal of the feedback circuit 401 is connected to an output terminal of the at least one ET circuit through at least one fourth coupler. Wherein, at least one third coupler corresponds to at least one PA one-to-one, and at least one fourth coupler corresponds to at least one ET circuit one-to-one.

It should be noted that the feedback circuit 401 is connected to the output terminal of the PA through the third coupler and connected to the output terminal of the ET circuit through the fourth coupler, so that the area for disposing the first coupler and the second coupler in the feedback circuit is reduced, and the cost and the volume of the signal feedback circuit 400 are reduced.

2. Analog-to-digital conversion circuit 402

The analog-to-digital conversion circuit 402 is connected to the output end of the feedback circuit 401, and the analog-to-digital conversion circuit 402 may be configured to perform an analog-to-digital conversion process on the signal output by the feedback circuit 401 and output the signal through the output end of the analog-to-digital converter. Wherein, the filter that corresponds to each PA one-to-one and the ADC that corresponds to each filter one-to-one. Wherein the filter may be an LPF.

Specifically, the input end of each LPF is connected to the feedback circuit 401, and each LPF is configured to receive an output signal of a corresponding PA and an output signal of an ET circuit connected to the corresponding PA, filter the received signals, and output the filtered signals to the connected ADC; each ADC is used for receiving the signal output by the connected filter and carrying out analog-to-digital conversion processing on the received signal.

In an example, to reduce the size of the signal feedback circuit 400, one LPF and one ADC may be included in the analog-to-digital conversion circuit 402.

In actual use, the communication system includes a plurality of PAs and ET circuits connected to the plurality of PAs in a one-to-one correspondence manner, so that the feedback circuit 401 outputs output signals of the plurality of PAs and output signals of the plurality of ET circuits, and since the ADC and the LPF can process only one signal at a time, the signal feedback circuit 400 provided in this embodiment further includes a selection circuit 404 (not shown), the feedback circuit 401 may be connected to the analog-to-digital conversion circuit 402 through the selection circuit 404, the selection circuit 404 is configured to sequentially output signals output by the feedback circuit 401 according to a preset output sequence, and the LPF and the ADC receive signals output by the selection circuit 404 and then process the received signals.

3. Processor 403

The processor 403 is connected to the analog-to-digital conversion circuit 402, and the processor 403 is configured to receive the signal output by the analog-to-digital conversion circuit 402 after analog-to-digital conversion, and output a signal for adjusting the signal received by the radio frequency circuit and the signal output by the at least one ET circuit.

In specific implementation, the processor 403 may store a corresponding relationship between a feedback signal and a predistortion parameter, after receiving a feedback signal after analog-to-digital conversion output by the ADC, the processor 403 determines a target radio frequency transmission channel corresponding to the received feedback signal at this time, may determine the predistortion parameter corresponding to the feedback signal according to the stored corresponding relationship between the feedback signal and the predistortion parameter, and output the predistortion parameter to a first DPD core connected to the target transmission channel and a second DPD core in an ET circuit for supplying power to a PA connected to the target transmission channel, where after receiving the predistortion parameter, the first DPD core and the second DPD core adjust a signal output by the ET circuit and a signal output to the radio frequency circuit, so as to implement signal compensation on nonlinear distortion generated by the PA and nonlinear distortion generated by the ET circuit, thereby implement adjustment of signals received by the radio frequency circuit and signals output by at least one ET circuit, and improve signal quality transmitted by the communication system.

In a specific implementation, the ADC outputs the output signals of the plurality of PAs and the output signals of the plurality of ET circuits in the communication system according to a preset sequence, determines the signal received by the processor 403 as the source of the signal according to the sequence of the output signals of the ADC, and determines the target transmission channel according to the source of the signal.

In one example, when the signal output by the ADC is a PA output signal connected to the target rf transmit channel, the processor outputs the predistortion parameters to the first DPD core connected to the target rf transmit channel after determining the predistortion parameters.

Illustratively, the feedback signal includes at least a frequency and a magnitude, and the corresponding relationship between the feedback signal and the predistortion parameters is as shown in the following table one:

watch 1

Frequency of	Amplitude value	Predistortion parameters
X1	Y1	Z1
X2	Y2	Z2
X3	Y3	Z3
X4	Y4	Z4

As shown in table one, when receiving the feedback signal output by the ADC, the processor 403 finds a corresponding predistortion parameter by using the amplitude and the frequency included in the feedback signal output by the ADC, and outputs the predistortion parameter to a corresponding DPD core.

By adopting the structure of the signal feedback circuit 400, the feedback circuit feeds back signals output by a plurality of PAs connected to the radio frequency circuit and a plurality of ET circuits for supplying power to the plurality of PAs, and outputs the signals to the processor 403 after the signals are processed by the ADC, and the processor 403 may configure preset true parameters according to the stored correspondence between the feedback signals and the predistortion parameters, and output the configured predistortion parameters to the first DPD core and the second DPD core. In the above scheme, the signal feedback circuit can be configured for the communication system with dual DPD cores through the signal feedback circuit, and appropriate predistortion parameters can be configured for the dual DPD cores through the processor, so that the signal quality of transmission signals of the communication system is ensured.

The processor 403 may be a CPU, DSP, or MCU.

It should be noted that, the structures of the feedback circuit 401, the analog-to-digital conversion circuit 402, and the processor 403 are described above only as examples, and in practical applications, the feedback circuit 401, the analog-to-digital conversion circuit 402, and the processor 403 may also adopt other structures, which is not limited in this embodiment of the application.

In specific implementation, according to different devices included in the signal feedback circuit 401, the signal feedback circuit 400 in the embodiment of the present application may be divided into four specific circuit structures, and the following description is provided to the structure of the signal feedback circuit 400 provided in the present application with reference to the embodiment, and specifically includes the following four schemes:

the specific structure of the signal feedback circuit 400 provided in the present application is described in detail below with reference to embodiments.

Example one

Fig. 5 is a schematic structural diagram of a signal feedback circuit 400 according to an embodiment of the present disclosure.

The signal feedback circuit 400 includes a feedback circuit 401, an analog-to-digital conversion circuit 402, a selection circuit 404, and a processor 403.

The feedback circuit 401 includes a first coupler corresponding to at least one PA and a second coupler corresponding to at least one ET circuit. The selection circuit 404 includes a plurality of selection switches K. The analog-to-digital conversion circuit 402 includes an LPF and an ADC.

Specifically, the first coupler may include a first attenuator A1, an input end of the A1 is connected to an output end of the corresponding PA, and the A1 may be configured to attenuate and output an amplitude of an output signal of the connected PA; the second coupler may include a second attenuator A2, an input end of the A2 is connected to an output end of the corresponding ET circuit, and the A2 may be configured to attenuate and output an amplitude of an output signal of the connected ET circuit; k is connected with the output end of each A1 and the output end of each A2 in the feedback circuit, and can be used for receiving feedback signals output by the connected A1 and A2 and outputting the received signals in sequence according to a preset output sequence; the input end of the LPF is connected with the output end of the K, and the output end of the LPF is connected with the ADC and used for filtering the output signal of the K and outputting the filtered output signal to the ADC; the ADC is connected to the processor 403, and is configured to perform analog-to-digital conversion on the output signal of the LPF and output the output signal to the processor 403; the processor 403 generates predistortion parameters according to the received signal, and outputs the predistortion parameters to the corresponding DPD core.

In particular implementations, K may include a plurality of first input ports, a plurality of second input ports, and a first output port. Each first input port is connected to the output end of each A1 in a one-to-one correspondence, each second input port is connected to the output end of each A2 in a one-to-one correspondence, and the output port is connected to the analog-to-digital conversion circuit 402.

In practical use, the feedback circuit can output multi-path signals, so that when the K is configured, a four-to-one type K, an eight-to-one type K, a sixteen-to-one type K or other types of multiplexers can be selected according to the number of PA and ET circuits in the communication system. It should be noted that the structure of the selection circuit in the embodiment of the present application is merely an illustration, and when the selection circuit is actually used, other chips or devices may be selected.

It should be noted that, the communication system may further include a baseband subsystem, and the rf circuit may receive a baseband signal from the baseband subsystem, and perform up-conversion and filtering processing on the baseband signal through the LPF and the mixer in the rf transmission channel to obtain an rf signal, and the PA performs power adjustment processing on the rf signal, so that the frequency of the output signal of the PA is far higher than the frequency of the baseband signal, and thus, the feedback signal output by A1 cannot be directly processed. When the ADC processes the output signal of the PA output by A2, the ADC needs to perform down-conversion processing on the signal output by A2, and then output the signal to the back-end connector.

Specifically, the working frequency of the ADC may be switched between a first frequency and a second frequency, where when the ADC processes the feedback signal output by the A1, the working frequency of the ADC is the first frequency, and when the ADC processes the feedback signal output by the A2, the working frequency of the ADC is switched from the first frequency to the second frequency. The first frequency is not equal to the second frequency, for example, the first frequency may be smaller than the second frequency.

For example, the first frequency may be 2.1GHz; the second frequency may be 3.5GHz. Of course, the above are only examples, and specific values of the first frequency and the second frequency may be determined according to actual situations, which are not illustrated in sequence.

In a specific implementation, the ADC may receive a control command for performing frequency switching output by the processor or an external processor, and perform frequency switching when receiving the control command. How to receive the control command and the specific format of the control command are specific, and the embodiment of the present application is not limited to this time. Example two

Fig. 6 is a schematic structural diagram of a signal feedback circuit according to an embodiment of the present disclosure.

In specific implementation, the first coupler may include A1 and a mixer, an input end of the A1 is connected to an output end of a corresponding PA, an output end of the A2 is connected to a first input end of the mixer, the A1 may be configured to attenuate an amplitude of an output signal of the connected PA and output the attenuated output signal to the mixer, a second input end of the mixer is connected to an input end of the PA, and the mixer may be configured to perform mixing processing on a signal output by the A1 and output the signal after the mixing processing; the second coupler may include A2 and a mixer, an input terminal of the A2 is connected to an output terminal of the corresponding ET circuit, and the A2 may be configured to attenuate and output an amplitude of an output signal of the connected ET circuit; the input end of K is connected with the output end of each mixer in the feedback circuit and the output end of A2, and K can be used for receiving signals output by the connected mixers and A2 and outputting the received signals in sequence according to a preset output sequence; the input end of the LPF is connected with the output end of the K, and the output end of the LPF is connected with the ADC and used for filtering the K output signal and outputting the K output signal to the ADC; the ADC is connected to the processor 403, and is configured to perform analog-to-digital conversion on the output signal of the LPF and output the output signal to the processor 403; processor 406 may generate predistortion parameters from the received signal and output the predistortion parameters to the corresponding DPD cores.

It should be noted that the frequency of the feedback signal output by A1 is too high, and the processor 403 cannot directly process the feedback signal, and before the signal output by A1 is output to the ADC, the feedback signal output by A1 needs to be down-converted by the mixer and then output to the back-end connector. Therefore, the ADC does not need to switch between the first frequency and the second frequency, and the problems of low conversion efficiency and low conversion accuracy rate caused by delay of ADC frequency switching time and the like are solved.

In specific implementation, the processor 403 may store a corresponding relationship between a feedback signal and a predistortion parameter, and after receiving the feedback signal after analog-to-digital conversion output by the ADC, the processor 403 may determine the predistortion parameter corresponding to the feedback signal according to the stored corresponding relationship between the feedback signal and the predistortion parameter, and output the predistortion parameter to the DPD module corresponding to the feedback signal.

It should be noted that, the correspondence between the feedback signal and the predistortion parameter can be seen in table one in the embodiment in detail, and the description of the present application is not repeated here.

EXAMPLE III

Fig. 7 is a schematic structural diagram of a signal feedback circuit according to an embodiment of the present disclosure.

The feedback circuit 401 includes a first coupler corresponding to at least one PA, a second coupler corresponding to at least one ET circuit, and a combiner corresponding to each PA. The selection circuit 404 includes a plurality of selection switches K. The analog-to-digital conversion circuit 402 includes an LPF and an ADC.

Specifically, the first coupler may include A1, an input end of the A1 is connected to an output end of a corresponding PA, and the A1 may be configured to attenuate and output an amplitude of an output signal of the connected PA; the second coupler may include A2, an input terminal of the A2 is connected to an output terminal of the corresponding ET circuit, and the A2 may be configured to attenuate and output an amplitude of an output signal of the connected ET circuit; a first input end of the combiner is connected with an output end of the A1 connected with the corresponding PA, a second input end of the combiner is connected with an output end of the A2 connected with an ET circuit for supplying power to the corresponding PA, and the combiner can be used for combining the output signal of the A1 and the output signal of the A2 into a signal and outputting the signal to the K; the input end of the K is connected with the output end of each combiner in the feedback circuit, and the K can be used for receiving the signals output by each combiner and sequentially outputting the received signals according to a preset output sequence; the input end of the LPF is connected with the output end of the K, and the output end of the LPF is connected with the ADC and used for filtering the output signal of the K and outputting the filtered output signal to the ADC; the ADC is connected to the processor 403, and is configured to perform analog-to-digital conversion on the output signal of the LPF and output the output signal to the processor 403; processor 403 may be configured to generate predistortion parameters from the received signal and output the predistortion parameters to the corresponding DPD core.

It should be noted that, the frequency of the output signal of the PA is much higher than that of the baseband signal, so that the frequency difference of the combined feedback signal output by the combiner is large, and the ADC can only process the signal in a fixed frequency range at the same time.

For example, as shown in fig. 8, the combined signal output by the combiner includes an output signal u1 of the ET circuit after amplitude reduction and an output signal u2 of the PA circuit after amplitude reduction, respectively. Where u2 is a baseband frequency and u1 is a high frequency signal.

After receiving the combined signal and the control signal output by the processor or the baseband subsystem, the ADC performs down-conversion on the high-frequency signal u2 to obtain a signal with a similar baseband frequency, such as u2 in fig. 9, where the frequencies of u1 and u2 are similar and the frequency of the combined signal is within a certain range, and the ADC can simultaneously process the signals in the combined signal and output the processed signal to the processor.

In particular implementations, K may include a plurality of input ports and a first output port. Each input port is connected to each feedback module 401 in a one-to-one correspondence, and the output port is connected to the analog-to-digital conversion module 403.

In actual use, the combiner in each feedback module 401 outputs one feedback signal, so that when the selection module 402 is configured, a four-to-one type K, an eight-to-one type K, a sixteen-to-one type K, or other types of multiplexers can be selected according to the number of the radio frequency signal transmitting circuits in the communication system. It should be noted that the structure of the selection module 402 in the embodiment of the present application is merely an illustration, and when in actual use, other chips or devices may be selected.

It should be noted that each combiner in the feedback circuit 401 may combine two signals into one signal, and the ADC and the LPF may process two signals at the same time, so as to shorten the time for the ADC and the LPF to process the output signal of the feedback circuit 401, and improve the working efficiency of the signal feedback circuit 400.

In specific implementation, because the signal output by the ADC is a combined signal of two paths of signals, after receiving the signal, the processor splits the received signal, generates predistortion parameters according to the split signal, and outputs the predistortion parameters to the corresponding DPD core.

Example four

Fig. 10 is a schematic structural diagram of a signal feedback circuit according to an embodiment of the present disclosure.

In specific implementation, the first coupler may include A1 and a mixer, an input end of the A1 is connected to an output end of a corresponding PA, an output end of the A1 is connected to a first input end of the mixer, the A1 may be configured to attenuate an amplitude of an output signal of the connected PA and output the attenuated output signal to the mixer, a second input end of the mixer is connected to an input end of the PA, and the mixer may be configured to perform mixing processing on a signal output by the A1 and output the signal after the mixing processing; the second coupler may include A2, an input end of the A2 is connected to an output end of the corresponding ET circuit, and the A2 may be configured to attenuate and output an amplitude of an output signal of the connected ET circuit; a first input end of the combiner is connected with an output end of a mixer in a first coupler connected with the corresponding PA, a second input end of the combiner is connected with an output end of A2 in a second coupler connected with an ET circuit for supplying power to the corresponding PA, and the combiner can be used for combining a signal output by the connected mixer and an output signal of the A2 into a signal and outputting the signal to K; the input end of the K is connected with the output end of each combiner, and the K can be used for receiving signals output by the combiners and outputting the received signals in sequence according to a preset output sequence; the input end of the LPF is connected with the input end of the K, and the output end of the LPF is connected with the ADC and used for filtering the output signal of the K and outputting the signal to the ADC; the ADC is connected to the processor 403, and is configured to perform analog-to-digital conversion on the output signal of the LPF and output the output signal to the processing module 403; processor 403 may be configured to generate predistortion parameters from the received signal and output the predistortion parameters to the corresponding DPD core.

It should be noted that the frequency of the output signal of the PA is much higher than the baseband signal, because A1 is directly connected to the mixer, the mixer down-converts the PA output signal of the attenuation amplitude output by A1, the frequency of the output signal is in the vicinity of the baseband signal, when the combiner combines the output signal of A2 and the output signal of the mixer, the frequency of the combined signal is within a certain range interval, and the ADC can directly process the signal after receiving the signal output by the combiner, so that the ADC does not need to switch between the first frequency and the second frequency, and the problems of low conversion efficiency and low conversion accuracy caused by delay of the ADC frequency switching time are reduced.

It should be noted that, the analog-to-digital conversion circuit in the signal feedback circuit provided in the foregoing embodiment of the present application includes only one ADC and one LPF, and in actual use, according to the difference between the number and the structure of the devices in the analog-to-digital conversion circuit provided in the foregoing embodiment and the difference between the structures of the feedback circuits, the signal feedback circuit provided in the embodiment of the present application further has several other structures, and the principle of the other circuit structures is the same, which is not described in detail in the present application.

Based on the same inventive concept, the embodiment of the application also provides a radio frequency circuit. Illustratively, as shown in fig. 11, the radio frequency circuit 1100 provided by the embodiment of the present application may include at least one radio frequency transmission channel 1101 and a signal feedback circuit 1102.

Wherein the at least one radio frequency transmit channel is connected with at least one power amplifier PA, and the at least one PA is connected with at least one envelope tracking ET circuit for powering the at least one PA. A first input terminal of the signal feedback circuit 1102 is configured to be connected to an output terminal of at least one PA, a second input terminal of the signal feedback circuit 1102 is configured to be connected to an output terminal of at least one ET circuit, and the signal feedback circuit 1102 is configured to feed back an output signal of at least one PA and a signal output by the at least one ET circuit and output the signals through an output terminal of the signal feedback circuit. It should be noted that although only one rf transmission channel is shown in fig. 11, the rf circuit 1100 in the embodiment of the present application is not limited thereto.

The input end of each radio frequency transmission channel is connected with the first Digital Predistortion (DPD) core, and an ET circuit used for supplying power to a Power Amplifier (PA) connected with each radio frequency transmission channel comprises a second DPD core.

It is to be understood that, the circuit structure design of the signal feedback circuit 1102 in the radio frequency circuit may refer to the relevant designs of fig. 4 to fig. 10, and details are not repeated here.

Based on the same technical concept, an embodiment of the present application further provides a communication system, and for example, as shown in fig. 12, a communication system 1200 provided in the embodiment of the present application may include a baseband subsystem 1201, a radio frequency circuit 1202 connected to the baseband subsystem 1201, at least one PA1203 connected to the radio frequency circuit, at least one ET circuit 1204 connected to the at least one PA, and antennas 1205 connected to the at least one PA1203 in a one-to-one correspondence; and a signal feedback circuit 400 provided as described above in connection with at least one PA1203 and at least one ET circuit 1204, according to embodiments of the present application. Each ET circuit is used for supplying power for the connected PA, and each ET circuit comprises an ET device, a power supply source, a second DPD core and a DAC.

Optionally, the communication system 1200 further comprises at least one first DPD core (not shown) through which the baseband subsystem is connected to the radio frequency circuitry 1202.

The baseband subsystem 1201 may be configured to provide a baseband signal to the radio frequency circuit 1202; the radio frequency circuit 1202 may be configured to convert a baseband signal sent by the baseband subsystem 1201 into a radio frequency signal, and output the radio frequency signal to a corresponding antenna; signal feedback circuit 400 may be used to configure a signal feedback path for communication system 1200; each antenna is for transmitting a received radio frequency signal.

In an alternative, the signal feedback circuit 400 may be fixedly connected to the rf circuit 1202.

In an example, the communication system 1200 also includes an antenna switch 1206 connected between the antenna 1205 and at least one PA 1203.

In a specific implementation, the antenna switch 1206 may receive a control instruction sent by the baseband subsystem 1201 and used for controlling the state of the antenna switch 1206, and after receiving the control instruction, the antenna switch 1206 adjusts the state of the switch to realize connection between the antenna 1206 and the at least one PA 1203.

In the present application, the plural number means two or more.

The connection referred to in this application, describing a connection relationship of two objects, may represent two connection relationships, for example, a and B connection, may represent: a is directly connected with B, and A is connected with B through C.

In addition, it is to be understood that the terms first, second, etc. in the description of the present application are used for distinguishing between the descriptions and not necessarily for describing a sequential or chronological order.

In addition, the system structure and the service scenario provided in the embodiment of the present application are mainly used to explain some possible implementations of the technical solution of the present application, and should not be interpreted as a unique limitation to the technical solution of the present application. As can be appreciated by those skilled in the art, as the system evolves and newer service scenarios arise, the technical solution provided in the present application may still be applicable to the same or similar technical problems.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

A radio frequency circuit, wherein the radio frequency circuit comprises at least one radio frequency transmit channel and a signal feedback circuit;

the at least one radio frequency transmit channel is connected with at least one Power Amplifier (PA), and the at least one PA is connected with at least one Envelope Tracking (ET) circuit for supplying power to the at least one PA;

the first input end of the signal feedback circuit is used for being connected with the output end of the at least one PA, the second input end of the signal feedback circuit is used for being connected with the output end of the at least one ET circuit, and the signal feedback circuit is used for feeding back the output signal of the at least one PA and the signal output by the at least one ET circuit and outputting the output signal through the output end of the signal feedback circuit.
The radio frequency circuit of claim 1, wherein the signal feedback circuit comprises: a feedback circuit and an analog-to-digital conversion circuit;

a first input end of the feedback circuit is used for being connected with an output end of the at least one PA, a second input end of the feedback circuit is used for being connected with an output end of the at least one ET circuit, and an output end of the feedback circuit is connected with an input end of the analog-to-digital conversion circuit;

the analog-to-digital conversion circuit is used for performing analog-to-digital conversion processing on the signal output by the feedback circuit and outputting the signal through the output end of the analog-to-digital converter.
The radio frequency circuit of claim 2, wherein the signal feedback circuit comprises: a first coupler in one-to-one correspondence with the at least one PA and a second coupler in one-to-one correspondence with the at least one ET circuit;

each first coupler is connected with the output end of the corresponding PA, and each first coupler is used for feeding back the output signal of the connected PA;

each second coupler is connected with the output end of the corresponding power supply circuit, and each second coupler is used for feeding back the output signal of the connected ET circuit.
The rf circuit of claim 2 or 3, wherein the rf circuit includes a plurality of rf transmit channels, and wherein the at least one PA is connected to the plurality of rf transmit channels in a one-to-one correspondence, the signal feedback circuit further comprising: a selection circuit;

the feedback circuit is connected with the analog-to-digital conversion circuit through the selection circuit, and the selection circuit is used for sequentially outputting signals output by the feedback circuit according to a preset output sequence.
The radio frequency circuit of claims 2-3, wherein the analog-to-digital conversion circuit comprises: the device comprises a filter corresponding to each PA and an analog-to-digital converter corresponding to each filter;

the input end of each filter is connected with the feedback circuit, and each filter is used for receiving the output signal of the corresponding PA and the output signal of the ET circuit connected with the corresponding PA, filtering the received signals and outputting the filtered signals to the connected analog-to-digital converter;

each analog-to-digital converter is used for receiving the signal output by the connected filter and performing analog-to-digital conversion processing on the received signal.
The radio frequency circuit of claim 3, wherein the feedback circuit further comprises: combiners are in one-to-one correspondence with the PAs;

the first input end of each combiner is connected with the output end of the first coupler connected with the corresponding PA, the second input end of each combiner is connected with the output end of the second coupler connected with the ET circuit for supplying power to the corresponding PA, the output end of each combiner is connected with the analog-to-digital conversion circuit, and each combiner is used for combining the signals output by the first coupler and the second coupler into one signal and outputting the signal to the converter.
The radio frequency circuit of any of claims 2-6, wherein the signal feedback circuit further comprises: a processor;

the processor is connected with the analog-to-digital conversion circuit and used for receiving the signals output by the analog-to-digital conversion circuit and outputting signals used for adjusting the signals received by the radio frequency circuit and the signals output by the at least one ET circuit.
A radio frequency circuit as claimed in any one of claims 1 to 7, characterised in that the input of each radio frequency transmission channel is connected to a first digital pre-distortion DPD core and in that the ET circuit for powering the PA to which each radio frequency transmission channel is connected comprises a second DPD core.
A signal feedback circuit for use in a communication system comprising a radio frequency circuit, at least one power amplifier, PA, connected to the radio frequency circuit, and an envelope tracking, ET, circuit connected to the at least one PA for powering the connected PA,

the first input end of the signal feedback circuit is used for being connected with the output end of the at least one PA, the second input end of the signal feedback circuit is used for being connected with the output end of the at least one ET circuit, and the signal feedback circuit is used for feeding back the output signal of the at least one PA and the signal output by the at least one ET circuit and outputting the output signal through the output end of the signal feedback circuit.
The signal feedback circuit of claim 9, wherein said signal feedback circuit comprises: a feedback circuit and an analog-to-digital conversion circuit;

a first input end of the feedback circuit is used for being connected with an output end of the at least one PA, a second input end of the feedback circuit is used for being connected with an output end of the at least one ET circuit, and an output end of the feedback circuit is connected with an input end of the analog-to-digital conversion circuit;

the analog-to-digital conversion circuit is used for performing analog-to-digital conversion processing on the signal output by the feedback circuit and outputting the signal through the output end of the analog-to-digital converter.
The signal feedback circuit of claim 10, wherein the signal feedback circuit comprises: a first coupler in one-to-one correspondence with the at least one PA and a second coupler in one-to-one correspondence with the at least one ET circuit;

each first coupler is connected with the output end of the corresponding PA, and each first coupler is used for feeding back the output signal of the connected PA;

each second coupler is connected with the output end of the corresponding ET circuit, and each second coupler is used for feeding back the output signal of the connected ET circuit.
The signal feedback circuit according to claim 10 or 11, wherein the rf circuit comprises a plurality of rf transmission channels, and the at least one PA is connected to the plurality of rf transmission channels in a one-to-one correspondence, the signal feedback circuit further comprising: a selection circuit;

the feedback circuit is connected with the analog-to-digital conversion circuit through the selection circuit, and the selection circuit is used for sequentially outputting signals output by the feedback circuit according to a preset output sequence.
The signal feedback circuit of claim 12, wherein said analog-to-digital conversion circuit comprises: the device comprises a filter corresponding to each PA and an analog-to-digital converter corresponding to each filter;

the input end of each filter is connected with the selection circuit, and each filter is used for receiving the output signal of the corresponding PA and the output signal of the ET circuit connected with the corresponding PA, filtering the received signals and outputting the filtered signals to the connected analog-to-digital converter;

each analog-to-digital converter is used for receiving the signal output by the connected filter and performing analog-to-digital conversion processing on the received signal.
The signal feedback circuit of claim 11, wherein the feedback circuit further comprises: combiners are in one-to-one correspondence with the PAs;

the first input end of each combiner is connected with the first coupler connected with the corresponding PA, the second input end of each combiner is connected with the second coupler connected with the ET module used for supplying power to the corresponding PA, the output end of each combiner is connected with the analog-to-digital conversion circuit, and each combiner is used for combining signals output by the first coupler and the second coupler which are connected into one signal and outputting the signal to the converter.
The signal feedback circuit as claimed in any one of claims 10-14, wherein said signal feedback circuit further comprises: a processor;

the processor is connected with the analog-to-digital conversion circuit and used for receiving the signals output by the analog-to-digital conversion circuit and outputting signals used for adjusting the signals received by the radio frequency circuit and the signals output by the at least one ET circuit.
A signal feedback circuit according to any of claims 9-15, wherein the radio frequency circuit to which the at least one PA is connected to at least one first digital pre-distortion, DPD, core, and wherein each ET circuit to which the signal feedback circuit is connected includes a second DPD core.
A communication system, comprising:

a baseband subsystem;

a radio frequency circuit connected to the baseband subsystem;

at least one Power Amplifier (PA) connected to the radio frequency circuit;

at least one envelope tracking ET circuit connected to the at least one PA; each ET circuit is used to power a connected PA;

antennas connected in one-to-one correspondence with the at least one PA; and

the signal feedback circuit as claimed in any one of claims 9-16 in circuit connection with the at least one PA and the at least one ET.
The communication system of claim 17, wherein the signal feedback circuit is fixedly connected to the radio frequency circuit.