CN115171623A - Drive circuit and display device - Google Patents

Drive circuit and display device Download PDF

Info

Publication number
CN115171623A
CN115171623A CN202210946143.6A CN202210946143A CN115171623A CN 115171623 A CN115171623 A CN 115171623A CN 202210946143 A CN202210946143 A CN 202210946143A CN 115171623 A CN115171623 A CN 115171623A
Authority
CN
China
Prior art keywords
voltage
circuit
input
display
operational amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202210946143.6A
Other languages
Chinese (zh)
Other versions
CN115171623B (en
Inventor
胡胜华
聂春扬
戴珂
杨昆
李瑞莲
闫冰冰
尹晓峰
陈韫璐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Hefei BOE Display Lighting Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Hefei BOE Display Lighting Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BOE Technology Group Co Ltd, Hefei BOE Display Lighting Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to CN202210946143.6A priority Critical patent/CN115171623B/en
Publication of CN115171623A publication Critical patent/CN115171623A/en
Application granted granted Critical
Publication of CN115171623B publication Critical patent/CN115171623B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers

Abstract

The present disclosure provides a driving circuit and a display device. The drive circuit includes: power management circuit, compensating circuit and display driver chip, power management circuit treat that steady voltage constant voltage output is connected compensating circuit's first input, display driver chip treat that steady voltage constant voltage input is connected compensating circuit's second input and output, compensating circuit be used for with treat that the voltage fluctuation of steady voltage constant voltage input superposes in antiphase first input, in order to restrain treat the voltage fluctuation of steady voltage constant voltage input, wherein, compensating circuit's first input, second input and the direct current component of output equal. The performance of the display driving chip in the driving circuit is more stable.

Description

Drive circuit and display device
Technical Field
The disclosure belongs to the technical field of display, and particularly relates to a driving circuit and a display device.
Background
This section is intended to provide a background or context to the embodiments recited in the claims. The description herein is not admitted to be prior art by inclusion in this section.
In a display device, such as a television, an electronic billboard, and a smart phone, a power management circuit provides a specific constant voltage signal to a display driver chip. For example, the liquid crystal display driving chip needs to receive a stable half voltage, a positive voltage of the 0 gray scale, and a negative voltage of the 0 gray scale. The half-voltage is a reference voltage required by the internal work of the liquid crystal display driving chip and is between 0 gray scale positive polarity voltage and 0 gray scale negative polarity voltage. The variation of the internal working state of the liquid crystal display driving chip can cause the fluctuation of half-voltage, thereby causing abnormal display.
Disclosure of Invention
The present disclosure provides a driving circuit and a display device.
The technical scheme adopted by the disclosure is as follows: a drive circuit, comprising: power management circuit, compensating circuit and display driver chip, power management circuit treats that steady voltage constant voltage output is connected compensating circuit's first input, display driver chip treats that steady voltage constant voltage input is connected compensating circuit's second input and output, compensating circuit be used for with treat that the voltage fluctuation of steady voltage constant voltage input superposes in antiphase first input, in order to restrain treat the voltage fluctuation of steady voltage constant voltage input, wherein, compensating circuit's first input, second input and the direct current component of output equal.
In some embodiments, the compensation circuit comprises: the circuit comprises a first capacitor, a first resistor, a second resistor and an operational amplifier; the first input end of the compensation circuit is respectively connected with the first end of the first capacitor and the output end of the compensation circuit, the second end of the first capacitor is connected with the reverse input end of the operational amplifier through the first resistor, the second input end of the compensation circuit is connected with the non-inverting input end of the operational amplifier, the reverse input end of the operational amplifier is further connected with the output end of the operational amplifier through the second resistor, and the output end of the operational amplifier is electrically connected with the output end of the compensation circuit.
In some embodiments, the compensation circuit further comprises: a second capacitor; the first end of the second capacitor is connected with the positive input end of the operational amplifier, and the second end of the second capacitor is grounded.
In some embodiments, the output of the operational amplifier is connected to the output of the compensation circuit through a third resistor.
In some embodiments, the output of the compensation circuit is connected to ground through a fourth resistor.
In some embodiments, the driving circuit is configured to drive a liquid crystal display panel, and the constant voltage output terminal to be stabilized is configured to provide a half-voltage to the display driving chip, where the half-voltage is between a positive polarity voltage of a 0 gray scale and a negative polarity voltage of the 0 gray scale received by the display driving chip.
The technical scheme adopted by the disclosure is as follows: a display device comprises a display panel and the driving circuit, wherein a display driving chip in the driving circuit is used for driving the display panel.
In some embodiments, the display panel is a liquid crystal display panel, and the constant voltage output terminal to be stabilized of the display driving chip is configured to provide a half-voltage to the display driving chip, where the half-voltage is between a positive polarity voltage of 0 gray scale and a negative polarity voltage of 0 gray scale received by the display driving chip.
Drawings
Fig. 1 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.
Fig. 2 is a circuit diagram of a compensation circuit of an embodiment of the disclosure.
Fig. 3 is a waveform diagram of a half-voltage received by a display driving chip of a comparative display device according to the present disclosure.
Fig. 4 is a waveform diagram of a half-voltage received by a display driving chip of a display device according to an embodiment of the disclosure.
The reference numbers are as follows: 1. a display panel; 2. a display driving chip; 3. a compensation circuit; 4. a power management circuit; g9 and 0 gray scale positive polarity voltage output ends; g10, 0 gray scale negative polarity voltage output end; HAVDD, a half-voltage input end received by the display driving chip; HAVDo, a half-voltage output end of a power management circuit; AVDD, power supply terminal; p1, a first input end; p2, a second input end; out, an output end; r1 and a first resistor; r2 and a second resistor; r3 and a third resistor; r4 and a fourth resistor; c1, a first capacitor; c2, a second capacitor; c3, a third capacitor; A. an operational amplifier.
Detailed Description
The disclosure will be further described with reference to the embodiments shown in the drawings.
Referring to fig. 1 and 2, an embodiment of the present disclosure provides a driving circuit including: the power management circuit 4, the compensating circuit 3 and the display driver chip 2, the constant voltage output end of waiting to stabilize of the power management circuit 4 is connected with the first input end P1 of the compensating circuit 3, the constant voltage input end of waiting to stabilize of the display driver chip 2 is connected with the second input end P2 and the output end of the compensating circuit 3, the compensating circuit 3 is used for superposing the voltage fluctuation of the constant voltage input end of waiting to stabilize on the first input end P1 in a reversed phase manner, so as to restrain the voltage fluctuation of the constant voltage input end of waiting to stabilize, wherein, the direct current components of the first input end P1, the second input end P2 and the output end Out of the compensating circuit 3 are equal.
The power management circuit 4 supplies various reference voltages to the display driving chip 2. For example, the half-voltage output terminal HAVDDo of the power management circuit 4 outputs a half-voltage; a 0 gray scale positive polarity voltage output end G9 of the power management circuit 4 outputs a 0 gray scale positive polarity voltage; the 0-gray scale negative polarity voltage output terminal G10 of the power management current outputs a 0-gray scale negative polarity voltage.
In some embodiments, the positive voltage of the 0 gray scale is 9V, the negative voltage of the 0 gray scale is 8V, and the half voltage is 8.5V. Of course, the half-voltage may be greater than the average of the positive voltage of the 0 gray scale and the negative voltage of the 0 gray scale, or may be less than the average of the positive voltage of the 0 gray scale and the negative voltage of the 0 gray scale. The voltage value of the half-voltage can be adjusted by experiment. If the voltage value of the half-voltage is greater than or equal to the positive polarity voltage of the 0 gray scale, or the voltage value of the half-voltage is less than or equal to the negative polarity voltage of the 0 gray scale, the operating state of the display driving chip is greatly affected.
The display driving chip 2 performs an operation according to the received various reference voltages to obtain driving voltages of the respective gray scales, and then outputs the driving voltages of the respective gray scales to the display panel 1.
When the display driver chip 2 displays a jitter (flicker) screen, the fluctuation of the half-voltage may be caused by a drastic change of the internal operating state of the display driver chip 2.
Referring to fig. 3, in a comparative example of the present disclosure, a half-voltage output terminal HAVDDo of the power management circuit 4 is directly connected to a half-voltage input terminal HAVDD of the display driving chip 2 through a wire. The half-voltage of the half-voltage input terminal HAVDD of the display driving chip 2 is severely jittered, which seriously affects the display effect.
In the embodiment of the present disclosure, the half-voltage input terminal HAVDD of the display driving chip 2 is used as the constant-voltage input terminal to be stabilized, and the half-voltage output terminal HAVDDo of the power management circuit 4 is used as the constant-voltage output terminal to be stabilized. Of course, the constant voltage input terminal to be regulated may also be other types of constant voltage input terminals of the display driver chip 2.
The compensation circuit 3 is a negative feedback circuit that applies the alternating-current signal at the constant-voltage-to-be-stabilized input terminal of the display driver chip 2 in reverse to the corresponding constant-voltage-to-be-stabilized output terminal in the power management circuit 4, thereby suppressing the voltage fluctuation at the constant-voltage-to-be-stabilized input terminal of the display driver chip 2.
In the display device shown in fig. 1, the compensation circuit 3 provides the regulated half-voltage for the 5 display driving chips 2, and provides the positive polarity voltage of the 0 gray scale and the negative polarity voltage of the 0 gray scale for the 5 display driving chips 2. For simplicity of the screen, only 3 traces leading from the power management circuit 4 are shown in fig. 1.
In some large-sized display devices, the number of display driving chips 2 connected to one display panel 1 is larger, and 2 power management circuits 4 and 2 compensation circuits 3 are disposed in one display device in a one-to-one correspondence. Each power management circuit 4 and corresponding compensation circuit 3 provides various types of reference voltages for half the number of display driver chips 2.
In some embodiments, referring to fig. 2, the compensation circuit 3 includes: the circuit comprises a first capacitor C1, a first resistor R1, a second resistor R2 and an operational amplifier A; the first input end P1 of the compensation circuit 3 is respectively connected with the first end of the first capacitor C1 and the output end of the compensation circuit 3, the second end of the first capacitor C1 is connected with the reverse input end of the operational amplifier A through the first resistor R1, the second input end P2 of the compensation circuit 3 is connected with the non-inverting input end of the operational amplifier A, the reverse input end of the operational amplifier A is further connected with the output end of the operational amplifier A through the second resistor R2, and the output end of the operational amplifier A is electrically connected with the output end of the compensation circuit 3.
The voltage values of the non-inverting input terminal and the inverting input terminal of the operational amplifier a are approximately equal, and the input currents of the non-inverting input terminal and the inverting input terminal of the operational amplifier a are approximately 0. From this it can be determined:
Figure BDA0003787405200000041
and then, pushing out:
Figure BDA0003787405200000042
wherein Δ HAVDD is a voltage variation of the half-voltage input terminal HAVDD, Δ HAVDDo is a voltage variation of the half-voltage output terminal HAVDDo, R1 is a resistance value of the first resistor R1, and R2 is a resistance value of the second resistor R2.
In some embodiments, referring to fig. 2, the compensation circuit 3 further comprises: a second capacitor C2; the first end of the second capacitor C2 is connected to the positive input end of the operational amplifier a, and the second end of the second capacitor C2 is grounded. The second capacitor C2 is used for filtering the voltage of the positive input terminal of the operational amplifier a and filtering an alternating current component at the positive input terminal of the operational amplifier a.
In some embodiments, referring to fig. 2, the output of the operational amplifier a is connected to the output of the compensation circuit 3 through a third resistor R3. The third resistor R3 has a relatively small resistance value for suppressing small voltage fluctuations of the half-voltage input terminal HAVDD.
In some embodiments, referring to fig. 2, the output terminal Out of the compensation circuit 3 is grounded through a fourth resistor R4. The fourth resistor R4 may be a varistor and functions as an overvoltage protection.
In particular, also shown in fig. 2 is a third capacitor C3 for stabilizing the supply voltage (supplied by supply terminal AVDD) received by the operational amplifier a.
In an embodiment of the disclosure, the resistance of the first resistor R1 is 1K Ω, the resistance of the second resistor R2 is 102K Ω, the resistance of the third resistor R3 is 10 Ω, the capacitance of the first capacitor C1 is 100nF, the capacitance of the second capacitor C2 is 100nF, and the capacitance of the third capacitor C3 is 100nF. In the actually measured waveform of fig. 4, the half-voltage is always kept between the 0-gray-scale positive polarity voltage and the 0-gray-scale negative polarity voltage. The half-piezoelectric voltage is always smaller than the positive voltage of the 0 gray scale and is always larger than the negative voltage of the 0 gray scale, and the fluctuation amplitude of the half-piezoelectric voltage is also suppressed.
Whereas in the comparative example shown in fig. 3, the half-voltage fluctuation amplitude is large. The half voltage is greater than the 0 gray-scale positive polarity voltage even in some periods.
It can be determined that the compensation circuit 3 provided in the embodiment of the present disclosure effectively suppresses the fluctuation of the half-voltage, which is beneficial to the stability of the display screen.
In some embodiments, the driving circuit is used for driving the liquid crystal display panel 1, and the constant voltage output terminal to be stabilized is used for providing a half-voltage to the display driving chip 2, where the half-voltage is between the positive voltage of the 0 gray scale and the negative voltage of the 0 gray scale received by the display driving chip 2.
Based on the same inventive concept as the previous embodiment, referring to fig. 1, an embodiment of the present disclosure further provides a display device, which includes a display panel 1 and the previous driving circuit, wherein a display driving chip 2 in the driving circuit is used for driving the display panel 1.
In some embodiments, the display panel 1 is a liquid crystal display panel 1, and the constant voltage output terminal to be stabilized of the display driver chip is configured to provide a half-voltage to the display driver chip 2, where the half-voltage is between the positive polarity voltage of the 0 gray scale and the negative polarity voltage of the 0 gray scale received by the display driver chip 2.
In the embodiment of the disclosure, the display device can be any product or component with a display function, such as a display module, a display, a mobile phone, a tablet computer, a television, an electronic billboard, and the like.
The present disclosure does not limit the display type of the display device, and the display device may be, for example, a liquid crystal display device, a light emitting diode display device, or the like.
The embodiments in the disclosure are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments.
The scope of the present disclosure is not limited to the above-described embodiments, and it is apparent that various modifications and variations can be made to the present disclosure by those skilled in the art without departing from the scope and spirit of the present disclosure. It is intended that the present disclosure also cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.

Claims (8)

1. A driver circuit, comprising: power management circuit, compensating circuit and display driver chip, power management circuit treat that steady voltage constant voltage output is connected compensating circuit's first input, display driver chip treat that steady voltage constant voltage input is connected compensating circuit's second input and output, compensating circuit be used for with treat that the voltage fluctuation of steady voltage constant voltage input superposes in antiphase first input, in order to restrain treat the voltage fluctuation of steady voltage constant voltage input, wherein, compensating circuit's first input, second input and the direct current component of output equal.
2. The driving circuit according to claim 1, wherein the compensation circuit comprises: the circuit comprises a first capacitor, a first resistor, a second resistor and an operational amplifier; the first input end of the compensation circuit is respectively connected with the first end of the first capacitor and the output end of the compensation circuit, the second end of the first capacitor is connected with the reverse input end of the operational amplifier through the first resistor, the second input end of the compensation circuit is connected with the non-inverting input end of the operational amplifier, the reverse input end of the operational amplifier is further connected with the output end of the operational amplifier through the second resistor, and the output end of the operational amplifier is electrically connected with the output end of the compensation circuit.
3. The driving circuit of claim 2, wherein the compensation circuit further comprises: a second capacitor; the first end of the second capacitor is connected with the positive input end of the operational amplifier, and the second end of the second capacitor is grounded.
4. The driving circuit of claim 2, wherein the output terminal of the operational amplifier is connected to the output terminal of the compensation circuit through a third resistor.
5. The driving circuit of claim 2, wherein the output of the compensation circuit is connected to ground through a fourth resistor.
6. The driving circuit of claim 1, wherein the driving circuit is configured to drive a liquid crystal display panel, and the constant voltage output terminal to be stabilized is configured to provide a half-voltage to the display driving chip, wherein the half-voltage is between a positive polarity voltage of a 0 gray scale and a negative polarity voltage of the 0 gray scale received by the display driving chip.
7. A display device comprising a display panel and the driving circuit according to any one of claims 1 to 6, wherein a display driving chip in the driving circuit is configured to drive the display panel.
8. The display device according to claim 7, wherein the display panel is a liquid crystal display panel, the constant voltage output terminal to be stabilized is used for providing a half-voltage to the display driving chip, and the half-voltage is between a 0-gray scale positive polarity voltage and a 0-gray scale negative polarity voltage received by the display driving chip.
CN202210946143.6A 2022-08-08 2022-08-08 Driving circuit and display device Active CN115171623B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210946143.6A CN115171623B (en) 2022-08-08 2022-08-08 Driving circuit and display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210946143.6A CN115171623B (en) 2022-08-08 2022-08-08 Driving circuit and display device

Publications (2)

Publication Number Publication Date
CN115171623A true CN115171623A (en) 2022-10-11
CN115171623B CN115171623B (en) 2024-04-09

Family

ID=83478673

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210946143.6A Active CN115171623B (en) 2022-08-08 2022-08-08 Driving circuit and display device

Country Status (1)

Country Link
CN (1) CN115171623B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101311779A (en) * 2007-05-25 2008-11-26 群康科技(深圳)有限公司 LCD device
CN202110800U (en) * 2011-05-18 2012-01-11 京东方科技集团股份有限公司 Common voltage corrector, LCD drive device and LCD
CN104050942A (en) * 2014-06-10 2014-09-17 京东方科技集团股份有限公司 Common voltage driver compensation unit and method and display panel
CN106023877A (en) * 2016-08-15 2016-10-12 京东方科技集团股份有限公司 Public voltage adjusting circuit and method and display panel and device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101311779A (en) * 2007-05-25 2008-11-26 群康科技(深圳)有限公司 LCD device
CN202110800U (en) * 2011-05-18 2012-01-11 京东方科技集团股份有限公司 Common voltage corrector, LCD drive device and LCD
CN104050942A (en) * 2014-06-10 2014-09-17 京东方科技集团股份有限公司 Common voltage driver compensation unit and method and display panel
CN106023877A (en) * 2016-08-15 2016-10-12 京东方科技集团股份有限公司 Public voltage adjusting circuit and method and display panel and device

Also Published As

Publication number Publication date
CN115171623B (en) 2024-04-09

Similar Documents

Publication Publication Date Title
US11380282B2 (en) Gamma voltage generating circuit, driver circuit and display device
US20180240414A1 (en) Circuit for removing residual image after power-off, method for driving same, and display apparatus
TW200921597A (en) Display device and driving voltage compensation device for backlight module
CN109545123A (en) Voltage compensating circuit, its voltage compensating method, drive system and display device
US20120038413A1 (en) Voltage adjusting circuit and motherboard including the same
CN109256104A (en) Display device, display panel voltage source system and its circuit
CN101295470B (en) Gamma voltage output circuit and liquid crystal display device
CN115171623B (en) Driving circuit and display device
JP2013160823A (en) Gradation voltage generating circuit and liquid crystal display device
JP2006189593A (en) Liquid crystal display device
JP4575542B2 (en) LCD drive circuit
CN111223453A (en) Power supply module and display device
US11150760B2 (en) Touch analog front-end circuit and touch display apparatus thereof
CN112992064B (en) Light-emitting circuit, light-emitting component and display device
US11776455B2 (en) Driving chip and display apparatus
CN112382248B (en) Drive circuit and display device
US10319330B2 (en) Flicker control circuits for liquid crystal devices
CN113066440B (en) Voltage regulating circuit, display module and display device
US7825920B1 (en) Level regulation circuit of common signal of LCD
KR100228281B1 (en) Voltage generating circuit for liquid crystal display with constant voltage element
CN115390606A (en) Voltage regulator
KR20080001255A (en) Voltage converter and display device having the same
CN105261345A (en) T-CON load variation voltage control circuit, display panel and display device
KR20010058153A (en) Vcom circuit using regulator
CN102306487B (en) Level adjusting circuit of common signal of liquid crystal display (LCD)

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant