CN115167784A - Data writing method, device, equipment and storage medium - Google Patents

Abstract

The present application relates to the field of storage technology, and discloses a data writing method, apparatus, device and storage medium, including: writing target data into a cache of a third-party non-volatile random access memory connected to a target controller of a storage array space; the target data is the data input into the target controller; when the storage array is powered off abnormally, only the control components in the controller where the backup power module is located and the third party are not easily accessible through the backup power module set in the storage array. The volatile random access memory supplies power, so that the control component stores the target data written in the cache space of the third-party non-volatile random access memory to the non-volatile medium of the third-party non-volatile random access memory. In this application, when the storage array is abnormally powered down, the backup power module only needs to supply power to the third-party non-volatile random access memory and control components, so as to realize high-efficiency data writing under the miniaturization of the backup power module, while ensuring data reliability.

Description

A data writing method, device, equipment and storage medium

technical field

The present invention relates to the field of storage technology, and in particular, to a data writing method, apparatus, device and storage medium.

Background technique

As a storage array is a device for storing data, data reliability is extremely important. When the AC power input to the storage array device is abnormally powered off, the data in the memory of the storage controller is not written to the non-volatile medium and may be lost. Usually, the storage array device will have a built-in backup power module BBU (Battery Backup Unit) to provide backup power to ensure that the processor of the storage array saves the data in the memory to non-volatile media, such as hard disks, solid-state drives (SSDs) (Solid-State Disk) Wait.

In the prior art, if the storage array device loses power abnormally, the backup power module supplies power to the smallest unit of each controller, and the key components include: processors, memory sticks, SSD system disks, and Complex Programmable Logic Device (CPLD, Complex Programmable Logic Device). )Wait. With the high-performance design of the storage array controller, the power consumption of backup power is increasing, and the energy required by the backup power module is increasing. However, the energy density of the battery cells of the backup power module has not been significantly improved. The increase in the number of battery cells leads to an increasing volume of backup power modules, which is difficult to meet the design of storage array products.

Therefore, how to realize the miniaturization of the backup power module in the storage array is a technical problem to be solved urgently by those skilled in the art.

SUMMARY OF THE INVENTION

In view of this, the purpose of the present invention is to provide a data writing method, device, equipment and storage medium, which can realize high-efficiency data writing under the miniaturization of the backup power module, and at the same time ensure data reliability. Its specific plan is as follows:

A first aspect of the present application provides a data writing method, comprising:

Writing the target data into the cache space of a third-party non-volatile random access memory connected to the target controller of the storage array; wherein the target data is the data input into the target controller;

When the storage array is powered off abnormally, the backup power module disposed in the storage array only supplies power to the control component in the controller where the backup power module is located and the third-party non-volatile random access memory, so that the The control component stores the target data written in the cache space of the third-party non-volatile random access memory into a non-volatile medium of the third-party non-volatile random access memory.

Optionally, before writing the target data into the cache space of the third-party non-volatile random access memory connected to the storage array, the method further includes:

Controlling the server on the side of the target controller to input the target data to the target controller through the I/O interface, and write the target data into the cache space of the target controller;

After writing the target data into the cache space of the third-party non-volatile random access memory connected to the target controller of the storage array, the method further includes:

The data type of the target data in the cache space of the target controller is modified, so that the target data written in the cache space of the target controller can be cleared or replaced.

Optionally, after writing the target data into the cache space of the target controller, the method further includes:

Control the target controller to judge the I/O operation corresponding to the target data, and if it is a write operation, execute the step of writing the target data into the cache space of the third-party non-volatile random access memory .

Optionally, after writing the target data into the cache space of the third-party non-volatile random access memory connected to the storage array, the method further includes:

Controlling the target controller to analyze the target data to obtain management information of the target data, and sending the management information to other controllers in the storage array, so that the other controllers can manage according to the management information. Information is indexed to corresponding data from the third party non-volatile random access memory.

Optionally, the sending the management information to other controllers in the storage array includes:

The management information is sent to the cache space of other controllers in the storage array.

Optionally, after sending the management information to other controllers in the storage array, the method further includes:

The target controller is controlled to send confirmation information to the server, so that the server confirms that the writing operation is completed after receiving the confirmation information.

Optionally, after controlling the target controller to analyze the target data to obtain the management information of the target data, the method further includes:

Writing the management information into the cache space of the third-party non-volatile random access memory, so that the control component stores the target data in the non-volatile medium when the storage array is powered off abnormally At the same time, the control component stores the management information written in the cache space of the third-party non-volatile random access memory into the non-volatile medium at the same time.

Optionally, the data writing method further includes:

Setting up a plurality of the third-party non-volatile random access memories, and writing the target data in the cache spaces of the plurality of third-party non-volatile random access memories;

When the storage array is powered off abnormally, the plurality of backup power modules only supply power to the control component and at least one third-party non-volatile random access memory in the controller where the backup power modules are located, so that The control component stores the target data written in the cache space of the at least one third-party non-volatile random access memory into a non-volatile medium of the third-party non-volatile random access memory.

Optionally, the storage array is a dual-controller storage array, and the third-party non-volatile random access memory is a dual-port non-volatile random access memory; wherein the third-party non-volatile random access memory The two ports of the storage array are respectively connected with the two controllers in the storage array.

Optionally, each controller in the storage array is provided with the backup power module;

The supplying power only to the control component and the third-party non-volatile random access memory in the controller where the backup power module is located through the backup power module disposed in the storage array, including:

One controller is determined from all the controllers in the storage array as the backup power controller, and only the controller in the backup power controller is controlled by the backup power module in the backup power controller. components and the third-party non-volatile random access memory are powered.

Optionally, the control component stores the target data written in the cache space of the third-party non-volatile random access memory to the non-volatile medium of the third-party non-volatile random access memory , which also includes:

The control component generates a first storage instruction and sends the first storage instruction to the main control chip in the third-party non-volatile random access memory, so that the main control chip can store the instruction according to the first storage instruction The target data written in the cache space of the third-party non-volatile random access memory is stored in the non-volatile medium of the third-party non-volatile random access memory.

Optionally, the control component stores the target data written in the cache space of the third-party non-volatile random access memory to the non-volatile medium of the third-party non-volatile random access memory After that, it also includes:

The control component generates a shutdown command and executes the shutdown command, so that the backup power module in the backup power controller stops supplying power to the control component and the third-party non-volatile random access memory.

A second aspect of the present application provides a data writing device, comprising:

a first cache module, used to write target data into the cache space of a third-party non-volatile random access memory connected to a target controller of a storage array; wherein the target data is data input into the target controller ;

The backup power cache module is used for when the storage array is abnormally powered down, the backup power module arranged in the storage array only checks the control components in the controller where the backup power module is located and the third-party non-volatile The random access memory supplies power, so that the control component stores the target data written in the cache space of the third-party non-volatile random access memory to the non-volatile memory of the third-party non-volatile random access memory. in a volatile medium.

A third aspect of the present application provides an electronic device, which includes a processor and a memory; wherein the memory is used to store a computer program, and the computer program is loaded and executed by the processor to implement the aforementioned data writing enter method.

A fourth aspect of the present application provides a computer-readable storage medium, where computer-executable instructions are stored in the computer-readable storage medium, and when the computer-executable instructions are loaded and executed by a processor, the aforementioned data writing is implemented method.

In this application, the target data is first written into the cache space of the third-party non-volatile random access memory connected to the target controller of the storage array; wherein, the target data is the data input into the target controller; when If the storage array is abnormally powered off, the backup power module provided in the storage array only supplies power to the control component in the controller where the backup power module is located and the third-party non-volatile random access memory, so that all The control component stores the target data written in the cache space of the third-party non-volatile random access memory into a non-volatile medium of the third-party non-volatile random access memory. It can be seen that the present application introduces a third-party non-volatile random access memory that has both a cache and a non-volatile medium. When using the storage array to write data, it is simultaneously written into the cache of the third-party non-volatile random access memory. When the storage array is powered off abnormally, the backup power module only needs to supply power to the third-party non-volatile random access memory and the control component, and under the instruction of the control component, the data in the cache is written to the non-volatile medium again, and the backup power The backup power consumption of the module is not affected by the high-performance design of the storage array controller, which can reduce the backup power consumption, realize the miniaturization of the backup power module, and ensure the data writing efficiency and data reliability.

Description of drawings

In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the accompanying drawings in the following description are only It is an embodiment of the present invention. For those of ordinary skill in the art, other drawings can also be obtained according to the provided drawings without creative work.

1 is a flowchart of a data writing method provided by the application;

2 is a schematic diagram of a specific data writing method provided by the application;

3 is a data writing architecture diagram of a dual-controller storage array provided by the present application;

4 is a flowchart of a specific data writing method provided by the application;

FIG. 5 provides a prior art dual-control storage array I/O data write operation flow structure provided by the present application;

FIG. 6 provides the application for a dual-control storage array I/O data write operation process architecture in the solution of the application;

7 is a schematic structural diagram of a data writing device provided by the application;

FIG. 8 is a structural diagram of a data writing electronic device provided by the present application.

Detailed ways

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

At present, if the storage array device loses power abnormally, the built-in backup power module (BBU) of the storage array device usually provides backup power for the smallest unit of each controller, ensuring that the processor of the storage array saves the data in the memory to the non-volatile sexual medium. However, with the high-performance design of the storage array controller, the power consumption of the backup power is increasing, and the energy required by the backup power module is increasing. The increase in the number of battery cells required for the storage array results in an increasing volume of backup power modules, making it difficult to meet the requirements of storage array product design. In view of the above technical defects, the present application provides a data writing solution. When the storage array is abnormally powered down, the backup power module only needs to supply power to the third-party non-volatile random access memory and control components, thereby realizing the miniaturization of the backup power module. high-efficiency data writing, while ensuring data reliability.

FIG. 1 is a flowchart of a data writing method provided by an embodiment of the present application. Referring to Figure 1, the data writing method includes:

S11: Write target data into a cache space of a third-party non-volatile random access memory connected to a target controller of the storage array; wherein the target data is data input into the target controller.

In this embodiment, the storage array includes a plurality of controllers, data disk SSDs, and third-party non-volatile random access memory. The third-party non-volatile random access memory is connected to a plurality of the controllers, so that data can be stored synchronously through the third-party non-volatile random access memory. The third-party non-volatile random access memory is represented as NVRAM (NON-Volatile Random Access Memory), which is a random access memory that can retain data even after a power failure. The third-party non-volatile random access memory includes a cache (such as DRAM) and a non-volatile medium (such as Flash), wherein the DRAM is set to improve cache efficiency.

In this embodiment, when the server inputs target data to the target controller of the storage array, the target data is written into the cache space of the third-party non-volatile random access memory connected to the target controller. The target data is data input into the target controller of the storage array, and is generally I/O data.

Specifically, the storage array is a dual-controller storage array, and the third-party non-volatile random access memory is a dual-port non-volatile random access memory. Wherein, the two ports of the third-party non-volatile random access memory are respectively connected with the two controllers in the storage array. That is, the above storage array includes dual controllers. The storage array system design supports dual controllers to access dual-port NVRAM disks, and the DRAM capacity of the NVRAM disk is large enough (eg, greater than 16GB) to meet the storage array write cache space requirements. In this case, the controller and processor can directly read and write the DRAM space of the NVRAM disk, similar to the processor operating on the remote memory. The I/O read and write operations have extremely low latency, which is consistent with the performance of traditional storage arrays. .

S12: When the storage array is powered off abnormally, the backup power module disposed in the storage array only supplies power to the control component in the controller where the backup power module is located and the third-party non-volatile random access memory , so that the control component stores the target data written in the cache space of the third-party non-volatile random access memory into the non-volatile medium of the third-party non-volatile random access memory.

In this embodiment, the power supply of the backup power module of the storage array spans the backplane and can supply power to the NVRAM disk. When the storage array is powered off abnormally, the backup power module disposed in the storage array only supplies power to the control component in the controller where the backup power module is located and the third-party non-volatile random access memory, so that the The control component stores the target data written in the cache space of the third-party non-volatile random access memory into a non-volatile medium of the third-party non-volatile random access memory.

It can be understood that the controller of the storage array is provided with a backup power module, and any backup power module in the controller can be selected to supply power according to actual conditions, which is not limited in this embodiment. If the storage array is powered off abnormally, the backup power module only needs to supply power to the NVRAM disk and the control components of the controller, such as the CPLD, and the CPLD notifies the NVRAM disk to write the target data (I/O data) written in its DRAM. ) into its Flash.

Further, in order to improve the system storage fault tolerance rate and avoid data loss caused by damage to the NVRAM disk, in this embodiment, multiple third-party non-volatile random access memories may be set, and multiple third-party non-volatile random access The target data is written in the cache space of the access memory. When the storage array is powered off abnormally, the plurality of backup power modules only supply power to the control component and at least one third-party non-volatile random access memory in the controller where the backup power modules are located, so that The control component stores the target data written in the cache space of the at least one third-party non-volatile random access memory into a non-volatile medium of the third-party non-volatile random access memory.

It can be seen that in this embodiment of the present application, the target data is first written into the cache space of the third-party non-volatile random access memory connected to the target controller of the storage array; wherein the target data is input to the target controller of the storage array When the storage array is abnormally powered down, the backup power module arranged in the storage array will only access the control components in the controller where the backup power module is located and the third-party non-volatile random access memory. supplying power, so that the control component stores the target data written in the cache space of the third-party non-volatile random access memory to the non-volatile medium of the third-party non-volatile random access memory middle. The embodiment of the present application introduces a third-party non-volatile random access memory that has both a cache and a non-volatile medium. When data is written by using the storage array, it is simultaneously written into the cache of the third-party non-volatile random access memory. When the storage array is powered off abnormally, the backup power module only needs to supply power to the third-party non-volatile random access memory and the control component, and under the instruction of the control component, the data in the cache is written to the non-volatile medium again, and the backup power The backup power consumption of the module is not affected by the high-performance design of the storage array controller, which can reduce the backup power consumption, realize the miniaturization of the backup power module, and ensure the data writing efficiency and data reliability.

FIG. 2 is a flowchart of a specific data writing method provided by an embodiment of the present application. Referring to Figure 2, the data writing method includes:

S21: The server on the target controller side that controls the storage array inputs the target data to the target controller through an I/O interface, and writes the target data into the cache space of the target controller.

In this embodiment, the target data input into the storage array is generally written by the server on the host side. First, the server on the target controller side of the storage array is controlled to input the target data to the target controller through the I/O interface. FIG. 3 is a data writing architecture diagram of a dual-controller storage array provided in this embodiment, including two controllers (controller 0 and controller 1), and two NVRAM disks (NVRAM disk 0 and NVRAM disk 1) and multiple (X) I/O cards. The server 0 in FIG. 3 is the server on the target controller side, and the controller 0 is the target memory. The target data input to the target memory is directly written into the cache space of the target controller. That is, the host-side server writes the I/O data into the DRAM (DDR) of the controller 0, and the controller 0 analyzes the I/O data type, purpose, updated or saved address, etc.;

S22: Control the target controller to judge the I/O operation corresponding to the target data, and if it is a write operation, write the target data into a third-party non-volatile operation connected to the target controller of the storage array Cache space of volatile random access memory.

S23: Modify the data type of the target data in the cache space of the target controller, so that the target data written in the cache space of the target controller can be cleared or replaced.

In this embodiment, after the target data is written into the cache space of the target controller, the target controller is controlled to judge the I/O operation corresponding to the target data. The target data is written into a cache space of a third-party non-volatile random access memory connected to a target controller of the storage array. If it is judged that the I/O operation is of the Write type, the controller 0 keeps the written target data in its DRAM, and writes it into the DRAM of the NVRAM disk.

In this embodiment, the data type of the target data in the cache space of the target controller is modified at the same time, so that the target data written in the cache space of the target controller can be cleared or replaced. For example, the controller 0 changes the I/O data in its DRAM to the Read type, after which the target data of the Read type can be cleared or replaced.

S24: Control the target controller to analyze the target data to obtain management information of the target data, and send the management information to other controllers in the storage array, so that the other controllers can follow the required The management information is indexed to corresponding data from the third-party non-volatile random access memory.

In this embodiment, in order to synchronize the target data to other controllers in the storage array, the target data also needs to be analyzed to obtain management information of the target data. That is, the target controller is controlled to analyze the target data to obtain management information of the target data. Specifically, after writing the I/O data to the DRAM of the controller 0, the controller 0 needs to analyze the I/O data type, usage, updated or saved address, etc., which is the management information. The management information acts as a data index, and the management information is sent to other controllers in the storage array, so that other controllers can access non-volatile random access from the third party according to the management information The corresponding data is indexed into the memory.

S25: Write the management information into the cache space of the third-party non-volatile random access memory, so that the control component stores the target data in the non-volatile memory when the storage array is powered off abnormally When stored in the medium, the control component simultaneously stores the management information written in the cache space of the third-party non-volatile random access memory into the non-volatile medium.

In this embodiment, in order to avoid the loss of the management information in the DRAM of each controller during an abnormal power failure, the management information may be written into the cache space of the third-party non-volatile random access memory, so that the When the control component stores the target data in the non-volatile medium when the storage array is abnormally powered off, the control component simultaneously writes the third-party non-volatile random access memory into the cache space The management information is stored in the non-volatile medium. After the power is restored, when the server needs to read the target data, it first writes the data in the non-volatile medium and the corresponding management information into the DRAM of the NVRAM disk, and then writes the NVRAM disk to the DRAM. The management information in the DRAM can be written into the controller of the server input read operation. It should be noted that the execution order of step S22-step S26 is not fixed.

S26: Control the target controller to send confirmation information to the server, so that the server confirms that the writing operation is completed after receiving the confirmation information.

In this embodiment, after the management information is written into other controllers of the storage array, the target controller needs to be further controlled to send confirmation information to the server, so that the server confirms the confirmation after receiving the confirmation information The write operation is complete. That is, in the complete storage array I/O data write operation process, controller 0 needs to send information to the server on the host side to confirm that the I/O write operation is completed, and the server confirms the end of the write operation.

S27: When the storage array is powered off abnormally, the backup power module disposed in the storage array only supplies power to the control component in the controller where the backup power module is located and the third-party non-volatile random access memory , so that the control component stores the target data written in the cache space of the third-party non-volatile random access memory into the non-volatile medium of the third-party non-volatile random access memory.

In this embodiment, for the specific process of the foregoing step S27, reference may be made to the corresponding content disclosed in the foregoing embodiments, which will not be repeated here.

It can be seen that in this embodiment of the present application, the server on the target controller side of the storage array is first controlled to input the target data to the target controller through the I/O interface, and write the target data into the cache space of the target controller . Controlling the target controller to analyze the target data to obtain management information of the target data, and controlling the target controller to judge the I/O operation corresponding to the target data according to the management information. operation, the target data is written into the cache space of the third-party non-volatile random access memory connected to the target controller of the storage array. The management information is sent to other controllers in the storage array, so that other controllers can index corresponding data from the third-party non-volatile random access memory according to the management information. On this basis, the data type of the target data in the cache space of the target controller is modified, so that the target data written into the cache space of the target controller can be cleared or replaced. Finally, the target controller is controlled to send confirmation information to the server, so that the server confirms that the writing operation is completed after receiving the confirmation information. The above solution has high performance in the writing process, low latency, and high reliability of redundant data backup.

FIG. 4 is a flowchart of a specific data writing method provided by an embodiment of the present application. Referring to Figure 4, the data writing method includes:

S31: Write target data into a cache space of a third-party non-volatile random access memory connected to a target controller of the storage array; wherein the target data is data input into the target controller.

For the specific process of the foregoing step S31, reference may be made to the corresponding content disclosed in the foregoing embodiments, which will not be repeated here.

S32: When the storage array is powered off abnormally, determine one controller from all the controllers in the storage array as the backup power controller, and use the backup power module in the backup power controller to only perform power on all controllers in the storage array. The control components in the backup power controller and the third-party non-volatile random access memory provide power.

In this embodiment, each controller in the storage array is provided with the backup power module. When the storage array is powered off abnormally, a controller is determined from all the controllers in the storage array as a backup power controller, and the backup power module in the backup power controller controls the backup power The control components in the controller and the third-party non-volatile random access memory are powered. Generally, the controller that accepts the I/O data of the server on the host side can be selected, such as the controller 0 in FIG. 3 , that is, the controller 0 in FIG. 3 can be used as the backup power controller. The backup power module supplies power to the CPLD component and the NVRAM disk in the backup power controller.

S33: The control component generates a first storage instruction and sends the first storage instruction to the main control chip in the third-party non-volatile random access memory, so that the main control chip The storing instruction stores the target data written in the cache space of the third-party non-volatile random access memory into the non-volatile medium of the third-party non-volatile random access memory.

In this embodiment, after power is supplied, the control component generates a first storage instruction and sends the first storage instruction to a main control chip in the third-party non-volatile random access memory, and the main control chip Can be the master controller for SSD. The SSD master stores the target data written in the cache space of the third-party non-volatile random access memory to the non-volatile memory of the third-party non-volatile random access memory according to the first storage instruction in sexual medium. That is, if the storage array is abnormally powered down, in the above steps, the backup power module only needs to supply power to the NVRAM disk and the CPLD of the controller. The CPLD informs the NVRAM disk through the system to write the I/O data in its DRAM into its Flash.

S34: The control component generates a shutdown instruction and executes the shutdown instruction, so that the backup power module in the backup power controller stops performing operations on the control component and the third-party non-volatile random access memory powered by.

In this embodiment, after the write I/O data is safely stored, the backup power module will be turned off to stop power supply. Specifically, the control component generates a shutdown instruction and executes the shutdown instruction, so that the backup power module in the backup power controller stops the control component and the third-party non-volatile random access memory Power supply, that is, the system shuts down the backup power module through the CPLD.

In this embodiment, when the storage array is powered off abnormally, one controller is determined from all the controllers in the storage array as the backup power controller, and the backup power module in the backup power controller is passed through the controller. Power is supplied to the control components in the backup power controller and the third-party non-volatile random access memory. After power is supplied, the control component generates a first storage instruction and sends the first storage instruction to the main control chip in the third-party non-volatile random access memory, so that the main control chip can A storage instruction stores the target data written in the cache space of the third-party non-volatile random access memory into the non-volatile medium of the third-party non-volatile random access memory. After the data is securely written, the control component generates a shutdown command and executes the shutdown command, so that the backup power module in the backup power controller stops the non-volatile operation of the control component and the third party. Random access memory is powered. The system uses the control components in the controller to turn on the backup power module as a third-party non-volatile random access memory and close the backup power module to improve the controllability of the backup power.

The following is a comparative description of the effect of the existing storage array I/O data write operation and the effect of the storage array I/O data write operation based on the above solution in this embodiment, highlighting the advantages of the solution of the present application.

FIG. 5 is a flow structure of an I/O data write operation of a dual-control storage array in the prior art. After judging that the I/O is of the Write type, the controller 0 keeps its DRAM, and then writes the I/O data to the DRAM of the controller 0 through the PCIe mirror channel to make redundant data backup. Under this design, a single controller supports 2 processors, 32 DDR5 memory sticks, and an SSD system disk, and the backup power consumption is increasing (see Table 1). The power consumption of a single controller is 1000W when backing up. If you choose a 18650 ternary lithium battery, you need 12 cells to form 4 strings and 3 parallels.

Table 1

device Single power consumption (W) quantity Power consumption (W) processor 350 2 700 RAM 10 32 320 SSD 15 1 15 CPLD 3 1 3 total 1038

FIG. 6 is a flow structure of the I/O data writing operation of the dual-control storage array in the solution of the application. The server on the host side writes the I/O data into the DRAM of controller 0, and controller 0 analyzes the I/O data type, purpose, address to update or save, etc.; DRAM, and write into DRAM of NVRAM disk; I/O data in controller 0 ERAM becomes Read type, which can be cleared or replaced; controller 0 synchronizes management information to controller 1, such as I/O data type , data size, address, location address stored in the NVRAM and other information to ensure that the controller 1 can directly obtain the I/O data in the NVRAM disk. Controller 0 sends information to the server on the host side to confirm that the I/O write operation is completed; the server confirms that the write operation is complete. In the above process, the I/O write operation process of the storage array removes the dual-control data mirror synchronization operation, and directly writes to the NVRAM disk DRAM to complete the I/O write operation. When the storage array is powered off abnormally, the backup power module only needs to supply power to the NVRAM and the controller CPLD, ensuring that the data in the NVRAM DRAM is safely written into the NVRAM Flash medium, realizing the miniaturization of the backup power module of the storage array controller and reducing the number of battery cells. Quantity, reduce the weight of the whole machine, free up more space, optimize system heat dissipation, or the controller supports higher specification processors, more I/O cards, etc.

In the solution of the present application, the backup power module only needs to supply power to fewer devices such as the NVRAM disk and the CPLD of the controller, which can realize the miniaturization of the backup power module and reduce the quality of the whole machine. As shown in Table 2, the power consumption of a single controller for backup power is less than 100W. If you choose 18650 ternary lithium batteries, only 3 cells are needed to form 3 strings and 1 parallel; the number of cells is reduced by 75%, which greatly reduces the volume of the backup power module, weight and cost.

Table 2

device Single power consumption (W) quantity Power consumption (W) NVRAM 20 2 40 CPLD 3 1 3 total 43

It is understandable that batteries store electric charges and are sensitive to temperature and humidity, which is dangerous to some extent. If the number of cells in the backup power module is large, the failure rate will increase. When the ternary lithium battery exceeds 12 cells, the rated power is at risk of exceeding 100Wh, and air transportation may not be allowed. After the backup power module is miniaturized, the number of cells is reduced, the failure rate is reduced, and there is no risk of air transportation control. After the size of the backup power module is reduced, it can optimize the heat dissipation of the storage array, free up more space to support processors with higher power consumption, support more I/O cards, etc., and improve product specifications.

Referring to FIG. 7 , an embodiment of the present application also discloses a data writing device correspondingly, including:

The first cache module 11 is used to write the target data into the cache space of the third-party non-volatile random access memory connected to the target controller of the storage array; wherein, the target data is input into the target controller. data;

The backup power cache module 12 is used for, when the storage array is abnormally powered off, the backup power module arranged in the storage array only checks the control components in the controller where the backup power module is located and the third-party non-volatile The non-volatile random access memory is powered, so that the control component stores the target data written in the cache space of the third-party non-volatile random access memory to the non-volatile random access memory of the third-party non-volatile random access memory. in volatile media.

It can be seen that in this embodiment of the present application, the target data is first written into the cache space of the third-party non-volatile random access memory connected to the target controller of the storage array; wherein, the target data is the data input into the target controller When the storage array is abnormally powered down, the backup power module arranged in the storage array only supplies power to the control component and the third-party non-volatile random access memory in the controller where the backup power module is located, The control component is caused to store the target data written in the cache space of the third-party non-volatile random access memory into a non-volatile medium of the third-party non-volatile random access memory. The embodiment of the present application introduces a third-party non-volatile random access memory that has both a cache and a non-volatile medium. When data is written by using the storage array, it is simultaneously written into the cache of the third-party non-volatile random access memory. When the storage array is powered off abnormally, the backup power module only needs to supply power to the third-party non-volatile random access memory and the control component, and under the instruction of the control component, the data in the cache is written to the non-volatile medium again, and the backup power The backup power consumption of the module is not affected by the high-performance design of the storage array controller, which can reduce the backup power consumption, realize the miniaturization of the backup power module, and ensure the data writing efficiency and data reliability.

In some specific embodiments, the data writing device further includes:

a second cache module, configured to control the server on the target controller side to input the target data to the target controller through an I/O interface, and write the target data into the cache space of the target controller;

The operation type judgment module is used to control the target controller to judge the I/O operation corresponding to the target data, and if it is a write operation, execute writing the target data into the third-party non-volatile random the step of accessing the cache space of the memory;

a data type modification module, configured to modify the data type of the target data, so that the target data written in the cache space of the target controller can be cleared or replaced;

a data analysis module, configured to control the target controller to analyze the target data to obtain management information of the target data;

The first sending module is configured to send the management information to other controllers in the storage array, so that the other controllers can index from the third-party non-volatile random access memory to the third-party non-volatile random access memory according to the management information. corresponding data;

A second sending module, configured to write the management information into the cache space of the third-party non-volatile random access memory, so that the control component stores the target data to the third-party non-volatile random access memory when the storage array is powered off abnormally. When stored in the non-volatile medium, the control component simultaneously stores the management information written in the cache space of the third-party non-volatile random access memory into the non-volatile medium;

a write feedback module, configured to control the target controller to send confirmation information to the server, so that the server confirms that the write operation is completed after receiving the confirmation information;

A memory backup module, configured to set a plurality of the third-party non-volatile random access memories, and write the target data in the cache spaces of the plurality of third-party non-volatile random access memories; when the storage array In case of abnormal power failure, the plurality of backup power modules only supply power to the control component and at least one third-party non-volatile random access memory in the controller where the backup power modules are located, so that the control The component stores the target data written in the cache space of at least one of the third-party non-volatile random access memory into a non-volatile medium of the third-party non-volatile random access memory.

In some specific embodiments, the first sending module is specifically configured to send the management information to the cache space of other controllers in the storage array.

In some specific embodiments, the backup power cache module 12 specifically includes:

The backup power module selection unit is used to determine one controller from all the controllers in the storage array as the backup power controller, and use the backup power module in the backup power controller to select only the backup power controller. the control component in the electrical controller and the third-party non-volatile random access memory for power supply;

a cache unit, used for the control component to generate a first storage instruction and issue the first storage instruction to the main control chip in the third-party non-volatile random access memory, so that the main control chip can The first storage instruction stores the target data written in the cache space of the third-party non-volatile random access memory into the non-volatile medium of the third-party non-volatile random access memory .

In some specific embodiments, the data writing device further includes:

Stop the backup power module, for the control component to generate a shutdown command and execute the shutdown command, so that the backup power module in the backup power controller stops the non-volatile operation of the control component and the third party powered by random access memory.

Further, the embodiments of the present application also provide an electronic device. FIG. 8 is a structural diagram of an electronic device 20 according to an exemplary embodiment, and the contents in the diagram should not be considered as any limitation on the scope of use of the present application.

FIG. 8 is a schematic structural diagram of an electronic device 20 according to an embodiment of the present application. The electronic device 20 may specifically include: at least one processor 21 , at least one memory 22 , a power supply 23 , a communication interface 24 , an input and output interface 25 and a communication bus 26 . Wherein, the memory 22 is used to store a computer program, and the computer program is loaded and executed by the processor 21 to implement relevant steps in the data writing method disclosed in any of the foregoing embodiments. In addition, the electronic device 20 in this embodiment may be 8 specifically.

In this embodiment, the power supply 23 is used to provide working voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows is applicable Any communication protocol in the technical solution of the present application is not specifically limited here; the input and output interface 25 is used to obtain external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, here No specific limitation is made.

In addition, as a carrier for resource storage, the memory 22 can be a read-only memory, a random access memory, a magnetic disk or an optical disk, etc. The resources stored on it can include the operating system 221, the computer program 222, the data 223, etc., and the storage method can be short-term storage. or permanent storage.

The operating system 221 is used to manage and control each hardware device and computer program 222 on the electronic device 20, so as to realize the operation and processing of the massive data 223 in the memory 22 by the processor 21, which can be Windows Server, Netware, Unix, Linux etc. The computer program 222 may further include a computer program that can be used to complete other specific tasks in addition to the computer program that can be used to complete the data writing method performed by the electronic device 20 disclosed in any of the foregoing embodiments. Data 223 may include target data collected by electronic device 20 .

Further, an embodiment of the present application also discloses a storage medium, where a computer program is stored in the storage medium, and when the computer program is loaded and executed by a processor, the steps of the data writing method disclosed in any of the foregoing embodiments are implemented. .

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments may be referred to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant part can be referred to the description of the method.

Finally, it should also be noted that in this document, relational terms such as first and second are used only to distinguish one entity or operation from another, and do not necessarily require or imply these entities or that there is any such actual relationship or sequence between operations. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device that includes a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in a process, method, article or apparatus that includes the element.

The data writing method, device, device and storage medium provided by the present invention have been described in detail above. Specific examples are used in this paper to illustrate the principles and implementations of the present invention. The descriptions of the above embodiments are only used to help understanding The method of the present invention and its core idea; at the same time, for those skilled in the art, according to the idea of the present invention, there will be changes in the specific implementation and application scope. In summary, the content of this specification should not be It is understood as a limitation of the present invention.

Claims (15)

1. A method of writing data, comprising:

writing the target data into a cache space of a third-party nonvolatile random access memory connected with a target controller of the storage array; wherein the target data is data input into the target controller;

when the storage array is abnormally powered off, the standby power module arranged in the storage array only supplies power to the control component in the controller where the standby power module is located and the third-party nonvolatile random access memory, so that the control component stores the target data written in the cache space of the third-party nonvolatile random access memory into the nonvolatile medium of the third-party nonvolatile random access memory.

2. The data writing method according to claim 1, wherein before writing the target data into the cache space of the third-party nonvolatile random access memory connected to the storage array, the method further comprises:

controlling a server on the side of the target controller to input the target data to the target controller through an I/O (input/output) interface and writing the target data into a cache space of the target controller;

after the target data is written into the cache space of the third-party nonvolatile random access memory connected with the target controller of the storage array, the method further comprises the following steps:

and modifying the data type of the target data in the cache space of the target controller so that the target data written into the cache space of the target controller can be cleared or replaced.

3. The data writing method according to claim 2, wherein after the writing the target data into the cache space of the target controller, further comprising:

and controlling the target controller to judge the I/O operation corresponding to the target data, and if the I/O operation is a write operation, executing the step of writing the target data into the cache space of the third-party nonvolatile random access memory.

4. The data writing method according to claim 2, wherein after the writing the target data into the cache space of the target controller, further comprising:

and controlling the target controller to analyze the target data to obtain management information of the target data, and sending the management information to other controllers in the storage array so as to index corresponding data from the third-party nonvolatile random access memory through the other controllers according to the management information.

5. The data writing method according to claim 4, wherein the sending the management information to other controllers in the storage array comprises:

and sending the management information to the cache spaces of other controllers in the storage array.

6. The data writing method according to claim 4, wherein after sending the management information to other controllers in the storage array, further comprising:

and controlling the target controller to send confirmation information to the server so that the server confirms that the writing operation is completed after receiving the confirmation information.

7. The data writing method according to claim 4, wherein after the target controller is controlled to analyze the target data to obtain the management information of the target data, the method further comprises:

and writing the management information into a cache space of the third-party nonvolatile random access memory, so that when the control component stores the target data into the nonvolatile medium due to abnormal power failure of the storage array, the control component simultaneously stores the management information written into the cache space of the third-party nonvolatile random access memory into the nonvolatile medium.

8. The data writing method according to claim 1, further comprising:

setting a plurality of third-party nonvolatile random access memories, and writing the target data in cache spaces of the plurality of third-party nonvolatile random access memories;

when the storage array is abnormally powered off, the control assembly in the controller of the power backup module and the at least one third-party nonvolatile random access memory are only powered by the plurality of power backup modules, so that the control assembly stores the target data written in the cache space of the at least one third-party nonvolatile random access memory into the nonvolatile medium of the third-party nonvolatile random access memory.

9. The data writing method according to claim 1, wherein the memory array is a dual controller memory array, and the third-party nonvolatile random access memory is a dual port nonvolatile random access memory; and two ports of the third-party nonvolatile random access memory are respectively connected with two controllers in the storage array.

10. The data writing method according to any one of claims 1 to 9, wherein the standby power module is provided in each controller in the storage array;

the power supply for only the control component in the controller where the power supply module is located and the third-party nonvolatile random access memory through the power supply module arranged in the storage array comprises:

determining one controller from all controllers in the storage array as a standby power controller, and only supplying power to the control component in the standby power controller and the third-party nonvolatile random access memory through the standby power module in the standby power controller.

11. The data writing method according to claim 10, wherein the control component stores the target data written in the cache space of the third-party nonvolatile random access memory into a nonvolatile medium of the third-party nonvolatile random access memory, further comprising:

the control component generates a first storage instruction and issues the first storage instruction to a main control chip in the third-party nonvolatile random access memory, so that the main control chip stores the target data written in the cache space of the third-party nonvolatile random access memory into the nonvolatile medium of the third-party nonvolatile random access memory according to the first storage instruction.

12. The data writing method according to claim 10, wherein after the control component stores the target data written in the cache space of the third-party nonvolatile random access memory into the nonvolatile medium of the third-party nonvolatile random access memory, the method further comprises:

the control component generates a closing instruction and executes the closing instruction, so that the power standby module in the power standby controller stops supplying power to the control component and the third-party nonvolatile random access memory.

13. A data writing apparatus, comprising:

the first cache module is used for writing the target data into a cache space of a third-party nonvolatile random access memory connected with a target controller of the storage array; wherein the target data is data input into the target controller;

and the standby power cache module is used for supplying power to the control component in the controller of the standby power module and the third-party nonvolatile random access memory only through the standby power module arranged in the storage array when the storage array is abnormally powered down, so that the control component stores the target data written in the cache space of the third-party nonvolatile random access memory into the nonvolatile medium of the third-party nonvolatile random access memory.

14. An electronic device, comprising a processor and a memory; wherein the memory is used for storing a computer program which is loaded and executed by the processor to implement the data writing method according to any one of claims 1 to 12.

15. A computer-readable storage medium storing computer-executable instructions which, when loaded and executed by a processor, implement a data writing method as claimed in any one of claims 1 to 12.

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