CN115145834A - Data management method, device and equipment of Flash memory and storage medium - Google Patents
Data management method, device and equipment of Flash memory and storage medium Download PDFInfo
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- CN115145834A CN115145834A CN202210716514.1A CN202210716514A CN115145834A CN 115145834 A CN115145834 A CN 115145834A CN 202210716514 A CN202210716514 A CN 202210716514A CN 115145834 A CN115145834 A CN 115145834A
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- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
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Abstract
The invention discloses a data management method, a device, terminal equipment and a computer storage medium of a Flash memory, wherein the data management method of the Flash memory is applied to a nand Flash memory, the nand Flash memory is connected with a host, and the data management method of the Flash memory comprises the following steps: receiving a data management instruction sent by the host, and determining a source physical address of data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction; operating the target logic interval address of the data to be managed according to the source physical address so as to manage the data to be managed; wherein, the source logical interval address and the target logical address are both contained in the data management instruction. The invention can realize the management of the data stored in the nand flash memory, and save the time of the host for copying or cutting the data.
Description
Technical Field
The present invention relates to the field of memory technologies, and in particular, to a data management method and apparatus for a Flash memory, a terminal device, and a computer storage medium.
Background
In recent years, with the rapid development of flash memory technology, flash memories such as nand flash (a flash memory) are rapidly applied in embedded systems due to their advantages of high performance, non-volatility, low energy consumption, and the like, and become mainstream high-performance memory technology.
In the prior art, when a host copies data of one logic interval to another logic interval, data stored in a nand flash memory is read from a source logic interval first, and then the data is written into a target logic interval, or when the host clips the data of one logic interval to another logic interval, the data stored in the nand flash memory is read from the source logic interval first, and then the data is written into the target logic interval, and then the source data stored in the nand flash memory is erased by using an erase instruction. That is, when the host performs management operations such as reading or cutting on data stored in the nand flash memory, the data needs to be transferred back and forth between the host and the storage device, which is very time consuming.
Disclosure of Invention
The invention mainly aims to provide a data management method and device of a Flash memory, a terminal device and a computer storage medium, aiming at saving the time of copying or cutting data by a host when the data stored in a nand Flash memory is managed.
In order to achieve the above object, the present invention provides a data management method for a Flash memory, which is characterized in that the data management method for the Flash memory is applied to a nand Flash memory, the nand Flash memory is connected with a host, and the data management method for the Flash memory comprises the following steps:
receiving a data management instruction sent by the host, and determining a source physical address of the data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction;
operating aiming at the target interval logical address of the data to be managed according to the source physical address so as to manage the data to be managed;
wherein the source logical interval address and the target logical address are both included in the data management instruction.
Optionally, the step of determining, according to the source logical interval address of the data to be managed to which the data management instruction points, the source physical address of the data to be managed in the nand flash memory includes:
determining the source logic interval address of the data to be managed, which is pointed by the data management instruction, in a preset mapping table;
and determining the source physical address of the data to be managed in the nand flash memory according to the source logical interval address in the mapping table.
The data management instructions include: a data copy instruction, where the step of operating on the target logical address of the data to be managed according to the source physical address includes:
and determining a null physical address in the nand flash memory according to the source physical address and the data copy instruction so as to operate aiming at the target logical address of the data to be managed.
Determining a corresponding target physical address in the nand flash memory according to the empty physical space;
and determining the target logical interval address of the data to be managed in the mapping table, and mapping the target logical interval address to the target physical space.
Optionally, the step of determining an empty physical space in the nand flash memory according to the source physical address and the data copy instruction includes:
determining the data content of the data to be managed in the nand flash memory according to the source physical address and the data copying instruction;
and determining the empty physical space in the nand flash memory according to the data capacity of the data content.
Optionally, after the step of determining the empty physical space in the nand flash memory according to the data content, the method further comprises:
copying the data content of the data to be managed to the empty physical space of the nand flash memory.
Optionally, the data management instruction includes: the step of operating the target logical address of the data to be managed according to the source physical address includes:
determining the target logic interval address of the data to be managed in the mapping table;
and mapping the target logic interval address to the source physical address according to the data shearing instruction so as to operate aiming at the target logic address of the data to be managed.
Optionally, after the step of mapping the target logical interval address to the source physical address according to the data clipping instruction, the method further includes:
and mapping the source logic interval address of the data to be managed to a preset invalid physical address of the nand flash memory.
In addition, in order to achieve the above object, the present invention provides a data management device for a Flash memory, including:
the determining module is used for receiving a data management instruction sent by the host, and determining a source physical address of the data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction;
and the operation module is used for operating the target logic interval address of the data to be managed according to the source physical address so as to manage the data to be managed.
The method for managing the data of the Flash memory comprises the following steps of realizing the data management method of the Flash memory when each functional module of the data management device of the Flash memory runs.
In addition, to achieve the above object, the present invention also provides a terminal device, including: the data management program of the Flash memory realizes the steps of the data management method of the Flash memory when being executed by the processor.
In addition, in order to achieve the above object, the present invention further provides a computer storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the data management method of the Flash memory as described above.
The invention provides a data error correction method, a device, terminal equipment and a computer storage medium of a Flash memory, wherein the data management method of the Flash memory is applied to a nand Flash memory, the nand Flash memory is connected with a host, and the data management method of the Flash memory comprises the following steps: determining a source physical address of the data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction, by receiving the data management instruction sent by the host; operating aiming at the target logic interval address of the data to be managed according to the source physical address so as to aim at the data to be managed; wherein the source logical interval address and the target logical address are both included in the data management instruction.
The data management method of the Flash memory is applied to a nand Flash memory, and comprises the steps of receiving a data management instruction sent by a host connected with the nand Flash memory, wherein the data management instruction comprises a target logic address of data to be managed and the data to be managed, determining a source physical address of the data to be managed in the nand Flash memory according to a source logic interval address of the data to be managed, and operating according to the source physical address of the data to be managed and the target logic interval address of the data to be managed so as to manage the data to be managed.
Compared with the traditional data management method, the data management method has the advantages that the source physical address of the data to be managed, which is stored in the nand flash memory, is determined according to the managed source logical interval address pointed by the data management instruction, and then the data to be managed is managed by directly operating the target logical interval address of the data to be managed according to the source physical address, so that the time of copying or shearing the data by a host is greatly saved when the data stored in the nand flash memory is managed.
Drawings
Fig. 1 is a schematic structural diagram of the hardware operation of a terminal device according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating an embodiment of a data management method for a Flash memory according to the present invention;
FIG. 3 is a schematic diagram of an application scenario of an embodiment of a data management method for a Flash memory according to the present invention;
FIG. 4 is a schematic diagram of a copy scenario of an embodiment of a data management method for a Flash memory according to the present invention;
FIG. 5 is a schematic diagram illustrating a data copying process according to an embodiment of a data management method for a Flash memory of the present invention;
FIG. 6 is a schematic diagram illustrating a data clipping flow according to an embodiment of a data management method for a Flash memory according to the present invention;
FIG. 7 is a functional block diagram of an embodiment of a data management apparatus for a Flash memory according to the present invention.
The objects, features and advantages of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention.
As shown in fig. 1, fig. 1 is a schematic structural diagram of a hardware operating environment related to a terminal device according to an embodiment of the present invention.
Fig. 1 is a schematic structural diagram of a hardware operating environment of a terminal device according to an embodiment of the present invention. The terminal device according to the embodiment of the present invention may be a firmware connected to a nand Flash memory and a host, or may be a memory based on the nand Flash as a storage medium, and the terminal device may be capable of executing the data management method of the Flash memory provided by the present invention, and the terminal device may specifically be a mobile terminal, a data storage control terminal, a PC, a portable computer, or a like terminal.
As shown in fig. 1, the terminal device may include: a processor 1001, such as a CPU, a network interface 1004, a user interface 1003, a memory 1005, a communication bus 1002. Wherein a communication bus 1002 is used to enable connective communication between these components. The user interface 1003 may include a Display screen (Display), an input unit such as a Keyboard (Keyboard), and the optional user interface 1003 may also include a standard wired interface, a wireless interface. The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., a WI-FI interface). The memory 1005 may be a non-volatile memory (e.g., flash memory), a high-speed RAM memory, or a non-volatile memory (e.g., a disk memory). The memory 1005 may alternatively be a storage device separate from the processor 1001 described previously.
Those skilled in the art will appreciate that the terminal device configuration shown in fig. 1 is not intended to be limiting of the terminal device and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, a memory 1005, which is a kind of computer storage medium, may include therein a data management program of an operating system, a network communication module, a user interface module, and a Flash memory. The operating system is a program for managing and controlling hardware and software resources of the sample terminal equipment, and supports the operation of a data management program of the Flash memory and other software or programs.
In the terminal apparatus shown in fig. 1, the user interface 1003 is mainly used for data communication with each terminal; the network interface 1004 is mainly used for connecting a background server and performing data communication with the background server; and processor 1001 may be configured to invoke a data management program of the Flash memory stored in memory 1005 and perform the following operations:
receiving a data management instruction sent by the host, and determining a source physical address of the data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction;
operating aiming at the target logic interval address of the data to be managed according to the source physical address so as to manage the data to be managed;
wherein the source logical interval address and the target logical address are both included in the data management instruction.
Alternatively, the processor 1001 may call a data management program of the Flash memory stored in the memory 1005, and further perform the following operations:
determining the source logic interval address of the data to be managed, which is pointed by the data management instruction, in a preset mapping table;
and determining the source physical address of the data to be managed in the nand flash memory according to the source logical interval address in the mapping table.
Optionally, the data management instruction includes: in the case of a data copy instruction, processor 1001 may call a data management program of the Flash memory stored in memory 1005, and further perform the following operations:
determining an empty physical space in the nand flash memory according to the source physical address and the data copy instruction;
determining a corresponding target physical address in the nand flash memory according to the empty physical space;
and determining the target logic interval address of the data to be managed in the mapping table, and mapping the target logic interval address to the target physical address so as to operate aiming at the target logic address of the data to be managed.
Alternatively, the processor 1001 may call a data management program of the Flash memory stored in the memory 1005, and further perform the following operations:
determining the data content of the data to be managed in the nand flash memory according to the source physical address and the data copying instruction;
and determining the empty physical space in the nand flash memory according to the data capacity of the data content.
Optionally, the data management instruction includes: in the data cutting instruction, the processor 1001 may call a data management program of the Flash memory stored in the memory 1005, and further perform the following operations:
determining the target logic interval address of the data to be managed in the mapping table;
and mapping the target logic interval address to the source physical address according to the data shearing instruction so as to operate aiming at the target logic address of the data to be managed.
Alternatively, the processor 1001 may call a data management program of the Flash memory stored in the memory 1005, and further perform the following operations:
and mapping the source logic interval address of the data to be managed to a preset invalid physical address of the nand flash memory.
Based on the terminal device, the invention provides various embodiments of the data management method of the Flash memory. In each embodiment of the data management method of the Flash memory, the data management method of the Flash memory is applied to the management of the data of the Flash memory.
Referring to fig. 2, fig. 2 is a schematic flow chart of a data management method of a Flash memory according to a first embodiment of the present invention. In a first embodiment of the data management method of the Flash memory of the present invention, the data management method of the Flash memory of the present invention is applied to a nand Flash memory, the nand Flash memory is connected to a host, and the data management method of the Flash memory includes:
step S10: receiving a data management instruction sent by the host, and determining a source physical address of the data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction;
in this embodiment, after receiving a data management instruction for managing data to be managed sent by a host, a firmware determines a source physical address of the data to be managed stored in a nand flash memory according to a source logical interval address of the data to be managed in the data management instruction in the host.
For example, in this embodiment, after the firmware receives a data management instruction for managing data to be managed, which is sent by a host connected to the storage device, the firmware determines, according to an original logical interval Address of the data to be managed, which is included in the data management instruction, an actual source physical Address of the data to be managed, which is stored in a nand flash memory, where the source logical interval Address is a logical Address of the data to be managed in the host, it should be understood that the logical interval Address is an LBA (Logic block Address) of the host, as shown in the application scenario diagram shown in fig. 3, the host is connected to the storage device including the nand flash memory, and the firmware of the storage device is connected to the host and the nand flash memory, where the firmware is a driver running in the storage device.
It should be noted that, in this embodiment, the data management method of the Flash memory of the present invention is not only applied to a nand Flash memory, but also applied to a nor Flash memory.
Optionally, in some possible embodiments, the step of "determining the source physical address of the data to be managed in the nand flash memory" in the step S10 may specifically include the following steps:
step S101: determining the source logic interval address of the data to be managed pointed by a data management instruction in a preset mapping table;
in this embodiment, after the firmware receives a data management instruction for managing data to be managed sent by the host, the firmware determines a source logical interval address of the data to be managed in a preset mapping table.
Illustratively, in this embodiment, after receiving a data management instruction for managing data to be managed, which is sent by a host connected to the storage device, the firmware of the storage device determines a source logical partition address of the data to be managed in a preset mapping table of the storage device, where it is understood that the preset mapping table is a comparison table of a physical partition address of data stored in a nand flash memory and a logical partition address of the data in the host.
Or, exemplarily, in this embodiment, after the firmware of the storage device receives a data management instruction for managing data to be managed, which is sent by a host connected to the storage device, where the data management instruction includes source logical interval addresses 1MB to 2MB of the data to be managed, the source logical interval addresses 1MB to 2MB of the data to be managed are determined in a preset mapping table of the storage device, and it should be understood that the preset mapping table is a comparison table of physical interval addresses of data stored in the nand flash memory and logical interval addresses of the data at the host.
Step S102: and determining the source physical address of the data to be managed in the nand flash memory according to the original logic interval address in the mapping table.
In this embodiment, after determining a source logical interval address of data to be managed in a preset mapping table, the firmware determines a source physical address of the data to be managed in the nand flash memory according to the source logical interval address in the mapping table.
Illustratively, in the present embodiment, after determining the source logical interval addresses 1MB to 2MB of the data to be managed in the preset mapping table, the firmware determines the 10 th page to the 100 th page of the data to be managed in the 10 th block of the source physical address in the nand flash memory according to the source logical interval addresses 1MB to 2MB in the mapping table.
Step S20: and operating aiming at the target logical address of the data to be managed according to the source physical address so as to manage the data to be managed.
In this embodiment, after determining the source physical address of the data to be managed in the nand flash memory according to the source logical interval address of the data to be managed included in the data management instruction, the firmware performs an operation on the target logical address of the data to be managed included in the data management instruction according to the source physical address of the data to be managed to manage the data to be managed.
Illustratively, in the present embodiment, after determining that the data to be managed is from the 10 th page to the 100 th page in the 10 th block of the source physical address in the nand flash memory according to the source logical interval addresses 1MB to 2MB of the data to be managed included in the data management instruction, the firmware operates on the target logical addresses 100MB to 101MB of the data to be managed included in the data management instruction according to the 10 th page to the 100 th page in the 10 th block of the source physical address of the data to be managed.
Optionally, in some possible embodiments, the data management instruction includes: the step of "operating on the target logical address of the data to be managed according to the source physical address" in step S20 may specifically include the following steps:
step S201: determining an empty physical space in the nand flash memory according to the source physical address and the data copy instruction;
in this embodiment, when copying data to be managed, after determining a source physical address of the data to be managed in a nand flash memory according to a source logical interval address of the data to be managed included in a data copy instruction, firmware determines an empty physical space in the nand flash memory according to the source physical address and a data copy instruction sent by a host.
Illustratively, in this embodiment, when the firmware receives a data copy instruction, which is sent by the host and is used for copying data to be managed with a logical address of 1MB to 2MB to a logical address of 100MB to 101MB, the firmware determines, according to a source logical interval address 1MB to 2MB of the data to be managed included in the data copy instruction, that the data to be managed is in a 10 th page to a 100 th page in a 10 th block of a source physical address in the nand flash memory, and then determines an empty physical space in the nand flash memory according to the 10 th page to the 100 th page in the 10 th block of the source physical address and the data copy instruction sent by the host.
It should be noted that, in this embodiment, when the firmware receives a data copy instruction sent by the host, the data copy instruction includes a source logical interval address and a target logical interval address of data to be managed, and the data to be managed in the source logical interval is copied to the target logical interval address.
Optionally, in some possible embodiments, the step S201 may include the following steps:
step S2011: determining the data content of the data to be managed in the nand flash memory according to the source physical address and the data copying instruction;
in this embodiment, when copying data to be managed, after determining a source physical address of the data to be managed in a nand flash memory according to a source logical interval address of the data to be managed included in a data management instruction, firmware determines data content of the data to be managed in the nand flash memory according to the source physical address and a data copy instruction sent by a host.
Exemplarily, in this embodiment, as shown in the schematic diagram of the copy scenario shown in fig. 4 and the schematic diagram of the flow of the copy data shown in fig. 5, after the firmware determines that the data to be managed is from the 10 th page to the 100 th page in the 10 th block of the source physical address in the nand flash memory according to the source logical interval addresses 1MB to 2MB of the data to be managed included in the data management instruction, the firmware determines the data content in the nand flash memory according to the 10 th page to the 100 th page in the 10 th block of the source physical address and the data copy instruction sent by the host.
Step S2012: and determining the empty physical space in the nand flash memory according to the data capacity of the data content.
In this embodiment, after the firmware determines the data content of the data to be managed in the nand flash memory according to the source physical address of the data to be managed, the firmware determines the empty physical space in the nand flash memory according to the data content of the data to be managed.
Illustratively, in this embodiment, after determining the data content of the data to be managed in the nand flash memory according to the 10 th page to the 100 th page in the 10 th block of the source physical address of the data to be managed, the firmware determines an empty physical space in the nand flash memory according to the data capacity of the data content, that is, finds an empty physical space storing the copy content of the data to be managed in the nand flash memory according to the data capacity of the data content.
Optionally, in some possible embodiments, after step S2012, the data management method for a Flash memory according to the present invention may further include the following steps:
step S2013: copying the data content of the data to be managed to the empty physical space of the nand flash memory.
In this embodiment, after determining an empty physical space in a nand flash memory according to the data capacity of the data content of the data to be managed, the firmware copies the data content of the data to be managed to the empty physical space of the nand flash memory.
Step S202: determining a corresponding target physical address in the nand flash memory according to the empty physical space;
in this embodiment, after the firmware finds an empty physical space in the nand flash memory according to the source physical address of the data to be managed and the data copy instruction, the firmware further determines a corresponding target physical address in the nand flash memory according to the empty physical space.
Illustratively, in this embodiment, after finding an empty physical space in a nand flash memory according to a source physical address 1MB to 2MB of data to be managed and a data copy instruction, the firmware further determines corresponding target physical addresses, such as a 20 th page to a 120 th page in a No. 20 block, in the nand flash memory according to the empty physical space, that is, determines a physical address of a storage space storing and copying the data to be managed after finding the storage space.
Step S203: and determining the target logic interval address of the data to be managed in the mapping table, and mapping the target logic interval address to the target physical address so as to operate aiming at the target logic address of the data to be managed.
In this embodiment, after determining the target physical address corresponding to the target physical space according to the target physical space of the data to be managed, the firmware further determines the target logical interval address of the data to be managed in the mapping table, and maps the target logical interval address to the target physical address, so as to operate on the target logical address of the data to be managed.
For example, in this embodiment, after the firmware determines, according to the target physical space of the data to be managed, the 20 th page to the 120 th page in the 20 th block of the target physical address corresponding to the target physical space, the firmware further determines the target logical interval addresses 100MB to 101MB of the data to be managed in the mapping table, and maps the target logical interval addresses 100MB to 101MB to the 20 th page to the 120 th page in the 20 th block of the target physical address, it should be noted that performing the operation on the target logical address of the data to be managed includes mapping the target logical address to the target physical address.
Thus, in this embodiment, after receiving a data management instruction for managing data to be managed sent by a host, firmware determines a source physical address of the data to be managed stored in a nand flash memory according to a source logical interval address of the data to be managed in the host, where the source logical interval address is included in the data management instruction; and then, after determining the source physical address of the data to be managed in the nand flash memory according to the source logical interval address of the data to be managed included in the data management instruction, the firmware operates the target logical address of the data to be managed included in the data management instruction according to the source physical address of the data to be managed so as to manage the data to be managed.
Therefore, the source physical address of the data to be managed is determined by the source logical address of the data to be managed pointed by the data management instruction received by the firmware, then the operation is directly carried out on the target logical address of the data to be managed included in the data management instruction according to the source physical address, the firmware does not need to return the data to the host, and then the operation is carried out on the data from the host, so that the time of copying the data by the host is greatly saved when the data stored in the nand flash memory is managed.
Optionally, based on the above first embodiment of the data management method of the Flash memory of the present invention, a second embodiment of the data management method of the Flash memory of the present invention is provided.
In this embodiment, the data management instruction includes: in the step S20 of "operating on the target logical address of the data to be managed according to the source physical address", the data cutting instruction may specifically include the following steps:
step S204: determining the target logic interval address of the data to be managed in the mapping table;
in this embodiment, when cutting data to be managed, the firmware determines a target logical interval address of the data to be managed included in the data cutting instruction in the mapping table.
Illustratively, in this embodiment, as shown in the data clipping flowchart of fig. 6, when the firmware receives a data clipping instruction sent by the host to clip to the logical addresses 100MB to 101MB for the data to be managed with the logical addresses 1MB to 2MB, the firmware determines, in the mapping table, the target logical interval addresses 100MB to 101MB of the data to be managed included in the data clipping instruction.
Step S205: and mapping the target logic interval address to the source physical address according to the data shearing instruction.
In this embodiment, after determining, in the mapping table, a target logical interval address of data to be managed included in the data clipping instruction, the firmware maps the target logical interval address to a source physical address of the data to be managed according to the data clipping instruction, so as to perform an operation on the target logical address of the data to be managed.
Illustratively, in the present embodiment, after determining, in the mapping table, the target logical interval addresses 100MB to 101MB of the data to be managed included in the data clipping instruction, the firmware maps to the 10 th page to the 100 th page in the 10 th block of the source physical address of the data to be managed according to the target logical interval addresses 100MB to 101MB included in the data clipping instruction to perform an operation on the target logical address of the data to be managed, and it should be understood that performing an operation on the target logical address of the data to be managed includes mapping the target logical interval address to the source physical address of the data to be managed.
Optionally, in some possible embodiments, after step S205, the data management method for a Flash memory according to the present invention may further include the following steps:
step S206: and mapping the source logic interval address of the data to be managed to a preset invalid physical address of the nand flash memory.
In this embodiment, after mapping the target logical interval address of the data to be managed to the source physical address of the data to be managed according to the data clipping instruction, the firmware maps the source logical interval address of the data to be managed to the preset invalid physical address of the nand flash memory.
Illustratively, in this embodiment, after mapping the target logical interval address of the data to be managed to the source physical address of the data to be managed according to the data clipping instruction, the firmware maps the source logical interval address 100MB to 101MB of the data to be managed to the preset invalid physical address of the nand flash memory to complete clipping the data to be managed to the logical address 100MB to 101MB with the logical address of 1MB to 2 MB.
In the embodiment, after mapping the target logical interval address of the data to be managed to the source physical address of the data to be managed according to the data shearing instruction, the firmware maps the source logical interval address of the data to be managed to the preset invalid physical address of the nand flash memory, so that when the data stored in the nand flash memory is managed, the time of shearing the data by the host is greatly saved.
In addition, referring to fig. 7, an embodiment of the present invention further provides a data management device for a Flash memory, where the data management device for a Flash memory includes:
a determining module 10, configured to receive a data management instruction sent by the host, and determine a source physical address of the data to be managed in the nand flash memory according to a source logical interval address of the data to be managed, where the source logical interval address is pointed by the data management instruction;
an operation module 20, configured to operate on the target logical address of the data to be managed according to the source physical address to manage the data to be managed.
Optionally, the determining module 10 includes:
a first determining unit, configured to determine, in a preset mapping table, the source logical interval address of the to-be-managed data to which the data management instruction points;
and the second determining unit is used for determining the source physical address of the data to be managed in the nand flash memory according to the source logical interval address in the mapping table.
Optionally, the data management instruction includes: data copy instructions, operation module 20, including:
a third determining unit, configured to determine an empty physical space in the nand flash memory according to the source physical address and the data copy instruction;
a fourth determining unit, configured to determine a corresponding target physical address in the nand flash memory according to the empty physical space;
a first mapping unit, configured to determine the target logical interval address of the data to be managed in the mapping table, and map the target logical interval address to the target physical address, so as to perform an operation on the target logical address of the data to be managed.
Optionally, the third determining unit includes:
the first determining subunit is used for determining the data content of the data to be managed in the nand flash memory according to the source physical address and the data copying instruction;
and the second determining subunit is used for determining the empty physical space in the nand flash memory according to the data capacity of the data content.
Optionally, the third determining unit further includes:
a copy subunit, configured to copy the data content of the data to be managed to the empty physical space of the nand flash memory.
Optionally, the data management instruction includes: the data cutting instruction, the operation module 20, further includes:
a fifth determination unit, configured to determine the target logical interval address of the data to be managed in the mapping table;
a second mapping unit, configured to map the target logical interval address to the source physical address according to the data clipping instruction, so as to perform an operation on a target logical address of the data to be managed.
Optionally, the operation module 20 further includes:
and the third mapping unit is used for mapping the source logic interval address of the data to be managed to a preset invalid physical address of the nand flash memory.
The steps implemented by each functional module of the data management device of the Flash memory when the controller runs can refer to the above embodiment of the data management method of the Flash memory, and are not described herein again.
In addition, an embodiment of the present invention further provides a terminal device, where the terminal device includes: the data management program of the Flash memory is executed by the processor to realize the steps of the data management method of the Flash memory.
The steps implemented when the data management program of the Flash memory running on the processor is executed may refer to various embodiments of the data management method of the Flash memory of the present invention, and are not described herein again.
In addition, an embodiment of the present invention further provides a computer storage medium applied to a computer, where the computer storage medium may be a non-volatile computer-readable computer storage medium, a data management program of a Flash memory is stored on the computer storage medium, and when executed by a processor, the data management program of the Flash memory implements the steps of the data management method of the Flash memory.
The steps implemented when the data management program of the Flash memory running on the processor is executed may refer to various embodiments of the data management method of the Flash memory of the present invention, and are not described herein again.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention or portions thereof contributing to the prior art may be embodied in the form of a software product, where the computer software product is stored in a computer storage medium (such as a Flash memory, a ROM/RAM, a magnetic disk, an optical disk), and includes several instructions for enabling a controller, which is used for controlling the storage medium to perform data reading and writing operations, in a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.), to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A data management method of a Flash memory is characterized in that the data management method of the Flash memory is applied to a nand Flash memory, the nand Flash memory is connected with a host, and the data management method of the Flash memory comprises the following steps:
receiving a data management instruction sent by the host, and determining a source physical address of the data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction;
operating aiming at the target logic interval address of the data to be managed according to the source physical address so as to manage the data to be managed;
wherein the source logical interval address and the target logical address are both included in the data management instruction.
2. The data management method of the Flash memory according to claim 1, wherein the step of determining the source physical address of the data to be managed in the nand Flash memory according to the source logical interval address of the data to be managed to which the data management instruction points includes:
determining the source logic interval address of the data to be managed, which is pointed by the data management instruction, in a preset mapping table;
and determining the source physical address of the data to be managed in the nand flash memory according to the source logic interval address in the mapping table.
3. The data management method of a Flash memory according to claim 2, wherein the data management instruction includes: a data copy instruction, where the step of operating on the target logical address of the data to be managed according to the source physical address includes:
determining an empty physical space in the nand flash memory according to the source physical address and the data copy instruction;
determining a corresponding target physical address in the nand flash memory according to the empty physical space;
and determining the target logic interval address of the data to be managed in the mapping table, and mapping the target logic interval address to the target physical address so as to operate aiming at the target logic address of the data to be managed.
4. The data management method of the Flash memory according to claim 3, wherein the step of determining an empty physical space in the nand Flash memory according to the source physical address and the data copy instruction comprises:
determining the data content of the data to be managed in the nand flash memory according to the source physical address and the data copying instruction;
and determining the empty physical space in the nand flash memory according to the data capacity of the data content.
5. The data management method of Flash memory according to claim 4, wherein after the step of determining the empty physical space in the nand Flash memory according to the data content, the method further comprises:
copying the data content of the data to be managed to the empty physical space of the nand flash memory.
6. The data management method of a Flash memory according to claim 2, wherein the data management instruction includes: the step of operating the target logical address of the data to be managed according to the source physical address includes:
determining the target logic interval address of the data to be managed in the mapping table;
and mapping the target logic interval address to the source physical address according to the data shearing instruction so as to operate aiming at the target logic address of the data to be managed.
7. The data management method of Flash memory according to claim 6, wherein after the step of mapping the target logical inter-range address to the source physical address according to the data clipping instruction, the method further comprises:
and mapping the source logic interval address of the data to be managed to a preset invalid physical address of the nand flash memory.
8. A data management device of a Flash memory is characterized by comprising the following components:
the determining module is used for receiving a data management instruction sent by the host, and determining a source physical address of the data to be managed in the nand flash memory according to a source logic interval address of the data to be managed, which is pointed by the data management instruction;
and the operation module is used for operating the target interval logical address of the data to be managed according to the source physical address so as to manage the data to be managed.
9. A terminal device, characterized in that the terminal device comprises: memory, processor and data management program of a Flash memory stored on the memory and operable on the processor, which data management program of the Flash memory, when executed by the processor, implements the steps of the data management method of a Flash memory according to any one of claims 1 to 7.
10. A computer storage medium, characterized in that it has stored thereon a computer program which, when being executed by a processor, carries out the steps of the data management method of a Flash memory according to any one of claims 1 to 7.
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